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USB: gadget: pxa25x compiler warning fix
[linux-2.6/mini2440.git] / drivers / usb / gadget / pxa25x_udc.c
blobed21e263f832f05d977aa4c4acd41881dd013002
1 /*
2 * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
3 *
4 * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
5 * Copyright (C) 2003 Robert Schwebel, Pengutronix
6 * Copyright (C) 2003 Benedikt Spranger, Pengutronix
7 * Copyright (C) 2003 David Brownell
8 * Copyright (C) 2003 Joshua Wise
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 */
25
26 /* #define VERBOSE_DEBUG */
27
28 #include <linux/device.h>
29 #include <linux/module.h>
30 #include <linux/kernel.h>
31 #include <linux/ioport.h>
32 #include <linux/types.h>
33 #include <linux/errno.h>
34 #include <linux/delay.h>
35 #include <linux/slab.h>
36 #include <linux/init.h>
37 #include <linux/timer.h>
38 #include <linux/list.h>
39 #include <linux/interrupt.h>
40 #include <linux/mm.h>
41 #include <linux/platform_device.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/irq.h>
44 #include <linux/clk.h>
45 #include <linux/err.h>
46 #include <linux/seq_file.h>
47 #include <linux/debugfs.h>
48 #include <linux/io.h>
49
50 #include <asm/byteorder.h>
51 #include <asm/dma.h>
52 #include <asm/gpio.h>
53 #include <asm/system.h>
54 #include <asm/mach-types.h>
55 #include <asm/unaligned.h>
56
57 #include <linux/usb/ch9.h>
58 #include <linux/usb/gadget.h>
59
60 /*
61 * This driver is PXA25x only. Grab the right register definitions.
62 */
63 #ifdef CONFIG_ARCH_PXA
64 #include <mach/pxa25x-udc.h>
65 #endif
66
67 #include <asm/mach/udc_pxa2xx.h>
68
69
70 /*
71 * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x
72 * series processors. The UDC for the IXP 4xx series is very similar.
73 * There are fifteen endpoints, in addition to ep0.
74 *
75 * Such controller drivers work with a gadget driver. The gadget driver
76 * returns descriptors, implements configuration and data protocols used
77 * by the host to interact with this device, and allocates endpoints to
78 * the different protocol interfaces. The controller driver virtualizes
79 * usb hardware so that the gadget drivers will be more portable.
80 *
81 * This UDC hardware wants to implement a bit too much USB protocol, so
82 * it constrains the sorts of USB configuration change events that work.
83 * The errata for these chips are misleading; some "fixed" bugs from
84 * pxa250 a0/a1 b0/b1/b2 sure act like they're still there.
85 *
86 * Note that the UDC hardware supports DMA (except on IXP) but that's
87 * not used here. IN-DMA (to host) is simple enough, when the data is
88 * suitably aligned (16 bytes) ... the network stack doesn't do that,
89 * other software can. OUT-DMA is buggy in most chip versions, as well
90 * as poorly designed (data toggle not automatic). So this driver won't
91 * bother using DMA. (Mostly-working IN-DMA support was available in
92 * kernels before 2.6.23, but was never enabled or well tested.)
93 */
94
95 #define DRIVER_VERSION "30-June-2007"
96 #define DRIVER_DESC "PXA 25x USB Device Controller driver"
97
98
99 static const char driver_name [] = "pxa25x_udc";
100
101 static const char ep0name [] = "ep0";
102
103
104 #ifdef CONFIG_ARCH_IXP4XX
105
106 /* cpu-specific register addresses are compiled in to this code */
107 #ifdef CONFIG_ARCH_PXA
108 #error "Can't configure both IXP and PXA"
109 #endif
110
111 /* IXP doesn't yet support <linux/clk.h> */
112 #define clk_get(dev,name) NULL
113 #define clk_enable(clk) do { } while (0)
114 #define clk_disable(clk) do { } while (0)
115 #define clk_put(clk) do { } while (0)
116
117 #endif
118
119 #include "pxa25x_udc.h"
120
121
122 #ifdef CONFIG_USB_PXA25X_SMALL
123 #define SIZE_STR " (small)"
124 #else
125 #define SIZE_STR ""
126 #endif
127
128 /* ---------------------------------------------------------------------------
129 * endpoint related parts of the api to the usb controller hardware,
130 * used by gadget driver; and the inner talker-to-hardware core.
131 * ---------------------------------------------------------------------------
132 */
133
134 static void pxa25x_ep_fifo_flush (struct usb_ep *ep);
135 static void nuke (struct pxa25x_ep *, int status);
136
137 /* one GPIO should be used to detect VBUS from the host */
138 static int is_vbus_present(void)
139 {
140 struct pxa2xx_udc_mach_info *mach = the_controller->mach;
141
142 if (gpio_is_valid(mach->gpio_vbus)) {
143 int value = gpio_get_value(mach->gpio_vbus);
144
145 if (mach->gpio_vbus_inverted)
146 return !value;
147 else
148 return !!value;
149 }
150 if (mach->udc_is_connected)
151 return mach->udc_is_connected();
152 return 1;
153 }
154
155 /* one GPIO should control a D+ pullup, so host sees this device (or not) */
156 static void pullup_off(void)
157 {
158 struct pxa2xx_udc_mach_info *mach = the_controller->mach;
159 int off_level = mach->gpio_pullup_inverted;
160
161 if (gpio_is_valid(mach->gpio_pullup))
162 gpio_set_value(mach->gpio_pullup, off_level);
163 else if (mach->udc_command)
164 mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
165 }
166
167 static void pullup_on(void)
168 {
169 struct pxa2xx_udc_mach_info *mach = the_controller->mach;
170 int on_level = !mach->gpio_pullup_inverted;
171
172 if (gpio_is_valid(mach->gpio_pullup))
173 gpio_set_value(mach->gpio_pullup, on_level);
174 else if (mach->udc_command)
175 mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
176 }
177
178 static void pio_irq_enable(int bEndpointAddress)
179 {
180 bEndpointAddress &= 0xf;
181 if (bEndpointAddress < 8)
182 UICR0 &= ~(1 << bEndpointAddress);
183 else {
184 bEndpointAddress -= 8;
185 UICR1 &= ~(1 << bEndpointAddress);
186 }
187 }
188
189 static void pio_irq_disable(int bEndpointAddress)
190 {
191 bEndpointAddress &= 0xf;
192 if (bEndpointAddress < 8)
193 UICR0 |= 1 << bEndpointAddress;
194 else {
195 bEndpointAddress -= 8;
196 UICR1 |= 1 << bEndpointAddress;
197 }
198 }
199
200 /* The UDCCR reg contains mask and interrupt status bits,
201 * so using '|=' isn't safe as it may ack an interrupt.
202 */
203 #define UDCCR_MASK_BITS (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)
204
205 static inline void udc_set_mask_UDCCR(int mask)
206 {
207 UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS);
208 }
209
210 static inline void udc_clear_mask_UDCCR(int mask)
211 {
212 UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS);
213 }
214
215 static inline void udc_ack_int_UDCCR(int mask)
216 {
217 /* udccr contains the bits we dont want to change */
218 __u32 udccr = UDCCR & UDCCR_MASK_BITS;
219
220 UDCCR = udccr | (mask & ~UDCCR_MASK_BITS);
221 }
222
223 /*
224 * endpoint enable/disable
225 *
226 * we need to verify the descriptors used to enable endpoints. since pxa25x
227 * endpoint configurations are fixed, and are pretty much always enabled,
228 * there's not a lot to manage here.
229 *
230 * because pxa25x can't selectively initialize bulk (or interrupt) endpoints,
231 * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
232 * for a single interface (with only the default altsetting) and for gadget
233 * drivers that don't halt endpoints (not reset by set_interface). that also
234 * means that if you use ISO, you must violate the USB spec rule that all
235 * iso endpoints must be in non-default altsettings.
236 */
237 static int pxa25x_ep_enable (struct usb_ep *_ep,
238 const struct usb_endpoint_descriptor *desc)
239 {
240 struct pxa25x_ep *ep;
241 struct pxa25x_udc *dev;
242
243 ep = container_of (_ep, struct pxa25x_ep, ep);
244 if (!_ep || !desc || ep->desc || _ep->name == ep0name
245 || desc->bDescriptorType != USB_DT_ENDPOINT
246 || ep->bEndpointAddress != desc->bEndpointAddress
247 || ep->fifo_size < le16_to_cpu
248 (desc->wMaxPacketSize)) {
249 DMSG("%s, bad ep or descriptor\n", __func__);
250 return -EINVAL;
251 }
252
253 /* xfer types must match, except that interrupt ~= bulk */
254 if (ep->bmAttributes != desc->bmAttributes
255 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
256 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
257 DMSG("%s, %s type mismatch\n", __func__, _ep->name);
258 return -EINVAL;
259 }
260
261 /* hardware _could_ do smaller, but driver doesn't */
262 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
263 && le16_to_cpu (desc->wMaxPacketSize)
264 != BULK_FIFO_SIZE)
265 || !desc->wMaxPacketSize) {
266 DMSG("%s, bad %s maxpacket\n", __func__, _ep->name);
267 return -ERANGE;
268 }
269
270 dev = ep->dev;
271 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
272 DMSG("%s, bogus device state\n", __func__);
273 return -ESHUTDOWN;
274 }
275
276 ep->desc = desc;
277 ep->stopped = 0;
278 ep->pio_irqs = 0;
279 ep->ep.maxpacket = le16_to_cpu (desc->wMaxPacketSize);
280
281 /* flush fifo (mostly for OUT buffers) */
282 pxa25x_ep_fifo_flush (_ep);
283
284 /* ... reset halt state too, if we could ... */
285
286 DBG(DBG_VERBOSE, "enabled %s\n", _ep->name);
287 return 0;
288 }
289
290 static int pxa25x_ep_disable (struct usb_ep *_ep)
291 {
292 struct pxa25x_ep *ep;
293 unsigned long flags;
294
295 ep = container_of (_ep, struct pxa25x_ep, ep);
296 if (!_ep || !ep->desc) {
297 DMSG("%s, %s not enabled\n", __func__,
298 _ep ? ep->ep.name : NULL);
299 return -EINVAL;
300 }
301 local_irq_save(flags);
302
303 nuke (ep, -ESHUTDOWN);
304
305 /* flush fifo (mostly for IN buffers) */
306 pxa25x_ep_fifo_flush (_ep);
307
308 ep->desc = NULL;
309 ep->stopped = 1;
310
311 local_irq_restore(flags);
312 DBG(DBG_VERBOSE, "%s disabled\n", _ep->name);
313 return 0;
314 }
315
316 /*-------------------------------------------------------------------------*/
317
318 /* for the pxa25x, these can just wrap kmalloc/kfree. gadget drivers
319 * must still pass correctly initialized endpoints, since other controller
320 * drivers may care about how it's currently set up (dma issues etc).
321 */
322
323 /*
324 * pxa25x_ep_alloc_request - allocate a request data structure
325 */
326 static struct usb_request *
327 pxa25x_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
328 {
329 struct pxa25x_request *req;
330
331 req = kzalloc(sizeof(*req), gfp_flags);
332 if (!req)
333 return NULL;
334
335 INIT_LIST_HEAD (&req->queue);
336 return &req->req;
337 }
338
339
340 /*
341 * pxa25x_ep_free_request - deallocate a request data structure
342 */
343 static void
344 pxa25x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
345 {
346 struct pxa25x_request *req;
347
348 req = container_of (_req, struct pxa25x_request, req);
349 WARN_ON(!list_empty (&req->queue));
350 kfree(req);
351 }
352
353 /*-------------------------------------------------------------------------*/
354
355 /*
356 * done - retire a request; caller blocked irqs
357 */
358 static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status)
359 {
360 unsigned stopped = ep->stopped;
361
362 list_del_init(&req->queue);
363
364 if (likely (req->req.status == -EINPROGRESS))
365 req->req.status = status;
366 else
367 status = req->req.status;
368
369 if (status && status != -ESHUTDOWN)
370 DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n",
371 ep->ep.name, &req->req, status,
372 req->req.actual, req->req.length);
373
374 /* don't modify queue heads during completion callback */
375 ep->stopped = 1;
376 req->req.complete(&ep->ep, &req->req);
377 ep->stopped = stopped;
378 }
379
380
381 static inline void ep0_idle (struct pxa25x_udc *dev)
382 {
383 dev->ep0state = EP0_IDLE;
384 }
385
386 static int
387 write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max)
388 {
389 u8 *buf;
390 unsigned length, count;
391
392 buf = req->req.buf + req->req.actual;
393 prefetch(buf);
394
395 /* how big will this packet be? */
396 length = min(req->req.length - req->req.actual, max);
397 req->req.actual += length;
398
399 count = length;
400 while (likely(count--))
401 *uddr = *buf++;
402
403 return length;
404 }
405
406 /*
407 * write to an IN endpoint fifo, as many packets as possible.
408 * irqs will use this to write the rest later.
409 * caller guarantees at least one packet buffer is ready (or a zlp).
410 */
411 static int
412 write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
413 {
414 unsigned max;
415
416 max = le16_to_cpu(ep->desc->wMaxPacketSize);
417 do {
418 unsigned count;
419 int is_last, is_short;
420
421 count = write_packet(ep->reg_uddr, req, max);
422
423 /* last packet is usually short (or a zlp) */
424 if (unlikely (count != max))
425 is_last = is_short = 1;
426 else {
427 if (likely(req->req.length != req->req.actual)
428 || req->req.zero)
429 is_last = 0;
430 else
431 is_last = 1;
432 /* interrupt/iso maxpacket may not fill the fifo */
433 is_short = unlikely (max < ep->fifo_size);
434 }
435
436 DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n",
437 ep->ep.name, count,
438 is_last ? "/L" : "", is_short ? "/S" : "",
439 req->req.length - req->req.actual, req);
440
441 /* let loose that packet. maybe try writing another one,
442 * double buffering might work. TSP, TPC, and TFS
443 * bit values are the same for all normal IN endpoints.
444 */
445 *ep->reg_udccs = UDCCS_BI_TPC;
446 if (is_short)
447 *ep->reg_udccs = UDCCS_BI_TSP;
448
449 /* requests complete when all IN data is in the FIFO */
450 if (is_last) {
451 done (ep, req, 0);
452 if (list_empty(&ep->queue))
453 pio_irq_disable (ep->bEndpointAddress);
454 return 1;
455 }
456
457 // TODO experiment: how robust can fifo mode tweaking be?
458 // double buffering is off in the default fifo mode, which
459 // prevents TFS from being set here.
460
461 } while (*ep->reg_udccs & UDCCS_BI_TFS);
462 return 0;
463 }
464
465 /* caller asserts req->pending (ep0 irq status nyet cleared); starts
466 * ep0 data stage. these chips want very simple state transitions.
467 */
468 static inline
469 void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag)
470 {
471 UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR;
472 USIR0 = USIR0_IR0;
473 dev->req_pending = 0;
474 DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n",
475 __func__, tag, UDCCS0, flags);
476 }
477
478 static int
479 write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
480 {
481 unsigned count;
482 int is_short;
483
484 count = write_packet(&UDDR0, req, EP0_FIFO_SIZE);
485 ep->dev->stats.write.bytes += count;
486
487 /* last packet "must be" short (or a zlp) */
488 is_short = (count != EP0_FIFO_SIZE);
489
490 DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count,
491 req->req.length - req->req.actual, req);
492
493 if (unlikely (is_short)) {
494 if (ep->dev->req_pending)
495 ep0start(ep->dev, UDCCS0_IPR, "short IN");
496 else
497 UDCCS0 = UDCCS0_IPR;
498
499 count = req->req.length;
500 done (ep, req, 0);
501 ep0_idle(ep->dev);
502 #ifndef CONFIG_ARCH_IXP4XX
503 #if 1
504 /* This seems to get rid of lost status irqs in some cases:
505 * host responds quickly, or next request involves config
506 * change automagic, or should have been hidden, or ...
507 *
508 * FIXME get rid of all udelays possible...
509 */
510 if (count >= EP0_FIFO_SIZE) {
511 count = 100;
512 do {
513 if ((UDCCS0 & UDCCS0_OPR) != 0) {
514 /* clear OPR, generate ack */
515 UDCCS0 = UDCCS0_OPR;
516 break;
517 }
518 count--;
519 udelay(1);
520 } while (count);
521 }
522 #endif
523 #endif
524 } else if (ep->dev->req_pending)
525 ep0start(ep->dev, 0, "IN");
526 return is_short;
527 }
528
529
530 /*
531 * read_fifo - unload packet(s) from the fifo we use for usb OUT
532 * transfers and put them into the request. caller should have made
533 * sure there's at least one packet ready.
534 *
535 * returns true if the request completed because of short packet or the
536 * request buffer having filled (and maybe overran till end-of-packet).
537 */
538 static int
539 read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
540 {
541 for (;;) {
542 u32 udccs;
543 u8 *buf;
544 unsigned bufferspace, count, is_short;
545
546 /* make sure there's a packet in the FIFO.
547 * UDCCS_{BO,IO}_RPC are all the same bit value.
548 * UDCCS_{BO,IO}_RNE are all the same bit value.
549 */
550 udccs = *ep->reg_udccs;
551 if (unlikely ((udccs & UDCCS_BO_RPC) == 0))
552 break;
553 buf = req->req.buf + req->req.actual;
554 prefetchw(buf);
555 bufferspace = req->req.length - req->req.actual;
556
557 /* read all bytes from this packet */
558 if (likely (udccs & UDCCS_BO_RNE)) {
559 count = 1 + (0x0ff & *ep->reg_ubcr);
560 req->req.actual += min (count, bufferspace);
561 } else /* zlp */
562 count = 0;
563 is_short = (count < ep->ep.maxpacket);
564 DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n",
565 ep->ep.name, udccs, count,
566 is_short ? "/S" : "",
567 req, req->req.actual, req->req.length);
568 while (likely (count-- != 0)) {
569 u8 byte = (u8) *ep->reg_uddr;
570
571 if (unlikely (bufferspace == 0)) {
572 /* this happens when the driver's buffer
573 * is smaller than what the host sent.
574 * discard the extra data.
575 */
576 if (req->req.status != -EOVERFLOW)
577 DMSG("%s overflow %d\n",
578 ep->ep.name, count);
579 req->req.status = -EOVERFLOW;
580 } else {
581 *buf++ = byte;
582 bufferspace--;
583 }
584 }
585 *ep->reg_udccs = UDCCS_BO_RPC;
586 /* RPC/RSP/RNE could now reflect the other packet buffer */
587
588 /* iso is one request per packet */
589 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
590 if (udccs & UDCCS_IO_ROF)
591 req->req.status = -EHOSTUNREACH;
592 /* more like "is_done" */
593 is_short = 1;
594 }
595
596 /* completion */
597 if (is_short || req->req.actual == req->req.length) {
598 done (ep, req, 0);
599 if (list_empty(&ep->queue))
600 pio_irq_disable (ep->bEndpointAddress);
601 return 1;
602 }
603
604 /* finished that packet. the next one may be waiting... */
605 }
606 return 0;
607 }
608
609 /*
610 * special ep0 version of the above. no UBCR0 or double buffering; status
611 * handshaking is magic. most device protocols don't need control-OUT.
612 * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other
613 * protocols do use them.
614 */
615 static int
616 read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
617 {
618 u8 *buf, byte;
619 unsigned bufferspace;
620
621 buf = req->req.buf + req->req.actual;
622 bufferspace = req->req.length - req->req.actual;
623
624 while (UDCCS0 & UDCCS0_RNE) {
625 byte = (u8) UDDR0;
626
627 if (unlikely (bufferspace == 0)) {
628 /* this happens when the driver's buffer
629 * is smaller than what the host sent.
630 * discard the extra data.
631 */
632 if (req->req.status != -EOVERFLOW)
633 DMSG("%s overflow\n", ep->ep.name);
634 req->req.status = -EOVERFLOW;
635 } else {
636 *buf++ = byte;
637 req->req.actual++;
638 bufferspace--;
639 }
640 }
641
642 UDCCS0 = UDCCS0_OPR | UDCCS0_IPR;
643
644 /* completion */
645 if (req->req.actual >= req->req.length)
646 return 1;
647
648 /* finished that packet. the next one may be waiting... */
649 return 0;
650 }
651
652 /*-------------------------------------------------------------------------*/
653
654 static int
655 pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
656 {
657 struct pxa25x_request *req;
658 struct pxa25x_ep *ep;
659 struct pxa25x_udc *dev;
660 unsigned long flags;
661
662 req = container_of(_req, struct pxa25x_request, req);
663 if (unlikely (!_req || !_req->complete || !_req->buf
664 || !list_empty(&req->queue))) {
665 DMSG("%s, bad params\n", __func__);
666 return -EINVAL;
667 }
668
669 ep = container_of(_ep, struct pxa25x_ep, ep);
670 if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
671 DMSG("%s, bad ep\n", __func__);
672 return -EINVAL;
673 }
674
675 dev = ep->dev;
676 if (unlikely (!dev->driver
677 || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
678 DMSG("%s, bogus device state\n", __func__);
679 return -ESHUTDOWN;
680 }
681
682 /* iso is always one packet per request, that's the only way
683 * we can report per-packet status. that also helps with dma.
684 */
685 if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
686 && req->req.length > le16_to_cpu
687 (ep->desc->wMaxPacketSize)))
688 return -EMSGSIZE;
689
690 DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n",
691 _ep->name, _req, _req->length, _req->buf);
692
693 local_irq_save(flags);
694
695 _req->status = -EINPROGRESS;
696 _req->actual = 0;
697
698 /* kickstart this i/o queue? */
699 if (list_empty(&ep->queue) && !ep->stopped) {
700 if (ep->desc == NULL/* ep0 */) {
701 unsigned length = _req->length;
702
703 switch (dev->ep0state) {
704 case EP0_IN_DATA_PHASE:
705 dev->stats.write.ops++;
706 if (write_ep0_fifo(ep, req))
707 req = NULL;
708 break;
709
710 case EP0_OUT_DATA_PHASE:
711 dev->stats.read.ops++;
712 /* messy ... */
713 if (dev->req_config) {
714 DBG(DBG_VERBOSE, "ep0 config ack%s\n",
715 dev->has_cfr ? "" : " raced");
716 if (dev->has_cfr)
717 UDCCFR = UDCCFR_AREN|UDCCFR_ACM
718 |UDCCFR_MB1;
719 done(ep, req, 0);
720 dev->ep0state = EP0_END_XFER;
721 local_irq_restore (flags);
722 return 0;
723 }
724 if (dev->req_pending)
725 ep0start(dev, UDCCS0_IPR, "OUT");
726 if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0
727 && read_ep0_fifo(ep, req))) {
728 ep0_idle(dev);
729 done(ep, req, 0);
730 req = NULL;
731 }
732 break;
733
734 default:
735 DMSG("ep0 i/o, odd state %d\n", dev->ep0state);
736 local_irq_restore (flags);
737 return -EL2HLT;
738 }
739 /* can the FIFO can satisfy the request immediately? */
740 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
741 if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0
742 && write_fifo(ep, req))
743 req = NULL;
744 } else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0
745 && read_fifo(ep, req)) {
746 req = NULL;
747 }
748
749 if (likely (req && ep->desc))
750 pio_irq_enable(ep->bEndpointAddress);
751 }
752
753 /* pio or dma irq handler advances the queue. */
754 if (likely(req != NULL))
755 list_add_tail(&req->queue, &ep->queue);
756 local_irq_restore(flags);
757
758 return 0;
759 }
760
761
762 /*
763 * nuke - dequeue ALL requests
764 */
765 static void nuke(struct pxa25x_ep *ep, int status)
766 {
767 struct pxa25x_request *req;
768
769 /* called with irqs blocked */
770 while (!list_empty(&ep->queue)) {
771 req = list_entry(ep->queue.next,
772 struct pxa25x_request,
773 queue);
774 done(ep, req, status);
775 }
776 if (ep->desc)
777 pio_irq_disable (ep->bEndpointAddress);
778 }
779
780
781 /* dequeue JUST ONE request */
782 static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
783 {
784 struct pxa25x_ep *ep;
785 struct pxa25x_request *req;
786 unsigned long flags;
787
788 ep = container_of(_ep, struct pxa25x_ep, ep);
789 if (!_ep || ep->ep.name == ep0name)
790 return -EINVAL;
791
792 local_irq_save(flags);
793
794 /* make sure it's actually queued on this endpoint */
795 list_for_each_entry (req, &ep->queue, queue) {
796 if (&req->req == _req)
797 break;
798 }
799 if (&req->req != _req) {
800 local_irq_restore(flags);
801 return -EINVAL;
802 }
803
804 done(ep, req, -ECONNRESET);
805
806 local_irq_restore(flags);
807 return 0;
808 }
809
810 /*-------------------------------------------------------------------------*/
811
812 static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value)
813 {
814 struct pxa25x_ep *ep;
815 unsigned long flags;
816
817 ep = container_of(_ep, struct pxa25x_ep, ep);
818 if (unlikely (!_ep
819 || (!ep->desc && ep->ep.name != ep0name))
820 || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
821 DMSG("%s, bad ep\n", __func__);
822 return -EINVAL;
823 }
824 if (value == 0) {
825 /* this path (reset toggle+halt) is needed to implement
826 * SET_INTERFACE on normal hardware. but it can't be
827 * done from software on the PXA UDC, and the hardware
828 * forgets to do it as part of SET_INTERFACE automagic.
829 */
830 DMSG("only host can clear %s halt\n", _ep->name);
831 return -EROFS;
832 }
833
834 local_irq_save(flags);
835
836 if ((ep->bEndpointAddress & USB_DIR_IN) != 0
837 && ((*ep->reg_udccs & UDCCS_BI_TFS) == 0
838 || !list_empty(&ep->queue))) {
839 local_irq_restore(flags);
840 return -EAGAIN;
841 }
842
843 /* FST bit is the same for control, bulk in, bulk out, interrupt in */
844 *ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF;
845
846 /* ep0 needs special care */
847 if (!ep->desc) {
848 start_watchdog(ep->dev);
849 ep->dev->req_pending = 0;
850 ep->dev->ep0state = EP0_STALL;
851
852 /* and bulk/intr endpoints like dropping stalls too */
853 } else {
854 unsigned i;
855 for (i = 0; i < 1000; i += 20) {
856 if (*ep->reg_udccs & UDCCS_BI_SST)
857 break;
858 udelay(20);
859 }
860 }
861 local_irq_restore(flags);
862
863 DBG(DBG_VERBOSE, "%s halt\n", _ep->name);
864 return 0;
865 }
866
867 static int pxa25x_ep_fifo_status(struct usb_ep *_ep)
868 {
869 struct pxa25x_ep *ep;
870
871 ep = container_of(_ep, struct pxa25x_ep, ep);
872 if (!_ep) {
873 DMSG("%s, bad ep\n", __func__);
874 return -ENODEV;
875 }
876 /* pxa can't report unclaimed bytes from IN fifos */
877 if ((ep->bEndpointAddress & USB_DIR_IN) != 0)
878 return -EOPNOTSUPP;
879 if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN
880 || (*ep->reg_udccs & UDCCS_BO_RFS) == 0)
881 return 0;
882 else
883 return (*ep->reg_ubcr & 0xfff) + 1;
884 }
885
886 static void pxa25x_ep_fifo_flush(struct usb_ep *_ep)
887 {
888 struct pxa25x_ep *ep;
889
890 ep = container_of(_ep, struct pxa25x_ep, ep);
891 if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) {
892 DMSG("%s, bad ep\n", __func__);
893 return;
894 }
895
896 /* toggle and halt bits stay unchanged */
897
898 /* for OUT, just read and discard the FIFO contents. */
899 if ((ep->bEndpointAddress & USB_DIR_IN) == 0) {
900 while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0)
901 (void) *ep->reg_uddr;
902 return;
903 }
904
905 /* most IN status is the same, but ISO can't stall */
906 *ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR
907 | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
908 ? 0 : UDCCS_BI_SST);
909 }
910
911
912 static struct usb_ep_ops pxa25x_ep_ops = {
913 .enable = pxa25x_ep_enable,
914 .disable = pxa25x_ep_disable,
915
916 .alloc_request = pxa25x_ep_alloc_request,
917 .free_request = pxa25x_ep_free_request,
918
919 .queue = pxa25x_ep_queue,
920 .dequeue = pxa25x_ep_dequeue,
921
922 .set_halt = pxa25x_ep_set_halt,
923 .fifo_status = pxa25x_ep_fifo_status,
924 .fifo_flush = pxa25x_ep_fifo_flush,
925 };
926
927
928 /* ---------------------------------------------------------------------------
929 * device-scoped parts of the api to the usb controller hardware
930 * ---------------------------------------------------------------------------
931 */
932
933 static int pxa25x_udc_get_frame(struct usb_gadget *_gadget)
934 {
935 return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff);
936 }
937
938 static int pxa25x_udc_wakeup(struct usb_gadget *_gadget)
939 {
940 /* host may not have enabled remote wakeup */
941 if ((UDCCS0 & UDCCS0_DRWF) == 0)
942 return -EHOSTUNREACH;
943 udc_set_mask_UDCCR(UDCCR_RSM);
944 return 0;
945 }
946
947 static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *);
948 static void udc_enable (struct pxa25x_udc *);
949 static void udc_disable(struct pxa25x_udc *);
950
951 /* We disable the UDC -- and its 48 MHz clock -- whenever it's not
952 * in active use.
953 */
954 static int pullup(struct pxa25x_udc *udc)
955 {
956 int is_active = udc->vbus && udc->pullup && !udc->suspended;
957 DMSG("%s\n", is_active ? "active" : "inactive");
958 if (is_active) {
959 if (!udc->active) {
960 udc->active = 1;
961 /* Enable clock for USB device */
962 clk_enable(udc->clk);
963 udc_enable(udc);
964 }
965 } else {
966 if (udc->active) {
967 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
968 DMSG("disconnect %s\n", udc->driver
969 ? udc->driver->driver.name
970 : "(no driver)");
971 stop_activity(udc, udc->driver);
972 }
973 udc_disable(udc);
974 /* Disable clock for USB device */
975 clk_disable(udc->clk);
976 udc->active = 0;
977 }
978
979 }
980 return 0;
981 }
982
983 /* VBUS reporting logically comes from a transceiver */
984 static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
985 {
986 struct pxa25x_udc *udc;
987
988 udc = container_of(_gadget, struct pxa25x_udc, gadget);
989 udc->vbus = is_active;
990 DMSG("vbus %s\n", is_active ? "supplied" : "inactive");
991 pullup(udc);
992 return 0;
993 }
994
995 /* drivers may have software control over D+ pullup */
996 static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active)
997 {
998 struct pxa25x_udc *udc;
999
1000 udc = container_of(_gadget, struct pxa25x_udc, gadget);
1001
1002 /* not all boards support pullup control */
1003 if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
1004 return -EOPNOTSUPP;
1005
1006 udc->pullup = (is_active != 0);
1007 pullup(udc);
1008 return 0;
1009 }
1010
1011 static const struct usb_gadget_ops pxa25x_udc_ops = {
1012 .get_frame = pxa25x_udc_get_frame,
1013 .wakeup = pxa25x_udc_wakeup,
1014 .vbus_session = pxa25x_udc_vbus_session,
1015 .pullup = pxa25x_udc_pullup,
1016
1017 // .vbus_draw ... boards may consume current from VBUS, up to
1018 // 100-500mA based on config. the 500uA suspend ceiling means
1019 // that exclusively vbus-powered PXA designs violate USB specs.
1020 };
1021
1022 /*-------------------------------------------------------------------------*/
1023
1024 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1025
1026 static int
1027 udc_seq_show(struct seq_file *m, void *_d)
1028 {
1029 struct pxa25x_udc *dev = m->private;
1030 unsigned long flags;
1031 int i;
1032 u32 tmp;
1033
1034 local_irq_save(flags);
1035
1036 /* basic device status */
1037 seq_printf(m, DRIVER_DESC "\n"
1038 "%s version: %s\nGadget driver: %s\nHost %s\n\n",
1039 driver_name, DRIVER_VERSION SIZE_STR "(pio)",
1040 dev->driver ? dev->driver->driver.name : "(none)",
1041 is_vbus_present() ? "full speed" : "disconnected");
1042
1043 /* registers for device and ep0 */
1044 seq_printf(m,
1045 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
1046 UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
1047
1048 tmp = UDCCR;
1049 seq_printf(m,
1050 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp,
1051 (tmp & UDCCR_REM) ? " rem" : "",
1052 (tmp & UDCCR_RSTIR) ? " rstir" : "",
1053 (tmp & UDCCR_SRM) ? " srm" : "",
1054 (tmp & UDCCR_SUSIR) ? " susir" : "",
1055 (tmp & UDCCR_RESIR) ? " resir" : "",
1056 (tmp & UDCCR_RSM) ? " rsm" : "",
1057 (tmp & UDCCR_UDA) ? " uda" : "",
1058 (tmp & UDCCR_UDE) ? " ude" : "");
1059
1060 tmp = UDCCS0;
1061 seq_printf(m,
1062 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp,
1063 (tmp & UDCCS0_SA) ? " sa" : "",
1064 (tmp & UDCCS0_RNE) ? " rne" : "",
1065 (tmp & UDCCS0_FST) ? " fst" : "",
1066 (tmp & UDCCS0_SST) ? " sst" : "",
1067 (tmp & UDCCS0_DRWF) ? " dwrf" : "",
1068 (tmp & UDCCS0_FTF) ? " ftf" : "",
1069 (tmp & UDCCS0_IPR) ? " ipr" : "",
1070 (tmp & UDCCS0_OPR) ? " opr" : "");
1071
1072 if (dev->has_cfr) {
1073 tmp = UDCCFR;
1074 seq_printf(m,
1075 "udccfr %02X =%s%s\n", tmp,
1076 (tmp & UDCCFR_AREN) ? " aren" : "",
1077 (tmp & UDCCFR_ACM) ? " acm" : "");
1078 }
1079
1080 if (!is_vbus_present() || !dev->driver)
1081 goto done;
1082
1083 seq_printf(m, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",
1084 dev->stats.write.bytes, dev->stats.write.ops,
1085 dev->stats.read.bytes, dev->stats.read.ops,
1086 dev->stats.irqs);
1087
1088 /* dump endpoint queues */
1089 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1090 struct pxa25x_ep *ep = &dev->ep [i];
1091 struct pxa25x_request *req;
1092
1093 if (i != 0) {
1094 const struct usb_endpoint_descriptor *desc;
1095
1096 desc = ep->desc;
1097 if (!desc)
1098 continue;
1099 tmp = *dev->ep [i].reg_udccs;
1100 seq_printf(m,
1101 "%s max %d %s udccs %02x irqs %lu\n",
1102 ep->ep.name, le16_to_cpu(desc->wMaxPacketSize),
1103 "pio", tmp, ep->pio_irqs);
1104 /* TODO translate all five groups of udccs bits! */
1105
1106 } else /* ep0 should only have one transfer queued */
1107 seq_printf(m, "ep0 max 16 pio irqs %lu\n",
1108 ep->pio_irqs);
1109
1110 if (list_empty(&ep->queue)) {
1111 seq_printf(m, "\t(nothing queued)\n");
1112 continue;
1113 }
1114 list_for_each_entry(req, &ep->queue, queue) {
1115 seq_printf(m,
1116 "\treq %p len %d/%d buf %p\n",
1117 &req->req, req->req.actual,
1118 req->req.length, req->req.buf);
1119 }
1120 }
1121
1122 done:
1123 local_irq_restore(flags);
1124 return 0;
1125 }
1126
1127 static int
1128 udc_debugfs_open(struct inode *inode, struct file *file)
1129 {
1130 return single_open(file, udc_seq_show, inode->i_private);
1131 }
1132
1133 static const struct file_operations debug_fops = {
1134 .open = udc_debugfs_open,
1135 .read = seq_read,
1136 .llseek = seq_lseek,
1137 .release = single_release,
1138 .owner = THIS_MODULE,
1139 };
1140
1141 #define create_debug_files(dev) \
1142 do { \
1143 dev->debugfs_udc = debugfs_create_file(dev->gadget.name, \
1144 S_IRUGO, NULL, dev, &debug_fops); \
1145 } while (0)
1146 #define remove_debug_files(dev) \
1147 do { \
1148 if (dev->debugfs_udc) \
1149 debugfs_remove(dev->debugfs_udc); \
1150 } while (0)
1151
1152 #else /* !CONFIG_USB_GADGET_DEBUG_FILES */
1153
1154 #define create_debug_files(dev) do {} while (0)
1155 #define remove_debug_files(dev) do {} while (0)
1156
1157 #endif /* CONFIG_USB_GADGET_DEBUG_FILES */
1158
1159 /*-------------------------------------------------------------------------*/
1160
1161 /*
1162 * udc_disable - disable USB device controller
1163 */
1164 static void udc_disable(struct pxa25x_udc *dev)
1165 {
1166 /* block all irqs */
1167 udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM);
1168 UICR0 = UICR1 = 0xff;
1169 UFNRH = UFNRH_SIM;
1170
1171 /* if hardware supports it, disconnect from usb */
1172 pullup_off();
1173
1174 udc_clear_mask_UDCCR(UDCCR_UDE);
1175
1176 ep0_idle (dev);
1177 dev->gadget.speed = USB_SPEED_UNKNOWN;
1178 }
1179
1180
1181 /*
1182 * udc_reinit - initialize software state
1183 */
1184 static void udc_reinit(struct pxa25x_udc *dev)
1185 {
1186 u32 i;
1187
1188 /* device/ep0 records init */
1189 INIT_LIST_HEAD (&dev->gadget.ep_list);
1190 INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1191 dev->ep0state = EP0_IDLE;
1192
1193 /* basic endpoint records init */
1194 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1195 struct pxa25x_ep *ep = &dev->ep[i];
1196
1197 if (i != 0)
1198 list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1199
1200 ep->desc = NULL;
1201 ep->stopped = 0;
1202 INIT_LIST_HEAD (&ep->queue);
1203 ep->pio_irqs = 0;
1204 }
1205
1206 /* the rest was statically initialized, and is read-only */
1207 }
1208
1209 /* until it's enabled, this UDC should be completely invisible
1210 * to any USB host.
1211 */
1212 static void udc_enable (struct pxa25x_udc *dev)
1213 {
1214 udc_clear_mask_UDCCR(UDCCR_UDE);
1215
1216 /* try to clear these bits before we enable the udc */
1217 udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);
1218
1219 ep0_idle(dev);
1220 dev->gadget.speed = USB_SPEED_UNKNOWN;
1221 dev->stats.irqs = 0;
1222
1223 /*
1224 * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:
1225 * - enable UDC
1226 * - if RESET is already in progress, ack interrupt
1227 * - unmask reset interrupt
1228 */
1229 udc_set_mask_UDCCR(UDCCR_UDE);
1230 if (!(UDCCR & UDCCR_UDA))
1231 udc_ack_int_UDCCR(UDCCR_RSTIR);
1232
1233 if (dev->has_cfr /* UDC_RES2 is defined */) {
1234 /* pxa255 (a0+) can avoid a set_config race that could
1235 * prevent gadget drivers from configuring correctly
1236 */
1237 UDCCFR = UDCCFR_ACM | UDCCFR_MB1;
1238 } else {
1239 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)
1240 * which could result in missing packets and interrupts.
1241 * supposedly one bit per endpoint, controlling whether it
1242 * double buffers or not; ACM/AREN bits fit into the holes.
1243 * zero bits (like USIR0_IRx) disable double buffering.
1244 */
1245 UDC_RES1 = 0x00;
1246 UDC_RES2 = 0x00;
1247 }
1248
1249 /* enable suspend/resume and reset irqs */
1250 udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM);
1251
1252 /* enable ep0 irqs */
1253 UICR0 &= ~UICR0_IM0;
1254
1255 /* if hardware supports it, pullup D+ and wait for reset */
1256 pullup_on();
1257 }
1258
1259
1260 /* when a driver is successfully registered, it will receive
1261 * control requests including set_configuration(), which enables
1262 * non-control requests. then usb traffic follows until a
1263 * disconnect is reported. then a host may connect again, or
1264 * the driver might get unbound.
1265 */
1266 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1267 {
1268 struct pxa25x_udc *dev = the_controller;
1269 int retval;
1270
1271 if (!driver
1272 || driver->speed < USB_SPEED_FULL
1273 || !driver->bind
1274 || !driver->disconnect
1275 || !driver->setup)
1276 return -EINVAL;
1277 if (!dev)
1278 return -ENODEV;
1279 if (dev->driver)
1280 return -EBUSY;
1281
1282 /* first hook up the driver ... */
1283 dev->driver = driver;
1284 dev->gadget.dev.driver = &driver->driver;
1285 dev->pullup = 1;
1286
1287 retval = device_add (&dev->gadget.dev);
1288 if (retval) {
1289 fail:
1290 dev->driver = NULL;
1291 dev->gadget.dev.driver = NULL;
1292 return retval;
1293 }
1294 retval = driver->bind(&dev->gadget);
1295 if (retval) {
1296 DMSG("bind to driver %s --> error %d\n",
1297 driver->driver.name, retval);
1298 device_del (&dev->gadget.dev);
1299 goto fail;
1300 }
1301
1302 /* ... then enable host detection and ep0; and we're ready
1303 * for set_configuration as well as eventual disconnect.
1304 */
1305 DMSG("registered gadget driver '%s'\n", driver->driver.name);
1306 pullup(dev);
1307 dump_state(dev);
1308 return 0;
1309 }
1310 EXPORT_SYMBOL(usb_gadget_register_driver);
1311
1312 static void
1313 stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver)
1314 {
1315 int i;
1316
1317 /* don't disconnect drivers more than once */
1318 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
1319 driver = NULL;
1320 dev->gadget.speed = USB_SPEED_UNKNOWN;
1321
1322 /* prevent new request submissions, kill any outstanding requests */
1323 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1324 struct pxa25x_ep *ep = &dev->ep[i];
1325
1326 ep->stopped = 1;
1327 nuke(ep, -ESHUTDOWN);
1328 }
1329 del_timer_sync(&dev->timer);
1330
1331 /* report disconnect; the driver is already quiesced */
1332 if (driver)
1333 driver->disconnect(&dev->gadget);
1334
1335 /* re-init driver-visible data structures */
1336 udc_reinit(dev);
1337 }
1338
1339 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1340 {
1341 struct pxa25x_udc *dev = the_controller;
1342
1343 if (!dev)
1344 return -ENODEV;
1345 if (!driver || driver != dev->driver || !driver->unbind)
1346 return -EINVAL;
1347
1348 local_irq_disable();
1349 dev->pullup = 0;
1350 pullup(dev);
1351 stop_activity(dev, driver);
1352 local_irq_enable();
1353
1354 driver->unbind(&dev->gadget);
1355 dev->gadget.dev.driver = NULL;
1356 dev->driver = NULL;
1357
1358 device_del (&dev->gadget.dev);
1359
1360 DMSG("unregistered gadget driver '%s'\n", driver->driver.name);
1361 dump_state(dev);
1362 return 0;
1363 }
1364 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1365
1366
1367 /*-------------------------------------------------------------------------*/
1368
1369 #ifdef CONFIG_ARCH_LUBBOCK
1370
1371 /* Lubbock has separate connect and disconnect irqs. More typical designs
1372 * use one GPIO as the VBUS IRQ, and another to control the D+ pullup.
1373 */
1374
1375 static irqreturn_t
1376 lubbock_vbus_irq(int irq, void *_dev)
1377 {
1378 struct pxa25x_udc *dev = _dev;
1379 int vbus;
1380
1381 dev->stats.irqs++;
1382 switch (irq) {
1383 case LUBBOCK_USB_IRQ:
1384 vbus = 1;
1385 disable_irq(LUBBOCK_USB_IRQ);
1386 enable_irq(LUBBOCK_USB_DISC_IRQ);
1387 break;
1388 case LUBBOCK_USB_DISC_IRQ:
1389 vbus = 0;
1390 disable_irq(LUBBOCK_USB_DISC_IRQ);
1391 enable_irq(LUBBOCK_USB_IRQ);
1392 break;
1393 default:
1394 return IRQ_NONE;
1395 }
1396
1397 pxa25x_udc_vbus_session(&dev->gadget, vbus);
1398 return IRQ_HANDLED;
1399 }
1400
1401 #endif
1402
1403 static irqreturn_t udc_vbus_irq(int irq, void *_dev)
1404 {
1405 struct pxa25x_udc *dev = _dev;
1406
1407 pxa25x_udc_vbus_session(&dev->gadget, is_vbus_present());
1408 return IRQ_HANDLED;
1409 }
1410
1411
1412 /*-------------------------------------------------------------------------*/
1413
1414 static inline void clear_ep_state (struct pxa25x_udc *dev)
1415 {
1416 unsigned i;
1417
1418 /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
1419 * fifos, and pending transactions mustn't be continued in any case.
1420 */
1421 for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++)
1422 nuke(&dev->ep[i], -ECONNABORTED);
1423 }
1424
1425 static void udc_watchdog(unsigned long _dev)
1426 {
1427 struct pxa25x_udc *dev = (void *)_dev;
1428
1429 local_irq_disable();
1430 if (dev->ep0state == EP0_STALL
1431 && (UDCCS0 & UDCCS0_FST) == 0
1432 && (UDCCS0 & UDCCS0_SST) == 0) {
1433 UDCCS0 = UDCCS0_FST|UDCCS0_FTF;
1434 DBG(DBG_VERBOSE, "ep0 re-stall\n");
1435 start_watchdog(dev);
1436 }
1437 local_irq_enable();
1438 }
1439
1440 static void handle_ep0 (struct pxa25x_udc *dev)
1441 {
1442 u32 udccs0 = UDCCS0;
1443 struct pxa25x_ep *ep = &dev->ep [0];
1444 struct pxa25x_request *req;
1445 union {
1446 struct usb_ctrlrequest r;
1447 u8 raw [8];
1448 u32 word [2];
1449 } u;
1450
1451 if (list_empty(&ep->queue))
1452 req = NULL;
1453 else
1454 req = list_entry(ep->queue.next, struct pxa25x_request, queue);
1455
1456 /* clear stall status */
1457 if (udccs0 & UDCCS0_SST) {
1458 nuke(ep, -EPIPE);
1459 UDCCS0 = UDCCS0_SST;
1460 del_timer(&dev->timer);
1461 ep0_idle(dev);
1462 }
1463
1464 /* previous request unfinished? non-error iff back-to-back ... */
1465 if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) {
1466 nuke(ep, 0);
1467 del_timer(&dev->timer);
1468 ep0_idle(dev);
1469 }
1470
1471 switch (dev->ep0state) {
1472 case EP0_IDLE:
1473 /* late-breaking status? */
1474 udccs0 = UDCCS0;
1475
1476 /* start control request? */
1477 if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))
1478 == (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) {
1479 int i;
1480
1481 nuke (ep, -EPROTO);
1482
1483 /* read SETUP packet */
1484 for (i = 0; i < 8; i++) {
1485 if (unlikely(!(UDCCS0 & UDCCS0_RNE))) {
1486 bad_setup:
1487 DMSG("SETUP %d!\n", i);
1488 goto stall;
1489 }
1490 u.raw [i] = (u8) UDDR0;
1491 }
1492 if (unlikely((UDCCS0 & UDCCS0_RNE) != 0))
1493 goto bad_setup;
1494
1495 got_setup:
1496 DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1497 u.r.bRequestType, u.r.bRequest,
1498 le16_to_cpu(u.r.wValue),
1499 le16_to_cpu(u.r.wIndex),
1500 le16_to_cpu(u.r.wLength));
1501
1502 /* cope with automagic for some standard requests. */
1503 dev->req_std = (u.r.bRequestType & USB_TYPE_MASK)
1504 == USB_TYPE_STANDARD;
1505 dev->req_config = 0;
1506 dev->req_pending = 1;
1507 switch (u.r.bRequest) {
1508 /* hardware restricts gadget drivers here! */
1509 case USB_REQ_SET_CONFIGURATION:
1510 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1511 /* reflect hardware's automagic
1512 * up to the gadget driver.
1513 */
1514 config_change:
1515 dev->req_config = 1;
1516 clear_ep_state(dev);
1517 /* if !has_cfr, there's no synch
1518 * else use AREN (later) not SA|OPR
1519 * USIR0_IR0 acts edge sensitive
1520 */
1521 }
1522 break;
1523 /* ... and here, even more ... */
1524 case USB_REQ_SET_INTERFACE:
1525 if (u.r.bRequestType == USB_RECIP_INTERFACE) {
1526 /* udc hardware is broken by design:
1527 * - altsetting may only be zero;
1528 * - hw resets all interfaces' eps;
1529 * - ep reset doesn't include halt(?).
1530 */
1531 DMSG("broken set_interface (%d/%d)\n",
1532 le16_to_cpu(u.r.wIndex),
1533 le16_to_cpu(u.r.wValue));
1534 goto config_change;
1535 }
1536 break;
1537 /* hardware was supposed to hide this */
1538 case USB_REQ_SET_ADDRESS:
1539 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1540 ep0start(dev, 0, "address");
1541 return;
1542 }
1543 break;
1544 }
1545
1546 if (u.r.bRequestType & USB_DIR_IN)
1547 dev->ep0state = EP0_IN_DATA_PHASE;
1548 else
1549 dev->ep0state = EP0_OUT_DATA_PHASE;
1550
1551 i = dev->driver->setup(&dev->gadget, &u.r);
1552 if (i < 0) {
1553 /* hardware automagic preventing STALL... */
1554 if (dev->req_config) {
1555 /* hardware sometimes neglects to tell
1556 * tell us about config change events,
1557 * so later ones may fail...
1558 */
1559 WARNING("config change %02x fail %d?\n",
1560 u.r.bRequest, i);
1561 return;
1562 /* TODO experiment: if has_cfr,
1563 * hardware didn't ACK; maybe we
1564 * could actually STALL!
1565 */
1566 }
1567 DBG(DBG_VERBOSE, "protocol STALL, "
1568 "%02x err %d\n", UDCCS0, i);
1569 stall:
1570 /* the watchdog timer helps deal with cases
1571 * where udc seems to clear FST wrongly, and
1572 * then NAKs instead of STALLing.
1573 */
1574 ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall");
1575 start_watchdog(dev);
1576 dev->ep0state = EP0_STALL;
1577
1578 /* deferred i/o == no response yet */
1579 } else if (dev->req_pending) {
1580 if (likely(dev->ep0state == EP0_IN_DATA_PHASE
1581 || dev->req_std || u.r.wLength))
1582 ep0start(dev, 0, "defer");
1583 else
1584 ep0start(dev, UDCCS0_IPR, "defer/IPR");
1585 }
1586
1587 /* expect at least one data or status stage irq */
1588 return;
1589
1590 } else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA))
1591 == (UDCCS0_OPR|UDCCS0_SA))) {
1592 unsigned i;
1593
1594 /* pxa210/250 erratum 131 for B0/B1 says RNE lies.
1595 * still observed on a pxa255 a0.
1596 */
1597 DBG(DBG_VERBOSE, "e131\n");
1598 nuke(ep, -EPROTO);
1599
1600 /* read SETUP data, but don't trust it too much */
1601 for (i = 0; i < 8; i++)
1602 u.raw [i] = (u8) UDDR0;
1603 if ((u.r.bRequestType & USB_RECIP_MASK)
1604 > USB_RECIP_OTHER)
1605 goto stall;
1606 if (u.word [0] == 0 && u.word [1] == 0)
1607 goto stall;
1608 goto got_setup;
1609 } else {
1610 /* some random early IRQ:
1611 * - we acked FST
1612 * - IPR cleared
1613 * - OPR got set, without SA (likely status stage)
1614 */
1615 UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR);
1616 }
1617 break;
1618 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */
1619 if (udccs0 & UDCCS0_OPR) {
1620 UDCCS0 = UDCCS0_OPR|UDCCS0_FTF;
1621 DBG(DBG_VERBOSE, "ep0in premature status\n");
1622 if (req)
1623 done(ep, req, 0);
1624 ep0_idle(dev);
1625 } else /* irq was IPR clearing */ {
1626 if (req) {
1627 /* this IN packet might finish the request */
1628 (void) write_ep0_fifo(ep, req);
1629 } /* else IN token before response was written */
1630 }
1631 break;
1632 case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */
1633 if (udccs0 & UDCCS0_OPR) {
1634 if (req) {
1635 /* this OUT packet might finish the request */
1636 if (read_ep0_fifo(ep, req))
1637 done(ep, req, 0);
1638 /* else more OUT packets expected */
1639 } /* else OUT token before read was issued */
1640 } else /* irq was IPR clearing */ {
1641 DBG(DBG_VERBOSE, "ep0out premature status\n");
1642 if (req)
1643 done(ep, req, 0);
1644 ep0_idle(dev);
1645 }
1646 break;
1647 case EP0_END_XFER:
1648 if (req)
1649 done(ep, req, 0);
1650 /* ack control-IN status (maybe in-zlp was skipped)
1651 * also appears after some config change events.
1652 */
1653 if (udccs0 & UDCCS0_OPR)
1654 UDCCS0 = UDCCS0_OPR;
1655 ep0_idle(dev);
1656 break;
1657 case EP0_STALL:
1658 UDCCS0 = UDCCS0_FST;
1659 break;
1660 }
1661 USIR0 = USIR0_IR0;
1662 }
1663
1664 static void handle_ep(struct pxa25x_ep *ep)
1665 {
1666 struct pxa25x_request *req;
1667 int is_in = ep->bEndpointAddress & USB_DIR_IN;
1668 int completed;
1669 u32 udccs, tmp;
1670
1671 do {
1672 completed = 0;
1673 if (likely (!list_empty(&ep->queue)))
1674 req = list_entry(ep->queue.next,
1675 struct pxa25x_request, queue);
1676 else
1677 req = NULL;
1678
1679 // TODO check FST handling
1680
1681 udccs = *ep->reg_udccs;
1682 if (unlikely(is_in)) { /* irq from TPC, SST, or (ISO) TUR */
1683 tmp = UDCCS_BI_TUR;
1684 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1685 tmp |= UDCCS_BI_SST;
1686 tmp &= udccs;
1687 if (likely (tmp))
1688 *ep->reg_udccs = tmp;
1689 if (req && likely ((udccs & UDCCS_BI_TFS) != 0))
1690 completed = write_fifo(ep, req);
1691
1692 } else { /* irq from RPC (or for ISO, ROF) */
1693 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1694 tmp = UDCCS_BO_SST | UDCCS_BO_DME;
1695 else
1696 tmp = UDCCS_IO_ROF | UDCCS_IO_DME;
1697 tmp &= udccs;
1698 if (likely(tmp))
1699 *ep->reg_udccs = tmp;
1700
1701 /* fifos can hold packets, ready for reading... */
1702 if (likely(req)) {
1703 completed = read_fifo(ep, req);
1704 } else
1705 pio_irq_disable (ep->bEndpointAddress);
1706 }
1707 ep->pio_irqs++;
1708 } while (completed);
1709 }
1710
1711 /*
1712 * pxa25x_udc_irq - interrupt handler
1713 *
1714 * avoid delays in ep0 processing. the control handshaking isn't always
1715 * under software control (pxa250c0 and the pxa255 are better), and delays
1716 * could cause usb protocol errors.
1717 */
1718 static irqreturn_t
1719 pxa25x_udc_irq(int irq, void *_dev)
1720 {
1721 struct pxa25x_udc *dev = _dev;
1722 int handled;
1723
1724 dev->stats.irqs++;
1725 do {
1726 u32 udccr = UDCCR;
1727
1728 handled = 0;
1729
1730 /* SUSpend Interrupt Request */
1731 if (unlikely(udccr & UDCCR_SUSIR)) {
1732 udc_ack_int_UDCCR(UDCCR_SUSIR);
1733 handled = 1;
1734 DBG(DBG_VERBOSE, "USB suspend%s\n", is_vbus_present()
1735 ? "" : "+disconnect");
1736
1737 if (!is_vbus_present())
1738 stop_activity(dev, dev->driver);
1739 else if (dev->gadget.speed != USB_SPEED_UNKNOWN
1740 && dev->driver
1741 && dev->driver->suspend)
1742 dev->driver->suspend(&dev->gadget);
1743 ep0_idle (dev);
1744 }
1745
1746 /* RESume Interrupt Request */
1747 if (unlikely(udccr & UDCCR_RESIR)) {
1748 udc_ack_int_UDCCR(UDCCR_RESIR);
1749 handled = 1;
1750 DBG(DBG_VERBOSE, "USB resume\n");
1751
1752 if (dev->gadget.speed != USB_SPEED_UNKNOWN
1753 && dev->driver
1754 && dev->driver->resume
1755 && is_vbus_present())
1756 dev->driver->resume(&dev->gadget);
1757 }
1758
1759 /* ReSeT Interrupt Request - USB reset */
1760 if (unlikely(udccr & UDCCR_RSTIR)) {
1761 udc_ack_int_UDCCR(UDCCR_RSTIR);
1762 handled = 1;
1763
1764 if ((UDCCR & UDCCR_UDA) == 0) {
1765 DBG(DBG_VERBOSE, "USB reset start\n");
1766
1767 /* reset driver and endpoints,
1768 * in case that's not yet done
1769 */
1770 stop_activity (dev, dev->driver);
1771
1772 } else {
1773 DBG(DBG_VERBOSE, "USB reset end\n");
1774 dev->gadget.speed = USB_SPEED_FULL;
1775 memset(&dev->stats, 0, sizeof dev->stats);
1776 /* driver and endpoints are still reset */
1777 }
1778
1779 } else {
1780 u32 usir0 = USIR0 & ~UICR0;
1781 u32 usir1 = USIR1 & ~UICR1;
1782 int i;
1783
1784 if (unlikely (!usir0 && !usir1))
1785 continue;
1786
1787 DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0);
1788
1789 /* control traffic */
1790 if (usir0 & USIR0_IR0) {
1791 dev->ep[0].pio_irqs++;
1792 handle_ep0(dev);
1793 handled = 1;
1794 }
1795
1796 /* endpoint data transfers */
1797 for (i = 0; i < 8; i++) {
1798 u32 tmp = 1 << i;
1799
1800 if (i && (usir0 & tmp)) {
1801 handle_ep(&dev->ep[i]);
1802 USIR0 |= tmp;
1803 handled = 1;
1804 }
1805 #ifndef CONFIG_USB_PXA25X_SMALL
1806 if (usir1 & tmp) {
1807 handle_ep(&dev->ep[i+8]);
1808 USIR1 |= tmp;
1809 handled = 1;
1810 }
1811 #endif
1812 }
1813 }
1814
1815 /* we could also ask for 1 msec SOF (SIR) interrupts */
1816
1817 } while (handled);
1818 return IRQ_HANDLED;
1819 }
1820
1821 /*-------------------------------------------------------------------------*/
1822
1823 static void nop_release (struct device *dev)
1824 {
1825 DMSG("%s %s\n", __func__, dev_name(dev));
1826 }
1827
1828 /* this uses load-time allocation and initialization (instead of
1829 * doing it at run-time) to save code, eliminate fault paths, and
1830 * be more obviously correct.
1831 */
1832 static struct pxa25x_udc memory = {
1833 .gadget = {
1834 .ops = &pxa25x_udc_ops,
1835 .ep0 = &memory.ep[0].ep,
1836 .name = driver_name,
1837 .dev = {
1838 .init_name = "gadget",
1839 .release = nop_release,
1840 },
1841 },
1842
1843 /* control endpoint */
1844 .ep[0] = {
1845 .ep = {
1846 .name = ep0name,
1847 .ops = &pxa25x_ep_ops,
1848 .maxpacket = EP0_FIFO_SIZE,
1849 },
1850 .dev = &memory,
1851 .reg_udccs = &UDCCS0,
1852 .reg_uddr = &UDDR0,
1853 },
1854
1855 /* first group of endpoints */
1856 .ep[1] = {
1857 .ep = {
1858 .name = "ep1in-bulk",
1859 .ops = &pxa25x_ep_ops,
1860 .maxpacket = BULK_FIFO_SIZE,
1861 },
1862 .dev = &memory,
1863 .fifo_size = BULK_FIFO_SIZE,
1864 .bEndpointAddress = USB_DIR_IN | 1,
1865 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1866 .reg_udccs = &UDCCS1,
1867 .reg_uddr = &UDDR1,
1868 },
1869 .ep[2] = {
1870 .ep = {
1871 .name = "ep2out-bulk",
1872 .ops = &pxa25x_ep_ops,
1873 .maxpacket = BULK_FIFO_SIZE,
1874 },
1875 .dev = &memory,
1876 .fifo_size = BULK_FIFO_SIZE,
1877 .bEndpointAddress = 2,
1878 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1879 .reg_udccs = &UDCCS2,
1880 .reg_ubcr = &UBCR2,
1881 .reg_uddr = &UDDR2,
1882 },
1883 #ifndef CONFIG_USB_PXA25X_SMALL
1884 .ep[3] = {
1885 .ep = {
1886 .name = "ep3in-iso",
1887 .ops = &pxa25x_ep_ops,
1888 .maxpacket = ISO_FIFO_SIZE,
1889 },
1890 .dev = &memory,
1891 .fifo_size = ISO_FIFO_SIZE,
1892 .bEndpointAddress = USB_DIR_IN | 3,
1893 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1894 .reg_udccs = &UDCCS3,
1895 .reg_uddr = &UDDR3,
1896 },
1897 .ep[4] = {
1898 .ep = {
1899 .name = "ep4out-iso",
1900 .ops = &pxa25x_ep_ops,
1901 .maxpacket = ISO_FIFO_SIZE,
1902 },
1903 .dev = &memory,
1904 .fifo_size = ISO_FIFO_SIZE,
1905 .bEndpointAddress = 4,
1906 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1907 .reg_udccs = &UDCCS4,
1908 .reg_ubcr = &UBCR4,
1909 .reg_uddr = &UDDR4,
1910 },
1911 .ep[5] = {
1912 .ep = {
1913 .name = "ep5in-int",
1914 .ops = &pxa25x_ep_ops,
1915 .maxpacket = INT_FIFO_SIZE,
1916 },
1917 .dev = &memory,
1918 .fifo_size = INT_FIFO_SIZE,
1919 .bEndpointAddress = USB_DIR_IN | 5,
1920 .bmAttributes = USB_ENDPOINT_XFER_INT,
1921 .reg_udccs = &UDCCS5,
1922 .reg_uddr = &UDDR5,
1923 },
1924
1925 /* second group of endpoints */
1926 .ep[6] = {
1927 .ep = {
1928 .name = "ep6in-bulk",
1929 .ops = &pxa25x_ep_ops,
1930 .maxpacket = BULK_FIFO_SIZE,
1931 },
1932 .dev = &memory,
1933 .fifo_size = BULK_FIFO_SIZE,
1934 .bEndpointAddress = USB_DIR_IN | 6,
1935 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1936 .reg_udccs = &UDCCS6,
1937 .reg_uddr = &UDDR6,
1938 },
1939 .ep[7] = {
1940 .ep = {
1941 .name = "ep7out-bulk",
1942 .ops = &pxa25x_ep_ops,
1943 .maxpacket = BULK_FIFO_SIZE,
1944 },
1945 .dev = &memory,
1946 .fifo_size = BULK_FIFO_SIZE,
1947 .bEndpointAddress = 7,
1948 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1949 .reg_udccs = &UDCCS7,
1950 .reg_ubcr = &UBCR7,
1951 .reg_uddr = &UDDR7,
1952 },
1953 .ep[8] = {
1954 .ep = {
1955 .name = "ep8in-iso",
1956 .ops = &pxa25x_ep_ops,
1957 .maxpacket = ISO_FIFO_SIZE,
1958 },
1959 .dev = &memory,
1960 .fifo_size = ISO_FIFO_SIZE,
1961 .bEndpointAddress = USB_DIR_IN | 8,
1962 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1963 .reg_udccs = &UDCCS8,
1964 .reg_uddr = &UDDR8,
1965 },
1966 .ep[9] = {
1967 .ep = {
1968 .name = "ep9out-iso",
1969 .ops = &pxa25x_ep_ops,
1970 .maxpacket = ISO_FIFO_SIZE,
1971 },
1972 .dev = &memory,
1973 .fifo_size = ISO_FIFO_SIZE,
1974 .bEndpointAddress = 9,
1975 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1976 .reg_udccs = &UDCCS9,
1977 .reg_ubcr = &UBCR9,
1978 .reg_uddr = &UDDR9,
1979 },
1980 .ep[10] = {
1981 .ep = {
1982 .name = "ep10in-int",
1983 .ops = &pxa25x_ep_ops,
1984 .maxpacket = INT_FIFO_SIZE,
1985 },
1986 .dev = &memory,
1987 .fifo_size = INT_FIFO_SIZE,
1988 .bEndpointAddress = USB_DIR_IN | 10,
1989 .bmAttributes = USB_ENDPOINT_XFER_INT,
1990 .reg_udccs = &UDCCS10,
1991 .reg_uddr = &UDDR10,
1992 },
1993
1994 /* third group of endpoints */
1995 .ep[11] = {
1996 .ep = {
1997 .name = "ep11in-bulk",
1998 .ops = &pxa25x_ep_ops,
1999 .maxpacket = BULK_FIFO_SIZE,
2000 },
2001 .dev = &memory,
2002 .fifo_size = BULK_FIFO_SIZE,
2003 .bEndpointAddress = USB_DIR_IN | 11,
2004 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2005 .reg_udccs = &UDCCS11,
2006 .reg_uddr = &UDDR11,
2007 },
2008 .ep[12] = {
2009 .ep = {
2010 .name = "ep12out-bulk",
2011 .ops = &pxa25x_ep_ops,
2012 .maxpacket = BULK_FIFO_SIZE,
2013 },
2014 .dev = &memory,
2015 .fifo_size = BULK_FIFO_SIZE,
2016 .bEndpointAddress = 12,
2017 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2018 .reg_udccs = &UDCCS12,
2019 .reg_ubcr = &UBCR12,
2020 .reg_uddr = &UDDR12,
2021 },
2022 .ep[13] = {
2023 .ep = {
2024 .name = "ep13in-iso",
2025 .ops = &pxa25x_ep_ops,
2026 .maxpacket = ISO_FIFO_SIZE,
2027 },
2028 .dev = &memory,
2029 .fifo_size = ISO_FIFO_SIZE,
2030 .bEndpointAddress = USB_DIR_IN | 13,
2031 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
2032 .reg_udccs = &UDCCS13,
2033 .reg_uddr = &UDDR13,
2034 },
2035 .ep[14] = {
2036 .ep = {
2037 .name = "ep14out-iso",
2038 .ops = &pxa25x_ep_ops,
2039 .maxpacket = ISO_FIFO_SIZE,
2040 },
2041 .dev = &memory,
2042 .fifo_size = ISO_FIFO_SIZE,
2043 .bEndpointAddress = 14,
2044 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
2045 .reg_udccs = &UDCCS14,
2046 .reg_ubcr = &UBCR14,
2047 .reg_uddr = &UDDR14,
2048 },
2049 .ep[15] = {
2050 .ep = {
2051 .name = "ep15in-int",
2052 .ops = &pxa25x_ep_ops,
2053 .maxpacket = INT_FIFO_SIZE,
2054 },
2055 .dev = &memory,
2056 .fifo_size = INT_FIFO_SIZE,
2057 .bEndpointAddress = USB_DIR_IN | 15,
2058 .bmAttributes = USB_ENDPOINT_XFER_INT,
2059 .reg_udccs = &UDCCS15,
2060 .reg_uddr = &UDDR15,
2061 },
2062 #endif /* !CONFIG_USB_PXA25X_SMALL */
2063 };
2064
2065 #define CP15R0_VENDOR_MASK 0xffffe000
2066
2067 #if defined(CONFIG_ARCH_PXA)
2068 #define CP15R0_XSCALE_VALUE 0x69052000 /* intel/arm/xscale */
2069
2070 #elif defined(CONFIG_ARCH_IXP4XX)
2071 #define CP15R0_XSCALE_VALUE 0x69054000 /* intel/arm/ixp4xx */
2072
2073 #endif
2074
2075 #define CP15R0_PROD_MASK 0x000003f0
2076 #define PXA25x 0x00000100 /* and PXA26x */
2077 #define PXA210 0x00000120
2078
2079 #define CP15R0_REV_MASK 0x0000000f
2080
2081 #define CP15R0_PRODREV_MASK (CP15R0_PROD_MASK | CP15R0_REV_MASK)
2082
2083 #define PXA255_A0 0x00000106 /* or PXA260_B1 */
2084 #define PXA250_C0 0x00000105 /* or PXA26x_B0 */
2085 #define PXA250_B2 0x00000104
2086 #define PXA250_B1 0x00000103 /* or PXA260_A0 */
2087 #define PXA250_B0 0x00000102
2088 #define PXA250_A1 0x00000101
2089 #define PXA250_A0 0x00000100
2090
2091 #define PXA210_C0 0x00000125
2092 #define PXA210_B2 0x00000124
2093 #define PXA210_B1 0x00000123
2094 #define PXA210_B0 0x00000122
2095 #define IXP425_A0 0x000001c1
2096 #define IXP425_B0 0x000001f1
2097 #define IXP465_AD 0x00000200
2098
2099 /*
2100 * probe - binds to the platform device
2101 */
2102 static int __init pxa25x_udc_probe(struct platform_device *pdev)
2103 {
2104 struct pxa25x_udc *dev = &memory;
2105 int retval, vbus_irq, irq;
2106 u32 chiprev;
2107
2108 /* insist on Intel/ARM/XScale */
2109 asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));
2110 if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {
2111 pr_err("%s: not XScale!\n", driver_name);
2112 return -ENODEV;
2113 }
2114
2115 /* trigger chiprev-specific logic */
2116 switch (chiprev & CP15R0_PRODREV_MASK) {
2117 #if defined(CONFIG_ARCH_PXA)
2118 case PXA255_A0:
2119 dev->has_cfr = 1;
2120 break;
2121 case PXA250_A0:
2122 case PXA250_A1:
2123 /* A0/A1 "not released"; ep 13, 15 unusable */
2124 /* fall through */
2125 case PXA250_B2: case PXA210_B2:
2126 case PXA250_B1: case PXA210_B1:
2127 case PXA250_B0: case PXA210_B0:
2128 /* OUT-DMA is broken ... */
2129 /* fall through */
2130 case PXA250_C0: case PXA210_C0:
2131 break;
2132 #elif defined(CONFIG_ARCH_IXP4XX)
2133 case IXP425_A0:
2134 case IXP425_B0:
2135 case IXP465_AD:
2136 dev->has_cfr = 1;
2137 break;
2138 #endif
2139 default:
2140 pr_err("%s: unrecognized processor: %08x\n",
2141 driver_name, chiprev);
2142 /* iop3xx, ixp4xx, ... */
2143 return -ENODEV;
2144 }
2145
2146 irq = platform_get_irq(pdev, 0);
2147 if (irq < 0)
2148 return -ENODEV;
2149
2150 dev->clk = clk_get(&pdev->dev, NULL);
2151 if (IS_ERR(dev->clk)) {
2152 retval = PTR_ERR(dev->clk);
2153 goto err_clk;
2154 }
2155
2156 pr_debug("%s: IRQ %d%s%s\n", driver_name, irq,
2157 dev->has_cfr ? "" : " (!cfr)",
2158 SIZE_STR "(pio)"
2159 );
2160
2161 /* other non-static parts of init */
2162 dev->dev = &pdev->dev;
2163 dev->mach = pdev->dev.platform_data;
2164
2165 if (gpio_is_valid(dev->mach->gpio_vbus)) {
2166 if ((retval = gpio_request(dev->mach->gpio_vbus,
2167 "pxa25x_udc GPIO VBUS"))) {
2168 dev_dbg(&pdev->dev,
2169 "can't get vbus gpio %d, err: %d\n",
2170 dev->mach->gpio_vbus, retval);
2171 goto err_gpio_vbus;
2172 }
2173 gpio_direction_input(dev->mach->gpio_vbus);
2174 vbus_irq = gpio_to_irq(dev->mach->gpio_vbus);
2175 } else
2176 vbus_irq = 0;
2177
2178 if (gpio_is_valid(dev->mach->gpio_pullup)) {
2179 if ((retval = gpio_request(dev->mach->gpio_pullup,
2180 "pca25x_udc GPIO PULLUP"))) {
2181 dev_dbg(&pdev->dev,
2182 "can't get pullup gpio %d, err: %d\n",
2183 dev->mach->gpio_pullup, retval);
2184 goto err_gpio_pullup;
2185 }
2186 gpio_direction_output(dev->mach->gpio_pullup, 0);
2187 }
2188
2189 init_timer(&dev->timer);
2190 dev->timer.function = udc_watchdog;
2191 dev->timer.data = (unsigned long) dev;
2192
2193 device_initialize(&dev->gadget.dev);
2194 dev->gadget.dev.parent = &pdev->dev;
2195 dev->gadget.dev.dma_mask = pdev->dev.dma_mask;
2196
2197 the_controller = dev;
2198 platform_set_drvdata(pdev, dev);
2199
2200 udc_disable(dev);
2201 udc_reinit(dev);
2202
2203 dev->vbus = !!is_vbus_present();
2204
2205 /* irq setup after old hardware state is cleaned up */
2206 retval = request_irq(irq, pxa25x_udc_irq,
2207 IRQF_DISABLED, driver_name, dev);
2208 if (retval != 0) {
2209 pr_err("%s: can't get irq %d, err %d\n",
2210 driver_name, irq, retval);
2211 goto err_irq1;
2212 }
2213 dev->got_irq = 1;
2214
2215 #ifdef CONFIG_ARCH_LUBBOCK
2216 if (machine_is_lubbock()) {
2217 retval = request_irq(LUBBOCK_USB_DISC_IRQ,
2218 lubbock_vbus_irq,
2219 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
2220 driver_name, dev);
2221 if (retval != 0) {
2222 pr_err("%s: can't get irq %i, err %d\n",
2223 driver_name, LUBBOCK_USB_DISC_IRQ, retval);
2224 lubbock_fail0:
2225 goto err_irq_lub;
2226 }
2227 retval = request_irq(LUBBOCK_USB_IRQ,
2228 lubbock_vbus_irq,
2229 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
2230 driver_name, dev);
2231 if (retval != 0) {
2232 pr_err("%s: can't get irq %i, err %d\n",
2233 driver_name, LUBBOCK_USB_IRQ, retval);
2234 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2235 goto lubbock_fail0;
2236 }
2237 } else
2238 #endif
2239 if (vbus_irq) {
2240 retval = request_irq(vbus_irq, udc_vbus_irq,
2241 IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
2242 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
2243 driver_name, dev);
2244 if (retval != 0) {
2245 pr_err("%s: can't get irq %i, err %d\n",
2246 driver_name, vbus_irq, retval);
2247 goto err_vbus_irq;
2248 }
2249 }
2250 create_debug_files(dev);
2251
2252 return 0;
2253
2254 err_vbus_irq:
2255 #ifdef CONFIG_ARCH_LUBBOCK
2256 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2257 err_irq_lub:
2258 #endif
2259 free_irq(irq, dev);
2260 err_irq1:
2261 if (gpio_is_valid(dev->mach->gpio_pullup))
2262 gpio_free(dev->mach->gpio_pullup);
2263 err_gpio_pullup:
2264 if (gpio_is_valid(dev->mach->gpio_vbus))
2265 gpio_free(dev->mach->gpio_vbus);
2266 err_gpio_vbus:
2267 clk_put(dev->clk);
2268 err_clk:
2269 return retval;
2270 }
2271
2272 static void pxa25x_udc_shutdown(struct platform_device *_dev)
2273 {
2274 pullup_off();
2275 }
2276
2277 static int __exit pxa25x_udc_remove(struct platform_device *pdev)
2278 {
2279 struct pxa25x_udc *dev = platform_get_drvdata(pdev);
2280
2281 if (dev->driver)
2282 return -EBUSY;
2283
2284 dev->pullup = 0;
2285 pullup(dev);
2286
2287 remove_debug_files(dev);
2288
2289 if (dev->got_irq) {
2290 free_irq(platform_get_irq(pdev, 0), dev);
2291 dev->got_irq = 0;
2292 }
2293 #ifdef CONFIG_ARCH_LUBBOCK
2294 if (machine_is_lubbock()) {
2295 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2296 free_irq(LUBBOCK_USB_IRQ, dev);
2297 }
2298 #endif
2299 if (gpio_is_valid(dev->mach->gpio_vbus)) {
2300 free_irq(gpio_to_irq(dev->mach->gpio_vbus), dev);
2301 gpio_free(dev->mach->gpio_vbus);
2302 }
2303 if (gpio_is_valid(dev->mach->gpio_pullup))
2304 gpio_free(dev->mach->gpio_pullup);
2305
2306 clk_put(dev->clk);
2307
2308 platform_set_drvdata(pdev, NULL);
2309 the_controller = NULL;
2310 return 0;
2311 }
2312
2313 /*-------------------------------------------------------------------------*/
2314
2315 #ifdef CONFIG_PM
2316
2317 /* USB suspend (controlled by the host) and system suspend (controlled
2318 * by the PXA) don't necessarily work well together. If USB is active,
2319 * the 48 MHz clock is required; so the system can't enter 33 MHz idle
2320 * mode, or any deeper PM saving state.
2321 *
2322 * For now, we punt and forcibly disconnect from the USB host when PXA
2323 * enters any suspend state. While we're disconnected, we always disable
2324 * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.
2325 * Boards without software pullup control shouldn't use those states.
2326 * VBUS IRQs should probably be ignored so that the PXA device just acts
2327 * "dead" to USB hosts until system resume.
2328 */
2329 static int pxa25x_udc_suspend(struct platform_device *dev, pm_message_t state)
2330 {
2331 struct pxa25x_udc *udc = platform_get_drvdata(dev);
2332 unsigned long flags;
2333
2334 if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
2335 WARNING("USB host won't detect disconnect!\n");
2336 udc->suspended = 1;
2337
2338 local_irq_save(flags);
2339 pullup(udc);
2340 local_irq_restore(flags);
2341
2342 return 0;
2343 }
2344
2345 static int pxa25x_udc_resume(struct platform_device *dev)
2346 {
2347 struct pxa25x_udc *udc = platform_get_drvdata(dev);
2348 unsigned long flags;
2349
2350 udc->suspended = 0;
2351 local_irq_save(flags);
2352 pullup(udc);
2353 local_irq_restore(flags);
2354
2355 return 0;
2356 }
2357
2358 #else
2359 #define pxa25x_udc_suspend NULL
2360 #define pxa25x_udc_resume NULL
2361 #endif
2362
2363 /*-------------------------------------------------------------------------*/
2364
2365 static struct platform_driver udc_driver = {
2366 .shutdown = pxa25x_udc_shutdown,
2367 .remove = __exit_p(pxa25x_udc_remove),
2368 .suspend = pxa25x_udc_suspend,
2369 .resume = pxa25x_udc_resume,
2370 .driver = {
2371 .owner = THIS_MODULE,
2372 .name = "pxa25x-udc",
2373 },
2374 };
2375
2376 static int __init udc_init(void)
2377 {
2378 pr_info("%s: version %s\n", driver_name, DRIVER_VERSION);
2379 return platform_driver_probe(&udc_driver, pxa25x_udc_probe);
2380 }
2381 module_init(udc_init);
2382
2383 static void __exit udc_exit(void)
2384 {
2385 platform_driver_unregister(&udc_driver);
2386 }
2387 module_exit(udc_exit);
2388
2389 MODULE_DESCRIPTION(DRIVER_DESC);
2390 MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
2391 MODULE_LICENSE("GPL");
2392 MODULE_ALIAS("platform:pxa25x-udc");
Support for the Chinese Samsung S3C2440 based development boards