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[CPUFREQ] Fix the p4-clockmod N60 errata workaround.
[linux-2.6/mini2440.git] / sound / oss / cs46xx.c
blob58e25c82eaf29f9db180e8b702d25e1a94b2a437
1 /*
2 * Crystal SoundFusion CS46xx driver
3 *
4 * Copyright 1998-2001 Cirrus Logic Corporation <pcaudio@crystal.cirrus.com>
5 * <twoller@crystal.cirrus.com>
6 * Copyright 1999-2000 Jaroslav Kysela <perex@suse.cz>
7 * Copyright 2000 Alan Cox <alan@redhat.com>
8 *
9 * The core of this code is taken from the ALSA project driver by
10 * Jaroslav. Please send Jaroslav the credit for the driver and
11 * report bugs in this port to <alan@redhat.com>
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 * Current maintainers:
27 * Cirrus Logic Corporation, Thomas Woller (tw)
28 * <twoller@crystal.cirrus.com>
29 * Nils Faerber (nf)
30 * <nils@kernelconcepts.de>
31 * Thanks to David Pollard for testing.
32 *
33 * Changes:
34 * 20000909-nf Changed cs_read, cs_write and drain_dac
35 * 20001025-tw Separate Playback/Capture structs and buffers.
36 * Added Scatter/Gather support for Playback.
37 * Added Capture.
38 * 20001027-nf Port to kernel 2.4.0-test9, some clean-ups
39 * Start of powermanagement support (CS46XX_PM).
40 * 20001128-tw Add module parm for default buffer order.
41 * added DMA_GFP flag to kmalloc dma buffer allocs.
42 * backfill silence to eliminate stuttering on
43 * underruns.
44 * 20001201-tw add resyncing of swptr on underruns.
45 * 20001205-tw-nf fixed GETOSPACE ioctl() after open()
46 * 20010113-tw patch from Hans Grobler general cleanup.
47 * 20010117-tw 2.4.0 pci cleanup, wrapper code for 2.2.16-2.4.0
48 * 20010118-tw basic PM support for 2.2.16+ and 2.4.0/2.4.2.
49 * 20010228-dh patch from David Huggins - cs_update_ptr recursion.
50 * 20010409-tw add hercules game theatre XP amp code.
51 * 20010420-tw cleanup powerdown/up code.
52 * 20010521-tw eliminate pops, and fixes for powerdown.
53 * 20010525-tw added fixes for thinkpads with powerdown logic.
54 * 20010723-sh patch from Horms (Simon Horman) -
55 * SOUND_PCM_READ_BITS returns bits as set in driver
56 * rather than a logical or of the possible values.
57 * Various ioctls handle the case where the device
58 * is open for reading or writing but not both better.
59 *
60 * Status:
61 * Playback/Capture supported from 8k-48k.
62 * 16Bit Signed LE & 8Bit Unsigned, with Mono or Stereo supported.
63 *
64 * APM/PM - 2.2.x APM is enabled and functioning fine. APM can also
65 * be enabled for 2.4.x by modifying the CS46XX_ACPI_SUPPORT macro
66 * definition.
67 *
68 * Hercules Game Theatre XP - the EGPIO2 pin controls the external Amp,
69 * so, use the drain/polarity to enable.
70 * hercules_egpio_disable set to 1, will force a 0 to EGPIODR.
71 *
72 * VTB Santa Cruz - the GPIO7/GPIO8 on the Secondary Codec control
73 * the external amplifier for the "back" speakers, since we do not
74 * support the secondary codec then this external amp is also not
75 * turned on.
76 */
77
78 #include <linux/interrupt.h>
79 #include <linux/list.h>
80 #include <linux/module.h>
81 #include <linux/string.h>
82 #include <linux/ioport.h>
83 #include <linux/sched.h>
84 #include <linux/delay.h>
85 #include <linux/sound.h>
86 #include <linux/slab.h>
87 #include <linux/soundcard.h>
88 #include <linux/pci.h>
89 #include <linux/bitops.h>
90 #include <linux/init.h>
91 #include <linux/poll.h>
92 #include <linux/ac97_codec.h>
93
94 #include <asm/io.h>
95 #include <asm/dma.h>
96 #include <asm/uaccess.h>
97
98 #include "cs46xxpm-24.h"
99 #include "cs46xx_wrapper-24.h"
100 #include "cs461x.h"
101
102 /* MIDI buffer sizes */
103 #define CS_MIDIINBUF 500
104 #define CS_MIDIOUTBUF 500
105
106 #define ADC_RUNNING 1
107 #define DAC_RUNNING 2
108
109 #define CS_FMT_16BIT 1 /* These are fixed in fact */
110 #define CS_FMT_STEREO 2
111 #define CS_FMT_MASK 3
112
113 #define CS_TYPE_ADC 1
114 #define CS_TYPE_DAC 2
115
116 #define CS_TRUE 1
117 #define CS_FALSE 0
118
119 #define CS_INC_USE_COUNT(m) (atomic_inc(m))
120 #define CS_DEC_USE_COUNT(m) (atomic_dec(m))
121 #define CS_DEC_AND_TEST(m) (atomic_dec_and_test(m))
122 #define CS_IN_USE(m) (atomic_read(m) != 0)
123
124 #define CS_DBGBREAKPOINT {__asm__("INT $3");}
125 /*
126 * CS461x definitions
127 */
128
129 #define CS461X_BA0_SIZE 0x2000
130 #define CS461X_BA1_DATA0_SIZE 0x3000
131 #define CS461X_BA1_DATA1_SIZE 0x3800
132 #define CS461X_BA1_PRG_SIZE 0x7000
133 #define CS461X_BA1_REG_SIZE 0x0100
134
135 #define GOF_PER_SEC 200
136
137 #define CSDEBUG_INTERFACE 1
138 #define CSDEBUG 1
139 /*
140 * Turn on/off debugging compilation by using 1/0 respectively for CSDEBUG
141 *
142 *
143 * CSDEBUG is usual mode is set to 1, then use the
144 * cs_debuglevel and cs_debugmask to turn on or off debugging.
145 * Debug level of 1 has been defined to be kernel errors and info
146 * that should be printed on any released driver.
147 */
148 #if CSDEBUG
149 #define CS_DBGOUT(mask,level,x) if((cs_debuglevel >= (level)) && ((mask) & cs_debugmask)) {x;}
150 #else
151 #define CS_DBGOUT(mask,level,x)
152 #endif
153 /*
154 * cs_debugmask areas
155 */
156 #define CS_INIT 0x00000001 /* initialization and probe functions */
157 #define CS_ERROR 0x00000002 /* tmp debugging bit placeholder */
158 #define CS_INTERRUPT 0x00000004 /* interrupt handler (separate from all other) */
159 #define CS_FUNCTION 0x00000008 /* enter/leave functions */
160 #define CS_WAVE_WRITE 0x00000010 /* write information for wave */
161 #define CS_WAVE_READ 0x00000020 /* read information for wave */
162 #define CS_MIDI_WRITE 0x00000040 /* write information for midi */
163 #define CS_MIDI_READ 0x00000080 /* read information for midi */
164 #define CS_MPU401_WRITE 0x00000100 /* write information for mpu401 */
165 #define CS_MPU401_READ 0x00000200 /* read information for mpu401 */
166 #define CS_OPEN 0x00000400 /* all open functions in the driver */
167 #define CS_RELEASE 0x00000800 /* all release functions in the driver */
168 #define CS_PARMS 0x00001000 /* functional and operational parameters */
169 #define CS_IOCTL 0x00002000 /* ioctl (non-mixer) */
170 #define CS_PM 0x00004000 /* PM */
171 #define CS_TMP 0x10000000 /* tmp debug mask bit */
172
173 #define CS_IOCTL_CMD_SUSPEND 0x1 // suspend
174 #define CS_IOCTL_CMD_RESUME 0x2 // resume
175
176 #if CSDEBUG
177 static unsigned long cs_debuglevel=1; /* levels range from 1-9 */
178 module_param(cs_debuglevel, ulong, 0644);
179 static unsigned long cs_debugmask=CS_INIT | CS_ERROR; /* use CS_DBGOUT with various mask values */
180 module_param(cs_debugmask, ulong, 0644);
181 #endif
182 static unsigned long hercules_egpio_disable; /* if non-zero set all EGPIO to 0 */
183 module_param(hercules_egpio_disable, ulong, 0);
184 static unsigned long initdelay=700; /* PM delay in millisecs */
185 module_param(initdelay, ulong, 0);
186 static unsigned long powerdown=-1; /* turn on/off powerdown processing in driver */
187 module_param(powerdown, ulong, 0);
188 #define DMABUF_DEFAULTORDER 3
189 static unsigned long defaultorder=DMABUF_DEFAULTORDER;
190 module_param(defaultorder, ulong, 0);
191
192 static int external_amp;
193 module_param(external_amp, bool, 0);
194 static int thinkpad;
195 module_param(thinkpad, bool, 0);
196
197 /*
198 * set the powerdown module parm to 0 to disable all
199 * powerdown. also set thinkpad to 1 to disable powerdown,
200 * but also to enable the clkrun functionality.
201 */
202 static unsigned cs_powerdown=1;
203 static unsigned cs_laptop_wait=1;
204
205 /* An instance of the 4610 channel */
206 struct cs_channel
207 {
208 int used;
209 int num;
210 void *state;
211 };
212
213 #define CS46XX_MAJOR_VERSION "1"
214 #define CS46XX_MINOR_VERSION "28"
215
216 #ifdef __ia64__
217 #define CS46XX_ARCH "64" //architecture key
218 #else
219 #define CS46XX_ARCH "32" //architecture key
220 #endif
221
222 static struct list_head cs46xx_devs = { &cs46xx_devs, &cs46xx_devs };
223
224 /* magic numbers to protect our data structures */
225 #define CS_CARD_MAGIC 0x43525553 /* "CRUS" */
226 #define CS_STATE_MAGIC 0x4c4f4749 /* "LOGI" */
227 #define NR_HW_CH 3
228
229 /* maxinum number of AC97 codecs connected, AC97 2.0 defined 4 */
230 #define NR_AC97 2
231
232 static const unsigned sample_size[] = { 1, 2, 2, 4 };
233 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
234
235 /* "software" or virtual channel, an instance of opened /dev/dsp */
236 struct cs_state {
237 unsigned int magic;
238 struct cs_card *card; /* Card info */
239
240 /* single open lock mechanism, only used for recording */
241 struct semaphore open_sem;
242 wait_queue_head_t open_wait;
243
244 /* file mode */
245 mode_t open_mode;
246
247 /* virtual channel number */
248 int virt;
249
250 struct dmabuf {
251 /* wave sample stuff */
252 unsigned int rate;
253 unsigned char fmt, enable;
254
255 /* hardware channel */
256 struct cs_channel *channel;
257 int pringbuf; /* Software ring slot */
258 void *pbuf; /* 4K hardware DMA buffer */
259
260 /* OSS buffer management stuff */
261 void *rawbuf;
262 dma_addr_t dma_handle;
263 unsigned buforder;
264 unsigned numfrag;
265 unsigned fragshift;
266 unsigned divisor;
267 unsigned type;
268 void *tmpbuff; /* tmp buffer for sample conversions */
269 dma_addr_t dmaaddr;
270 dma_addr_t dmaaddr_tmpbuff;
271 unsigned buforder_tmpbuff; /* Log base 2 of size in bytes.. */
272
273 /* our buffer acts like a circular ring */
274 unsigned hwptr; /* where dma last started, updated by update_ptr */
275 unsigned swptr; /* where driver last clear/filled, updated by read/write */
276 int count; /* bytes to be comsumed or been generated by dma machine */
277 unsigned total_bytes; /* total bytes dmaed by hardware */
278 unsigned blocks; /* total blocks */
279
280 unsigned error; /* number of over/underruns */
281 unsigned underrun; /* underrun pending before next write has occurred */
282 wait_queue_head_t wait; /* put process on wait queue when no more space in buffer */
283
284 /* redundant, but makes calculations easier */
285 unsigned fragsize;
286 unsigned dmasize;
287 unsigned fragsamples;
288
289 /* OSS stuff */
290 unsigned mapped:1;
291 unsigned ready:1;
292 unsigned endcleared:1;
293 unsigned SGok:1;
294 unsigned update_flag;
295 unsigned ossfragshift;
296 int ossmaxfrags;
297 unsigned subdivision;
298 } dmabuf;
299 /* Guard against mmap/write/read races */
300 struct semaphore sem;
301 };
302
303 struct cs_card {
304 struct cs_channel channel[2];
305 unsigned int magic;
306
307 /* We keep cs461x cards in a linked list */
308 struct cs_card *next;
309
310 /* The cs461x has a certain amount of cross channel interaction
311 so we use a single per card lock */
312 spinlock_t lock;
313
314 /* Keep AC97 sane */
315 spinlock_t ac97_lock;
316
317 /* mixer use count */
318 atomic_t mixer_use_cnt;
319
320 /* PCI device stuff */
321 struct pci_dev * pci_dev;
322 struct list_head list;
323
324 unsigned int pctl, cctl; /* Hardware DMA flag sets */
325
326 /* soundcore stuff */
327 int dev_audio;
328 int dev_midi;
329
330 /* structures for abstraction of hardware facilities, codecs, banks and channels*/
331 struct ac97_codec *ac97_codec[NR_AC97];
332 struct cs_state *states[2];
333
334 u16 ac97_features;
335
336 int amplifier; /* Amplifier control */
337 void (*amplifier_ctrl)(struct cs_card *, int);
338 void (*amp_init)(struct cs_card *);
339
340 int active; /* Active clocking */
341 void (*active_ctrl)(struct cs_card *, int);
342
343 /* hardware resources */
344 unsigned long ba0_addr;
345 unsigned long ba1_addr;
346 u32 irq;
347
348 /* mappings */
349 void __iomem *ba0;
350 union
351 {
352 struct
353 {
354 u8 __iomem *data0;
355 u8 __iomem *data1;
356 u8 __iomem *pmem;
357 u8 __iomem *reg;
358 } name;
359 u8 __iomem *idx[4];
360 } ba1;
361
362 /* Function support */
363 struct cs_channel *(*alloc_pcm_channel)(struct cs_card *);
364 struct cs_channel *(*alloc_rec_pcm_channel)(struct cs_card *);
365 void (*free_pcm_channel)(struct cs_card *, int chan);
366
367 /* /dev/midi stuff */
368 struct {
369 unsigned ird, iwr, icnt;
370 unsigned ord, owr, ocnt;
371 wait_queue_head_t open_wait;
372 wait_queue_head_t iwait;
373 wait_queue_head_t owait;
374 spinlock_t lock;
375 unsigned char ibuf[CS_MIDIINBUF];
376 unsigned char obuf[CS_MIDIOUTBUF];
377 mode_t open_mode;
378 struct semaphore open_sem;
379 } midi;
380 struct cs46xx_pm pm;
381 };
382
383 static int cs_open_mixdev(struct inode *inode, struct file *file);
384 static int cs_release_mixdev(struct inode *inode, struct file *file);
385 static int cs_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd,
386 unsigned long arg);
387 static int cs_hardware_init(struct cs_card *card);
388 static int cs46xx_powerup(struct cs_card *card, unsigned int type);
389 static int cs461x_powerdown(struct cs_card *card, unsigned int type, int suspendflag);
390 static void cs461x_clear_serial_FIFOs(struct cs_card *card, int type);
391 static int cs46xx_suspend_tbl(struct pci_dev *pcidev, pm_message_t state);
392 static int cs46xx_resume_tbl(struct pci_dev *pcidev);
393
394 #if CSDEBUG
395
396 /* DEBUG ROUTINES */
397
398 #define SOUND_MIXER_CS_GETDBGLEVEL _SIOWR('M',120, int)
399 #define SOUND_MIXER_CS_SETDBGLEVEL _SIOWR('M',121, int)
400 #define SOUND_MIXER_CS_GETDBGMASK _SIOWR('M',122, int)
401 #define SOUND_MIXER_CS_SETDBGMASK _SIOWR('M',123, int)
402 #define SOUND_MIXER_CS_APM _SIOWR('M',124, int)
403
404 static void printioctl(unsigned int x)
405 {
406 unsigned int i;
407 unsigned char vidx;
408 /* these values are incorrect for the ac97 driver, fix.
409 * Index of mixtable1[] member is Device ID
410 * and must be <= SOUND_MIXER_NRDEVICES.
411 * Value of array member is index into s->mix.vol[]
412 */
413 static const unsigned char mixtable1[SOUND_MIXER_NRDEVICES] = {
414 [SOUND_MIXER_PCM] = 1, /* voice */
415 [SOUND_MIXER_LINE1] = 2, /* AUX */
416 [SOUND_MIXER_CD] = 3, /* CD */
417 [SOUND_MIXER_LINE] = 4, /* Line */
418 [SOUND_MIXER_SYNTH] = 5, /* FM */
419 [SOUND_MIXER_MIC] = 6, /* Mic */
420 [SOUND_MIXER_SPEAKER] = 7, /* Speaker */
421 [SOUND_MIXER_RECLEV] = 8, /* Recording level */
422 [SOUND_MIXER_VOLUME] = 9 /* Master Volume */
423 };
424
425 switch(x)
426 {
427 case SOUND_MIXER_CS_GETDBGMASK:
428 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_CS_GETDBGMASK: ") );
429 break;
430 case SOUND_MIXER_CS_GETDBGLEVEL:
431 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_CS_GETDBGLEVEL: ") );
432 break;
433 case SOUND_MIXER_CS_SETDBGMASK:
434 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_CS_SETDBGMASK: ") );
435 break;
436 case SOUND_MIXER_CS_SETDBGLEVEL:
437 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_CS_SETDBGLEVEL: ") );
438 break;
439 case OSS_GETVERSION:
440 CS_DBGOUT(CS_IOCTL, 4, printk("OSS_GETVERSION: ") );
441 break;
442 case SNDCTL_DSP_SYNC:
443 CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_SYNC: ") );
444 break;
445 case SNDCTL_DSP_SETDUPLEX:
446 CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_SETDUPLEX: ") );
447 break;
448 case SNDCTL_DSP_GETCAPS:
449 CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_GETCAPS: ") );
450 break;
451 case SNDCTL_DSP_RESET:
452 CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_RESET: ") );
453 break;
454 case SNDCTL_DSP_SPEED:
455 CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_SPEED: ") );
456 break;
457 case SNDCTL_DSP_STEREO:
458 CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_STEREO: ") );
459 break;
460 case SNDCTL_DSP_CHANNELS:
461 CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_CHANNELS: ") );
462 break;
463 case SNDCTL_DSP_GETFMTS:
464 CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_GETFMTS: ") );
465 break;
466 case SNDCTL_DSP_SETFMT:
467 CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_SETFMT: ") );
468 break;
469 case SNDCTL_DSP_POST:
470 CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_POST: ") );
471 break;
472 case SNDCTL_DSP_GETTRIGGER:
473 CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_GETTRIGGER: ") );
474 break;
475 case SNDCTL_DSP_SETTRIGGER:
476 CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_SETTRIGGER: ") );
477 break;
478 case SNDCTL_DSP_GETOSPACE:
479 CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_GETOSPACE: ") );
480 break;
481 case SNDCTL_DSP_GETISPACE:
482 CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_GETISPACE: ") );
483 break;
484 case SNDCTL_DSP_NONBLOCK:
485 CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_NONBLOCK: ") );
486 break;
487 case SNDCTL_DSP_GETODELAY:
488 CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_GETODELAY: ") );
489 break;
490 case SNDCTL_DSP_GETIPTR:
491 CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_GETIPTR: ") );
492 break;
493 case SNDCTL_DSP_GETOPTR:
494 CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_GETOPTR: ") );
495 break;
496 case SNDCTL_DSP_GETBLKSIZE:
497 CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_GETBLKSIZE: ") );
498 break;
499 case SNDCTL_DSP_SETFRAGMENT:
500 CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_SETFRAGMENT: ") );
501 break;
502 case SNDCTL_DSP_SUBDIVIDE:
503 CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_SUBDIVIDE: ") );
504 break;
505 case SOUND_PCM_READ_RATE:
506 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_PCM_READ_RATE: ") );
507 break;
508 case SOUND_PCM_READ_CHANNELS:
509 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_PCM_READ_CHANNELS: ") );
510 break;
511 case SOUND_PCM_READ_BITS:
512 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_PCM_READ_BITS: ") );
513 break;
514 case SOUND_PCM_WRITE_FILTER:
515 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_PCM_WRITE_FILTER: ") );
516 break;
517 case SNDCTL_DSP_SETSYNCRO:
518 CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_SETSYNCRO: ") );
519 break;
520 case SOUND_PCM_READ_FILTER:
521 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_PCM_READ_FILTER: ") );
522 break;
523
524 case SOUND_MIXER_PRIVATE1:
525 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_PRIVATE1: ") );
526 break;
527 case SOUND_MIXER_PRIVATE2:
528 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_PRIVATE2: ") );
529 break;
530 case SOUND_MIXER_PRIVATE3:
531 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_PRIVATE3: ") );
532 break;
533 case SOUND_MIXER_PRIVATE4:
534 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_PRIVATE4: ") );
535 break;
536 case SOUND_MIXER_PRIVATE5:
537 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_PRIVATE5: ") );
538 break;
539 case SOUND_MIXER_INFO:
540 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_INFO: ") );
541 break;
542 case SOUND_OLD_MIXER_INFO:
543 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_OLD_MIXER_INFO: ") );
544 break;
545
546 default:
547 switch (_IOC_NR(x))
548 {
549 case SOUND_MIXER_VOLUME:
550 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_VOLUME: ") );
551 break;
552 case SOUND_MIXER_SPEAKER:
553 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_SPEAKER: ") );
554 break;
555 case SOUND_MIXER_RECLEV:
556 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_RECLEV: ") );
557 break;
558 case SOUND_MIXER_MIC:
559 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_MIC: ") );
560 break;
561 case SOUND_MIXER_SYNTH:
562 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_SYNTH: ") );
563 break;
564 case SOUND_MIXER_RECSRC:
565 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_RECSRC: ") );
566 break;
567 case SOUND_MIXER_DEVMASK:
568 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_DEVMASK: ") );
569 break;
570 case SOUND_MIXER_RECMASK:
571 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_RECMASK: ") );
572 break;
573 case SOUND_MIXER_STEREODEVS:
574 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_STEREODEVS: ") );
575 break;
576 case SOUND_MIXER_CAPS:
577 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_CAPS:") );
578 break;
579 default:
580 i = _IOC_NR(x);
581 if (i >= SOUND_MIXER_NRDEVICES || !(vidx = mixtable1[i]))
582 {
583 CS_DBGOUT(CS_IOCTL, 4, printk("UNKNOWN IOCTL: 0x%.8x NR=%d ",x,i) );
584 }
585 else
586 {
587 CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_IOCTL AC9x: 0x%.8x NR=%d ",
588 x,i) );
589 }
590 break;
591 }
592 }
593 CS_DBGOUT(CS_IOCTL, 4, printk("command = 0x%x IOC_NR=%d\n",x, _IOC_NR(x)) );
594 }
595 #endif
596
597 /*
598 * common I/O routines
599 */
600
601 static void cs461x_poke(struct cs_card *codec, unsigned long reg, unsigned int val)
602 {
603 writel(val, codec->ba1.idx[(reg >> 16) & 3]+(reg&0xffff));
604 }
605
606 static unsigned int cs461x_peek(struct cs_card *codec, unsigned long reg)
607 {
608 return readl(codec->ba1.idx[(reg >> 16) & 3]+(reg&0xffff));
609 }
610
611 static void cs461x_pokeBA0(struct cs_card *codec, unsigned long reg, unsigned int val)
612 {
613 writel(val, codec->ba0+reg);
614 }
615
616 static unsigned int cs461x_peekBA0(struct cs_card *codec, unsigned long reg)
617 {
618 return readl(codec->ba0+reg);
619 }
620
621
622 static u16 cs_ac97_get(struct ac97_codec *dev, u8 reg);
623 static void cs_ac97_set(struct ac97_codec *dev, u8 reg, u16 data);
624
625 static struct cs_channel *cs_alloc_pcm_channel(struct cs_card *card)
626 {
627 if(card->channel[1].used==1)
628 return NULL;
629 card->channel[1].used=1;
630 card->channel[1].num=1;
631 return &card->channel[1];
632 }
633
634 static struct cs_channel *cs_alloc_rec_pcm_channel(struct cs_card *card)
635 {
636 if(card->channel[0].used==1)
637 return NULL;
638 card->channel[0].used=1;
639 card->channel[0].num=0;
640 return &card->channel[0];
641 }
642
643 static void cs_free_pcm_channel(struct cs_card *card, int channel)
644 {
645 card->channel[channel].state = NULL;
646 card->channel[channel].used=0;
647 }
648
649 /*
650 * setup a divisor value to help with conversion from
651 * 16bit Stereo, down to 8bit stereo/mono or 16bit mono.
652 * assign a divisor of 1 if using 16bit Stereo as that is
653 * the only format that the static image will capture.
654 */
655 static void cs_set_divisor(struct dmabuf *dmabuf)
656 {
657 if(dmabuf->type == CS_TYPE_DAC)
658 dmabuf->divisor = 1;
659 else if( !(dmabuf->fmt & CS_FMT_STEREO) &&
660 (dmabuf->fmt & CS_FMT_16BIT))
661 dmabuf->divisor = 2;
662 else if( (dmabuf->fmt & CS_FMT_STEREO) &&
663 !(dmabuf->fmt & CS_FMT_16BIT))
664 dmabuf->divisor = 2;
665 else if( !(dmabuf->fmt & CS_FMT_STEREO) &&
666 !(dmabuf->fmt & CS_FMT_16BIT))
667 dmabuf->divisor = 4;
668 else
669 dmabuf->divisor = 1;
670
671 CS_DBGOUT(CS_PARMS | CS_FUNCTION, 8, printk(
672 "cs46xx: cs_set_divisor()- %s %d\n",
673 (dmabuf->type == CS_TYPE_ADC) ? "ADC" : "DAC",
674 dmabuf->divisor) );
675 }
676
677 /*
678 * mute some of the more prevalent registers to avoid popping.
679 */
680 static void cs_mute(struct cs_card *card, int state)
681 {
682 struct ac97_codec *dev=card->ac97_codec[0];
683
684 CS_DBGOUT(CS_FUNCTION, 2, printk(KERN_INFO "cs46xx: cs_mute()+ %s\n",
685 (state == CS_TRUE) ? "Muting" : "UnMuting") );
686
687 if(state == CS_TRUE)
688 {
689 /*
690 * fix pops when powering up on thinkpads
691 */
692 card->pm.u32AC97_master_volume = (u32)cs_ac97_get( dev,
693 (u8)BA0_AC97_MASTER_VOLUME);
694 card->pm.u32AC97_headphone_volume = (u32)cs_ac97_get(dev,
695 (u8)BA0_AC97_HEADPHONE_VOLUME);
696 card->pm.u32AC97_master_volume_mono = (u32)cs_ac97_get(dev,
697 (u8)BA0_AC97_MASTER_VOLUME_MONO);
698 card->pm.u32AC97_pcm_out_volume = (u32)cs_ac97_get(dev,
699 (u8)BA0_AC97_PCM_OUT_VOLUME);
700
701 cs_ac97_set(dev, (u8)BA0_AC97_MASTER_VOLUME, 0x8000);
702 cs_ac97_set(dev, (u8)BA0_AC97_HEADPHONE_VOLUME, 0x8000);
703 cs_ac97_set(dev, (u8)BA0_AC97_MASTER_VOLUME_MONO, 0x8000);
704 cs_ac97_set(dev, (u8)BA0_AC97_PCM_OUT_VOLUME, 0x8000);
705 }
706 else
707 {
708 cs_ac97_set(dev, (u8)BA0_AC97_MASTER_VOLUME, card->pm.u32AC97_master_volume);
709 cs_ac97_set(dev, (u8)BA0_AC97_HEADPHONE_VOLUME, card->pm.u32AC97_headphone_volume);
710 cs_ac97_set(dev, (u8)BA0_AC97_MASTER_VOLUME_MONO, card->pm.u32AC97_master_volume_mono);
711 cs_ac97_set(dev, (u8)BA0_AC97_PCM_OUT_VOLUME, card->pm.u32AC97_pcm_out_volume);
712 }
713 CS_DBGOUT(CS_FUNCTION, 2, printk(KERN_INFO "cs46xx: cs_mute()-\n"));
714 }
715
716 /* set playback sample rate */
717 static unsigned int cs_set_dac_rate(struct cs_state * state, unsigned int rate)
718 {
719 struct dmabuf *dmabuf = &state->dmabuf;
720 unsigned int tmp1, tmp2;
721 unsigned int phiIncr;
722 unsigned int correctionPerGOF, correctionPerSec;
723 unsigned long flags;
724
725 CS_DBGOUT(CS_FUNCTION, 2, printk("cs46xx: cs_set_dac_rate()+ %d\n",rate) );
726
727 /*
728 * Compute the values used to drive the actual sample rate conversion.
729 * The following formulas are being computed, using inline assembly
730 * since we need to use 64 bit arithmetic to compute the values:
731 *
732 * phiIncr = floor((Fs,in * 2^26) / Fs,out)
733 * correctionPerGOF = floor((Fs,in * 2^26 - Fs,out * phiIncr) /
734 * GOF_PER_SEC)
735 * ulCorrectionPerSec = Fs,in * 2^26 - Fs,out * phiIncr -M
736 * GOF_PER_SEC * correctionPerGOF
737 *
738 * i.e.
739 *
740 * phiIncr:other = dividend:remainder((Fs,in * 2^26) / Fs,out)
741 * correctionPerGOF:correctionPerSec =
742 * dividend:remainder(ulOther / GOF_PER_SEC)
743 */
744 tmp1 = rate << 16;
745 phiIncr = tmp1 / 48000;
746 tmp1 -= phiIncr * 48000;
747 tmp1 <<= 10;
748 phiIncr <<= 10;
749 tmp2 = tmp1 / 48000;
750 phiIncr += tmp2;
751 tmp1 -= tmp2 * 48000;
752 correctionPerGOF = tmp1 / GOF_PER_SEC;
753 tmp1 -= correctionPerGOF * GOF_PER_SEC;
754 correctionPerSec = tmp1;
755
756 /*
757 * Fill in the SampleRateConverter control block.
758 */
759
760 spin_lock_irqsave(&state->card->lock, flags);
761 cs461x_poke(state->card, BA1_PSRC,
762 ((correctionPerSec << 16) & 0xFFFF0000) | (correctionPerGOF & 0xFFFF));
763 cs461x_poke(state->card, BA1_PPI, phiIncr);
764 spin_unlock_irqrestore(&state->card->lock, flags);
765 dmabuf->rate = rate;
766
767 CS_DBGOUT(CS_FUNCTION, 2, printk("cs46xx: cs_set_dac_rate()- %d\n",rate) );
768 return rate;
769 }
770
771 /* set recording sample rate */
772 static unsigned int cs_set_adc_rate(struct cs_state * state, unsigned int rate)
773 {
774 struct dmabuf *dmabuf = &state->dmabuf;
775 struct cs_card *card = state->card;
776 unsigned int phiIncr, coeffIncr, tmp1, tmp2;
777 unsigned int correctionPerGOF, correctionPerSec, initialDelay;
778 unsigned int frameGroupLength, cnt;
779 unsigned long flags;
780 CS_DBGOUT(CS_FUNCTION, 2, printk("cs46xx: cs_set_adc_rate()+ %d\n",rate) );
781
782 /*
783 * We can only decimate by up to a factor of 1/9th the hardware rate.
784 * Correct the value if an attempt is made to stray outside that limit.
785 */
786 if ((rate * 9) < 48000)
787 rate = 48000 / 9;
788
789 /*
790 * We can not capture at at rate greater than the Input Rate (48000).
791 * Return an error if an attempt is made to stray outside that limit.
792 */
793 if (rate > 48000)
794 rate = 48000;
795
796 /*
797 * Compute the values used to drive the actual sample rate conversion.
798 * The following formulas are being computed, using inline assembly
799 * since we need to use 64 bit arithmetic to compute the values:
800 *
801 * coeffIncr = -floor((Fs,out * 2^23) / Fs,in)
802 * phiIncr = floor((Fs,in * 2^26) / Fs,out)
803 * correctionPerGOF = floor((Fs,in * 2^26 - Fs,out * phiIncr) /
804 * GOF_PER_SEC)
805 * correctionPerSec = Fs,in * 2^26 - Fs,out * phiIncr -
806 * GOF_PER_SEC * correctionPerGOF
807 * initialDelay = ceil((24 * Fs,in) / Fs,out)
808 *
809 * i.e.
810 *
811 * coeffIncr = neg(dividend((Fs,out * 2^23) / Fs,in))
812 * phiIncr:ulOther = dividend:remainder((Fs,in * 2^26) / Fs,out)
813 * correctionPerGOF:correctionPerSec =
814 * dividend:remainder(ulOther / GOF_PER_SEC)
815 * initialDelay = dividend(((24 * Fs,in) + Fs,out - 1) / Fs,out)
816 */
817
818 tmp1 = rate << 16;
819 coeffIncr = tmp1 / 48000;
820 tmp1 -= coeffIncr * 48000;
821 tmp1 <<= 7;
822 coeffIncr <<= 7;
823 coeffIncr += tmp1 / 48000;
824 coeffIncr ^= 0xFFFFFFFF;
825 coeffIncr++;
826 tmp1 = 48000 << 16;
827 phiIncr = tmp1 / rate;
828 tmp1 -= phiIncr * rate;
829 tmp1 <<= 10;
830 phiIncr <<= 10;
831 tmp2 = tmp1 / rate;
832 phiIncr += tmp2;
833 tmp1 -= tmp2 * rate;
834 correctionPerGOF = tmp1 / GOF_PER_SEC;
835 tmp1 -= correctionPerGOF * GOF_PER_SEC;
836 correctionPerSec = tmp1;
837 initialDelay = ((48000 * 24) + rate - 1) / rate;
838
839 /*
840 * Fill in the VariDecimate control block.
841 */
842 spin_lock_irqsave(&card->lock, flags);
843 cs461x_poke(card, BA1_CSRC,
844 ((correctionPerSec << 16) & 0xFFFF0000) | (correctionPerGOF & 0xFFFF));
845 cs461x_poke(card, BA1_CCI, coeffIncr);
846 cs461x_poke(card, BA1_CD,
847 (((BA1_VARIDEC_BUF_1 + (initialDelay << 2)) << 16) & 0xFFFF0000) | 0x80);
848 cs461x_poke(card, BA1_CPI, phiIncr);
849 spin_unlock_irqrestore(&card->lock, flags);
850
851 /*
852 * Figure out the frame group length for the write back task. Basically,
853 * this is just the factors of 24000 (2^6*3*5^3) that are not present in
854 * the output sample rate.
855 */
856 frameGroupLength = 1;
857 for (cnt = 2; cnt <= 64; cnt *= 2) {
858 if (((rate / cnt) * cnt) != rate)
859 frameGroupLength *= 2;
860 }
861 if (((rate / 3) * 3) != rate) {
862 frameGroupLength *= 3;
863 }
864 for (cnt = 5; cnt <= 125; cnt *= 5) {
865 if (((rate / cnt) * cnt) != rate)
866 frameGroupLength *= 5;
867 }
868
869 /*
870 * Fill in the WriteBack control block.
871 */
872 spin_lock_irqsave(&card->lock, flags);
873 cs461x_poke(card, BA1_CFG1, frameGroupLength);
874 cs461x_poke(card, BA1_CFG2, (0x00800000 | frameGroupLength));
875 cs461x_poke(card, BA1_CCST, 0x0000FFFF);
876 cs461x_poke(card, BA1_CSPB, ((65536 * rate) / 24000));
877 cs461x_poke(card, (BA1_CSPB + 4), 0x0000FFFF);
878 spin_unlock_irqrestore(&card->lock, flags);
879 dmabuf->rate = rate;
880 CS_DBGOUT(CS_FUNCTION, 2, printk("cs46xx: cs_set_adc_rate()- %d\n",rate) );
881 return rate;
882 }
883
884 /* prepare channel attributes for playback */
885 static void cs_play_setup(struct cs_state *state)
886 {
887 struct dmabuf *dmabuf = &state->dmabuf;
888 struct cs_card *card = state->card;
889 unsigned int tmp, Count, playFormat;
890
891 CS_DBGOUT(CS_FUNCTION, 2, printk("cs46xx: cs_play_setup()+\n") );
892 cs461x_poke(card, BA1_PVOL, 0x80008000);
893 if(!dmabuf->SGok)
894 cs461x_poke(card, BA1_PBA, virt_to_bus(dmabuf->pbuf));
895
896 Count = 4;
897 playFormat=cs461x_peek(card, BA1_PFIE);
898 if ((dmabuf->fmt & CS_FMT_STEREO)) {
899 playFormat &= ~DMA_RQ_C2_AC_MONO_TO_STEREO;
900 Count *= 2;
901 }
902 else
903 playFormat |= DMA_RQ_C2_AC_MONO_TO_STEREO;
904
905 if ((dmabuf->fmt & CS_FMT_16BIT)) {
906 playFormat &= ~(DMA_RQ_C2_AC_8_TO_16_BIT
907 | DMA_RQ_C2_AC_SIGNED_CONVERT);
908 Count *= 2;
909 }
910 else
911 playFormat |= (DMA_RQ_C2_AC_8_TO_16_BIT
912 | DMA_RQ_C2_AC_SIGNED_CONVERT);
913
914 cs461x_poke(card, BA1_PFIE, playFormat);
915
916 tmp = cs461x_peek(card, BA1_PDTC);
917 tmp &= 0xfffffe00;
918 cs461x_poke(card, BA1_PDTC, tmp | --Count);
919
920 CS_DBGOUT(CS_FUNCTION, 2, printk("cs46xx: cs_play_setup()-\n") );
921
922 }
923
924 static struct InitStruct
925 {
926 u32 off;
927 u32 val;
928 } InitArray[] = { {0x00000040, 0x3fc0000f},
929 {0x0000004c, 0x04800000},
930
931 {0x000000b3, 0x00000780},
932 {0x000000b7, 0x00000000},
933 {0x000000bc, 0x07800000},
934
935 {0x000000cd, 0x00800000},
936 };
937
938 /*
939 * "SetCaptureSPValues()" -- Initialize record task values before each
940 * capture startup.
941 */
942 static void SetCaptureSPValues(struct cs_card *card)
943 {
944 unsigned i, offset;
945 CS_DBGOUT(CS_FUNCTION, 8, printk("cs46xx: SetCaptureSPValues()+\n") );
946 for(i=0; i<sizeof(InitArray)/sizeof(struct InitStruct); i++)
947 {
948 offset = InitArray[i].off*4; /* 8bit to 32bit offset value */
949 cs461x_poke(card, offset, InitArray[i].val );
950 }
951 CS_DBGOUT(CS_FUNCTION, 8, printk("cs46xx: SetCaptureSPValues()-\n") );
952 }
953
954 /* prepare channel attributes for recording */
955 static void cs_rec_setup(struct cs_state *state)
956 {
957 struct cs_card *card = state->card;
958 struct dmabuf *dmabuf = &state->dmabuf;
959 CS_DBGOUT(CS_FUNCTION, 2, printk("cs46xx: cs_rec_setup()+\n") );
960
961 SetCaptureSPValues(card);
962
963 /*
964 * set the attenuation to 0dB
965 */
966 cs461x_poke(card, BA1_CVOL, 0x80008000);
967
968 /*
969 * set the physical address of the capture buffer into the SP
970 */
971 cs461x_poke(card, BA1_CBA, virt_to_bus(dmabuf->rawbuf));
972
973 CS_DBGOUT(CS_FUNCTION, 2, printk("cs46xx: cs_rec_setup()-\n") );
974 }
975
976
977 /* get current playback/recording dma buffer pointer (byte offset from LBA),
978 called with spinlock held! */
979
980 static inline unsigned cs_get_dma_addr(struct cs_state *state)
981 {
982 struct dmabuf *dmabuf = &state->dmabuf;
983 u32 offset;
984
985 if ( (!(dmabuf->enable & DAC_RUNNING)) &&
986 (!(dmabuf->enable & ADC_RUNNING) ) )
987 {
988 CS_DBGOUT(CS_ERROR, 2, printk(
989 "cs46xx: ERROR cs_get_dma_addr(): not enabled \n") );
990 return 0;
991 }
992
993 /*
994 * granularity is byte boundary, good part.
995 */
996 if(dmabuf->enable & DAC_RUNNING)
997 {
998 offset = cs461x_peek(state->card, BA1_PBA);
999 }
1000 else /* ADC_RUNNING must be set */
1001 {
1002 offset = cs461x_peek(state->card, BA1_CBA);
1003 }
1004 CS_DBGOUT(CS_PARMS | CS_FUNCTION, 9,
1005 printk("cs46xx: cs_get_dma_addr() %d\n",offset) );
1006 offset = (u32)bus_to_virt((unsigned long)offset) - (u32)dmabuf->rawbuf;
1007 CS_DBGOUT(CS_PARMS | CS_FUNCTION, 8,
1008 printk("cs46xx: cs_get_dma_addr()- %d\n",offset) );
1009 return offset;
1010 }
1011
1012 static void resync_dma_ptrs(struct cs_state *state)
1013 {
1014 struct dmabuf *dmabuf;
1015
1016 CS_DBGOUT(CS_FUNCTION, 2, printk("cs46xx: resync_dma_ptrs()+ \n") );
1017 if(state)
1018 {
1019 dmabuf = &state->dmabuf;
1020 dmabuf->hwptr=dmabuf->swptr = 0;
1021 dmabuf->pringbuf = 0;
1022 }
1023 CS_DBGOUT(CS_FUNCTION, 2, printk("cs46xx: resync_dma_ptrs()- \n") );
1024 }
1025
1026 /* Stop recording (lock held) */
1027 static inline void __stop_adc(struct cs_state *state)
1028 {
1029 struct dmabuf *dmabuf = &state->dmabuf;
1030 struct cs_card *card = state->card;
1031 unsigned int tmp;
1032
1033 dmabuf->enable &= ~ADC_RUNNING;
1034
1035 tmp = cs461x_peek(card, BA1_CCTL);
1036 tmp &= 0xFFFF0000;
1037 cs461x_poke(card, BA1_CCTL, tmp );
1038 }
1039
1040 static void stop_adc(struct cs_state *state)
1041 {
1042 unsigned long flags;
1043
1044 CS_DBGOUT(CS_FUNCTION, 2, printk("cs46xx: stop_adc()+ \n") );
1045 spin_lock_irqsave(&state->card->lock, flags);
1046 __stop_adc(state);
1047 spin_unlock_irqrestore(&state->card->lock, flags);
1048 CS_DBGOUT(CS_FUNCTION, 2, printk("cs46xx: stop_adc()- \n") );
1049 }
1050
1051 static void start_adc(struct cs_state *state)
1052 {
1053 struct dmabuf *dmabuf = &state->dmabuf;
1054 struct cs_card *card = state->card;
1055 unsigned long flags;
1056 unsigned int tmp;
1057
1058 spin_lock_irqsave(&card->lock, flags);
1059 if (!(dmabuf->enable & ADC_RUNNING) &&
1060 ((dmabuf->mapped || dmabuf->count < (signed)dmabuf->dmasize)
1061 && dmabuf->ready) &&
1062 ((card->pm.flags & CS46XX_PM_IDLE) ||
1063 (card->pm.flags & CS46XX_PM_RESUMED)) )
1064 {
1065 dmabuf->enable |= ADC_RUNNING;
1066 cs_set_divisor(dmabuf);
1067 tmp = cs461x_peek(card, BA1_CCTL);
1068 tmp &= 0xFFFF0000;
1069 tmp |= card->cctl;
1070 CS_DBGOUT(CS_FUNCTION, 2, printk(
1071 "cs46xx: start_adc() poke 0x%x \n",tmp) );
1072 cs461x_poke(card, BA1_CCTL, tmp);
1073 }
1074 spin_unlock_irqrestore(&card->lock, flags);
1075 }
1076
1077 /* stop playback (lock held) */
1078 static inline void __stop_dac(struct cs_state *state)
1079 {
1080 struct dmabuf *dmabuf = &state->dmabuf;
1081 struct cs_card *card = state->card;
1082 unsigned int tmp;
1083
1084 dmabuf->enable &= ~DAC_RUNNING;
1085
1086 tmp=cs461x_peek(card, BA1_PCTL);
1087 tmp&=0xFFFF;
1088 cs461x_poke(card, BA1_PCTL, tmp);
1089 }
1090
1091 static void stop_dac(struct cs_state *state)
1092 {
1093 unsigned long flags;
1094
1095 CS_DBGOUT(CS_FUNCTION, 2, printk("cs46xx: stop_dac()+ \n") );
1096 spin_lock_irqsave(&state->card->lock, flags);
1097 __stop_dac(state);
1098 spin_unlock_irqrestore(&state->card->lock, flags);
1099 CS_DBGOUT(CS_FUNCTION, 2, printk("cs46xx: stop_dac()- \n") );
1100 }
1101
1102 static void start_dac(struct cs_state *state)
1103 {
1104 struct dmabuf *dmabuf = &state->dmabuf;
1105 struct cs_card *card = state->card;
1106 unsigned long flags;
1107 int tmp;
1108
1109 CS_DBGOUT(CS_FUNCTION, 2, printk("cs46xx: start_dac()+ \n") );
1110 spin_lock_irqsave(&card->lock, flags);
1111 if (!(dmabuf->enable & DAC_RUNNING) &&
1112 ((dmabuf->mapped || dmabuf->count > 0) && dmabuf->ready) &&
1113 ((card->pm.flags & CS46XX_PM_IDLE) ||
1114 (card->pm.flags & CS46XX_PM_RESUMED)) )
1115 {
1116 dmabuf->enable |= DAC_RUNNING;
1117 tmp = cs461x_peek(card, BA1_PCTL);
1118 tmp &= 0xFFFF;
1119 tmp |= card->pctl;
1120 CS_DBGOUT(CS_PARMS, 6, printk(
1121 "cs46xx: start_dac() poke card=%p tmp=0x%.08x addr=%p \n",
1122 card, (unsigned)tmp,
1123 card->ba1.idx[(BA1_PCTL >> 16) & 3]+(BA1_PCTL&0xffff) ) );
1124 cs461x_poke(card, BA1_PCTL, tmp);
1125 }
1126 spin_unlock_irqrestore(&card->lock, flags);
1127 CS_DBGOUT(CS_FUNCTION, 2, printk("cs46xx: start_dac()- \n") );
1128 }
1129
1130 #define DMABUF_MINORDER 1
1131
1132 /*
1133 * allocate DMA buffer, playback and recording buffers are separate.
1134 */
1135 static int alloc_dmabuf(struct cs_state *state)
1136 {
1137
1138 struct cs_card *card=state->card;
1139 struct dmabuf *dmabuf = &state->dmabuf;
1140 void *rawbuf = NULL;
1141 void *tmpbuff = NULL;
1142 int order;
1143 struct page *map, *mapend;
1144 unsigned long df;
1145
1146 dmabuf->ready = dmabuf->mapped = 0;
1147 dmabuf->SGok = 0;
1148 /*
1149 * check for order within limits, but do not overwrite value.
1150 */
1151 if((defaultorder > 1) && (defaultorder < 12))
1152 df = defaultorder;
1153 else
1154 df = 2;
1155
1156 for (order = df; order >= DMABUF_MINORDER; order--)
1157 if ( (rawbuf = (void *) pci_alloc_consistent(
1158 card->pci_dev, PAGE_SIZE << order, &dmabuf->dmaaddr)))
1159 break;
1160 if (!rawbuf) {
1161 CS_DBGOUT(CS_ERROR, 1, printk(KERN_ERR
1162 "cs46xx: alloc_dmabuf(): unable to allocate rawbuf\n"));
1163 return -ENOMEM;
1164 }
1165 dmabuf->buforder = order;
1166 dmabuf->rawbuf = rawbuf;
1167 // Now mark the pages as reserved; otherwise the
1168 // remap_pfn_range() in cs46xx_mmap doesn't work.
1169 // 1. get index to last page in mem_map array for rawbuf.
1170 mapend = virt_to_page(dmabuf->rawbuf +
1171 (PAGE_SIZE << dmabuf->buforder) - 1);
1172
1173 // 2. mark each physical page in range as 'reserved'.
1174 for (map = virt_to_page(dmabuf->rawbuf); map <= mapend; map++)
1175 cs4x_mem_map_reserve(map);
1176
1177 CS_DBGOUT(CS_PARMS, 9, printk("cs46xx: alloc_dmabuf(): allocated %ld (order = %d) bytes at %p\n",
1178 PAGE_SIZE << order, order, rawbuf) );
1179
1180 /*
1181 * only allocate the conversion buffer for the ADC
1182 */
1183 if(dmabuf->type == CS_TYPE_DAC)
1184 {
1185 dmabuf->tmpbuff = NULL;
1186 dmabuf->buforder_tmpbuff = 0;
1187 return 0;
1188 }
1189 /*
1190 * now the temp buffer for 16/8 conversions
1191 */
1192
1193 tmpbuff = (void *) pci_alloc_consistent(
1194 card->pci_dev, PAGE_SIZE << order, &dmabuf->dmaaddr_tmpbuff);
1195
1196 if (!tmpbuff)
1197 return -ENOMEM;
1198 CS_DBGOUT(CS_PARMS, 9, printk("cs46xx: allocated %ld (order = %d) bytes at %p\n",
1199 PAGE_SIZE << order, order, tmpbuff) );
1200
1201 dmabuf->tmpbuff = tmpbuff;
1202 dmabuf->buforder_tmpbuff = order;
1203
1204 // Now mark the pages as reserved; otherwise the
1205 // remap_pfn_range() in cs46xx_mmap doesn't work.
1206 // 1. get index to last page in mem_map array for rawbuf.
1207 mapend = virt_to_page(dmabuf->tmpbuff +
1208 (PAGE_SIZE << dmabuf->buforder_tmpbuff) - 1);
1209
1210 // 2. mark each physical page in range as 'reserved'.
1211 for (map = virt_to_page(dmabuf->tmpbuff); map <= mapend; map++)
1212 cs4x_mem_map_reserve(map);
1213 return 0;
1214 }
1215
1216 /* free DMA buffer */
1217 static void dealloc_dmabuf(struct cs_state *state)
1218 {
1219 struct dmabuf *dmabuf = &state->dmabuf;
1220 struct page *map, *mapend;
1221
1222 if (dmabuf->rawbuf) {
1223 // Undo prog_dmabuf()'s marking the pages as reserved
1224 mapend = virt_to_page(dmabuf->rawbuf +
1225 (PAGE_SIZE << dmabuf->buforder) - 1);
1226 for (map = virt_to_page(dmabuf->rawbuf); map <= mapend; map++)
1227 cs4x_mem_map_unreserve(map);
1228 free_dmabuf(state->card, dmabuf);
1229 }
1230
1231 if (dmabuf->tmpbuff) {
1232 // Undo prog_dmabuf()'s marking the pages as reserved
1233 mapend = virt_to_page(dmabuf->tmpbuff +
1234 (PAGE_SIZE << dmabuf->buforder_tmpbuff) - 1);
1235 for (map = virt_to_page(dmabuf->tmpbuff); map <= mapend; map++)
1236 cs4x_mem_map_unreserve(map);
1237 free_dmabuf2(state->card, dmabuf);
1238 }
1239
1240 dmabuf->rawbuf = NULL;
1241 dmabuf->tmpbuff = NULL;
1242 dmabuf->mapped = dmabuf->ready = 0;
1243 dmabuf->SGok = 0;
1244 }
1245
1246 static int __prog_dmabuf(struct cs_state *state)
1247 {
1248 struct dmabuf *dmabuf = &state->dmabuf;
1249 unsigned long flags;
1250 unsigned long allocated_pages, allocated_bytes;
1251 unsigned long tmp1, tmp2, fmt=0;
1252 unsigned long *ptmp = (unsigned long *) dmabuf->pbuf;
1253 unsigned long SGarray[9], nSGpages=0;
1254 int ret;
1255
1256 CS_DBGOUT(CS_FUNCTION, 4, printk("cs46xx: prog_dmabuf()+ \n"));
1257 /*
1258 * check for CAPTURE and use only non-sg for initial release
1259 */
1260 if(dmabuf->type == CS_TYPE_ADC)
1261 {
1262 CS_DBGOUT(CS_FUNCTION, 4, printk("cs46xx: prog_dmabuf() ADC\n"));
1263 /*
1264 * add in non-sg support for capture.
1265 */
1266 spin_lock_irqsave(&state->card->lock, flags);
1267 /* add code to reset the rawbuf memory. TRW */
1268 resync_dma_ptrs(state);
1269 dmabuf->total_bytes = dmabuf->blocks = 0;
1270 dmabuf->count = dmabuf->error = dmabuf->underrun = 0;
1271
1272 dmabuf->SGok = 0;
1273
1274 spin_unlock_irqrestore(&state->card->lock, flags);
1275
1276 /* allocate DMA buffer if not allocated yet */
1277 if (!dmabuf->rawbuf || !dmabuf->tmpbuff)
1278 if ((ret = alloc_dmabuf(state)))
1279 return ret;
1280 /*
1281 * static image only supports 16Bit signed, stereo - hard code fmt
1282 */
1283 fmt = CS_FMT_16BIT | CS_FMT_STEREO;
1284
1285 dmabuf->numfrag = 2;
1286 dmabuf->fragsize = 2048;
1287 dmabuf->fragsamples = 2048 >> sample_shift[fmt];
1288 dmabuf->dmasize = 4096;
1289 dmabuf->fragshift = 11;
1290
1291 memset(dmabuf->rawbuf, (fmt & CS_FMT_16BIT) ? 0 : 0x80,
1292 dmabuf->dmasize);
1293 memset(dmabuf->tmpbuff, (fmt & CS_FMT_16BIT) ? 0 : 0x80,
1294 PAGE_SIZE<<dmabuf->buforder_tmpbuff);
1295
1296 /*
1297 * Now set up the ring
1298 */
1299
1300 spin_lock_irqsave(&state->card->lock, flags);
1301 cs_rec_setup(state);
1302 spin_unlock_irqrestore(&state->card->lock, flags);
1303
1304 /* set the ready flag for the dma buffer */
1305 dmabuf->ready = 1;
1306
1307 CS_DBGOUT(CS_PARMS, 4, printk(
1308 "cs46xx: prog_dmabuf(): CAPTURE rate=%d fmt=0x%x numfrag=%d "
1309 "fragsize=%d dmasize=%d\n",
1310 dmabuf->rate, dmabuf->fmt, dmabuf->numfrag,
1311 dmabuf->fragsize, dmabuf->dmasize) );
1312
1313 CS_DBGOUT(CS_FUNCTION, 4, printk("cs46xx: prog_dmabuf()- 0 \n"));
1314 return 0;
1315 }
1316 else if (dmabuf->type == CS_TYPE_DAC)
1317 {
1318 /*
1319 * Must be DAC
1320 */
1321 CS_DBGOUT(CS_FUNCTION, 4, printk("cs46xx: prog_dmabuf() DAC\n"));
1322 spin_lock_irqsave(&state->card->lock, flags);
1323 resync_dma_ptrs(state);
1324 dmabuf->total_bytes = dmabuf->blocks = 0;
1325 dmabuf->count = dmabuf->error = dmabuf->underrun = 0;
1326
1327 dmabuf->SGok = 0;
1328
1329 spin_unlock_irqrestore(&state->card->lock, flags);
1330
1331 /* allocate DMA buffer if not allocated yet */
1332 if (!dmabuf->rawbuf)
1333 if ((ret = alloc_dmabuf(state)))
1334 return ret;
1335
1336 allocated_pages = 1 << dmabuf->buforder;
1337 allocated_bytes = allocated_pages*PAGE_SIZE;
1338
1339 if(allocated_pages < 2)
1340 {
1341 CS_DBGOUT(CS_FUNCTION, 4, printk(
1342 "cs46xx: prog_dmabuf() Error: allocated_pages too small (%d)\n",
1343 (unsigned)allocated_pages));
1344 return -ENOMEM;
1345 }
1346
1347 /* Use all the pages allocated, fragsize 4k. */
1348 /* Use 'pbuf' for S/G page map table. */
1349 dmabuf->SGok = 1; /* Use S/G. */
1350
1351 nSGpages = allocated_bytes/4096; /* S/G pages always 4k. */
1352
1353 /* Set up S/G variables. */
1354 *ptmp = virt_to_bus(dmabuf->rawbuf);
1355 *(ptmp+1) = 0x00000008;
1356 for(tmp1= 1; tmp1 < nSGpages; tmp1++) {
1357 *(ptmp+2*tmp1) = virt_to_bus( (dmabuf->rawbuf)+4096*tmp1);
1358 if( tmp1 == nSGpages-1)
1359 tmp2 = 0xbfff0000;
1360 else
1361 tmp2 = 0x80000000+8*(tmp1+1);
1362 *(ptmp+2*tmp1+1) = tmp2;
1363 }
1364 SGarray[0] = 0x82c0200d;
1365 SGarray[1] = 0xffff0000;
1366 SGarray[2] = *ptmp;
1367 SGarray[3] = 0x00010600;
1368 SGarray[4] = *(ptmp+2);
1369 SGarray[5] = 0x80000010;
1370 SGarray[6] = *ptmp;
1371 SGarray[7] = *(ptmp+2);
1372 SGarray[8] = (virt_to_bus(dmabuf->pbuf) & 0xffff000) | 0x10;
1373
1374 if (dmabuf->SGok) {
1375 dmabuf->numfrag = nSGpages;
1376 dmabuf->fragsize = 4096;
1377 dmabuf->fragsamples = 4096 >> sample_shift[dmabuf->fmt];
1378 dmabuf->fragshift = 12;
1379 dmabuf->dmasize = dmabuf->numfrag*4096;
1380 }
1381 else {
1382 SGarray[0] = 0xf2c0000f;
1383 SGarray[1] = 0x00000200;
1384 SGarray[2] = 0;
1385 SGarray[3] = 0x00010600;
1386 SGarray[4]=SGarray[5]=SGarray[6]=SGarray[7]=SGarray[8] = 0;
1387 dmabuf->numfrag = 2;
1388 dmabuf->fragsize = 2048;
1389 dmabuf->fragsamples = 2048 >> sample_shift[dmabuf->fmt];
1390 dmabuf->dmasize = 4096;
1391 dmabuf->fragshift = 11;
1392 }
1393 for(tmp1 = 0; tmp1 < sizeof(SGarray)/4; tmp1++)
1394 cs461x_poke( state->card, BA1_PDTC+tmp1*4, SGarray[tmp1]);
1395
1396 memset(dmabuf->rawbuf, (dmabuf->fmt & CS_FMT_16BIT) ? 0 : 0x80,
1397 dmabuf->dmasize);
1398
1399 /*
1400 * Now set up the ring
1401 */
1402
1403 spin_lock_irqsave(&state->card->lock, flags);
1404 cs_play_setup(state);
1405 spin_unlock_irqrestore(&state->card->lock, flags);
1406
1407 /* set the ready flag for the dma buffer */
1408 dmabuf->ready = 1;
1409
1410 CS_DBGOUT(CS_PARMS, 4, printk(
1411 "cs46xx: prog_dmabuf(): PLAYBACK rate=%d fmt=0x%x numfrag=%d "
1412 "fragsize=%d dmasize=%d\n",
1413 dmabuf->rate, dmabuf->fmt, dmabuf->numfrag,
1414 dmabuf->fragsize, dmabuf->dmasize) );
1415
1416 CS_DBGOUT(CS_FUNCTION, 4, printk("cs46xx: prog_dmabuf()- \n"));
1417 return 0;
1418 }
1419 else
1420 {
1421 CS_DBGOUT(CS_FUNCTION, 4, printk("cs46xx: prog_dmabuf()- Invalid Type %d\n",
1422 dmabuf->type));
1423 }
1424 return 1;
1425 }
1426
1427 static int prog_dmabuf(struct cs_state *state)
1428 {
1429 int ret;
1430
1431 down(&state->sem);
1432 ret = __prog_dmabuf(state);
1433 up(&state->sem);
1434
1435 return ret;
1436 }
1437
1438 static void cs_clear_tail(struct cs_state *state)
1439 {
1440 }
1441
1442 static int drain_dac(struct cs_state *state, int nonblock)
1443 {
1444 DECLARE_WAITQUEUE(wait, current);
1445 struct dmabuf *dmabuf = &state->dmabuf;
1446 struct cs_card *card=state->card;
1447 unsigned long flags;
1448 unsigned long tmo;
1449 int count;
1450
1451 CS_DBGOUT(CS_FUNCTION, 4, printk("cs46xx: drain_dac()+ \n"));
1452 if (dmabuf->mapped || !dmabuf->ready)
1453 {
1454 CS_DBGOUT(CS_FUNCTION, 4, printk("cs46xx: drain_dac()- 0, not ready\n"));
1455 return 0;
1456 }
1457
1458 add_wait_queue(&dmabuf->wait, &wait);
1459 for (;;) {
1460 /* It seems that we have to set the current state to TASK_INTERRUPTIBLE
1461 every time to make the process really go to sleep */
1462 current->state = TASK_INTERRUPTIBLE;
1463
1464 spin_lock_irqsave(&state->card->lock, flags);
1465 count = dmabuf->count;
1466 spin_unlock_irqrestore(&state->card->lock, flags);
1467
1468 if (count <= 0)
1469 break;
1470
1471 if (signal_pending(current))
1472 break;
1473
1474 if (nonblock) {
1475 remove_wait_queue(&dmabuf->wait, &wait);
1476 current->state = TASK_RUNNING;
1477 return -EBUSY;
1478 }
1479
1480 tmo = (dmabuf->dmasize * HZ) / dmabuf->rate;
1481 tmo >>= sample_shift[dmabuf->fmt];
1482 tmo += (2048*HZ)/dmabuf->rate;
1483
1484 if (!schedule_timeout(tmo ? tmo : 1) && tmo){
1485 printk(KERN_ERR "cs46xx: drain_dac, dma timeout? %d\n", count);
1486 break;
1487 }
1488 }
1489 remove_wait_queue(&dmabuf->wait, &wait);
1490 current->state = TASK_RUNNING;
1491 if (signal_pending(current))
1492 {
1493 CS_DBGOUT(CS_FUNCTION, 4, printk("cs46xx: drain_dac()- -ERESTARTSYS\n"));
1494 /*
1495 * set to silence and let that clear the fifos.
1496 */
1497 cs461x_clear_serial_FIFOs(card, CS_TYPE_DAC);
1498 return -ERESTARTSYS;
1499 }
1500
1501 CS_DBGOUT(CS_FUNCTION, 4, printk("cs46xx: drain_dac()- 0\n"));
1502 return 0;
1503 }
1504
1505
1506 /* update buffer manangement pointers, especially, dmabuf->count and dmabuf->hwptr */
1507 static void cs_update_ptr(struct cs_card *card, int wake)
1508 {
1509 struct cs_state *state;
1510 struct dmabuf *dmabuf;
1511 unsigned hwptr;
1512 int diff;
1513
1514 /* error handling and process wake up for ADC */
1515 state = card->states[0];
1516 if(state)
1517 {
1518 dmabuf = &state->dmabuf;
1519 if (dmabuf->enable & ADC_RUNNING) {
1520 /* update hardware pointer */
1521 hwptr = cs_get_dma_addr(state);
1522
1523 diff = (dmabuf->dmasize + hwptr - dmabuf->hwptr) % dmabuf->dmasize;
1524 CS_DBGOUT(CS_PARMS, 9, printk(
1525 "cs46xx: cs_update_ptr()+ ADC hwptr=%d diff=%d\n",
1526 hwptr,diff) );
1527 dmabuf->hwptr = hwptr;
1528 dmabuf->total_bytes += diff;
1529 dmabuf->count += diff;
1530 if (dmabuf->count > dmabuf->dmasize)
1531 dmabuf->count = dmabuf->dmasize;
1532
1533 if(dmabuf->mapped)
1534 {
1535 if (wake && dmabuf->count >= (signed)dmabuf->fragsize)
1536 wake_up(&dmabuf->wait);
1537 } else
1538 {
1539 if (wake && dmabuf->count > 0)
1540 wake_up(&dmabuf->wait);
1541 }
1542 }
1543 }
1544
1545 /*
1546 * Now the DAC
1547 */
1548 state = card->states[1];
1549 if(state)
1550 {
1551 dmabuf = &state->dmabuf;
1552 /* error handling and process wake up for DAC */
1553 if (dmabuf->enable & DAC_RUNNING) {
1554 /* update hardware pointer */
1555 hwptr = cs_get_dma_addr(state);
1556
1557 diff = (dmabuf->dmasize + hwptr - dmabuf->hwptr) % dmabuf->dmasize;
1558 CS_DBGOUT(CS_PARMS, 9, printk(
1559 "cs46xx: cs_update_ptr()+ DAC hwptr=%d diff=%d\n",
1560 hwptr,diff) );
1561 dmabuf->hwptr = hwptr;
1562 dmabuf->total_bytes += diff;
1563 if (dmabuf->mapped) {
1564 dmabuf->count += diff;
1565 if (wake && dmabuf->count >= (signed)dmabuf->fragsize)
1566 wake_up(&dmabuf->wait);
1567 /*
1568 * other drivers use fragsize, but don't see any sense
1569 * in that, since dmasize is the buffer asked for
1570 * via mmap.
1571 */
1572 if( dmabuf->count > dmabuf->dmasize)
1573 dmabuf->count &= dmabuf->dmasize-1;
1574 } else {
1575 dmabuf->count -= diff;
1576 /*
1577 * backfill with silence and clear out the last
1578 * "diff" number of bytes.
1579 */
1580 if(hwptr >= diff)
1581 {
1582 memset(dmabuf->rawbuf + hwptr - diff,
1583 (dmabuf->fmt & CS_FMT_16BIT) ? 0 : 0x80, diff);
1584 }
1585 else
1586 {
1587 memset(dmabuf->rawbuf,
1588 (dmabuf->fmt & CS_FMT_16BIT) ? 0 : 0x80,
1589 (unsigned)hwptr);
1590 memset((char *)dmabuf->rawbuf +
1591 dmabuf->dmasize + hwptr - diff,
1592 (dmabuf->fmt & CS_FMT_16BIT) ? 0 : 0x80,
1593 diff - hwptr);
1594 }
1595
1596 if (dmabuf->count < 0 || dmabuf->count > dmabuf->dmasize) {
1597 CS_DBGOUT(CS_ERROR, 2, printk(KERN_INFO
1598 "cs46xx: ERROR DAC count<0 or count > dmasize (%d)\n",
1599 dmabuf->count));
1600 /*
1601 * buffer underrun or buffer overrun, reset the
1602 * count of bytes written back to 0.
1603 */
1604 if(dmabuf->count < 0)
1605 dmabuf->underrun=1;
1606 dmabuf->count = 0;
1607 dmabuf->error++;
1608 }
1609 if (wake && dmabuf->count < (signed)dmabuf->dmasize/2)
1610 wake_up(&dmabuf->wait);
1611 }
1612 }
1613 }
1614 }
1615
1616
1617 /* hold spinlock for the following! */
1618 static void cs_handle_midi(struct cs_card *card)
1619 {
1620 unsigned char ch;
1621 int wake;
1622 unsigned temp1;
1623
1624 wake = 0;
1625 while (!(cs461x_peekBA0(card, BA0_MIDSR) & MIDSR_RBE)) {
1626 ch = cs461x_peekBA0(card, BA0_MIDRP);
1627 if (card->midi.icnt < CS_MIDIINBUF) {
1628 card->midi.ibuf[card->midi.iwr] = ch;
1629 card->midi.iwr = (card->midi.iwr + 1) % CS_MIDIINBUF;
1630 card->midi.icnt++;
1631 }
1632 wake = 1;
1633 }
1634 if (wake)
1635 wake_up(&card->midi.iwait);
1636 wake = 0;
1637 while (!(cs461x_peekBA0(card, BA0_MIDSR) & MIDSR_TBF) && card->midi.ocnt > 0) {
1638 temp1 = ( card->midi.obuf[card->midi.ord] ) & 0x000000ff;
1639 cs461x_pokeBA0(card, BA0_MIDWP,temp1);
1640 card->midi.ord = (card->midi.ord + 1) % CS_MIDIOUTBUF;
1641 card->midi.ocnt--;
1642 if (card->midi.ocnt < CS_MIDIOUTBUF-16)
1643 wake = 1;
1644 }
1645 if (wake)
1646 wake_up(&card->midi.owait);
1647 }
1648
1649 static irqreturn_t cs_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1650 {
1651 struct cs_card *card = (struct cs_card *)dev_id;
1652 /* Single channel card */
1653 struct cs_state *recstate = card->channel[0].state;
1654 struct cs_state *playstate = card->channel[1].state;
1655 u32 status;
1656
1657 CS_DBGOUT(CS_INTERRUPT, 9, printk("cs46xx: cs_interrupt()+ \n"));
1658
1659 spin_lock(&card->lock);
1660
1661 status = cs461x_peekBA0(card, BA0_HISR);
1662
1663 if ((status & 0x7fffffff) == 0)
1664 {
1665 cs461x_pokeBA0(card, BA0_HICR, HICR_CHGM|HICR_IEV);
1666 spin_unlock(&card->lock);
1667 return IRQ_HANDLED; /* Might be IRQ_NONE.. */
1668 }
1669
1670 /*
1671 * check for playback or capture interrupt only
1672 */
1673 if( ((status & HISR_VC0) && playstate && playstate->dmabuf.ready) ||
1674 (((status & HISR_VC1) && recstate && recstate->dmabuf.ready)) )
1675 {
1676 CS_DBGOUT(CS_INTERRUPT, 8, printk(
1677 "cs46xx: cs_interrupt() interrupt bit(s) set (0x%x)\n",status));
1678 cs_update_ptr(card, CS_TRUE);
1679 }
1680
1681 if( status & HISR_MIDI )
1682 cs_handle_midi(card);
1683
1684 /* clear 'em */
1685 cs461x_pokeBA0(card, BA0_HICR, HICR_CHGM|HICR_IEV);
1686 spin_unlock(&card->lock);
1687 CS_DBGOUT(CS_INTERRUPT, 9, printk("cs46xx: cs_interrupt()- \n"));
1688 return IRQ_HANDLED;
1689 }
1690
1691
1692 /**********************************************************************/
1693
1694 static ssize_t cs_midi_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1695 {
1696 struct cs_card *card = (struct cs_card *)file->private_data;
1697 ssize_t ret;
1698 unsigned long flags;
1699 unsigned ptr;
1700 int cnt;
1701
1702 if (!access_ok(VERIFY_WRITE, buffer, count))
1703 return -EFAULT;
1704 ret = 0;
1705 while (count > 0) {
1706 spin_lock_irqsave(&card->lock, flags);
1707 ptr = card->midi.ird;
1708 cnt = CS_MIDIINBUF - ptr;
1709 if (card->midi.icnt < cnt)
1710 cnt = card->midi.icnt;
1711 spin_unlock_irqrestore(&card->lock, flags);
1712 if (cnt > count)
1713 cnt = count;
1714 if (cnt <= 0) {
1715 if (file->f_flags & O_NONBLOCK)
1716 return ret ? ret : -EAGAIN;
1717 interruptible_sleep_on(&card->midi.iwait);
1718 if (signal_pending(current))
1719 return ret ? ret : -ERESTARTSYS;
1720 continue;
1721 }
1722 if (copy_to_user(buffer, card->midi.ibuf + ptr, cnt))
1723 return ret ? ret : -EFAULT;
1724 ptr = (ptr + cnt) % CS_MIDIINBUF;
1725 spin_lock_irqsave(&card->lock, flags);
1726 card->midi.ird = ptr;
1727 card->midi.icnt -= cnt;
1728 spin_unlock_irqrestore(&card->lock, flags);
1729 count -= cnt;
1730 buffer += cnt;
1731 ret += cnt;
1732 }
1733 return ret;
1734 }
1735
1736
1737 static ssize_t cs_midi_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1738 {
1739 struct cs_card *card = (struct cs_card *)file->private_data;
1740 ssize_t ret;
1741 unsigned long flags;
1742 unsigned ptr;
1743 int cnt;
1744
1745 if (!access_ok(VERIFY_READ, buffer, count))
1746 return -EFAULT;
1747 ret = 0;
1748 while (count > 0) {
1749 spin_lock_irqsave(&card->lock, flags);
1750 ptr = card->midi.owr;
1751 cnt = CS_MIDIOUTBUF - ptr;
1752 if (card->midi.ocnt + cnt > CS_MIDIOUTBUF)
1753 cnt = CS_MIDIOUTBUF - card->midi.ocnt;
1754 if (cnt <= 0)
1755 cs_handle_midi(card);
1756 spin_unlock_irqrestore(&card->lock, flags);
1757 if (cnt > count)
1758 cnt = count;
1759 if (cnt <= 0) {
1760 if (file->f_flags & O_NONBLOCK)
1761 return ret ? ret : -EAGAIN;
1762 interruptible_sleep_on(&card->midi.owait);
1763 if (signal_pending(current))
1764 return ret ? ret : -ERESTARTSYS;
1765 continue;
1766 }
1767 if (copy_from_user(card->midi.obuf + ptr, buffer, cnt))
1768 return ret ? ret : -EFAULT;
1769 ptr = (ptr + cnt) % CS_MIDIOUTBUF;
1770 spin_lock_irqsave(&card->lock, flags);
1771 card->midi.owr = ptr;
1772 card->midi.ocnt += cnt;
1773 spin_unlock_irqrestore(&card->lock, flags);
1774 count -= cnt;
1775 buffer += cnt;
1776 ret += cnt;
1777 spin_lock_irqsave(&card->lock, flags);
1778 cs_handle_midi(card);
1779 spin_unlock_irqrestore(&card->lock, flags);
1780 }
1781 return ret;
1782 }
1783
1784
1785 static unsigned int cs_midi_poll(struct file *file, struct poll_table_struct *wait)
1786 {
1787 struct cs_card *card = (struct cs_card *)file->private_data;
1788 unsigned long flags;
1789 unsigned int mask = 0;
1790
1791 if (file->f_flags & FMODE_WRITE)
1792 poll_wait(file, &card->midi.owait, wait);
1793 if (file->f_flags & FMODE_READ)
1794 poll_wait(file, &card->midi.iwait, wait);
1795 spin_lock_irqsave(&card->lock, flags);
1796 if (file->f_flags & FMODE_READ) {
1797 if (card->midi.icnt > 0)
1798 mask |= POLLIN | POLLRDNORM;
1799 }
1800 if (file->f_flags & FMODE_WRITE) {
1801 if (card->midi.ocnt < CS_MIDIOUTBUF)
1802 mask |= POLLOUT | POLLWRNORM;
1803 }
1804 spin_unlock_irqrestore(&card->lock, flags);
1805 return mask;
1806 }
1807
1808
1809 static int cs_midi_open(struct inode *inode, struct file *file)
1810 {
1811 unsigned int minor = iminor(inode);
1812 struct cs_card *card=NULL;
1813 unsigned long flags;
1814 struct list_head *entry;
1815
1816 list_for_each(entry, &cs46xx_devs)
1817 {
1818 card = list_entry(entry, struct cs_card, list);
1819 if (card->dev_midi == minor)
1820 break;
1821 }
1822
1823 if (entry == &cs46xx_devs)
1824 return -ENODEV;
1825 if (!card)
1826 {
1827 CS_DBGOUT(CS_FUNCTION | CS_OPEN, 2, printk(KERN_INFO
1828 "cs46xx: cs46xx_midi_open(): Error - unable to find card struct\n"));
1829 return -ENODEV;
1830 }
1831
1832 file->private_data = card;
1833 /* wait for device to become free */
1834 down(&card->midi.open_sem);
1835 while (card->midi.open_mode & file->f_mode) {
1836 if (file->f_flags & O_NONBLOCK) {
1837 up(&card->midi.open_sem);
1838 return -EBUSY;
1839 }
1840 up(&card->midi.open_sem);
1841 interruptible_sleep_on(&card->midi.open_wait);
1842 if (signal_pending(current))
1843 return -ERESTARTSYS;
1844 down(&card->midi.open_sem);
1845 }
1846 spin_lock_irqsave(&card->midi.lock, flags);
1847 if (!(card->midi.open_mode & (FMODE_READ | FMODE_WRITE))) {
1848 card->midi.ird = card->midi.iwr = card->midi.icnt = 0;
1849 card->midi.ord = card->midi.owr = card->midi.ocnt = 0;
1850 card->midi.ird = card->midi.iwr = card->midi.icnt = 0;
1851 cs461x_pokeBA0(card, BA0_MIDCR, 0x0000000f); /* Enable xmit, rcv. */
1852 cs461x_pokeBA0(card, BA0_HICR, HICR_IEV | HICR_CHGM); /* Enable interrupts */
1853 }
1854 if (file->f_mode & FMODE_READ) {
1855 card->midi.ird = card->midi.iwr = card->midi.icnt = 0;
1856 }
1857 if (file->f_mode & FMODE_WRITE) {
1858 card->midi.ord = card->midi.owr = card->midi.ocnt = 0;
1859 }
1860 spin_unlock_irqrestore(&card->midi.lock, flags);
1861 card->midi.open_mode |= (file->f_mode & (FMODE_READ | FMODE_WRITE));
1862 up(&card->midi.open_sem);
1863 return 0;
1864 }
1865
1866
1867 static int cs_midi_release(struct inode *inode, struct file *file)
1868 {
1869 struct cs_card *card = (struct cs_card *)file->private_data;
1870 DECLARE_WAITQUEUE(wait, current);
1871 unsigned long flags;
1872 unsigned count, tmo;
1873
1874 if (file->f_mode & FMODE_WRITE) {
1875 current->state = TASK_INTERRUPTIBLE;
1876 add_wait_queue(&card->midi.owait, &wait);
1877 for (;;) {
1878 spin_lock_irqsave(&card->midi.lock, flags);
1879 count = card->midi.ocnt;
1880 spin_unlock_irqrestore(&card->midi.lock, flags);
1881 if (count <= 0)
1882 break;
1883 if (signal_pending(current))
1884 break;
1885 if (file->f_flags & O_NONBLOCK)
1886 break;
1887 tmo = (count * HZ) / 3100;
1888 if (!schedule_timeout(tmo ? : 1) && tmo)
1889 printk(KERN_DEBUG "cs46xx: midi timed out??\n");
1890 }
1891 remove_wait_queue(&card->midi.owait, &wait);
1892 current->state = TASK_RUNNING;
1893 }
1894 down(&card->midi.open_sem);
1895 card->midi.open_mode &= (~(file->f_mode & (FMODE_READ | FMODE_WRITE)));
1896 up(&card->midi.open_sem);
1897 wake_up(&card->midi.open_wait);
1898 return 0;
1899 }
1900
1901 /*
1902 * Midi file operations struct.
1903 */
1904 static /*const*/ struct file_operations cs_midi_fops = {
1905 CS_OWNER CS_THIS_MODULE
1906 .llseek = no_llseek,
1907 .read = cs_midi_read,
1908 .write = cs_midi_write,
1909 .poll = cs_midi_poll,
1910 .open = cs_midi_open,
1911 .release = cs_midi_release,
1912 };
1913
1914 /*
1915 *
1916 * CopySamples copies 16-bit stereo signed samples from the source to the
1917 * destination, possibly converting down to unsigned 8-bit and/or mono.
1918 * count specifies the number of output bytes to write.
1919 *
1920 * Arguments:
1921 *
1922 * dst - Pointer to a destination buffer.
1923 * src - Pointer to a source buffer
1924 * count - The number of bytes to copy into the destination buffer.
1925 * fmt - CS_FMT_16BIT and/or CS_FMT_STEREO bits
1926 * dmabuf - pointer to the dma buffer structure
1927 *
1928 * NOTES: only call this routine if the output desired is not 16 Signed Stereo
1929 *
1930 *
1931 */
1932 static void CopySamples(char *dst, char *src, int count, unsigned fmt,
1933 struct dmabuf *dmabuf)
1934 {
1935
1936 s32 s32AudioSample;
1937 s16 *psSrc=(s16 *)src;
1938 s16 *psDst=(s16 *)dst;
1939 u8 *pucDst=(u8 *)dst;
1940
1941 CS_DBGOUT(CS_FUNCTION, 2, printk(KERN_INFO "cs46xx: CopySamples()+ ") );
1942 CS_DBGOUT(CS_WAVE_READ, 8, printk(KERN_INFO
1943 " dst=%p src=%p count=%d fmt=0x%x\n",
1944 dst,src,count,fmt) );
1945
1946 /*
1947 * See if the data should be output as 8-bit unsigned stereo.
1948 */
1949 if((fmt & CS_FMT_STEREO) && !(fmt & CS_FMT_16BIT))
1950 {
1951 /*
1952 * Convert each 16-bit signed stereo sample to 8-bit unsigned
1953 * stereo using rounding.
1954 */
1955 psSrc = (s16 *)src;
1956 count = count/2;
1957 while(count--)
1958 {
1959 *(pucDst++) = (u8)(((s16)(*psSrc++) + (s16)0x8000) >> 8);
1960 }
1961 }
1962 /*
1963 * See if the data should be output at 8-bit unsigned mono.
1964 */
1965 else if(!(fmt & CS_FMT_STEREO) && !(fmt & CS_FMT_16BIT))
1966 {
1967 /*
1968 * Convert each 16-bit signed stereo sample to 8-bit unsigned
1969 * mono using averaging and rounding.
1970 */
1971 psSrc = (s16 *)src;
1972 count = count/2;
1973 while(count--)
1974 {
1975 s32AudioSample = ((*psSrc)+(*(psSrc + 1)))/2 + (s32)0x80;
1976 if(s32AudioSample > 0x7fff)
1977 s32AudioSample = 0x7fff;
1978 *(pucDst++) = (u8)(((s16)s32AudioSample + (s16)0x8000) >> 8);
1979 psSrc += 2;
1980 }
1981 }
1982 /*
1983 * See if the data should be output at 16-bit signed mono.
1984 */
1985 else if(!(fmt & CS_FMT_STEREO) && (fmt & CS_FMT_16BIT))
1986 {
1987 /*
1988 * Convert each 16-bit signed stereo sample to 16-bit signed
1989 * mono using averaging.
1990 */
1991 psSrc = (s16 *)src;
1992 count = count/2;
1993 while(count--)
1994 {
1995 *(psDst++) = (s16)((*psSrc)+(*(psSrc + 1)))/2;
1996 psSrc += 2;
1997 }
1998 }
1999 }
2000
2001 /*
2002 * cs_copy_to_user()
2003 * replacement for the standard copy_to_user, to allow for a conversion from
2004 * 16 bit to 8 bit and from stereo to mono, if the record conversion is active.
2005 * The current CS46xx/CS4280 static image only records in 16bit unsigned Stereo,
2006 * so we convert from any of the other format combinations.
2007 */
2008 static unsigned cs_copy_to_user(
2009 struct cs_state *s,
2010 void __user *dest,
2011 void *hwsrc,
2012 unsigned cnt,
2013 unsigned *copied)
2014 {
2015 struct dmabuf *dmabuf = &s->dmabuf;
2016 void *src = hwsrc; /* default to the standard destination buffer addr */
2017
2018 CS_DBGOUT(CS_FUNCTION, 6, printk(KERN_INFO
2019 "cs_copy_to_user()+ fmt=0x%x cnt=%d dest=%p\n",
2020 dmabuf->fmt,(unsigned)cnt,dest) );
2021
2022 if(cnt > dmabuf->dmasize)
2023 {
2024 cnt = dmabuf->dmasize;
2025 }
2026 if(!cnt)
2027 {
2028 *copied = 0;
2029 return 0;
2030 }
2031 if(dmabuf->divisor != 1)
2032 {
2033 if(!dmabuf->tmpbuff)
2034 {
2035 *copied = cnt/dmabuf->divisor;
2036 return 0;
2037 }
2038
2039 CopySamples((char *)dmabuf->tmpbuff, (char *)hwsrc, cnt,
2040 dmabuf->fmt, dmabuf);
2041 src = dmabuf->tmpbuff;
2042 cnt = cnt/dmabuf->divisor;
2043 }
2044 if (copy_to_user(dest, src, cnt))
2045 {
2046 CS_DBGOUT(CS_FUNCTION, 2, printk(KERN_ERR
2047 "cs46xx: cs_copy_to_user()- fault dest=%p src=%p cnt=%d\n",
2048 dest,src,cnt) );
2049 *copied = 0;
2050 return -EFAULT;
2051 }
2052 *copied = cnt;
2053 CS_DBGOUT(CS_FUNCTION, 2, printk(KERN_INFO
2054 "cs46xx: cs_copy_to_user()- copied bytes is %d \n",cnt) );
2055 return 0;
2056 }
2057
2058 /* in this loop, dmabuf.count signifies the amount of data that is waiting to be copied to
2059 the user's buffer. it is filled by the dma machine and drained by this loop. */
2060 static ssize_t cs_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
2061 {
2062 struct cs_card *card = (struct cs_card *) file->private_data;
2063 struct cs_state *state;
2064 DECLARE_WAITQUEUE(wait, current);
2065 struct dmabuf *dmabuf;
2066 ssize_t ret = 0;
2067 unsigned long flags;
2068 unsigned swptr;
2069 int cnt;
2070 unsigned copied=0;
2071
2072 CS_DBGOUT(CS_WAVE_READ | CS_FUNCTION, 4,
2073 printk("cs46xx: cs_read()+ %zd\n",count) );
2074 state = (struct cs_state *)card->states[0];
2075 if(!state)
2076 return -ENODEV;
2077 dmabuf = &state->dmabuf;
2078
2079 if (dmabuf->mapped)
2080 return -ENXIO;
2081 if (!access_ok(VERIFY_WRITE, buffer, count))
2082 return -EFAULT;
2083
2084 down(&state->sem);
2085 if (!dmabuf->ready && (ret = __prog_dmabuf(state)))
2086 goto out2;
2087
2088 add_wait_queue(&state->dmabuf.wait, &wait);
2089 while (count > 0) {
2090 while(!(card->pm.flags & CS46XX_PM_IDLE))
2091 {
2092 schedule();
2093 if (signal_pending(current)) {
2094 if(!ret) ret = -ERESTARTSYS;
2095 goto out;
2096 }
2097 }
2098 spin_lock_irqsave(&state->card->lock, flags);
2099 swptr = dmabuf->swptr;
2100 cnt = dmabuf->dmasize - swptr;
2101 if (dmabuf->count < cnt)
2102 cnt = dmabuf->count;
2103 if (cnt <= 0)
2104 __set_current_state(TASK_INTERRUPTIBLE);
2105 spin_unlock_irqrestore(&state->card->lock, flags);
2106
2107 if (cnt > (count * dmabuf->divisor))
2108 cnt = count * dmabuf->divisor;
2109 if (cnt <= 0) {
2110 /* buffer is empty, start the dma machine and wait for data to be
2111 recorded */
2112 start_adc(state);
2113 if (file->f_flags & O_NONBLOCK) {
2114 if (!ret) ret = -EAGAIN;
2115 goto out;
2116 }
2117 up(&state->sem);
2118 schedule();
2119 if (signal_pending(current)) {
2120 if(!ret) ret = -ERESTARTSYS;
2121 goto out;
2122 }
2123 down(&state->sem);
2124 if (dmabuf->mapped)
2125 {
2126 if(!ret)
2127 ret = -ENXIO;
2128 goto out;
2129 }
2130 continue;
2131 }
2132
2133 CS_DBGOUT(CS_WAVE_READ, 2, printk(KERN_INFO
2134 "_read() copy_to cnt=%d count=%zd ", cnt,count) );
2135 CS_DBGOUT(CS_WAVE_READ, 8, printk(KERN_INFO
2136 " .dmasize=%d .count=%d buffer=%p ret=%zd\n",
2137 dmabuf->dmasize,dmabuf->count,buffer,ret) );
2138
2139 if (cs_copy_to_user(state, buffer,
2140 (char *)dmabuf->rawbuf + swptr, cnt, &copied))
2141 {
2142 if (!ret) ret = -EFAULT;
2143 goto out;
2144 }
2145 swptr = (swptr + cnt) % dmabuf->dmasize;
2146 spin_lock_irqsave(&card->lock, flags);
2147 dmabuf->swptr = swptr;
2148 dmabuf->count -= cnt;
2149 spin_unlock_irqrestore(&card->lock, flags);
2150 count -= copied;
2151 buffer += copied;
2152 ret += copied;
2153 start_adc(state);
2154 }
2155 out:
2156 remove_wait_queue(&state->dmabuf.wait, &wait);
2157 out2:
2158 up(&state->sem);
2159 set_current_state(TASK_RUNNING);
2160 CS_DBGOUT(CS_WAVE_READ | CS_FUNCTION, 4,
2161 printk("cs46xx: cs_read()- %zd\n",ret) );
2162 return ret;
2163 }
2164
2165 /* in this loop, dmabuf.count signifies the amount of data that is waiting to be dma to
2166 the soundcard. it is drained by the dma machine and filled by this loop. */
2167 static ssize_t cs_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
2168 {
2169 struct cs_card *card = (struct cs_card *) file->private_data;
2170 struct cs_state *state;
2171 DECLARE_WAITQUEUE(wait, current);
2172 struct dmabuf *dmabuf;
2173 ssize_t ret;
2174 unsigned long flags;
2175 unsigned swptr;
2176 int cnt;
2177
2178 CS_DBGOUT(CS_WAVE_WRITE | CS_FUNCTION, 4,
2179 printk("cs46xx: cs_write called, count = %zd\n", count) );
2180 state = (struct cs_state *)card->states[1];
2181 if(!state)
2182 return -ENODEV;
2183 if (!access_ok(VERIFY_READ, buffer, count))
2184 return -EFAULT;
2185 dmabuf = &state->dmabuf;
2186
2187 down(&state->sem);
2188 if (dmabuf->mapped)
2189 {
2190 ret = -ENXIO;
2191 goto out;
2192 }
2193
2194 if (!dmabuf->ready && (ret = __prog_dmabuf(state)))
2195 goto out;
2196 add_wait_queue(&state->dmabuf.wait, &wait);
2197 ret = 0;
2198 /*
2199 * Start the loop to read from the user's buffer and write to the dma buffer.
2200 * check for PM events and underrun/overrun in the loop.
2201 */
2202 while (count > 0) {
2203 while(!(card->pm.flags & CS46XX_PM_IDLE))
2204 {
2205 schedule();
2206 if (signal_pending(current)) {
2207 if(!ret) ret = -ERESTARTSYS;
2208 goto out;
2209 }
2210 }
2211 spin_lock_irqsave(&state->card->lock, flags);
2212 if (dmabuf->count < 0) {
2213 /* buffer underrun, we are recovering from sleep_on_timeout,
2214 resync hwptr and swptr */
2215 dmabuf->count = 0;
2216 dmabuf->swptr = dmabuf->hwptr;
2217 }
2218 if (dmabuf->underrun)
2219 {
2220 dmabuf->underrun = 0;
2221 dmabuf->hwptr = cs_get_dma_addr(state);
2222 dmabuf->swptr = dmabuf->hwptr;
2223 }
2224
2225 swptr = dmabuf->swptr;
2226 cnt = dmabuf->dmasize - swptr;
2227 if (dmabuf->count + cnt > dmabuf->dmasize)
2228 cnt = dmabuf->dmasize - dmabuf->count;
2229 if (cnt <= 0)
2230 __set_current_state(TASK_INTERRUPTIBLE);
2231 spin_unlock_irqrestore(&state->card->lock, flags);
2232
2233 if (cnt > count)
2234 cnt = count;
2235 if (cnt <= 0) {
2236 /* buffer is full, start the dma machine and wait for data to be
2237 played */
2238 start_dac(state);
2239 if (file->f_flags & O_NONBLOCK) {
2240 if (!ret) ret = -EAGAIN;
2241 goto out;
2242 }
2243 up(&state->sem);
2244 schedule();
2245 if (signal_pending(current)) {
2246 if(!ret) ret = -ERESTARTSYS;
2247 goto out;
2248 }
2249 down(&state->sem);
2250 if (dmabuf->mapped)
2251 {
2252 if(!ret)
2253 ret = -ENXIO;
2254 goto out;
2255 }
2256 continue;
2257 }
2258 if (copy_from_user(dmabuf->rawbuf + swptr, buffer, cnt)) {
2259 if (!ret) ret = -EFAULT;
2260 goto out;
2261 }
2262 spin_lock_irqsave(&state->card->lock, flags);
2263 swptr = (swptr + cnt) % dmabuf->dmasize;
2264 dmabuf->swptr = swptr;
2265 dmabuf->count += cnt;
2266 if(dmabuf->count > dmabuf->dmasize)
2267 {
2268 CS_DBGOUT(CS_WAVE_WRITE | CS_ERROR, 2, printk(
2269 "cs46xx: cs_write() d->count > dmasize - resetting\n"));
2270 dmabuf->count = dmabuf->dmasize;
2271 }
2272 dmabuf->endcleared = 0;
2273 spin_unlock_irqrestore(&state->card->lock, flags);
2274
2275 count -= cnt;
2276 buffer += cnt;
2277 ret += cnt;
2278 start_dac(state);
2279 }
2280 out:
2281 up(&state->sem);
2282 remove_wait_queue(&state->dmabuf.wait, &wait);
2283 set_current_state(TASK_RUNNING);
2284
2285 CS_DBGOUT(CS_WAVE_WRITE | CS_FUNCTION, 2,
2286 printk("cs46xx: cs_write()- ret=%zd\n", ret) );
2287 return ret;
2288 }
2289
2290 static unsigned int cs_poll(struct file *file, struct poll_table_struct *wait)
2291 {
2292 struct cs_card *card = (struct cs_card *)file->private_data;
2293 struct dmabuf *dmabuf;
2294 struct cs_state *state;
2295
2296 unsigned long flags;
2297 unsigned int mask = 0;
2298
2299 CS_DBGOUT(CS_FUNCTION, 2, printk("cs46xx: cs_poll()+ \n"));
2300 if (!(file->f_mode & (FMODE_WRITE | FMODE_READ)))
2301 {
2302 return -EINVAL;
2303 }
2304 if (file->f_mode & FMODE_WRITE)
2305 {
2306 state = card->states[1];
2307 if(state)
2308 {
2309 dmabuf = &state->dmabuf;
2310 poll_wait(file, &dmabuf->wait, wait);
2311 }
2312 }
2313 if (file->f_mode & FMODE_READ)
2314 {
2315 state = card->states[0];
2316 if(state)
2317 {
2318 dmabuf = &state->dmabuf;
2319 poll_wait(file, &dmabuf->wait, wait);
2320 }
2321 }
2322
2323 spin_lock_irqsave(&card->lock, flags);
2324 cs_update_ptr(card, CS_FALSE);
2325 if (file->f_mode & FMODE_READ) {
2326 state = card->states[0];
2327 if(state)
2328 {
2329 dmabuf = &state->dmabuf;
2330 if (dmabuf->count >= (signed)dmabuf->fragsize)
2331 mask |= POLLIN | POLLRDNORM;
2332 }
2333 }
2334 if (file->f_mode & FMODE_WRITE) {
2335 state = card->states[1];
2336 if(state)
2337 {
2338 dmabuf = &state->dmabuf;
2339 if (dmabuf->mapped) {
2340 if (dmabuf->count >= (signed)dmabuf->fragsize)
2341 mask |= POLLOUT | POLLWRNORM;
2342 } else {
2343 if ((signed)dmabuf->dmasize >= dmabuf->count
2344 + (signed)dmabuf->fragsize)
2345 mask |= POLLOUT | POLLWRNORM;
2346 }
2347 }
2348 }
2349 spin_unlock_irqrestore(&card->lock, flags);
2350
2351 CS_DBGOUT(CS_FUNCTION, 2, printk("cs46xx: cs_poll()- (0x%x) \n",
2352 mask));
2353 return mask;
2354 }
2355
2356 /*
2357 * We let users mmap the ring buffer. Its not the real DMA buffer but
2358 * that side of the code is hidden in the IRQ handling. We do a software
2359 * emulation of DMA from a 64K or so buffer into a 2K FIFO.
2360 * (the hardware probably deserves a moan here but Crystal send me nice
2361 * toys ;)).
2362 */
2363
2364 static int cs_mmap(struct file *file, struct vm_area_struct *vma)
2365 {
2366 struct cs_card *card = (struct cs_card *)file->private_data;
2367 struct cs_state *state;
2368 struct dmabuf *dmabuf;
2369 int ret = 0;
2370 unsigned long size;
2371
2372 CS_DBGOUT(CS_FUNCTION | CS_PARMS, 2, printk("cs46xx: cs_mmap()+ file=%p %s %s\n",
2373 file, vma->vm_flags & VM_WRITE ? "VM_WRITE" : "",
2374 vma->vm_flags & VM_READ ? "VM_READ" : "") );
2375
2376 if (vma->vm_flags & VM_WRITE) {
2377 state = card->states[1];
2378 if(state)
2379 {
2380 CS_DBGOUT(CS_OPEN, 2, printk(
2381 "cs46xx: cs_mmap() VM_WRITE - state TRUE prog_dmabuf DAC\n") );
2382 if ((ret = prog_dmabuf(state)) != 0)
2383 return ret;
2384 }
2385 } else if (vma->vm_flags & VM_READ) {
2386 state = card->states[0];
2387 if(state)
2388 {
2389 CS_DBGOUT(CS_OPEN, 2, printk(
2390 "cs46xx: cs_mmap() VM_READ - state TRUE prog_dmabuf ADC\n") );
2391 if ((ret = prog_dmabuf(state)) != 0)
2392 return ret;
2393 }
2394 } else {
2395 CS_DBGOUT(CS_ERROR, 2, printk(
2396 "cs46xx: cs_mmap() return -EINVAL\n") );
2397 return -EINVAL;
2398 }
2399
2400 /*
2401 * For now ONLY support playback, but seems like the only way to use
2402 * mmap() is to open an FD with RDWR, just read or just write access
2403 * does not function, get an error back from the kernel.
2404 * Also, QuakeIII opens with RDWR! So, there must be something
2405 * to needing read/write access mapping. So, allow read/write but
2406 * use the DAC only.
2407 */
2408 state = card->states[1];
2409 if (!state) {
2410 ret = -EINVAL;
2411 goto out;
2412 }
2413
2414 down(&state->sem);
2415 dmabuf = &state->dmabuf;
2416 if (cs4x_pgoff(vma) != 0)
2417 {
2418 ret = -EINVAL;
2419 goto out;
2420 }
2421 size = vma->vm_end - vma->vm_start;
2422
2423 CS_DBGOUT(CS_PARMS, 2, printk("cs46xx: cs_mmap(): size=%d\n",(unsigned)size) );
2424
2425 if (size > (PAGE_SIZE << dmabuf->buforder))
2426 {
2427 ret = -EINVAL;
2428 goto out;
2429 }
2430 if (remap_pfn_range(vma, vma->vm_start,
2431 virt_to_phys(dmabuf->rawbuf) >> PAGE_SHIFT,
2432 size, vma->vm_page_prot))
2433 {
2434 ret = -EAGAIN;
2435 goto out;
2436 }
2437 dmabuf->mapped = 1;
2438
2439 CS_DBGOUT(CS_FUNCTION, 2, printk("cs46xx: cs_mmap()-\n") );
2440 out:
2441 up(&state->sem);
2442 return ret;
2443 }
2444
2445 static int cs_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2446 {
2447 struct cs_card *card = (struct cs_card *)file->private_data;
2448 struct cs_state *state;
2449 struct dmabuf *dmabuf=NULL;
2450 unsigned long flags;
2451 audio_buf_info abinfo;
2452 count_info cinfo;
2453 int val, valsave, mapped, ret;
2454 void __user *argp = (void __user *)arg;
2455 int __user *p = argp;
2456
2457 state = (struct cs_state *)card->states[0];
2458 if(state)
2459 {
2460 dmabuf = &state->dmabuf;
2461 mapped = (file->f_mode & FMODE_READ) && dmabuf->mapped;
2462 }
2463 state = (struct cs_state *)card->states[1];
2464 if(state)
2465 {
2466 dmabuf = &state->dmabuf;
2467 mapped |= (file->f_mode & FMODE_WRITE) && dmabuf->mapped;
2468 }
2469
2470 #if CSDEBUG
2471 printioctl(cmd);
2472 #endif
2473
2474 switch (cmd)
2475 {
2476 case OSS_GETVERSION:
2477 return put_user(SOUND_VERSION, p);
2478
2479 case SNDCTL_DSP_RESET:
2480 /* FIXME: spin_lock ? */
2481 if (file->f_mode & FMODE_WRITE) {
2482 state = (struct cs_state *)card->states[1];
2483 if(state)
2484 {
2485 dmabuf = &state->dmabuf;
2486 stop_dac(state);
2487 synchronize_irq(card->irq);
2488 dmabuf->ready = 0;
2489 resync_dma_ptrs(state);
2490 dmabuf->swptr = dmabuf->hwptr = 0;
2491 dmabuf->count = dmabuf->total_bytes = 0;
2492 dmabuf->blocks = 0;
2493 dmabuf->SGok = 0;
2494 }
2495 }
2496 if (file->f_mode & FMODE_READ) {
2497 state = (struct cs_state *)card->states[0];
2498 if(state)
2499 {
2500 dmabuf = &state->dmabuf;
2501 stop_adc(state);
2502 synchronize_irq(card->irq);
2503 resync_dma_ptrs(state);
2504 dmabuf->ready = 0;
2505 dmabuf->swptr = dmabuf->hwptr = 0;
2506 dmabuf->count = dmabuf->total_bytes = 0;
2507 dmabuf->blocks = 0;
2508 dmabuf->SGok = 0;
2509 }
2510 }
2511 CS_DBGOUT(CS_IOCTL, 2, printk("cs46xx: DSP_RESET()-\n") );
2512 return 0;
2513
2514 case SNDCTL_DSP_SYNC:
2515 if (file->f_mode & FMODE_WRITE)
2516 return drain_dac(state, file->f_flags & O_NONBLOCK);
2517 return 0;
2518
2519 case SNDCTL_DSP_SPEED: /* set sample rate */
2520 if (get_user(val, p))
2521 return -EFAULT;
2522 if (val >= 0) {
2523 if (file->f_mode & FMODE_READ) {
2524 state = (struct cs_state *)card->states[0];
2525 if(state)
2526 {
2527 dmabuf = &state->dmabuf;
2528 stop_adc(state);
2529 dmabuf->ready = 0;
2530 dmabuf->SGok = 0;
2531 cs_set_adc_rate(state, val);
2532 cs_set_divisor(dmabuf);
2533 }
2534 }
2535 if (file->f_mode & FMODE_WRITE) {
2536 state = (struct cs_state *)card->states[1];
2537 if(state)
2538 {
2539 dmabuf = &state->dmabuf;
2540 stop_dac(state);
2541 dmabuf->ready = 0;
2542 dmabuf->SGok = 0;
2543 cs_set_dac_rate(state, val);
2544 cs_set_divisor(dmabuf);
2545 }
2546 }
2547 CS_DBGOUT(CS_IOCTL | CS_PARMS, 4, printk(
2548 "cs46xx: cs_ioctl() DSP_SPEED %s %s %d\n",
2549 file->f_mode & FMODE_WRITE ? "DAC" : "",
2550 file->f_mode & FMODE_READ ? "ADC" : "",
2551 dmabuf->rate ) );
2552 return put_user(dmabuf->rate, p);
2553 }
2554 return put_user(0, p);
2555
2556 case SNDCTL_DSP_STEREO: /* set stereo or mono channel */
2557 if (get_user(val, p))
2558 return -EFAULT;
2559 if (file->f_mode & FMODE_WRITE) {
2560 state = (struct cs_state *)card->states[1];
2561 if(state)
2562 {
2563 dmabuf = &state->dmabuf;
2564 stop_dac(state);
2565 dmabuf->ready = 0;
2566 dmabuf->SGok = 0;
2567 if(val)
2568 dmabuf->fmt |= CS_FMT_STEREO;
2569 else
2570 dmabuf->fmt &= ~CS_FMT_STEREO;
2571 cs_set_divisor(dmabuf);
2572 CS_DBGOUT(CS_IOCTL | CS_PARMS, 4, printk(
2573 "cs46xx: DSP_STEREO() DAC %s\n",
2574 (dmabuf->fmt & CS_FMT_STEREO) ?
2575 "STEREO":"MONO") );
2576 }
2577 }
2578 if (file->f_mode & FMODE_READ) {
2579 state = (struct cs_state *)card->states[0];
2580 if(state)
2581 {
2582 dmabuf = &state->dmabuf;
2583 stop_adc(state);
2584 dmabuf->ready = 0;
2585 dmabuf->SGok = 0;
2586 if(val)
2587 dmabuf->fmt |= CS_FMT_STEREO;
2588 else
2589 dmabuf->fmt &= ~CS_FMT_STEREO;
2590 cs_set_divisor(dmabuf);
2591 CS_DBGOUT(CS_IOCTL | CS_PARMS, 4, printk(
2592 "cs46xx: DSP_STEREO() ADC %s\n",
2593 (dmabuf->fmt & CS_FMT_STEREO) ?
2594 "STEREO":"MONO") );
2595 }
2596 }
2597 return 0;
2598
2599 case SNDCTL_DSP_GETBLKSIZE:
2600 if (file->f_mode & FMODE_WRITE) {
2601 state = (struct cs_state *)card->states[1];
2602 if(state)
2603 {
2604 dmabuf = &state->dmabuf;
2605 if ((val = prog_dmabuf(state)))
2606 return val;
2607 return put_user(dmabuf->fragsize, p);
2608 }
2609 }
2610 if (file->f_mode & FMODE_READ) {
2611 state = (struct cs_state *)card->states[0];
2612 if(state)
2613 {
2614 dmabuf = &state->dmabuf;
2615 if ((val = prog_dmabuf(state)))
2616 return val;
2617 return put_user(dmabuf->fragsize/dmabuf->divisor,
2618 p);
2619 }
2620 }
2621 return put_user(0, p);
2622
2623 case SNDCTL_DSP_GETFMTS: /* Returns a mask of supported sample format*/
2624 return put_user(AFMT_S16_LE | AFMT_U8, p);
2625
2626 case SNDCTL_DSP_SETFMT: /* Select sample format */
2627 if (get_user(val, p))
2628 return -EFAULT;
2629 CS_DBGOUT(CS_IOCTL | CS_PARMS, 4, printk(
2630 "cs46xx: cs_ioctl() DSP_SETFMT %s %s %s %s\n",
2631 file->f_mode & FMODE_WRITE ? "DAC" : "",
2632 file->f_mode & FMODE_READ ? "ADC" : "",
2633 val == AFMT_S16_LE ? "16Bit Signed" : "",
2634 val == AFMT_U8 ? "8Bit Unsigned" : "") );
2635 valsave = val;
2636 if (val != AFMT_QUERY) {
2637 if(val==AFMT_S16_LE || val==AFMT_U8)
2638 {
2639 if (file->f_mode & FMODE_WRITE) {
2640 state = (struct cs_state *)card->states[1];
2641 if(state)
2642 {
2643 dmabuf = &state->dmabuf;
2644 stop_dac(state);
2645 dmabuf->ready = 0;
2646 dmabuf->SGok = 0;
2647 if(val==AFMT_S16_LE)
2648 dmabuf->fmt |= CS_FMT_16BIT;
2649 else
2650 dmabuf->fmt &= ~CS_FMT_16BIT;
2651 cs_set_divisor(dmabuf);
2652 if((ret = prog_dmabuf(state)))
2653 return ret;
2654 }
2655 }
2656 if (file->f_mode & FMODE_READ) {
2657 val = valsave;
2658 state = (struct cs_state *)card->states[0];
2659 if(state)
2660 {
2661 dmabuf = &state->dmabuf;
2662 stop_adc(state);
2663 dmabuf->ready = 0;
2664 dmabuf->SGok = 0;
2665 if(val==AFMT_S16_LE)
2666 dmabuf->fmt |= CS_FMT_16BIT;
2667 else
2668 dmabuf->fmt &= ~CS_FMT_16BIT;
2669 cs_set_divisor(dmabuf);
2670 if((ret = prog_dmabuf(state)))
2671 return ret;
2672 }
2673 }
2674 }
2675 else
2676 {
2677 CS_DBGOUT(CS_IOCTL | CS_ERROR, 2, printk(
2678 "cs46xx: DSP_SETFMT() Unsupported format (0x%x)\n",
2679 valsave) );
2680 }
2681 }
2682 else
2683 {
2684 if(file->f_mode & FMODE_WRITE)
2685 {
2686 state = (struct cs_state *)card->states[1];
2687 if(state)
2688 dmabuf = &state->dmabuf;
2689 }
2690 else if(file->f_mode & FMODE_READ)
2691 {
2692 state = (struct cs_state *)card->states[0];
2693 if(state)
2694 dmabuf = &state->dmabuf;
2695 }
2696 }
2697 if(dmabuf)
2698 {
2699 if(dmabuf->fmt & CS_FMT_16BIT)
2700 return put_user(AFMT_S16_LE, p);
2701 else
2702 return put_user(AFMT_U8, p);
2703 }
2704 return put_user(0, p);
2705
2706 case SNDCTL_DSP_CHANNELS:
2707 if (get_user(val, p))
2708 return -EFAULT;
2709 if (val != 0) {
2710 if (file->f_mode & FMODE_WRITE) {
2711 state = (struct cs_state *)card->states[1];
2712 if(state)
2713 {
2714 dmabuf = &state->dmabuf;
2715 stop_dac(state);
2716 dmabuf->ready = 0;
2717 dmabuf->SGok = 0;
2718 if(val>1)
2719 dmabuf->fmt |= CS_FMT_STEREO;
2720 else
2721 dmabuf->fmt &= ~CS_FMT_STEREO;
2722 cs_set_divisor(dmabuf);
2723 if (prog_dmabuf(state))
2724 return 0;
2725 }
2726 }
2727 if (file->f_mode & FMODE_READ) {
2728 state = (struct cs_state *)card->states[0];
2729 if(state)
2730 {
2731 dmabuf = &state->dmabuf;
2732 stop_adc(state);
2733 dmabuf->ready = 0;
2734 dmabuf->SGok = 0;
2735 if(val>1)
2736 dmabuf->fmt |= CS_FMT_STEREO;
2737 else
2738 dmabuf->fmt &= ~CS_FMT_STEREO;
2739 cs_set_divisor(dmabuf);
2740 if (prog_dmabuf(state))
2741 return 0;
2742 }
2743 }
2744 }
2745 return put_user((dmabuf->fmt & CS_FMT_STEREO) ? 2 : 1,
2746 p);
2747
2748 case SNDCTL_DSP_POST:
2749 /*
2750 * There will be a longer than normal pause in the data.
2751 * so... do nothing, because there is nothing that we can do.
2752 */
2753 return 0;
2754
2755 case SNDCTL_DSP_SUBDIVIDE:
2756 if (file->f_mode & FMODE_WRITE) {
2757 state = (struct cs_state *)card->states[1];
2758 if(state)
2759 {
2760 dmabuf = &state->dmabuf;
2761 if (dmabuf->subdivision)
2762 return -EINVAL;
2763 if (get_user(val, p))
2764 return -EFAULT;
2765 if (val != 1 && val != 2)
2766 return -EINVAL;
2767 dmabuf->subdivision = val;
2768 }
2769 }
2770 if (file->f_mode & FMODE_READ) {
2771 state = (struct cs_state *)card->states[0];
2772 if(state)
2773 {
2774 dmabuf = &state->dmabuf;
2775 if (dmabuf->subdivision)
2776 return -EINVAL;
2777 if (get_user(val, p))
2778 return -EFAULT;
2779 if (val != 1 && val != 2)
2780 return -EINVAL;
2781 dmabuf->subdivision = val;
2782 }
2783 }
2784 return 0;
2785
2786 case SNDCTL_DSP_SETFRAGMENT:
2787 if (get_user(val, p))
2788 return -EFAULT;
2789
2790 if (file->f_mode & FMODE_WRITE) {
2791 state = (struct cs_state *)card->states[1];
2792 if(state)
2793 {
2794 dmabuf = &state->dmabuf;
2795 dmabuf->ossfragshift = val & 0xffff;
2796 dmabuf->ossmaxfrags = (val >> 16) & 0xffff;
2797 }
2798 }
2799 if (file->f_mode & FMODE_READ) {
2800 state = (struct cs_state *)card->states[0];
2801 if(state)
2802 {
2803 dmabuf = &state->dmabuf;
2804 dmabuf->ossfragshift = val & 0xffff;
2805 dmabuf->ossmaxfrags = (val >> 16) & 0xffff;
2806 }
2807 }
2808 return 0;
2809
2810 case SNDCTL_DSP_GETOSPACE:
2811 if (!(file->f_mode & FMODE_WRITE))
2812 return -EINVAL;
2813 state = (struct cs_state *)card->states[1];
2814 if(state)
2815 {
2816 dmabuf = &state->dmabuf;
2817 spin_lock_irqsave(&state->card->lock, flags);
2818 cs_update_ptr(card, CS_TRUE);
2819 abinfo.fragsize = dmabuf->fragsize;
2820 abinfo.fragstotal = dmabuf->numfrag;
2821 /*
2822 * for mmap we always have total space available
2823 */
2824 if (dmabuf->mapped)
2825 abinfo.bytes = dmabuf->dmasize;
2826 else
2827 abinfo.bytes = dmabuf->dmasize - dmabuf->count;
2828
2829 abinfo.fragments = abinfo.bytes >> dmabuf->fragshift;
2830 spin_unlock_irqrestore(&state->card->lock, flags);
2831 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2832 }
2833 return -ENODEV;
2834
2835 case SNDCTL_DSP_GETISPACE:
2836 if (!(file->f_mode & FMODE_READ))
2837 return -EINVAL;
2838 state = (struct cs_state *)card->states[0];
2839 if(state)
2840 {
2841 dmabuf = &state->dmabuf;
2842 spin_lock_irqsave(&state->card->lock, flags);
2843 cs_update_ptr(card, CS_TRUE);
2844 abinfo.fragsize = dmabuf->fragsize/dmabuf->divisor;
2845 abinfo.bytes = dmabuf->count/dmabuf->divisor;
2846 abinfo.fragstotal = dmabuf->numfrag;
2847 abinfo.fragments = abinfo.bytes >> dmabuf->fragshift;
2848 spin_unlock_irqrestore(&state->card->lock, flags);
2849 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2850 }
2851 return -ENODEV;
2852
2853 case SNDCTL_DSP_NONBLOCK:
2854 file->f_flags |= O_NONBLOCK;
2855 return 0;
2856
2857 case SNDCTL_DSP_GETCAPS:
2858 return put_user(DSP_CAP_REALTIME|DSP_CAP_TRIGGER|DSP_CAP_MMAP,
2859 p);
2860
2861 case SNDCTL_DSP_GETTRIGGER:
2862 val = 0;
2863 CS_DBGOUT(CS_IOCTL, 2, printk("cs46xx: DSP_GETTRIGGER()+\n") );
2864 if (file->f_mode & FMODE_WRITE)
2865 {
2866 state = (struct cs_state *)card->states[1];
2867 if(state)
2868 {
2869 dmabuf = &state->dmabuf;
2870 if(dmabuf->enable & DAC_RUNNING)
2871 val |= PCM_ENABLE_INPUT;
2872 }
2873 }
2874 if (file->f_mode & FMODE_READ)
2875 {
2876 if(state)
2877 {
2878 state = (struct cs_state *)card->states[0];
2879 dmabuf = &state->dmabuf;
2880 if(dmabuf->enable & ADC_RUNNING)
2881 val |= PCM_ENABLE_OUTPUT;
2882 }
2883 }
2884 CS_DBGOUT(CS_IOCTL, 2, printk("cs46xx: DSP_GETTRIGGER()- val=0x%x\n",val) );
2885 return put_user(val, p);
2886
2887 case SNDCTL_DSP_SETTRIGGER:
2888 if (get_user(val, p))
2889 return -EFAULT;
2890 if (file->f_mode & FMODE_READ) {
2891 state = (struct cs_state *)card->states[0];
2892 if(state)
2893 {
2894 dmabuf = &state->dmabuf;
2895 if (val & PCM_ENABLE_INPUT) {
2896 if (!dmabuf->ready && (ret = prog_dmabuf(state)))
2897 return ret;
2898 start_adc(state);
2899 } else
2900 stop_adc(state);
2901 }
2902 }
2903 if (file->f_mode & FMODE_WRITE) {
2904 state = (struct cs_state *)card->states[1];
2905 if(state)
2906 {
2907 dmabuf = &state->dmabuf;
2908 if (val & PCM_ENABLE_OUTPUT) {
2909 if (!dmabuf->ready && (ret = prog_dmabuf(state)))
2910 return ret;
2911 start_dac(state);
2912 } else
2913 stop_dac(state);
2914 }
2915 }
2916 return 0;
2917
2918 case SNDCTL_DSP_GETIPTR:
2919 if (!(file->f_mode & FMODE_READ))
2920 return -EINVAL;
2921 state = (struct cs_state *)card->states[0];
2922 if(state)
2923 {
2924 dmabuf = &state->dmabuf;
2925 spin_lock_irqsave(&state->card->lock, flags);
2926 cs_update_ptr(card, CS_TRUE);
2927 cinfo.bytes = dmabuf->total_bytes/dmabuf->divisor;
2928 cinfo.blocks = dmabuf->count/dmabuf->divisor >> dmabuf->fragshift;
2929 cinfo.ptr = dmabuf->hwptr/dmabuf->divisor;
2930 spin_unlock_irqrestore(&state->card->lock, flags);
2931 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
2932 return -EFAULT;
2933 return 0;
2934 }
2935 return -ENODEV;
2936
2937 case SNDCTL_DSP_GETOPTR:
2938 if (!(file->f_mode & FMODE_WRITE))
2939 return -EINVAL;
2940 state = (struct cs_state *)card->states[1];
2941 if(state)
2942 {
2943 dmabuf = &state->dmabuf;
2944 spin_lock_irqsave(&state->card->lock, flags);
2945 cs_update_ptr(card, CS_TRUE);
2946 cinfo.bytes = dmabuf->total_bytes;
2947 if (dmabuf->mapped)
2948 {
2949 cinfo.blocks = (cinfo.bytes >> dmabuf->fragshift)
2950 - dmabuf->blocks;
2951 CS_DBGOUT(CS_PARMS, 8,
2952 printk("total_bytes=%d blocks=%d dmabuf->blocks=%d\n",
2953 cinfo.bytes,cinfo.blocks,dmabuf->blocks) );
2954 dmabuf->blocks = cinfo.bytes >> dmabuf->fragshift;
2955 }
2956 else
2957 {
2958 cinfo.blocks = dmabuf->count >> dmabuf->fragshift;
2959 }
2960 cinfo.ptr = dmabuf->hwptr;
2961
2962 CS_DBGOUT(CS_PARMS, 4, printk(
2963 "cs46xx: GETOPTR bytes=%d blocks=%d ptr=%d\n",
2964 cinfo.bytes,cinfo.blocks,cinfo.ptr) );
2965 spin_unlock_irqrestore(&state->card->lock, flags);
2966 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
2967 return -EFAULT;
2968 return 0;
2969 }
2970 return -ENODEV;
2971
2972 case SNDCTL_DSP_SETDUPLEX:
2973 return 0;
2974
2975 case SNDCTL_DSP_GETODELAY:
2976 if (!(file->f_mode & FMODE_WRITE))
2977 return -EINVAL;
2978 state = (struct cs_state *)card->states[1];
2979 if(state)
2980 {
2981 dmabuf = &state->dmabuf;
2982 spin_lock_irqsave(&state->card->lock, flags);
2983 cs_update_ptr(card, CS_TRUE);
2984 val = dmabuf->count;
2985 spin_unlock_irqrestore(&state->card->lock, flags);
2986 }
2987 else
2988 val = 0;
2989 return put_user(val, p);
2990
2991 case SOUND_PCM_READ_RATE:
2992 if(file->f_mode & FMODE_READ)
2993 state = (struct cs_state *)card->states[0];
2994 else
2995 state = (struct cs_state *)card->states[1];
2996 if(state)
2997 {
2998 dmabuf = &state->dmabuf;
2999 return put_user(dmabuf->rate, p);
3000 }
3001 return put_user(0, p);
3002
3003
3004 case SOUND_PCM_READ_CHANNELS:
3005 if(file->f_mode & FMODE_READ)
3006 state = (struct cs_state *)card->states[0];
3007 else
3008 state = (struct cs_state *)card->states[1];
3009 if(state)
3010 {
3011 dmabuf = &state->dmabuf;
3012 return put_user((dmabuf->fmt & CS_FMT_STEREO) ? 2 : 1,
3013 p);
3014 }
3015 return put_user(0, p);
3016
3017 case SOUND_PCM_READ_BITS:
3018 if(file->f_mode & FMODE_READ)
3019 state = (struct cs_state *)card->states[0];
3020 else
3021 state = (struct cs_state *)card->states[1];
3022 if(state)
3023 {
3024 dmabuf = &state->dmabuf;
3025 return put_user((dmabuf->fmt & CS_FMT_16BIT) ?
3026 AFMT_S16_LE : AFMT_U8, p);
3027
3028 }
3029 return put_user(0, p);
3030
3031 case SNDCTL_DSP_MAPINBUF:
3032 case SNDCTL_DSP_MAPOUTBUF:
3033 case SNDCTL_DSP_SETSYNCRO:
3034 case SOUND_PCM_WRITE_FILTER:
3035 case SOUND_PCM_READ_FILTER:
3036 return -EINVAL;
3037 }
3038 return -EINVAL;
3039 }
3040
3041
3042 /*
3043 * AMP control - null AMP
3044 */
3045
3046 static void amp_none(struct cs_card *card, int change)
3047 {
3048 }
3049
3050 /*
3051 * Crystal EAPD mode
3052 */
3053
3054 static void amp_voyetra(struct cs_card *card, int change)
3055 {
3056 /* Manage the EAPD bit on the Crystal 4297
3057 and the Analog AD1885 */
3058
3059 int old=card->amplifier;
3060
3061 card->amplifier+=change;
3062 if(card->amplifier && !old)
3063 {
3064 /* Turn the EAPD amp on */
3065 cs_ac97_set(card->ac97_codec[0], AC97_POWER_CONTROL,
3066 cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) |
3067 0x8000);
3068 }
3069 else if(old && !card->amplifier)
3070 {
3071 /* Turn the EAPD amp off */
3072 cs_ac97_set(card->ac97_codec[0], AC97_POWER_CONTROL,
3073 cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) &
3074 ~0x8000);
3075 }
3076 }
3077
3078
3079 /*
3080 * Game Theatre XP card - EGPIO[2] is used to enable the external amp.
3081 */
3082
3083 static void amp_hercules(struct cs_card *card, int change)
3084 {
3085 int old=card->amplifier;
3086 if(!card)
3087 {
3088 CS_DBGOUT(CS_ERROR, 2, printk(KERN_INFO
3089 "cs46xx: amp_hercules() called before initialized.\n"));
3090 return;
3091 }
3092 card->amplifier+=change;
3093 if( (card->amplifier && !old) && !(hercules_egpio_disable))
3094 {
3095 CS_DBGOUT(CS_PARMS, 4, printk(KERN_INFO
3096 "cs46xx: amp_hercules() external amp enabled\n"));
3097 cs461x_pokeBA0(card, BA0_EGPIODR,
3098 EGPIODR_GPOE2); /* enable EGPIO2 output */
3099 cs461x_pokeBA0(card, BA0_EGPIOPTR,
3100 EGPIOPTR_GPPT2); /* open-drain on output */
3101 }
3102 else if(old && !card->amplifier)
3103 {
3104 CS_DBGOUT(CS_PARMS, 4, printk(KERN_INFO
3105 "cs46xx: amp_hercules() external amp disabled\n"));
3106 cs461x_pokeBA0(card, BA0_EGPIODR, 0); /* disable */
3107 cs461x_pokeBA0(card, BA0_EGPIOPTR, 0); /* disable */
3108 }
3109 }
3110
3111 /*
3112 * Handle the CLKRUN on a thinkpad. We must disable CLKRUN support
3113 * whenever we need to beat on the chip.
3114 *
3115 * The original idea and code for this hack comes from David Kaiser at
3116 * Linuxcare. Perhaps one day Crystal will document their chips well
3117 * enough to make them useful.
3118 */
3119
3120 static void clkrun_hack(struct cs_card *card, int change)
3121 {
3122 struct pci_dev *acpi_dev;
3123 u16 control;
3124 u8 pp;
3125 unsigned long port;
3126 int old=card->active;
3127
3128 card->active+=change;
3129
3130 acpi_dev = pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3, NULL);
3131 if(acpi_dev == NULL)
3132 return; /* Not a thinkpad thats for sure */
3133
3134 /* Find the control port */
3135 pci_read_config_byte(acpi_dev, 0x41, &pp);
3136 port=pp<<8;
3137
3138 /* Read ACPI port */
3139 control=inw(port+0x10);
3140
3141 /* Flip CLKRUN off while running */
3142 if(!card->active && old)
3143 {
3144 CS_DBGOUT(CS_PARMS , 9, printk( KERN_INFO
3145 "cs46xx: clkrun() enable clkrun - change=%d active=%d\n",
3146 change,card->active));
3147 outw(control|0x2000, port+0x10);
3148 }
3149 else
3150 {
3151 /*
3152 * sometimes on a resume the bit is set, so always reset the bit.
3153 */
3154 CS_DBGOUT(CS_PARMS , 9, printk( KERN_INFO
3155 "cs46xx: clkrun() disable clkrun - change=%d active=%d\n",
3156 change,card->active));
3157 outw(control&~0x2000, port+0x10);
3158 }
3159 }
3160
3161
3162 static int cs_open(struct inode *inode, struct file *file)
3163 {
3164 struct cs_card *card = (struct cs_card *)file->private_data;
3165 struct cs_state *state = NULL;
3166 struct dmabuf *dmabuf = NULL;
3167 struct list_head *entry;
3168 unsigned int minor = iminor(inode);
3169 int ret=0;
3170 unsigned int tmp;
3171
3172 CS_DBGOUT(CS_OPEN | CS_FUNCTION, 2, printk("cs46xx: cs_open()+ file=%p %s %s\n",
3173 file, file->f_mode & FMODE_WRITE ? "FMODE_WRITE" : "",
3174 file->f_mode & FMODE_READ ? "FMODE_READ" : "") );
3175
3176 list_for_each(entry, &cs46xx_devs)
3177 {
3178 card = list_entry(entry, struct cs_card, list);
3179
3180 if (!((card->dev_audio ^ minor) & ~0xf))
3181 break;
3182 }
3183 if (entry == &cs46xx_devs)
3184 return -ENODEV;
3185 if (!card) {
3186 CS_DBGOUT(CS_FUNCTION | CS_OPEN, 2, printk(KERN_INFO
3187 "cs46xx: cs_open(): Error - unable to find audio card struct\n"));
3188 return -ENODEV;
3189 }
3190
3191 /*
3192 * hardcode state[0] for capture, [1] for playback
3193 */
3194 if(file->f_mode & FMODE_READ)
3195 {
3196 CS_DBGOUT(CS_WAVE_READ, 2, printk("cs46xx: cs_open() FMODE_READ\n") );
3197 if (card->states[0] == NULL) {
3198 state = card->states[0] = (struct cs_state *)
3199 kmalloc(sizeof(struct cs_state), GFP_KERNEL);
3200 if (state == NULL)
3201 return -ENOMEM;
3202 memset(state, 0, sizeof(struct cs_state));
3203 init_MUTEX(&state->sem);
3204 dmabuf = &state->dmabuf;
3205 dmabuf->pbuf = (void *)get_zeroed_page(GFP_KERNEL | GFP_DMA);
3206 if(dmabuf->pbuf==NULL)
3207 {
3208 kfree(state);
3209 card->states[0]=NULL;
3210 return -ENOMEM;
3211 }
3212 }
3213 else
3214 {
3215 state = card->states[0];
3216 if(state->open_mode & FMODE_READ)
3217 return -EBUSY;
3218 }
3219 dmabuf->channel = card->alloc_rec_pcm_channel(card);
3220
3221 if (dmabuf->channel == NULL) {
3222 kfree (card->states[0]);
3223 card->states[0] = NULL;
3224 return -ENODEV;
3225 }
3226
3227 /* Now turn on external AMP if needed */
3228 state->card = card;
3229 state->card->active_ctrl(state->card,1);
3230 state->card->amplifier_ctrl(state->card,1);
3231
3232 if( (tmp = cs46xx_powerup(card, CS_POWER_ADC)) )
3233 {
3234 CS_DBGOUT(CS_ERROR | CS_INIT, 1, printk(KERN_INFO
3235 "cs46xx: cs46xx_powerup of ADC failed (0x%x)\n",tmp) );
3236 return -EIO;
3237 }
3238
3239 dmabuf->channel->state = state;
3240 /* initialize the virtual channel */
3241 state->virt = 0;
3242 state->magic = CS_STATE_MAGIC;
3243 init_waitqueue_head(&dmabuf->wait);
3244 init_MUTEX(&state->open_sem);
3245 file->private_data = card;
3246
3247 down(&state->open_sem);
3248
3249 /* set default sample format. According to OSS Programmer's Guide /dev/dsp
3250 should be default to unsigned 8-bits, mono, with sample rate 8kHz and
3251 /dev/dspW will accept 16-bits sample */
3252
3253 /* Default input is 8bit mono */
3254 dmabuf->fmt &= ~CS_FMT_MASK;
3255 dmabuf->type = CS_TYPE_ADC;
3256 dmabuf->ossfragshift = 0;
3257 dmabuf->ossmaxfrags = 0;
3258 dmabuf->subdivision = 0;
3259 cs_set_adc_rate(state, 8000);
3260 cs_set_divisor(dmabuf);
3261
3262 state->open_mode |= FMODE_READ;
3263 up(&state->open_sem);
3264 }
3265 if(file->f_mode & FMODE_WRITE)
3266 {
3267 CS_DBGOUT(CS_OPEN, 2, printk("cs46xx: cs_open() FMODE_WRITE\n") );
3268 if (card->states[1] == NULL) {
3269 state = card->states[1] = (struct cs_state *)
3270 kmalloc(sizeof(struct cs_state), GFP_KERNEL);
3271 if (state == NULL)
3272 return -ENOMEM;
3273 memset(state, 0, sizeof(struct cs_state));
3274 init_MUTEX(&state->sem);
3275 dmabuf = &state->dmabuf;
3276 dmabuf->pbuf = (void *)get_zeroed_page(GFP_KERNEL | GFP_DMA);
3277 if(dmabuf->pbuf==NULL)
3278 {
3279 kfree(state);
3280 card->states[1]=NULL;
3281 return -ENOMEM;
3282 }
3283 }
3284 else
3285 {
3286 state = card->states[1];
3287 if(state->open_mode & FMODE_WRITE)
3288 return -EBUSY;
3289 }
3290 dmabuf->channel = card->alloc_pcm_channel(card);
3291
3292 if (dmabuf->channel == NULL) {
3293 kfree (card->states[1]);
3294 card->states[1] = NULL;
3295 return -ENODEV;
3296 }
3297
3298 /* Now turn on external AMP if needed */
3299 state->card = card;
3300 state->card->active_ctrl(state->card,1);
3301 state->card->amplifier_ctrl(state->card,1);
3302
3303 if( (tmp = cs46xx_powerup(card, CS_POWER_DAC)) )
3304 {
3305 CS_DBGOUT(CS_ERROR | CS_INIT, 1, printk(KERN_INFO
3306 "cs46xx: cs46xx_powerup of DAC failed (0x%x)\n",tmp) );
3307 return -EIO;
3308 }
3309
3310 dmabuf->channel->state = state;
3311 /* initialize the virtual channel */
3312 state->virt = 1;
3313 state->magic = CS_STATE_MAGIC;
3314 init_waitqueue_head(&dmabuf->wait);
3315 init_MUTEX(&state->open_sem);
3316 file->private_data = card;
3317
3318 down(&state->open_sem);
3319
3320 /* set default sample format. According to OSS Programmer's Guide /dev/dsp
3321 should be default to unsigned 8-bits, mono, with sample rate 8kHz and
3322 /dev/dspW will accept 16-bits sample */
3323
3324 /* Default output is 8bit mono. */
3325 dmabuf->fmt &= ~CS_FMT_MASK;
3326 dmabuf->type = CS_TYPE_DAC;
3327 dmabuf->ossfragshift = 0;
3328 dmabuf->ossmaxfrags = 0;
3329 dmabuf->subdivision = 0;
3330 cs_set_dac_rate(state, 8000);
3331 cs_set_divisor(dmabuf);
3332
3333 state->open_mode |= FMODE_WRITE;
3334 up(&state->open_sem);
3335 if((ret = prog_dmabuf(state)))
3336 return ret;
3337 }
3338 CS_DBGOUT(CS_OPEN | CS_FUNCTION, 2, printk("cs46xx: cs_open()- 0\n") );
3339 return nonseekable_open(inode, file);
3340 }
3341
3342 static int cs_release(struct inode *inode, struct file *file)
3343 {
3344 struct cs_card *card = (struct cs_card *)file->private_data;
3345 struct dmabuf *dmabuf;
3346 struct cs_state *state;
3347 unsigned int tmp;
3348 CS_DBGOUT(CS_RELEASE | CS_FUNCTION, 2, printk("cs46xx: cs_release()+ file=%p %s %s\n",
3349 file, file->f_mode & FMODE_WRITE ? "FMODE_WRITE" : "",
3350 file->f_mode & FMODE_READ ? "FMODE_READ" : "") );
3351
3352 if (!(file->f_mode & (FMODE_WRITE | FMODE_READ)))
3353 {
3354 return -EINVAL;
3355 }
3356 state = card->states[1];
3357 if(state)
3358 {
3359 if ( (state->open_mode & FMODE_WRITE) & (file->f_mode & FMODE_WRITE) )
3360 {
3361 CS_DBGOUT(CS_RELEASE, 2, printk("cs46xx: cs_release() FMODE_WRITE\n") );
3362 dmabuf = &state->dmabuf;
3363 cs_clear_tail(state);
3364 drain_dac(state, file->f_flags & O_NONBLOCK);
3365 /* stop DMA state machine and free DMA buffers/channels */
3366 down(&state->open_sem);
3367 stop_dac(state);
3368 dealloc_dmabuf(state);
3369 state->card->free_pcm_channel(state->card, dmabuf->channel->num);
3370 free_page((unsigned long)state->dmabuf.pbuf);
3371
3372 /* we're covered by the open_sem */
3373 up(&state->open_sem);
3374 state->card->states[state->virt] = NULL;
3375 state->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
3376
3377 if( (tmp = cs461x_powerdown(card, CS_POWER_DAC, CS_FALSE )) )
3378 {
3379 CS_DBGOUT(CS_ERROR, 1, printk(KERN_INFO
3380 "cs46xx: cs_release_mixdev() powerdown DAC failure (0x%x)\n",tmp) );
3381 }
3382
3383 /* Now turn off external AMP if needed */
3384 state->card->amplifier_ctrl(state->card, -1);
3385 state->card->active_ctrl(state->card, -1);
3386
3387 kfree(state);
3388 }
3389 }
3390
3391 state = card->states[0];
3392 if(state)
3393 {
3394 if ( (state->open_mode & FMODE_READ) & (file->f_mode & FMODE_READ) )
3395 {
3396 CS_DBGOUT(CS_RELEASE, 2, printk("cs46xx: cs_release() FMODE_READ\n") );
3397 dmabuf = &state->dmabuf;
3398 down(&state->open_sem);
3399 stop_adc(state);
3400 dealloc_dmabuf(state);
3401 state->card->free_pcm_channel(state->card, dmabuf->channel->num);
3402 free_page((unsigned long)state->dmabuf.pbuf);
3403
3404 /* we're covered by the open_sem */
3405 up(&state->open_sem);
3406 state->card->states[state->virt] = NULL;
3407 state->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
3408
3409 if( (tmp = cs461x_powerdown(card, CS_POWER_ADC, CS_FALSE )) )
3410 {
3411 CS_DBGOUT(CS_ERROR, 1, printk(KERN_INFO
3412 "cs46xx: cs_release_mixdev() powerdown ADC failure (0x%x)\n",tmp) );
3413 }
3414
3415 /* Now turn off external AMP if needed */
3416 state->card->amplifier_ctrl(state->card, -1);
3417 state->card->active_ctrl(state->card, -1);
3418
3419 kfree(state);
3420 }
3421 }
3422
3423 CS_DBGOUT(CS_FUNCTION | CS_RELEASE, 2, printk("cs46xx: cs_release()- 0\n") );
3424 return 0;
3425 }
3426
3427 static void printpm(struct cs_card *s)
3428 {
3429 CS_DBGOUT(CS_PM, 9, printk("pm struct:\n"));
3430 CS_DBGOUT(CS_PM, 9, printk("flags:0x%x u32CLKCR1_SAVE: 0%x u32SSPMValue: 0x%x\n",
3431 (unsigned)s->pm.flags,s->pm.u32CLKCR1_SAVE,s->pm.u32SSPMValue));
3432 CS_DBGOUT(CS_PM, 9, printk("u32PPLVCvalue: 0x%x u32PPRVCvalue: 0x%x\n",
3433 s->pm.u32PPLVCvalue,s->pm.u32PPRVCvalue));
3434 CS_DBGOUT(CS_PM, 9, printk("u32FMLVCvalue: 0x%x u32FMRVCvalue: 0x%x\n",
3435 s->pm.u32FMLVCvalue,s->pm.u32FMRVCvalue));
3436 CS_DBGOUT(CS_PM, 9, printk("u32GPIORvalue: 0x%x u32JSCTLvalue: 0x%x\n",
3437 s->pm.u32GPIORvalue,s->pm.u32JSCTLvalue));
3438 CS_DBGOUT(CS_PM, 9, printk("u32SSCR: 0x%x u32SRCSA: 0x%x\n",
3439 s->pm.u32SSCR,s->pm.u32SRCSA));
3440 CS_DBGOUT(CS_PM, 9, printk("u32DacASR: 0x%x u32AdcASR: 0x%x\n",
3441 s->pm.u32DacASR,s->pm.u32AdcASR));
3442 CS_DBGOUT(CS_PM, 9, printk("u32DacSR: 0x%x u32AdcSR: 0x%x\n",
3443 s->pm.u32DacSR,s->pm.u32AdcSR));
3444 CS_DBGOUT(CS_PM, 9, printk("u32MIDCR_Save: 0x%x\n",
3445 s->pm.u32MIDCR_Save));
3446 CS_DBGOUT(CS_PM, 9, printk("u32AC97_powerdown: 0x%x _general_purpose 0x%x\n",
3447 s->pm.u32AC97_powerdown,s->pm.u32AC97_general_purpose));
3448 CS_DBGOUT(CS_PM, 9, printk("u32AC97_master_volume: 0x%x\n",
3449 s->pm.u32AC97_master_volume));
3450 CS_DBGOUT(CS_PM, 9, printk("u32AC97_headphone_volume: 0x%x\n",
3451 s->pm.u32AC97_headphone_volume));
3452 CS_DBGOUT(CS_PM, 9, printk("u32AC97_master_volume_mono: 0x%x\n",
3453 s->pm.u32AC97_master_volume_mono));
3454 CS_DBGOUT(CS_PM, 9, printk("u32AC97_pcm_out_volume: 0x%x\n",
3455 s->pm.u32AC97_pcm_out_volume));
3456 CS_DBGOUT(CS_PM, 9, printk("dmabuf_swptr_play: 0x%x dmabuf_count_play: %d\n",
3457 s->pm.dmabuf_swptr_play,s->pm.dmabuf_count_play));
3458 CS_DBGOUT(CS_PM, 9, printk("dmabuf_swptr_capture: 0x%x dmabuf_count_capture: %d\n",
3459 s->pm.dmabuf_swptr_capture,s->pm.dmabuf_count_capture));
3460
3461 }
3462
3463 /****************************************************************************
3464 *
3465 * Suspend - save the ac97 regs, mute the outputs and power down the part.
3466 *
3467 ****************************************************************************/
3468 static void cs46xx_ac97_suspend(struct cs_card *card)
3469 {
3470 int Count,i;
3471 struct ac97_codec *dev=card->ac97_codec[0];
3472 unsigned int tmp;
3473
3474 CS_DBGOUT(CS_PM, 9, printk("cs46xx: cs46xx_ac97_suspend()+\n"));
3475
3476 if(card->states[1])
3477 {
3478 stop_dac(card->states[1]);
3479 resync_dma_ptrs(card->states[1]);
3480 }
3481 if(card->states[0])
3482 {
3483 stop_adc(card->states[0]);
3484 resync_dma_ptrs(card->states[0]);
3485 }
3486
3487 for(Count = 0x2, i=0; (Count <= CS46XX_AC97_HIGHESTREGTORESTORE)
3488 && (i < CS46XX_AC97_NUMBER_RESTORE_REGS);
3489 Count += 2, i++)
3490 {
3491 card->pm.ac97[i] = cs_ac97_get(dev, BA0_AC97_RESET + Count);
3492 }
3493 /*
3494 * Save the ac97 volume registers as well as the current powerdown state.
3495 * Now, mute the all the outputs (master, headphone, and mono), as well
3496 * as the PCM volume, in preparation for powering down the entire part.
3497 card->pm.u32AC97_master_volume = (u32)cs_ac97_get( dev,
3498 (u8)BA0_AC97_MASTER_VOLUME);
3499 card->pm.u32AC97_headphone_volume = (u32)cs_ac97_get(dev,
3500 (u8)BA0_AC97_HEADPHONE_VOLUME);
3501 card->pm.u32AC97_master_volume_mono = (u32)cs_ac97_get(dev,
3502 (u8)BA0_AC97_MASTER_VOLUME_MONO);
3503 card->pm.u32AC97_pcm_out_volume = (u32)cs_ac97_get(dev,
3504 (u8)BA0_AC97_PCM_OUT_VOLUME);
3505 */
3506 /*
3507 * mute the outputs
3508 */
3509 cs_ac97_set(dev, (u8)BA0_AC97_MASTER_VOLUME, 0x8000);
3510 cs_ac97_set(dev, (u8)BA0_AC97_HEADPHONE_VOLUME, 0x8000);
3511 cs_ac97_set(dev, (u8)BA0_AC97_MASTER_VOLUME_MONO, 0x8000);
3512 cs_ac97_set(dev, (u8)BA0_AC97_PCM_OUT_VOLUME, 0x8000);
3513
3514 /*
3515 * save the registers that cause pops
3516 */
3517 card->pm.u32AC97_powerdown = (u32)cs_ac97_get(dev, (u8)AC97_POWER_CONTROL);
3518 card->pm.u32AC97_general_purpose = (u32)cs_ac97_get(dev, (u8)BA0_AC97_GENERAL_PURPOSE);
3519 /*
3520 * And power down everything on the AC97 codec.
3521 * well, for now, only power down the DAC/ADC and MIXER VREFON components.
3522 * trouble with removing VREF.
3523 */
3524 if( (tmp = cs461x_powerdown(card, CS_POWER_DAC | CS_POWER_ADC |
3525 CS_POWER_MIXVON, CS_TRUE )) )
3526 {
3527 CS_DBGOUT(CS_ERROR | CS_INIT, 1, printk(KERN_INFO
3528 "cs46xx: cs46xx_ac97_suspend() failure (0x%x)\n",tmp) );
3529 }
3530
3531 CS_DBGOUT(CS_PM, 9, printk("cs46xx: cs46xx_ac97_suspend()-\n"));
3532 }
3533
3534 /****************************************************************************
3535 *
3536 * Resume - power up the part and restore its registers..
3537 *
3538 ****************************************************************************/
3539 static void cs46xx_ac97_resume(struct cs_card *card)
3540 {
3541 int Count,i;
3542 struct ac97_codec *dev=card->ac97_codec[0];
3543
3544 CS_DBGOUT(CS_PM, 9, printk("cs46xx: cs46xx_ac97_resume()+\n"));
3545
3546 /*
3547 * First, we restore the state of the general purpose register. This
3548 * contains the mic select (mic1 or mic2) and if we restore this after
3549 * we restore the mic volume/boost state and mic2 was selected at
3550 * suspend time, we will end up with a brief period of time where mic1
3551 * is selected with the volume/boost settings for mic2, causing
3552 * acoustic feedback. So we restore the general purpose register
3553 * first, thereby getting the correct mic selected before we restore
3554 * the mic volume/boost.
3555 */
3556 cs_ac97_set(dev, (u8)BA0_AC97_GENERAL_PURPOSE,
3557 (u16)card->pm.u32AC97_general_purpose);
3558 /*
3559 * Now, while the outputs are still muted, restore the state of power
3560 * on the AC97 part.
3561 */
3562 cs_ac97_set(dev, (u8)BA0_AC97_POWERDOWN, (u16)card->pm.u32AC97_powerdown);
3563 mdelay(5 * cs_laptop_wait);
3564 /*
3565 * Restore just the first set of registers, from register number
3566 * 0x02 to the register number that ulHighestRegToRestore specifies.
3567 */
3568 for( Count = 0x2, i=0;
3569 (Count <= CS46XX_AC97_HIGHESTREGTORESTORE)
3570 && (i < CS46XX_AC97_NUMBER_RESTORE_REGS);
3571 Count += 2, i++)
3572 {
3573 cs_ac97_set(dev, (u8)(BA0_AC97_RESET + Count), (u16)card->pm.ac97[i]);
3574 }
3575
3576 /* Check if we have to init the amplifier */
3577 if(card->amp_init)
3578 card->amp_init(card);
3579
3580 CS_DBGOUT(CS_PM, 9, printk("cs46xx: cs46xx_ac97_resume()-\n"));
3581 }
3582
3583
3584 static int cs46xx_restart_part(struct cs_card *card)
3585 {
3586 struct dmabuf *dmabuf;
3587 CS_DBGOUT(CS_PM | CS_FUNCTION, 4,
3588 printk( "cs46xx: cs46xx_restart_part()+\n"));
3589 if(card->states[1])
3590 {
3591 dmabuf = &card->states[1]->dmabuf;
3592 dmabuf->ready = 0;
3593 resync_dma_ptrs(card->states[1]);
3594 cs_set_divisor(dmabuf);
3595 if(__prog_dmabuf(card->states[1]))
3596 {
3597 CS_DBGOUT(CS_PM | CS_ERROR, 1,
3598 printk("cs46xx: cs46xx_restart_part()- (-1) prog_dmabuf() dac error\n"));
3599 return -1;
3600 }
3601 cs_set_dac_rate(card->states[1], dmabuf->rate);
3602 }
3603 if(card->states[0])
3604 {
3605 dmabuf = &card->states[0]->dmabuf;
3606 dmabuf->ready = 0;
3607 resync_dma_ptrs(card->states[0]);
3608 cs_set_divisor(dmabuf);
3609 if(__prog_dmabuf(card->states[0]))
3610 {
3611 CS_DBGOUT(CS_PM | CS_ERROR, 1,
3612 printk("cs46xx: cs46xx_restart_part()- (-1) prog_dmabuf() adc error\n"));
3613 return -1;
3614 }
3615 cs_set_adc_rate(card->states[0], dmabuf->rate);
3616 }
3617 card->pm.flags |= CS46XX_PM_RESUMED;
3618 if(card->states[0])
3619 start_adc(card->states[0]);
3620 if(card->states[1])
3621 start_dac(card->states[1]);
3622
3623 card->pm.flags |= CS46XX_PM_IDLE;
3624 card->pm.flags &= ~(CS46XX_PM_SUSPENDING | CS46XX_PM_SUSPENDED
3625 | CS46XX_PM_RESUMING | CS46XX_PM_RESUMED);
3626 if(card->states[0])
3627 wake_up(&card->states[0]->dmabuf.wait);
3628 if(card->states[1])
3629 wake_up(&card->states[1]->dmabuf.wait);
3630
3631 CS_DBGOUT(CS_PM | CS_FUNCTION, 4,
3632 printk( "cs46xx: cs46xx_restart_part()-\n"));
3633 return 0;
3634 }
3635
3636
3637 static void cs461x_reset(struct cs_card *card);
3638 static void cs461x_proc_stop(struct cs_card *card);
3639 static int cs46xx_suspend(struct cs_card *card, pm_message_t state)
3640 {
3641 unsigned int tmp;
3642 CS_DBGOUT(CS_PM | CS_FUNCTION, 4,
3643 printk("cs46xx: cs46xx_suspend()+ flags=0x%x s=%p\n",
3644 (unsigned)card->pm.flags,card));
3645 /*
3646 * check the current state, only suspend if IDLE
3647 */
3648 if(!(card->pm.flags & CS46XX_PM_IDLE))
3649 {
3650 CS_DBGOUT(CS_PM | CS_ERROR, 2,
3651 printk("cs46xx: cs46xx_suspend() unable to suspend, not IDLE\n"));
3652 return 1;
3653 }
3654 card->pm.flags &= ~CS46XX_PM_IDLE;
3655 card->pm.flags |= CS46XX_PM_SUSPENDING;
3656
3657 card->active_ctrl(card,1);
3658
3659 tmp = cs461x_peek(card, BA1_PFIE);
3660 tmp &= ~0x0000f03f;
3661 tmp |= 0x00000010;
3662 cs461x_poke(card, BA1_PFIE, tmp); /* playback interrupt disable */
3663
3664 tmp = cs461x_peek(card, BA1_CIE);
3665 tmp &= ~0x0000003f;
3666 tmp |= 0x00000011;
3667 cs461x_poke(card, BA1_CIE, tmp); /* capture interrupt disable */
3668
3669 /*
3670 * Stop playback DMA.
3671 */
3672 tmp = cs461x_peek(card, BA1_PCTL);
3673 cs461x_poke(card, BA1_PCTL, tmp & 0x0000ffff);
3674
3675 /*
3676 * Stop capture DMA.
3677 */
3678 tmp = cs461x_peek(card, BA1_CCTL);
3679 cs461x_poke(card, BA1_CCTL, tmp & 0xffff0000);
3680
3681 if(card->states[1])
3682 {
3683 card->pm.dmabuf_swptr_play = card->states[1]->dmabuf.swptr;
3684 card->pm.dmabuf_count_play = card->states[1]->dmabuf.count;
3685 }
3686 if(card->states[0])
3687 {
3688 card->pm.dmabuf_swptr_capture = card->states[0]->dmabuf.swptr;
3689 card->pm.dmabuf_count_capture = card->states[0]->dmabuf.count;
3690 }
3691
3692 cs46xx_ac97_suspend(card);
3693
3694 /*
3695 * Reset the processor.
3696 */
3697 cs461x_reset(card);
3698
3699 cs461x_proc_stop(card);
3700
3701 /*
3702 * Power down the DAC and ADC. For now leave the other areas on.
3703 */
3704 cs_ac97_set(card->ac97_codec[0], AC97_POWER_CONTROL, 0x0300);
3705
3706 /*
3707 * Power down the PLL.
3708 */
3709 cs461x_pokeBA0(card, BA0_CLKCR1, 0);
3710
3711 /*
3712 * Turn off the Processor by turning off the software clock enable flag in
3713 * the clock control register.
3714 */
3715 tmp = cs461x_peekBA0(card, BA0_CLKCR1) & ~CLKCR1_SWCE;
3716 cs461x_pokeBA0(card, BA0_CLKCR1, tmp);
3717
3718 card->active_ctrl(card,-1);
3719
3720 card->pm.flags &= ~CS46XX_PM_SUSPENDING;
3721 card->pm.flags |= CS46XX_PM_SUSPENDED;
3722
3723 printpm(card);
3724
3725 CS_DBGOUT(CS_PM | CS_FUNCTION, 4,
3726 printk("cs46xx: cs46xx_suspend()- flags=0x%x\n",
3727 (unsigned)card->pm.flags));
3728 return 0;
3729 }
3730
3731 static int cs46xx_resume(struct cs_card *card)
3732 {
3733 int i;
3734
3735 CS_DBGOUT(CS_PM | CS_FUNCTION, 4,
3736 printk( "cs46xx: cs46xx_resume()+ flags=0x%x\n",
3737 (unsigned)card->pm.flags));
3738 if(!(card->pm.flags & CS46XX_PM_SUSPENDED))
3739 {
3740 CS_DBGOUT(CS_PM | CS_ERROR, 2,
3741 printk("cs46xx: cs46xx_resume() unable to resume, not SUSPENDED\n"));
3742 return 1;
3743 }
3744 card->pm.flags |= CS46XX_PM_RESUMING;
3745 card->pm.flags &= ~CS46XX_PM_SUSPENDED;
3746 printpm(card);
3747 card->active_ctrl(card, 1);
3748
3749 for(i=0;i<5;i++)
3750 {
3751 if (cs_hardware_init(card) != 0)
3752 {
3753 CS_DBGOUT(CS_PM | CS_ERROR, 4, printk(
3754 "cs46xx: cs46xx_resume()- ERROR in cs_hardware_init()\n"));
3755 mdelay(10 * cs_laptop_wait);
3756 cs461x_reset(card);
3757 continue;
3758 }
3759 break;
3760 }
3761 if(i>=4)
3762 {
3763 CS_DBGOUT(CS_PM | CS_ERROR, 1, printk(
3764 "cs46xx: cs46xx_resume()- cs_hardware_init() failed, retried %d times.\n",i));
3765 return 0;
3766 }
3767
3768 if(cs46xx_restart_part(card))
3769 {
3770 CS_DBGOUT(CS_PM | CS_ERROR, 4, printk(
3771 "cs46xx: cs46xx_resume(): cs46xx_restart_part() returned error\n"));
3772 }
3773
3774 card->active_ctrl(card, -1);
3775
3776 CS_DBGOUT(CS_PM | CS_FUNCTION, 4, printk("cs46xx: cs46xx_resume()- flags=0x%x\n",
3777 (unsigned)card->pm.flags));
3778 return 0;
3779 }
3780
3781 static /*const*/ struct file_operations cs461x_fops = {
3782 CS_OWNER CS_THIS_MODULE
3783 .llseek = no_llseek,
3784 .read = cs_read,
3785 .write = cs_write,
3786 .poll = cs_poll,
3787 .ioctl = cs_ioctl,
3788 .mmap = cs_mmap,
3789 .open = cs_open,
3790 .release = cs_release,
3791 };
3792
3793 /* Write AC97 codec registers */
3794
3795
3796 static u16 _cs_ac97_get(struct ac97_codec *dev, u8 reg)
3797 {
3798 struct cs_card *card = dev->private_data;
3799 int count,loopcnt;
3800 unsigned int tmp;
3801 u16 ret;
3802
3803 /*
3804 * 1. Write ACCAD = Command Address Register = 46Ch for AC97 register address
3805 * 2. Write ACCDA = Command Data Register = 470h for data to write to AC97
3806 * 3. Write ACCTL = Control Register = 460h for initiating the write
3807 * 4. Read ACCTL = 460h, DCV should be reset by now and 460h = 17h
3808 * 5. if DCV not cleared, break and return error
3809 * 6. Read ACSTS = Status Register = 464h, check VSTS bit
3810 */
3811
3812 cs461x_peekBA0(card, BA0_ACSDA);
3813
3814 /*
3815 * Setup the AC97 control registers on the CS461x to send the
3816 * appropriate command to the AC97 to perform the read.
3817 * ACCAD = Command Address Register = 46Ch
3818 * ACCDA = Command Data Register = 470h
3819 * ACCTL = Control Register = 460h
3820 * set DCV - will clear when process completed
3821 * set CRW - Read command
3822 * set VFRM - valid frame enabled
3823 * set ESYN - ASYNC generation enabled
3824 * set RSTN - ARST# inactive, AC97 codec not reset
3825 */
3826
3827 cs461x_pokeBA0(card, BA0_ACCAD, reg);
3828 cs461x_pokeBA0(card, BA0_ACCDA, 0);
3829 cs461x_pokeBA0(card, BA0_ACCTL, ACCTL_DCV | ACCTL_CRW |
3830 ACCTL_VFRM | ACCTL_ESYN |
3831 ACCTL_RSTN);
3832
3833
3834 /*
3835 * Wait for the read to occur.
3836 */
3837 if(!(card->pm.flags & CS46XX_PM_IDLE))
3838 loopcnt = 2000;
3839 else
3840 loopcnt = 500 * cs_laptop_wait;
3841 loopcnt *= cs_laptop_wait;
3842 for (count = 0; count < loopcnt; count++) {
3843 /*
3844 * First, we want to wait for a short time.
3845 */
3846 udelay(10 * cs_laptop_wait);
3847 /*
3848 * Now, check to see if the read has completed.
3849 * ACCTL = 460h, DCV should be reset by now and 460h = 17h
3850 */
3851 if (!(cs461x_peekBA0(card, BA0_ACCTL) & ACCTL_DCV))
3852 break;
3853 }
3854
3855 /*
3856 * Make sure the read completed.
3857 */
3858 if (cs461x_peekBA0(card, BA0_ACCTL) & ACCTL_DCV) {
3859 CS_DBGOUT(CS_ERROR, 1, printk(KERN_WARNING
3860 "cs46xx: AC'97 read problem (ACCTL_DCV), reg = 0x%x returning 0xffff\n", reg));
3861 return 0xffff;
3862 }
3863
3864 /*
3865 * Wait for the valid status bit to go active.
3866 */
3867
3868 if(!(card->pm.flags & CS46XX_PM_IDLE))
3869 loopcnt = 2000;
3870 else
3871 loopcnt = 1000;
3872 loopcnt *= cs_laptop_wait;
3873 for (count = 0; count < loopcnt; count++) {
3874 /*
3875 * Read the AC97 status register.
3876 * ACSTS = Status Register = 464h
3877 * VSTS - Valid Status
3878 */
3879 if (cs461x_peekBA0(card, BA0_ACSTS) & ACSTS_VSTS)
3880 break;
3881 udelay(10 * cs_laptop_wait);
3882 }
3883
3884 /*
3885 * Make sure we got valid status.
3886 */
3887 if (!( (tmp=cs461x_peekBA0(card, BA0_ACSTS)) & ACSTS_VSTS)) {
3888 CS_DBGOUT(CS_ERROR, 2, printk(KERN_WARNING
3889 "cs46xx: AC'97 read problem (ACSTS_VSTS), reg = 0x%x val=0x%x 0xffff \n",
3890 reg, tmp));
3891 return 0xffff;
3892 }
3893
3894 /*
3895 * Read the data returned from the AC97 register.
3896 * ACSDA = Status Data Register = 474h
3897 */
3898 CS_DBGOUT(CS_FUNCTION, 9, printk(KERN_INFO
3899 "cs46xx: cs_ac97_get() reg = 0x%x, val = 0x%x, BA0_ACCAD = 0x%x\n",
3900 reg, cs461x_peekBA0(card, BA0_ACSDA),
3901 cs461x_peekBA0(card, BA0_ACCAD)));
3902 ret = cs461x_peekBA0(card, BA0_ACSDA);
3903 return ret;
3904 }
3905
3906 static u16 cs_ac97_get(struct ac97_codec *dev, u8 reg)
3907 {
3908 u16 ret;
3909 struct cs_card *card = dev->private_data;
3910
3911 spin_lock(&card->ac97_lock);
3912 ret = _cs_ac97_get(dev, reg);
3913 spin_unlock(&card->ac97_lock);
3914 return ret;
3915 }
3916
3917 static void cs_ac97_set(struct ac97_codec *dev, u8 reg, u16 val)
3918 {
3919 struct cs_card *card = dev->private_data;
3920 int count;
3921 int val2 = 0;
3922
3923 spin_lock(&card->ac97_lock);
3924
3925 if(reg == AC97_CD_VOL)
3926 {
3927 val2 = _cs_ac97_get(dev, AC97_CD_VOL);
3928 }
3929
3930
3931 /*
3932 * 1. Write ACCAD = Command Address Register = 46Ch for AC97 register address
3933 * 2. Write ACCDA = Command Data Register = 470h for data to write to AC97
3934 * 3. Write ACCTL = Control Register = 460h for initiating the write
3935 * 4. Read ACCTL = 460h, DCV should be reset by now and 460h = 07h
3936 * 5. if DCV not cleared, break and return error
3937 */
3938
3939 /*
3940 * Setup the AC97 control registers on the CS461x to send the
3941 * appropriate command to the AC97 to perform the read.
3942 * ACCAD = Command Address Register = 46Ch
3943 * ACCDA = Command Data Register = 470h
3944 * ACCTL = Control Register = 460h
3945 * set DCV - will clear when process completed
3946 * reset CRW - Write command
3947 * set VFRM - valid frame enabled
3948 * set ESYN - ASYNC generation enabled
3949 * set RSTN - ARST# inactive, AC97 codec not reset
3950 */
3951 cs461x_pokeBA0(card, BA0_ACCAD, reg);
3952 cs461x_pokeBA0(card, BA0_ACCDA, val);
3953 cs461x_peekBA0(card, BA0_ACCTL);
3954 cs461x_pokeBA0(card, BA0_ACCTL, 0 | ACCTL_VFRM | ACCTL_ESYN | ACCTL_RSTN);
3955 cs461x_pokeBA0(card, BA0_ACCTL, ACCTL_DCV | ACCTL_VFRM |
3956 ACCTL_ESYN | ACCTL_RSTN);
3957 for (count = 0; count < 1000; count++) {
3958 /*
3959 * First, we want to wait for a short time.
3960 */
3961 udelay(10 * cs_laptop_wait);
3962 /*
3963 * Now, check to see if the write has completed.
3964 * ACCTL = 460h, DCV should be reset by now and 460h = 07h
3965 */
3966 if (!(cs461x_peekBA0(card, BA0_ACCTL) & ACCTL_DCV))
3967 break;
3968 }
3969 /*
3970 * Make sure the write completed.
3971 */
3972 if (cs461x_peekBA0(card, BA0_ACCTL) & ACCTL_DCV)
3973 {
3974 CS_DBGOUT(CS_ERROR, 1, printk(KERN_WARNING
3975 "cs46xx: AC'97 write problem, reg = 0x%x, val = 0x%x\n", reg, val));
3976 }
3977
3978 spin_unlock(&card->ac97_lock);
3979
3980 /*
3981 * Adjust power if the mixer is selected/deselected according
3982 * to the CD.
3983 *
3984 * IF the CD is a valid input source (mixer or direct) AND
3985 * the CD is not muted THEN power is needed
3986 *
3987 * We do two things. When record select changes the input to
3988 * add/remove the CD we adjust the power count if the CD is
3989 * unmuted.
3990 *
3991 * When the CD mute changes we adjust the power level if the
3992 * CD was a valid input.
3993 *
3994 * We also check for CD volume != 0, as the CD mute isn't
3995 * normally tweaked from userspace.
3996 */
3997
3998 /* CD mute change ? */
3999
4000 if(reg==AC97_CD_VOL)
4001 {
4002 /* Mute bit change ? */
4003 if((val2^val)&0x8000 || ((val2 == 0x1f1f || val == 0x1f1f) && val2 != val))
4004 {
4005 /* This is a hack but its cleaner than the alternatives.
4006 Right now card->ac97_codec[0] might be NULL as we are
4007 still doing codec setup. This does an early assignment
4008 to avoid the problem if it occurs */
4009
4010 if(card->ac97_codec[0]==NULL)
4011 card->ac97_codec[0]=dev;
4012
4013 /* Mute on */
4014 if(val&0x8000 || val == 0x1f1f)
4015 card->amplifier_ctrl(card, -1);
4016 else /* Mute off power on */
4017 {
4018 if(card->amp_init)
4019 card->amp_init(card);
4020 card->amplifier_ctrl(card, 1);
4021 }
4022 }
4023 }
4024 }
4025
4026
4027 /* OSS /dev/mixer file operation methods */
4028
4029 static int cs_open_mixdev(struct inode *inode, struct file *file)
4030 {
4031 int i=0;
4032 unsigned int minor = iminor(inode);
4033 struct cs_card *card=NULL;
4034 struct list_head *entry;
4035 unsigned int tmp;
4036
4037 CS_DBGOUT(CS_FUNCTION | CS_OPEN, 4,
4038 printk(KERN_INFO "cs46xx: cs_open_mixdev()+\n"));
4039
4040 list_for_each(entry, &cs46xx_devs)
4041 {
4042 card = list_entry(entry, struct cs_card, list);
4043 for (i = 0; i < NR_AC97; i++)
4044 if (card->ac97_codec[i] != NULL &&
4045 card->ac97_codec[i]->dev_mixer == minor)
4046 goto match;
4047 }
4048 if (!card)
4049 {
4050 CS_DBGOUT(CS_FUNCTION | CS_OPEN | CS_ERROR, 2,
4051 printk(KERN_INFO "cs46xx: cs46xx_open_mixdev()- -ENODEV\n"));
4052 return -ENODEV;
4053 }
4054 match:
4055 if(!card->ac97_codec[i])
4056 return -ENODEV;
4057 file->private_data = card->ac97_codec[i];
4058
4059 card->active_ctrl(card,1);
4060 if(!CS_IN_USE(&card->mixer_use_cnt))
4061 {
4062 if( (tmp = cs46xx_powerup(card, CS_POWER_MIXVON )) )
4063 {
4064 CS_DBGOUT(CS_ERROR | CS_INIT, 1, printk(KERN_INFO
4065 "cs46xx: cs_open_mixdev() powerup failure (0x%x)\n",tmp) );
4066 return -EIO;
4067 }
4068 }
4069 card->amplifier_ctrl(card, 1);
4070 CS_INC_USE_COUNT(&card->mixer_use_cnt);
4071 CS_DBGOUT(CS_FUNCTION | CS_OPEN, 4,
4072 printk(KERN_INFO "cs46xx: cs_open_mixdev()- 0\n"));
4073 return nonseekable_open(inode, file);
4074 }
4075
4076 static int cs_release_mixdev(struct inode *inode, struct file *file)
4077 {
4078 unsigned int minor = iminor(inode);
4079 struct cs_card *card=NULL;
4080 struct list_head *entry;
4081 int i;
4082 unsigned int tmp;
4083
4084 CS_DBGOUT(CS_FUNCTION | CS_RELEASE, 4,
4085 printk(KERN_INFO "cs46xx: cs_release_mixdev()+\n"));
4086 list_for_each(entry, &cs46xx_devs)
4087 {
4088 card = list_entry(entry, struct cs_card, list);
4089 for (i = 0; i < NR_AC97; i++)
4090 if (card->ac97_codec[i] != NULL &&
4091 card->ac97_codec[i]->dev_mixer == minor)
4092 goto match;
4093 }
4094 if (!card)
4095 {
4096 CS_DBGOUT(CS_FUNCTION | CS_OPEN | CS_ERROR, 2,
4097 printk(KERN_INFO "cs46xx: cs46xx_open_mixdev()- -ENODEV\n"));
4098 return -ENODEV;
4099 }
4100 match:
4101 if(!CS_DEC_AND_TEST(&card->mixer_use_cnt))
4102 {
4103 CS_DBGOUT(CS_FUNCTION | CS_RELEASE, 4,
4104 printk(KERN_INFO "cs46xx: cs_release_mixdev()- no powerdown, usecnt>0\n"));
4105 card->active_ctrl(card, -1);
4106 card->amplifier_ctrl(card, -1);
4107 return 0;
4108 }
4109 /*
4110 * ok, no outstanding mixer opens, so powerdown.
4111 */
4112 if( (tmp = cs461x_powerdown(card, CS_POWER_MIXVON, CS_FALSE )) )
4113 {
4114 CS_DBGOUT(CS_ERROR | CS_INIT, 1, printk(KERN_INFO
4115 "cs46xx: cs_release_mixdev() powerdown MIXVON failure (0x%x)\n",tmp) );
4116 card->active_ctrl(card, -1);
4117 card->amplifier_ctrl(card, -1);
4118 return -EIO;
4119 }
4120 card->active_ctrl(card, -1);
4121 card->amplifier_ctrl(card, -1);
4122 CS_DBGOUT(CS_FUNCTION | CS_RELEASE, 4,
4123 printk(KERN_INFO "cs46xx: cs_release_mixdev()- 0\n"));
4124 return 0;
4125 }
4126
4127 static int cs_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd,
4128 unsigned long arg)
4129 {
4130 struct ac97_codec *codec = (struct ac97_codec *)file->private_data;
4131 struct cs_card *card=NULL;
4132 struct list_head *entry;
4133 unsigned long __user *p = (long __user *)arg;
4134
4135 #if CSDEBUG_INTERFACE
4136 int val;
4137
4138 if( (cmd == SOUND_MIXER_CS_GETDBGMASK) ||
4139 (cmd == SOUND_MIXER_CS_SETDBGMASK) ||
4140 (cmd == SOUND_MIXER_CS_GETDBGLEVEL) ||
4141 (cmd == SOUND_MIXER_CS_SETDBGLEVEL) ||
4142 (cmd == SOUND_MIXER_CS_APM))
4143 {
4144 switch(cmd)
4145 {
4146
4147 case SOUND_MIXER_CS_GETDBGMASK:
4148 return put_user(cs_debugmask, p);
4149
4150 case SOUND_MIXER_CS_GETDBGLEVEL:
4151 return put_user(cs_debuglevel, p);
4152
4153 case SOUND_MIXER_CS_SETDBGMASK:
4154 if (get_user(val, p))
4155 return -EFAULT;
4156 cs_debugmask = val;
4157 return 0;
4158
4159 case SOUND_MIXER_CS_SETDBGLEVEL:
4160 if (get_user(val, p))
4161 return -EFAULT;
4162 cs_debuglevel = val;
4163 return 0;
4164
4165 case SOUND_MIXER_CS_APM:
4166 if (get_user(val, p))
4167 return -EFAULT;
4168 if(val == CS_IOCTL_CMD_SUSPEND)
4169 {
4170 list_for_each(entry, &cs46xx_devs)
4171 {
4172 card = list_entry(entry, struct cs_card, list);
4173 cs46xx_suspend(card, PMSG_ON);
4174 }
4175
4176 }
4177 else if(val == CS_IOCTL_CMD_RESUME)
4178 {
4179 list_for_each(entry, &cs46xx_devs)
4180 {
4181 card = list_entry(entry, struct cs_card, list);
4182 cs46xx_resume(card);
4183 }
4184 }
4185 else
4186 {
4187 CS_DBGOUT(CS_ERROR, 1, printk(KERN_INFO
4188 "cs46xx: mixer_ioctl(): invalid APM cmd (%d)\n",
4189 val));
4190 }
4191 return 0;
4192
4193 default:
4194 CS_DBGOUT(CS_ERROR, 1, printk(KERN_INFO
4195 "cs46xx: mixer_ioctl(): ERROR unknown debug cmd\n") );
4196 return 0;
4197 }
4198 }
4199 #endif
4200 return codec->mixer_ioctl(codec, cmd, arg);
4201 }
4202
4203 static /*const*/ struct file_operations cs_mixer_fops = {
4204 CS_OWNER CS_THIS_MODULE
4205 .llseek = no_llseek,
4206 .ioctl = cs_ioctl_mixdev,
4207 .open = cs_open_mixdev,
4208 .release = cs_release_mixdev,
4209 };
4210
4211 /* AC97 codec initialisation. */
4212 static int __init cs_ac97_init(struct cs_card *card)
4213 {
4214 int num_ac97 = 0;
4215 int ready_2nd = 0;
4216 struct ac97_codec *codec;
4217 u16 eid;
4218
4219 CS_DBGOUT(CS_FUNCTION | CS_INIT, 2, printk(KERN_INFO
4220 "cs46xx: cs_ac97_init()+\n") );
4221
4222 for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) {
4223 if ((codec = ac97_alloc_codec()) == NULL)
4224 return -ENOMEM;
4225
4226 /* initialize some basic codec information, other fields will be filled
4227 in ac97_probe_codec */
4228 codec->private_data = card;
4229 codec->id = num_ac97;
4230
4231 codec->codec_read = cs_ac97_get;
4232 codec->codec_write = cs_ac97_set;
4233
4234 if (ac97_probe_codec(codec) == 0)
4235 {
4236 CS_DBGOUT(CS_FUNCTION | CS_INIT, 2, printk(KERN_INFO
4237 "cs46xx: cs_ac97_init()- codec number %d not found\n",
4238 num_ac97) );
4239 card->ac97_codec[num_ac97] = NULL;
4240 break;
4241 }
4242 CS_DBGOUT(CS_FUNCTION | CS_INIT, 2, printk(KERN_INFO
4243 "cs46xx: cs_ac97_init() found codec %d\n",num_ac97) );
4244
4245 eid = cs_ac97_get(codec, AC97_EXTENDED_ID);
4246
4247 if(eid==0xFFFF)
4248 {
4249 printk(KERN_WARNING "cs46xx: codec %d not present\n",num_ac97);
4250 ac97_release_codec(codec);
4251 break;
4252 }
4253
4254 card->ac97_features = eid;
4255
4256 if ((codec->dev_mixer = register_sound_mixer(&cs_mixer_fops, -1)) < 0) {
4257 printk(KERN_ERR "cs46xx: couldn't register mixer!\n");
4258 ac97_release_codec(codec);
4259 break;
4260 }
4261 card->ac97_codec[num_ac97] = codec;
4262
4263 CS_DBGOUT(CS_FUNCTION | CS_INIT, 2, printk(KERN_INFO
4264 "cs46xx: cs_ac97_init() ac97_codec[%d] set to %p\n",
4265 (unsigned int)num_ac97,
4266 codec));
4267 /* if there is no secondary codec at all, don't probe any more */
4268 if (!ready_2nd)
4269 {
4270 num_ac97 += 1;
4271 break;
4272 }
4273 }
4274 CS_DBGOUT(CS_FUNCTION | CS_INIT, 2, printk(KERN_INFO
4275 "cs46xx: cs_ac97_init()- %d\n", (unsigned int)num_ac97));
4276 return num_ac97;
4277 }
4278
4279 /*
4280 * load the static image into the DSP
4281 */
4282 #include "cs461x_image.h"
4283 static void cs461x_download_image(struct cs_card *card)
4284 {
4285 unsigned i, j, temp1, temp2, offset, count;
4286 unsigned char __iomem *pBA1 = ioremap(card->ba1_addr, 0x40000);
4287 for( i=0; i < CLEAR__COUNT; i++)
4288 {
4289 offset = ClrStat[i].BA1__DestByteOffset;
4290 count = ClrStat[i].BA1__SourceSize;
4291 for( temp1 = offset; temp1<(offset+count); temp1+=4 )
4292 writel(0, pBA1+temp1);
4293 }
4294
4295 for(i=0; i<FILL__COUNT; i++)
4296 {
4297 temp2 = FillStat[i].Offset;
4298 for(j=0; j<(FillStat[i].Size)/4; j++)
4299 {
4300 temp1 = (FillStat[i]).pFill[j];
4301 writel(temp1, pBA1+temp2+j*4);
4302 }
4303 }
4304 iounmap(pBA1);
4305 }
4306
4307
4308 /*
4309 * Chip reset
4310 */
4311
4312 static void cs461x_reset(struct cs_card *card)
4313 {
4314 int idx;
4315
4316 /*
4317 * Write the reset bit of the SP control register.
4318 */
4319 cs461x_poke(card, BA1_SPCR, SPCR_RSTSP);
4320
4321 /*
4322 * Write the control register.
4323 */
4324 cs461x_poke(card, BA1_SPCR, SPCR_DRQEN);
4325
4326 /*
4327 * Clear the trap registers.
4328 */
4329 for (idx = 0; idx < 8; idx++) {
4330 cs461x_poke(card, BA1_DREG, DREG_REGID_TRAP_SELECT + idx);
4331 cs461x_poke(card, BA1_TWPR, 0xFFFF);
4332 }
4333 cs461x_poke(card, BA1_DREG, 0);
4334
4335 /*
4336 * Set the frame timer to reflect the number of cycles per frame.
4337 */
4338 cs461x_poke(card, BA1_FRMT, 0xadf);
4339 }
4340
4341 static void cs461x_clear_serial_FIFOs(struct cs_card *card, int type)
4342 {
4343 int idx, loop, startfifo=0, endfifo=0, powerdown1 = 0;
4344 unsigned int tmp;
4345
4346 /*
4347 * See if the devices are powered down. If so, we must power them up first
4348 * or they will not respond.
4349 */
4350 if (!((tmp = cs461x_peekBA0(card, BA0_CLKCR1)) & CLKCR1_SWCE)) {
4351 cs461x_pokeBA0(card, BA0_CLKCR1, tmp | CLKCR1_SWCE);
4352 powerdown1 = 1;
4353 }
4354
4355 /*
4356 * We want to clear out the serial port FIFOs so we don't end up playing
4357 * whatever random garbage happens to be in them. We fill the sample FIFOS
4358 * with zero (silence).
4359 */
4360 cs461x_pokeBA0(card, BA0_SERBWP, 0);
4361
4362 /*
4363 * Check for which FIFO locations to clear, if we are currently
4364 * playing or capturing then we don't want to put in 128 bytes of
4365 * "noise".
4366 */
4367 if(type & CS_TYPE_DAC)
4368 {
4369 startfifo = 128;
4370 endfifo = 256;
4371 }
4372 if(type & CS_TYPE_ADC)
4373 {
4374 startfifo = 0;
4375 if(!endfifo)
4376 endfifo = 128;
4377 }
4378 /*
4379 * Fill sample FIFO locations (256 locations total).
4380 */
4381 for (idx = startfifo; idx < endfifo; idx++) {
4382 /*
4383 * Make sure the previous FIFO write operation has completed.
4384 */
4385 for (loop = 0; loop < 5; loop++) {
4386 udelay(50);
4387 if (!(cs461x_peekBA0(card, BA0_SERBST) & SERBST_WBSY))
4388 break;
4389 }
4390 if (cs461x_peekBA0(card, BA0_SERBST) & SERBST_WBSY) {
4391 if (powerdown1)
4392 cs461x_pokeBA0(card, BA0_CLKCR1, tmp);
4393 }
4394 /*
4395 * Write the serial port FIFO index.
4396 */
4397 cs461x_pokeBA0(card, BA0_SERBAD, idx);
4398 /*
4399 * Tell the serial port to load the new value into the FIFO location.
4400 */
4401 cs461x_pokeBA0(card, BA0_SERBCM, SERBCM_WRC);
4402 }
4403 /*
4404 * Now, if we powered up the devices, then power them back down again.
4405 * This is kinda ugly, but should never happen.
4406 */
4407 if (powerdown1)
4408 cs461x_pokeBA0(card, BA0_CLKCR1, tmp);
4409 }
4410
4411
4412 static int cs461x_powerdown(struct cs_card *card, unsigned int type, int suspendflag)
4413 {
4414 int count;
4415 unsigned int tmp=0,muted=0;
4416
4417 CS_DBGOUT(CS_FUNCTION, 4, printk(KERN_INFO
4418 "cs46xx: cs461x_powerdown()+ type=0x%x\n",type));
4419 if(!cs_powerdown && !suspendflag)
4420 {
4421 CS_DBGOUT(CS_FUNCTION, 8, printk(KERN_INFO
4422 "cs46xx: cs461x_powerdown() DISABLED exiting\n"));
4423 return 0;
4424 }
4425 tmp = cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL);
4426 CS_DBGOUT(CS_FUNCTION, 8, printk(KERN_INFO
4427 "cs46xx: cs461x_powerdown() powerdown reg=0x%x\n",tmp));
4428 /*
4429 * if powering down only the VREF, and not powering down the DAC/ADC,
4430 * then do not power down the VREF, UNLESS both the DAC and ADC are not
4431 * currently powered down. If powering down DAC and ADC, then
4432 * it is possible to power down the VREF (ON).
4433 */
4434 if ( ((type & CS_POWER_MIXVON) &&
4435 (!(type & CS_POWER_ADC) || (!(type & CS_POWER_DAC))) )
4436 &&
4437 ((tmp & CS_AC97_POWER_CONTROL_ADC_ON) ||
4438 (tmp & CS_AC97_POWER_CONTROL_DAC_ON) ) )
4439 {
4440 CS_DBGOUT(CS_FUNCTION, 8, printk(KERN_INFO
4441 "cs46xx: cs461x_powerdown()- 0 unable to powerdown. tmp=0x%x\n",tmp));
4442 return 0;
4443 }
4444 /*
4445 * for now, always keep power to the mixer block.
4446 * not sure why it's a problem but it seems to be if we power off.
4447 */
4448 type &= ~CS_POWER_MIXVON;
4449 type &= ~CS_POWER_MIXVOFF;
4450
4451 /*
4452 * Power down indicated areas.
4453 */
4454 if(type & CS_POWER_MIXVOFF)
4455 {
4456
4457 CS_DBGOUT(CS_FUNCTION, 4,
4458 printk(KERN_INFO "cs46xx: cs461x_powerdown()+ MIXVOFF\n"));
4459 /*
4460 * Power down the MIXER (VREF ON) on the AC97 card.
4461 */
4462 tmp = cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL);
4463 if (tmp & CS_AC97_POWER_CONTROL_MIXVOFF_ON)
4464 {
4465 if(!muted)
4466 {
4467 cs_mute(card, CS_TRUE);
4468 muted=1;
4469 }
4470 tmp |= CS_AC97_POWER_CONTROL_MIXVOFF;
4471 cs_ac97_set(card->ac97_codec[0], AC97_POWER_CONTROL, tmp );
4472 /*
4473 * Now, we wait until we sample a ready state.
4474 */
4475 for (count = 0; count < 32; count++) {
4476 /*
4477 * First, lets wait a short while to let things settle out a
4478 * bit, and to prevent retrying the read too quickly.
4479 */
4480 udelay(500);
4481
4482 /*
4483 * Read the current state of the power control register.
4484 */
4485 if (!(cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) &
4486 CS_AC97_POWER_CONTROL_MIXVOFF_ON))
4487 break;
4488 }
4489
4490 /*
4491 * Check the status..
4492 */
4493 if (cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) &
4494 CS_AC97_POWER_CONTROL_MIXVOFF_ON)
4495 {
4496 CS_DBGOUT(CS_ERROR, 1, printk(KERN_WARNING
4497 "cs46xx: powerdown MIXVOFF failed\n"));
4498 return 1;
4499 }
4500 }
4501 }
4502 if(type & CS_POWER_MIXVON)
4503 {
4504
4505 CS_DBGOUT(CS_FUNCTION, 4,
4506 printk(KERN_INFO "cs46xx: cs461x_powerdown()+ MIXVON\n"));
4507 /*
4508 * Power down the MIXER (VREF ON) on the AC97 card.
4509 */
4510 tmp = cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL);
4511 if (tmp & CS_AC97_POWER_CONTROL_MIXVON_ON)
4512 {
4513 if(!muted)
4514 {
4515 cs_mute(card, CS_TRUE);
4516 muted=1;
4517 }
4518 tmp |= CS_AC97_POWER_CONTROL_MIXVON;
4519 cs_ac97_set(card->ac97_codec[0], AC97_POWER_CONTROL, tmp );
4520 /*
4521 * Now, we wait until we sample a ready state.
4522 */
4523 for (count = 0; count < 32; count++) {
4524 /*
4525 * First, lets wait a short while to let things settle out a
4526 * bit, and to prevent retrying the read too quickly.
4527 */
4528 udelay(500);
4529
4530 /*
4531 * Read the current state of the power control register.
4532 */
4533 if (!(cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) &
4534 CS_AC97_POWER_CONTROL_MIXVON_ON))
4535 break;
4536 }
4537
4538 /*
4539 * Check the status..
4540 */
4541 if (cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) &
4542 CS_AC97_POWER_CONTROL_MIXVON_ON)
4543 {
4544 CS_DBGOUT(CS_ERROR, 1, printk(KERN_WARNING
4545 "cs46xx: powerdown MIXVON failed\n"));
4546 return 1;
4547 }
4548 }
4549 }
4550 if(type & CS_POWER_ADC)
4551 {
4552 /*
4553 * Power down the ADC on the AC97 card.
4554 */
4555 CS_DBGOUT(CS_FUNCTION, 4, printk(KERN_INFO "cs46xx: cs461x_powerdown()+ ADC\n"));
4556 tmp = cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL);
4557 if (tmp & CS_AC97_POWER_CONTROL_ADC_ON)
4558 {
4559 if(!muted)
4560 {
4561 cs_mute(card, CS_TRUE);
4562 muted=1;
4563 }
4564 tmp |= CS_AC97_POWER_CONTROL_ADC;
4565 cs_ac97_set(card->ac97_codec[0], AC97_POWER_CONTROL, tmp );
4566
4567 /*
4568 * Now, we wait until we sample a ready state.
4569 */
4570 for (count = 0; count < 32; count++) {
4571 /*
4572 * First, lets wait a short while to let things settle out a
4573 * bit, and to prevent retrying the read too quickly.
4574 */
4575 udelay(500);
4576
4577 /*
4578 * Read the current state of the power control register.
4579 */
4580 if (!(cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) &
4581 CS_AC97_POWER_CONTROL_ADC_ON))
4582 break;
4583 }
4584
4585 /*
4586 * Check the status..
4587 */
4588 if (cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) &
4589 CS_AC97_POWER_CONTROL_ADC_ON)
4590 {
4591 CS_DBGOUT(CS_ERROR, 1, printk(KERN_WARNING
4592 "cs46xx: powerdown ADC failed\n"));
4593 return 1;
4594 }
4595 }
4596 }
4597 if(type & CS_POWER_DAC)
4598 {
4599 /*
4600 * Power down the DAC on the AC97 card.
4601 */
4602
4603 CS_DBGOUT(CS_FUNCTION, 4,
4604 printk(KERN_INFO "cs46xx: cs461x_powerdown()+ DAC\n"));
4605 tmp = cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL);
4606 if (tmp & CS_AC97_POWER_CONTROL_DAC_ON)
4607 {
4608 if(!muted)
4609 {
4610 cs_mute(card, CS_TRUE);
4611 muted=1;
4612 }
4613 tmp |= CS_AC97_POWER_CONTROL_DAC;
4614 cs_ac97_set(card->ac97_codec[0], AC97_POWER_CONTROL, tmp );
4615 /*
4616 * Now, we wait until we sample a ready state.
4617 */
4618 for (count = 0; count < 32; count++) {
4619 /*
4620 * First, lets wait a short while to let things settle out a
4621 * bit, and to prevent retrying the read too quickly.
4622 */
4623 udelay(500);
4624
4625 /*
4626 * Read the current state of the power control register.
4627 */
4628 if (!(cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) &
4629 CS_AC97_POWER_CONTROL_DAC_ON))
4630 break;
4631 }
4632
4633 /*
4634 * Check the status..
4635 */
4636 if (cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) &
4637 CS_AC97_POWER_CONTROL_DAC_ON)
4638 {
4639 CS_DBGOUT(CS_ERROR, 1, printk(KERN_WARNING
4640 "cs46xx: powerdown DAC failed\n"));
4641 return 1;
4642 }
4643 }
4644 }
4645 tmp = cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL);
4646 if(muted)
4647 cs_mute(card, CS_FALSE);
4648 CS_DBGOUT(CS_FUNCTION, 4, printk(KERN_INFO
4649 "cs46xx: cs461x_powerdown()- 0 tmp=0x%x\n",tmp));
4650 return 0;
4651 }
4652
4653 static int cs46xx_powerup(struct cs_card *card, unsigned int type)
4654 {
4655 int count;
4656 unsigned int tmp=0,muted=0;
4657
4658 CS_DBGOUT(CS_FUNCTION, 8, printk(KERN_INFO
4659 "cs46xx: cs46xx_powerup()+ type=0x%x\n",type));
4660 /*
4661 * check for VREF and powerup if need to.
4662 */
4663 if(type & CS_POWER_MIXVON)
4664 type |= CS_POWER_MIXVOFF;
4665 if(type & (CS_POWER_DAC | CS_POWER_ADC))
4666 type |= CS_POWER_MIXVON | CS_POWER_MIXVOFF;
4667
4668 /*
4669 * Power up indicated areas.
4670 */
4671 if(type & CS_POWER_MIXVOFF)
4672 {
4673
4674 CS_DBGOUT(CS_FUNCTION, 4,
4675 printk(KERN_INFO "cs46xx: cs46xx_powerup()+ MIXVOFF\n"));
4676 /*
4677 * Power up the MIXER (VREF ON) on the AC97 card.
4678 */
4679 tmp = cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL);
4680 if (!(tmp & CS_AC97_POWER_CONTROL_MIXVOFF_ON))
4681 {
4682 if(!muted)
4683 {
4684 cs_mute(card, CS_TRUE);
4685 muted=1;
4686 }
4687 tmp &= ~CS_AC97_POWER_CONTROL_MIXVOFF;
4688 cs_ac97_set(card->ac97_codec[0], AC97_POWER_CONTROL, tmp );
4689 /*
4690 * Now, we wait until we sample a ready state.
4691 */
4692 for (count = 0; count < 32; count++) {
4693 /*
4694 * First, lets wait a short while to let things settle out a
4695 * bit, and to prevent retrying the read too quickly.
4696 */
4697 udelay(500);
4698
4699 /*
4700 * Read the current state of the power control register.
4701 */
4702 if (cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) &
4703 CS_AC97_POWER_CONTROL_MIXVOFF_ON)
4704 break;
4705 }
4706
4707 /*
4708 * Check the status..
4709 */
4710 if (!(cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) &
4711 CS_AC97_POWER_CONTROL_MIXVOFF_ON))
4712 {
4713 CS_DBGOUT(CS_ERROR, 1, printk(KERN_WARNING
4714 "cs46xx: powerup MIXVOFF failed\n"));
4715 return 1;
4716 }
4717 }
4718 }
4719 if(type & CS_POWER_MIXVON)
4720 {
4721
4722 CS_DBGOUT(CS_FUNCTION, 4,
4723 printk(KERN_INFO "cs46xx: cs46xx_powerup()+ MIXVON\n"));
4724 /*
4725 * Power up the MIXER (VREF ON) on the AC97 card.
4726 */
4727 tmp = cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL);
4728 if (!(tmp & CS_AC97_POWER_CONTROL_MIXVON_ON))
4729 {
4730 if(!muted)
4731 {
4732 cs_mute(card, CS_TRUE);
4733 muted=1;
4734 }
4735 tmp &= ~CS_AC97_POWER_CONTROL_MIXVON;
4736 cs_ac97_set(card->ac97_codec[0], AC97_POWER_CONTROL, tmp );
4737 /*
4738 * Now, we wait until we sample a ready state.
4739 */
4740 for (count = 0; count < 32; count++) {
4741 /*
4742 * First, lets wait a short while to let things settle out a
4743 * bit, and to prevent retrying the read too quickly.
4744 */
4745 udelay(500);
4746
4747 /*
4748 * Read the current state of the power control register.
4749 */
4750 if (cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) &
4751 CS_AC97_POWER_CONTROL_MIXVON_ON)
4752 break;
4753 }
4754
4755 /*
4756 * Check the status..
4757 */
4758 if (!(cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) &
4759 CS_AC97_POWER_CONTROL_MIXVON_ON))
4760 {
4761 CS_DBGOUT(CS_ERROR, 1, printk(KERN_WARNING
4762 "cs46xx: powerup MIXVON failed\n"));
4763 return 1;
4764 }
4765 }
4766 }
4767 if(type & CS_POWER_ADC)
4768 {
4769 /*
4770 * Power up the ADC on the AC97 card.
4771 */
4772 CS_DBGOUT(CS_FUNCTION, 4, printk(KERN_INFO "cs46xx: cs46xx_powerup()+ ADC\n"));
4773 tmp = cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL);
4774 if (!(tmp & CS_AC97_POWER_CONTROL_ADC_ON))
4775 {
4776 if(!muted)
4777 {
4778 cs_mute(card, CS_TRUE);
4779 muted=1;
4780 }
4781 tmp &= ~CS_AC97_POWER_CONTROL_ADC;
4782 cs_ac97_set(card->ac97_codec[0], AC97_POWER_CONTROL, tmp );
4783
4784 /*
4785 * Now, we wait until we sample a ready state.
4786 */
4787 for (count = 0; count < 32; count++) {
4788 /*
4789 * First, lets wait a short while to let things settle out a
4790 * bit, and to prevent retrying the read too quickly.
4791 */
4792 udelay(500);
4793
4794 /*
4795 * Read the current state of the power control register.
4796 */
4797 if (cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) &
4798 CS_AC97_POWER_CONTROL_ADC_ON)
4799 break;
4800 }
4801
4802 /*
4803 * Check the status..
4804 */
4805 if (!(cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) &
4806 CS_AC97_POWER_CONTROL_ADC_ON))
4807 {
4808 CS_DBGOUT(CS_ERROR, 1, printk(KERN_WARNING
4809 "cs46xx: powerup ADC failed\n"));
4810 return 1;
4811 }
4812 }
4813 }
4814 if(type & CS_POWER_DAC)
4815 {
4816 /*
4817 * Power up the DAC on the AC97 card.
4818 */
4819
4820 CS_DBGOUT(CS_FUNCTION, 4,
4821 printk(KERN_INFO "cs46xx: cs46xx_powerup()+ DAC\n"));
4822 tmp = cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL);
4823 if (!(tmp & CS_AC97_POWER_CONTROL_DAC_ON))
4824 {
4825 if(!muted)
4826 {
4827 cs_mute(card, CS_TRUE);
4828 muted=1;
4829 }
4830 tmp &= ~CS_AC97_POWER_CONTROL_DAC;
4831 cs_ac97_set(card->ac97_codec[0], AC97_POWER_CONTROL, tmp );
4832 /*
4833 * Now, we wait until we sample a ready state.
4834 */
4835 for (count = 0; count < 32; count++) {
4836 /*
4837 * First, lets wait a short while to let things settle out a
4838 * bit, and to prevent retrying the read too quickly.
4839 */
4840 udelay(500);
4841
4842 /*
4843 * Read the current state of the power control register.
4844 */
4845 if (cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) &
4846 CS_AC97_POWER_CONTROL_DAC_ON)
4847 break;
4848 }
4849
4850 /*
4851 * Check the status..
4852 */
4853 if (!(cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL) &
4854 CS_AC97_POWER_CONTROL_DAC_ON))
4855 {
4856 CS_DBGOUT(CS_ERROR, 1, printk(KERN_WARNING
4857 "cs46xx: powerup DAC failed\n"));
4858 return 1;
4859 }
4860 }
4861 }
4862 tmp = cs_ac97_get(card->ac97_codec[0], AC97_POWER_CONTROL);
4863 if(muted)
4864 cs_mute(card, CS_FALSE);
4865 CS_DBGOUT(CS_FUNCTION, 4, printk(KERN_INFO
4866 "cs46xx: cs46xx_powerup()- 0 tmp=0x%x\n",tmp));
4867 return 0;
4868 }
4869
4870
4871 static void cs461x_proc_start(struct cs_card *card)
4872 {
4873 int cnt;
4874
4875 /*
4876 * Set the frame timer to reflect the number of cycles per frame.
4877 */
4878 cs461x_poke(card, BA1_FRMT, 0xadf);
4879 /*
4880 * Turn on the run, run at frame, and DMA enable bits in the local copy of
4881 * the SP control register.
4882 */
4883 cs461x_poke(card, BA1_SPCR, SPCR_RUN | SPCR_RUNFR | SPCR_DRQEN);
4884 /*
4885 * Wait until the run at frame bit resets itself in the SP control
4886 * register.
4887 */
4888 for (cnt = 0; cnt < 25; cnt++) {
4889 udelay(50);
4890 if (!(cs461x_peek(card, BA1_SPCR) & SPCR_RUNFR))
4891 break;
4892 }
4893
4894 if (cs461x_peek(card, BA1_SPCR) & SPCR_RUNFR)
4895 printk(KERN_WARNING "cs46xx: SPCR_RUNFR never reset\n");
4896 }
4897
4898 static void cs461x_proc_stop(struct cs_card *card)
4899 {
4900 /*
4901 * Turn off the run, run at frame, and DMA enable bits in the local copy of
4902 * the SP control register.
4903 */
4904 cs461x_poke(card, BA1_SPCR, 0);
4905 }
4906
4907 static int cs_hardware_init(struct cs_card *card)
4908 {
4909 unsigned long end_time;
4910 unsigned int tmp,count;
4911
4912 CS_DBGOUT(CS_FUNCTION | CS_INIT, 2, printk(KERN_INFO
4913 "cs46xx: cs_hardware_init()+\n") );
4914 /*
4915 * First, blast the clock control register to zero so that the PLL starts
4916 * out in a known state, and blast the master serial port control register
4917 * to zero so that the serial ports also start out in a known state.
4918 */
4919 cs461x_pokeBA0(card, BA0_CLKCR1, 0);
4920 cs461x_pokeBA0(card, BA0_SERMC1, 0);
4921
4922 /*
4923 * If we are in AC97 mode, then we must set the part to a host controlled
4924 * AC-link. Otherwise, we won't be able to bring up the link.
4925 */
4926 cs461x_pokeBA0(card, BA0_SERACC, SERACC_HSP | SERACC_CODEC_TYPE_1_03); /* 1.03 card */
4927 /* cs461x_pokeBA0(card, BA0_SERACC, SERACC_HSP | SERACC_CODEC_TYPE_2_0); */ /* 2.00 card */
4928
4929 /*
4930 * Drive the ARST# pin low for a minimum of 1uS (as defined in the AC97
4931 * spec) and then drive it high. This is done for non AC97 modes since
4932 * there might be logic external to the CS461x that uses the ARST# line
4933 * for a reset.
4934 */
4935 cs461x_pokeBA0(card, BA0_ACCTL, 1);
4936 udelay(50);
4937 cs461x_pokeBA0(card, BA0_ACCTL, 0);
4938 udelay(50);
4939 cs461x_pokeBA0(card, BA0_ACCTL, ACCTL_RSTN);
4940
4941 /*
4942 * The first thing we do here is to enable sync generation. As soon
4943 * as we start receiving bit clock, we'll start producing the SYNC
4944 * signal.
4945 */
4946 cs461x_pokeBA0(card, BA0_ACCTL, ACCTL_ESYN | ACCTL_RSTN);
4947
4948 /*
4949 * Now wait for a short while to allow the AC97 part to start
4950 * generating bit clock (so we don't try to start the PLL without an
4951 * input clock).
4952 */
4953 mdelay(5 * cs_laptop_wait); /* 1 should be enough ?? (and pigs might fly) */
4954
4955 /*
4956 * Set the serial port timing configuration, so that
4957 * the clock control circuit gets its clock from the correct place.
4958 */
4959 cs461x_pokeBA0(card, BA0_SERMC1, SERMC1_PTC_AC97);
4960
4961 /*
4962 * The part seems to not be ready for a while after a resume.
4963 * so, if we are resuming, then wait for 700 mils. Note that 600 mils
4964 * is not enough for some platforms! tested on an IBM Thinkpads and
4965 * reference cards.
4966 */
4967 if(!(card->pm.flags & CS46XX_PM_IDLE))
4968 mdelay(initdelay);
4969 /*
4970 * Write the selected clock control setup to the hardware. Do not turn on
4971 * SWCE yet (if requested), so that the devices clocked by the output of
4972 * PLL are not clocked until the PLL is stable.
4973 */
4974 cs461x_pokeBA0(card, BA0_PLLCC, PLLCC_LPF_1050_2780_KHZ | PLLCC_CDR_73_104_MHZ);
4975 cs461x_pokeBA0(card, BA0_PLLM, 0x3a);
4976 cs461x_pokeBA0(card, BA0_CLKCR2, CLKCR2_PDIVS_8);
4977
4978 /*
4979 * Power up the PLL.
4980 */
4981 cs461x_pokeBA0(card, BA0_CLKCR1, CLKCR1_PLLP);
4982
4983 /*
4984 * Wait until the PLL has stabilized.
4985 */
4986 mdelay(5 * cs_laptop_wait); /* Again 1 should be enough ?? */
4987
4988 /*
4989 * Turn on clocking of the core so that we can setup the serial ports.
4990 */
4991 tmp = cs461x_peekBA0(card, BA0_CLKCR1) | CLKCR1_SWCE;
4992 cs461x_pokeBA0(card, BA0_CLKCR1, tmp);
4993
4994 /*
4995 * Fill the serial port FIFOs with silence.
4996 */
4997 cs461x_clear_serial_FIFOs(card,CS_TYPE_DAC | CS_TYPE_ADC);
4998
4999 /*
5000 * Set the serial port FIFO pointer to the first sample in the FIFO.
5001 */
5002 /* cs461x_pokeBA0(card, BA0_SERBSP, 0); */
5003
5004 /*
5005 * Write the serial port configuration to the part. The master
5006 * enable bit is not set until all other values have been written.
5007 */
5008 cs461x_pokeBA0(card, BA0_SERC1, SERC1_SO1F_AC97 | SERC1_SO1EN);
5009 cs461x_pokeBA0(card, BA0_SERC2, SERC2_SI1F_AC97 | SERC1_SO1EN);
5010 cs461x_pokeBA0(card, BA0_SERMC1, SERMC1_PTC_AC97 | SERMC1_MSPE);
5011
5012
5013 mdelay(5 * cs_laptop_wait); /* Shouldnt be needed ?? */
5014
5015 /*
5016 * If we are resuming under 2.2.x then we can not schedule a timeout.
5017 * so, just spin the CPU.
5018 */
5019 if(card->pm.flags & CS46XX_PM_IDLE)
5020 {
5021 /*
5022 * Wait for the card ready signal from the AC97 card.
5023 */
5024 end_time = jiffies + 3 * (HZ >> 2);
5025 do {
5026 /*
5027 * Read the AC97 status register to see if we've seen a CODEC READY
5028 * signal from the AC97 card.
5029 */
5030 if (cs461x_peekBA0(card, BA0_ACSTS) & ACSTS_CRDY)
5031 break;
5032 current->state = TASK_UNINTERRUPTIBLE;
5033 schedule_timeout(1);
5034 } while (time_before(jiffies, end_time));
5035 }
5036 else
5037 {
5038 for (count = 0; count < 100; count++) {
5039 // First, we want to wait for a short time.
5040 udelay(25 * cs_laptop_wait);
5041
5042 if (cs461x_peekBA0(card, BA0_ACSTS) & ACSTS_CRDY)
5043 break;
5044 }
5045 }
5046
5047 /*
5048 * Make sure CODEC is READY.
5049 */
5050 if (!(cs461x_peekBA0(card, BA0_ACSTS) & ACSTS_CRDY)) {
5051 CS_DBGOUT(CS_ERROR | CS_INIT, 1, printk(KERN_WARNING
5052 "cs46xx: create - never read card ready from AC'97\n"));
5053 CS_DBGOUT(CS_ERROR | CS_INIT, 1, printk(KERN_WARNING
5054 "cs46xx: probably not a bug, try using the CS4232 driver,\n"));
5055 CS_DBGOUT(CS_ERROR | CS_INIT, 1, printk(KERN_WARNING
5056 "cs46xx: or turn off any automatic Power Management support in the BIOS.\n"));
5057 return -EIO;
5058 }
5059
5060 /*
5061 * Assert the vaid frame signal so that we can start sending commands
5062 * to the AC97 card.
5063 */
5064 cs461x_pokeBA0(card, BA0_ACCTL, ACCTL_VFRM | ACCTL_ESYN | ACCTL_RSTN);
5065
5066 if(card->pm.flags & CS46XX_PM_IDLE)
5067 {
5068 /*
5069 * Wait until we've sampled input slots 3 and 4 as valid, meaning that
5070 * the card is pumping ADC data across the AC-link.
5071 */
5072 end_time = jiffies + 3 * (HZ >> 2);
5073 do {
5074 /*
5075 * Read the input slot valid register and see if input slots 3 and
5076 * 4 are valid yet.
5077 */
5078 if ((cs461x_peekBA0(card, BA0_ACISV) & (ACISV_ISV3 | ACISV_ISV4)) == (ACISV_ISV3 | ACISV_ISV4))
5079 break;
5080 current->state = TASK_UNINTERRUPTIBLE;
5081 schedule_timeout(1);
5082 } while (time_before(jiffies, end_time));
5083 }
5084 else
5085 {
5086 for (count = 0; count < 100; count++) {
5087 // First, we want to wait for a short time.
5088 udelay(25 * cs_laptop_wait);
5089
5090 if ((cs461x_peekBA0(card, BA0_ACISV) & (ACISV_ISV3 | ACISV_ISV4)) == (ACISV_ISV3 | ACISV_ISV4))
5091 break;
5092 }
5093 }
5094 /*
5095 * Make sure input slots 3 and 4 are valid. If not, then return
5096 * an error.
5097 */
5098 if ((cs461x_peekBA0(card, BA0_ACISV) & (ACISV_ISV3 | ACISV_ISV4)) != (ACISV_ISV3 | ACISV_ISV4)) {
5099 printk(KERN_WARNING "cs46xx: create - never read ISV3 & ISV4 from AC'97\n");
5100 return -EIO;
5101 }
5102
5103 /*
5104 * Now, assert valid frame and the slot 3 and 4 valid bits. This will
5105 * commense the transfer of digital audio data to the AC97 card.
5106 */
5107 cs461x_pokeBA0(card, BA0_ACOSV, ACOSV_SLV3 | ACOSV_SLV4);
5108
5109 /*
5110 * Turn off the Processor by turning off the software clock enable flag in
5111 * the clock control register.
5112 */
5113 /* tmp = cs461x_peekBA0(card, BA0_CLKCR1) & ~CLKCR1_SWCE; */
5114 /* cs461x_pokeBA0(card, BA0_CLKCR1, tmp); */
5115
5116 /*
5117 * Reset the processor.
5118 */
5119 cs461x_reset(card);
5120
5121 /*
5122 * Download the image to the processor.
5123 */
5124
5125 cs461x_download_image(card);
5126
5127 /*
5128 * Stop playback DMA.
5129 */
5130 tmp = cs461x_peek(card, BA1_PCTL);
5131 card->pctl = tmp & 0xffff0000;
5132 cs461x_poke(card, BA1_PCTL, tmp & 0x0000ffff);
5133
5134 /*
5135 * Stop capture DMA.
5136 */
5137 tmp = cs461x_peek(card, BA1_CCTL);
5138 card->cctl = tmp & 0x0000ffff;
5139 cs461x_poke(card, BA1_CCTL, tmp & 0xffff0000);
5140
5141 /* initialize AC97 codec and register /dev/mixer */
5142 if(card->pm.flags & CS46XX_PM_IDLE)
5143 {
5144 if (cs_ac97_init(card) <= 0)
5145 {
5146 CS_DBGOUT(CS_ERROR | CS_INIT, 1, printk(KERN_INFO
5147 "cs46xx: cs_ac97_init() failure\n") );
5148 return -EIO;
5149 }
5150 }
5151 else
5152 {
5153 cs46xx_ac97_resume(card);
5154 }
5155
5156 cs461x_proc_start(card);
5157
5158 /*
5159 * Enable interrupts on the part.
5160 */
5161 cs461x_pokeBA0(card, BA0_HICR, HICR_IEV | HICR_CHGM);
5162
5163 tmp = cs461x_peek(card, BA1_PFIE);
5164 tmp &= ~0x0000f03f;
5165 cs461x_poke(card, BA1_PFIE, tmp); /* playback interrupt enable */
5166
5167 tmp = cs461x_peek(card, BA1_CIE);
5168 tmp &= ~0x0000003f;
5169 tmp |= 0x00000001;
5170 cs461x_poke(card, BA1_CIE, tmp); /* capture interrupt enable */
5171
5172 /*
5173 * If IDLE then Power down the part. We will power components up
5174 * when we need them.
5175 */
5176 if(card->pm.flags & CS46XX_PM_IDLE)
5177 {
5178 if(!cs_powerdown)
5179 {
5180 if( (tmp = cs46xx_powerup(card, CS_POWER_DAC | CS_POWER_ADC |
5181 CS_POWER_MIXVON )) )
5182 {
5183 CS_DBGOUT(CS_ERROR | CS_INIT, 1, printk(KERN_INFO
5184 "cs46xx: cs461x_powerup() failure (0x%x)\n",tmp) );
5185 return -EIO;
5186 }
5187 }
5188 else
5189 {
5190 if( (tmp = cs461x_powerdown(card, CS_POWER_DAC | CS_POWER_ADC |
5191 CS_POWER_MIXVON, CS_FALSE )) )
5192 {
5193 CS_DBGOUT(CS_ERROR | CS_INIT, 1, printk(KERN_INFO
5194 "cs46xx: cs461x_powerdown() failure (0x%x)\n",tmp) );
5195 return -EIO;
5196 }
5197 }
5198 }
5199 CS_DBGOUT(CS_FUNCTION | CS_INIT, 2, printk(KERN_INFO
5200 "cs46xx: cs_hardware_init()- 0\n"));
5201 return 0;
5202 }
5203
5204 /* install the driver, we do not allocate hardware channel nor DMA buffer now, they are defered
5205 until "ACCESS" time (in prog_dmabuf called by open/read/write/ioctl/mmap) */
5206
5207 /*
5208 * Card subid table
5209 */
5210
5211 struct cs_card_type
5212 {
5213 u16 vendor;
5214 u16 id;
5215 char *name;
5216 void (*amp)(struct cs_card *, int);
5217 void (*amp_init)(struct cs_card *);
5218 void (*active)(struct cs_card *, int);
5219 };
5220
5221 static struct cs_card_type cards[] = {
5222 {
5223 .vendor = 0x1489,
5224 .id = 0x7001,
5225 .name = "Genius Soundmaker 128 value",
5226 .amp = amp_none,
5227 },
5228 {
5229 .vendor = 0x5053,
5230 .id = 0x3357,
5231 .name = "Voyetra",
5232 .amp = amp_voyetra,
5233 },
5234 {
5235 .vendor = 0x1071,
5236 .id = 0x6003,
5237 .name = "Mitac MI6020/21",
5238 .amp = amp_voyetra,
5239 },
5240 {
5241 .vendor = 0x14AF,
5242 .id = 0x0050,
5243 .name = "Hercules Game Theatre XP",
5244 .amp = amp_hercules,
5245 },
5246 {
5247 .vendor = 0x1681,
5248 .id = 0x0050,
5249 .name = "Hercules Game Theatre XP",
5250 .amp = amp_hercules,
5251 },
5252 {
5253 .vendor = 0x1681,
5254 .id = 0x0051,
5255 .name = "Hercules Game Theatre XP",
5256 .amp = amp_hercules,
5257 },
5258 {
5259 .vendor = 0x1681,
5260 .id = 0x0052,
5261 .name = "Hercules Game Theatre XP",
5262 .amp = amp_hercules,
5263 },
5264 {
5265 .vendor = 0x1681,
5266 .id = 0x0053,
5267 .name = "Hercules Game Theatre XP",
5268 .amp = amp_hercules,
5269 },
5270 {
5271 .vendor = 0x1681,
5272 .id = 0x0054,
5273 .name = "Hercules Game Theatre XP",
5274 .amp = amp_hercules,
5275 },
5276 {
5277 .vendor = 0x1681,
5278 .id = 0xa010,
5279 .name = "Hercules Fortissimo II",
5280 .amp = amp_none,
5281 },
5282 /* Not sure if the 570 needs the clkrun hack */
5283 {
5284 .vendor = PCI_VENDOR_ID_IBM,
5285 .id = 0x0132,
5286 .name = "Thinkpad 570",
5287 .amp = amp_none,
5288 .active = clkrun_hack,
5289 },
5290 {
5291 .vendor = PCI_VENDOR_ID_IBM,
5292 .id = 0x0153,
5293 .name = "Thinkpad 600X/A20/T20",
5294 .amp = amp_none,
5295 .active = clkrun_hack,
5296 },
5297 {
5298 .vendor = PCI_VENDOR_ID_IBM,
5299 .id = 0x1010,
5300 .name = "Thinkpad 600E (unsupported)",
5301 },
5302 {
5303 .name = "Card without SSID set",
5304 },
5305 { 0, },
5306 };
5307
5308 MODULE_AUTHOR("Alan Cox <alan@redhat.com>, Jaroslav Kysela, <pcaudio@crystal.cirrus.com>");
5309 MODULE_DESCRIPTION("Crystal SoundFusion Audio Support");
5310 MODULE_LICENSE("GPL");
5311
5312
5313 static const char cs46xx_banner[] = KERN_INFO "Crystal 4280/46xx + AC97 Audio, version " CS46XX_MAJOR_VERSION "." CS46XX_MINOR_VERSION "." CS46XX_ARCH ", " __TIME__ " " __DATE__ "\n";
5314 static const char fndmsg[] = KERN_INFO "cs46xx: Found %d audio device(s).\n";
5315
5316 static int __devinit cs46xx_probe(struct pci_dev *pci_dev,
5317 const struct pci_device_id *pciid)
5318 {
5319 int i,j;
5320 u16 ss_card, ss_vendor;
5321 struct cs_card *card;
5322 dma_addr_t dma_mask;
5323 struct cs_card_type *cp = &cards[0];
5324
5325 CS_DBGOUT(CS_FUNCTION | CS_INIT, 2,
5326 printk(KERN_INFO "cs46xx: probe()+\n"));
5327
5328 dma_mask = 0xffffffff; /* this enables playback and recording */
5329 if (pci_enable_device(pci_dev)) {
5330 CS_DBGOUT(CS_INIT | CS_ERROR, 1, printk(KERN_ERR
5331 "cs46xx: pci_enable_device() failed\n"));
5332 return -1;
5333 }
5334 if (!RSRCISMEMORYREGION(pci_dev, 0) ||
5335 !RSRCISMEMORYREGION(pci_dev, 1)) {
5336 CS_DBGOUT(CS_ERROR, 1, printk(KERN_ERR
5337 "cs46xx: probe()- Memory region not assigned\n"));
5338 return -1;
5339 }
5340 if (pci_dev->irq == 0) {
5341 CS_DBGOUT(CS_ERROR, 1, printk(KERN_ERR
5342 "cs46xx: probe() IRQ not assigned\n"));
5343 return -1;
5344 }
5345 if (!pci_dma_supported(pci_dev, 0xffffffff)) {
5346 CS_DBGOUT(CS_ERROR, 1, printk(KERN_ERR
5347 "cs46xx: probe() architecture does not support 32bit PCI busmaster DMA\n"));
5348 return -1;
5349 }
5350 pci_read_config_word(pci_dev, PCI_SUBSYSTEM_VENDOR_ID, &ss_vendor);
5351 pci_read_config_word(pci_dev, PCI_SUBSYSTEM_ID, &ss_card);
5352
5353 if ((card = kmalloc(sizeof(struct cs_card), GFP_KERNEL)) == NULL) {
5354 printk(KERN_ERR "cs46xx: out of memory\n");
5355 return -ENOMEM;
5356 }
5357 memset(card, 0, sizeof(*card));
5358 card->ba0_addr = RSRCADDRESS(pci_dev, 0);
5359 card->ba1_addr = RSRCADDRESS(pci_dev, 1);
5360 card->pci_dev = pci_dev;
5361 card->irq = pci_dev->irq;
5362 card->magic = CS_CARD_MAGIC;
5363 spin_lock_init(&card->lock);
5364 spin_lock_init(&card->ac97_lock);
5365
5366 pci_set_master(pci_dev);
5367
5368 printk(cs46xx_banner);
5369 printk(KERN_INFO "cs46xx: Card found at 0x%08lx and 0x%08lx, IRQ %d\n",
5370 card->ba0_addr, card->ba1_addr, card->irq);
5371
5372 card->alloc_pcm_channel = cs_alloc_pcm_channel;
5373 card->alloc_rec_pcm_channel = cs_alloc_rec_pcm_channel;
5374 card->free_pcm_channel = cs_free_pcm_channel;
5375 card->amplifier_ctrl = amp_none;
5376 card->active_ctrl = amp_none;
5377
5378 while (cp->name)
5379 {
5380 if(cp->vendor == ss_vendor && cp->id == ss_card)
5381 {
5382 card->amplifier_ctrl = cp->amp;
5383 if(cp->active)
5384 card->active_ctrl = cp->active;
5385 if(cp->amp_init)
5386 card->amp_init = cp->amp_init;
5387 break;
5388 }
5389 cp++;
5390 }
5391 if (cp->name==NULL)
5392 {
5393 printk(KERN_INFO "cs46xx: Unknown card (%04X:%04X) at 0x%08lx/0x%08lx, IRQ %d\n",
5394 ss_vendor, ss_card, card->ba0_addr, card->ba1_addr, card->irq);
5395 }
5396 else
5397 {
5398 printk(KERN_INFO "cs46xx: %s (%04X:%04X) at 0x%08lx/0x%08lx, IRQ %d\n",
5399 cp->name, ss_vendor, ss_card, card->ba0_addr, card->ba1_addr, card->irq);
5400 }
5401
5402 if (card->amplifier_ctrl==NULL)
5403 {
5404 card->amplifier_ctrl = amp_none;
5405 card->active_ctrl = clkrun_hack;
5406 }
5407
5408 if (external_amp == 1)
5409 {
5410 printk(KERN_INFO "cs46xx: Crystal EAPD support forced on.\n");
5411 card->amplifier_ctrl = amp_voyetra;
5412 }
5413
5414 if (thinkpad == 1)
5415 {
5416 printk(KERN_INFO "cs46xx: Activating CLKRUN hack for Thinkpad.\n");
5417 card->active_ctrl = clkrun_hack;
5418 }
5419 /*
5420 * The thinkpads don't work well without runtime updating on their kernel
5421 * delay values (or any laptop with variable CPU speeds really).
5422 * so, just to be safe set the init delay to 2100. Eliminates
5423 * failures on T21 Thinkpads. remove this code when the udelay
5424 * and mdelay kernel code is replaced by a pm timer, or the delays
5425 * work well for battery and/or AC power both.
5426 */
5427 if(card->active_ctrl == clkrun_hack)
5428 {
5429 initdelay = 2100;
5430 cs_laptop_wait = 5;
5431 }
5432 if((card->active_ctrl == clkrun_hack) && !(powerdown == 1))
5433 {
5434 /*
5435 * for some currently unknown reason, powering down the DAC and ADC component
5436 * blocks on thinkpads causes some funky behavior... distoorrrtion and ac97
5437 * codec access problems. probably the serial clock becomes unsynced.
5438 * added code to sync the chips back up, but only helped about 70% the time.
5439 */
5440 cs_powerdown = 0;
5441 }
5442 if(powerdown == 0)
5443 cs_powerdown = 0;
5444 card->active_ctrl(card, 1);
5445
5446 /* claim our iospace and irq */
5447
5448 card->ba0 = ioremap_nocache(card->ba0_addr, CS461X_BA0_SIZE);
5449 card->ba1.name.data0 = ioremap_nocache(card->ba1_addr + BA1_SP_DMEM0, CS461X_BA1_DATA0_SIZE);
5450 card->ba1.name.data1 = ioremap_nocache(card->ba1_addr + BA1_SP_DMEM1, CS461X_BA1_DATA1_SIZE);
5451 card->ba1.name.pmem = ioremap_nocache(card->ba1_addr + BA1_SP_PMEM, CS461X_BA1_PRG_SIZE);
5452 card->ba1.name.reg = ioremap_nocache(card->ba1_addr + BA1_SP_REG, CS461X_BA1_REG_SIZE);
5453
5454 CS_DBGOUT(CS_INIT, 4, printk(KERN_INFO
5455 "cs46xx: card=%p card->ba0=%p\n",card,card->ba0) );
5456 CS_DBGOUT(CS_INIT, 4, printk(KERN_INFO
5457 "cs46xx: card->ba1=%p %p %p %p\n",
5458 card->ba1.name.data0,
5459 card->ba1.name.data1,
5460 card->ba1.name.pmem,
5461 card->ba1.name.reg) );
5462
5463 if(card->ba0 == 0 || card->ba1.name.data0 == 0 ||
5464 card->ba1.name.data1 == 0 || card->ba1.name.pmem == 0 ||
5465 card->ba1.name.reg == 0)
5466 goto fail2;
5467
5468 if (request_irq(card->irq, &cs_interrupt, SA_SHIRQ, "cs46xx", card)) {
5469 printk(KERN_ERR "cs46xx: unable to allocate irq %d\n", card->irq);
5470 goto fail2;
5471 }
5472 /* register /dev/dsp */
5473 if ((card->dev_audio = register_sound_dsp(&cs461x_fops, -1)) < 0) {
5474 printk(KERN_ERR "cs46xx: unable to register dsp\n");
5475 goto fail;
5476 }
5477
5478 /* register /dev/midi */
5479 if((card->dev_midi = register_sound_midi(&cs_midi_fops, -1)) < 0)
5480 printk(KERN_ERR "cs46xx: unable to register midi\n");
5481
5482 card->pm.flags |= CS46XX_PM_IDLE;
5483 for(i=0;i<5;i++)
5484 {
5485 if (cs_hardware_init(card) != 0)
5486 {
5487 CS_DBGOUT(CS_ERROR, 4, printk(
5488 "cs46xx: ERROR in cs_hardware_init()... retrying\n"));
5489 for (j = 0; j < NR_AC97; j++)
5490 if (card->ac97_codec[j] != NULL) {
5491 unregister_sound_mixer(card->ac97_codec[j]->dev_mixer);
5492 ac97_release_codec(card->ac97_codec[j]);
5493 }
5494 mdelay(10 * cs_laptop_wait);
5495 continue;
5496 }
5497 break;
5498 }
5499 if(i>=4)
5500 {
5501 CS_DBGOUT(CS_PM | CS_ERROR, 1, printk(
5502 "cs46xx: cs46xx_probe()- cs_hardware_init() failed, retried %d times.\n",i));
5503 unregister_sound_dsp(card->dev_audio);
5504 if(card->dev_midi)
5505 unregister_sound_midi(card->dev_midi);
5506 goto fail;
5507 }
5508
5509 init_waitqueue_head(&card->midi.open_wait);
5510 init_MUTEX(&card->midi.open_sem);
5511 init_waitqueue_head(&card->midi.iwait);
5512 init_waitqueue_head(&card->midi.owait);
5513 cs461x_pokeBA0(card, BA0_MIDCR, MIDCR_MRST);
5514 cs461x_pokeBA0(card, BA0_MIDCR, 0);
5515
5516 /*
5517 * Check if we have to init the amplifier, but probably already done
5518 * since the CD logic in the ac97 init code will turn on the ext amp.
5519 */
5520 if(cp->amp_init)
5521 cp->amp_init(card);
5522 card->active_ctrl(card, -1);
5523
5524 PCI_SET_DRIVER_DATA(pci_dev, card);
5525 PCI_SET_DMA_MASK(pci_dev, dma_mask);
5526 list_add(&card->list, &cs46xx_devs);
5527
5528 CS_DBGOUT(CS_PM, 9, printk(KERN_INFO "cs46xx: pm.flags=0x%x card=%p\n",
5529 (unsigned)card->pm.flags,card));
5530
5531 CS_DBGOUT(CS_INIT | CS_FUNCTION, 2, printk(KERN_INFO
5532 "cs46xx: probe()- device allocated successfully\n"));
5533 return 0;
5534
5535 fail:
5536 free_irq(card->irq, card);
5537 fail2:
5538 if(card->ba0)
5539 iounmap(card->ba0);
5540 if(card->ba1.name.data0)
5541 iounmap(card->ba1.name.data0);
5542 if(card->ba1.name.data1)
5543 iounmap(card->ba1.name.data1);
5544 if(card->ba1.name.pmem)
5545 iounmap(card->ba1.name.pmem);
5546 if(card->ba1.name.reg)
5547 iounmap(card->ba1.name.reg);
5548 kfree(card);
5549 CS_DBGOUT(CS_INIT | CS_ERROR, 1, printk(KERN_INFO
5550 "cs46xx: probe()- no device allocated\n"));
5551 return -ENODEV;
5552 } // probe_cs46xx
5553
5554 // ---------------------------------------------------------------------
5555
5556 static void __devexit cs46xx_remove(struct pci_dev *pci_dev)
5557 {
5558 struct cs_card *card = PCI_GET_DRIVER_DATA(pci_dev);
5559 int i;
5560 unsigned int tmp;
5561
5562 CS_DBGOUT(CS_INIT | CS_FUNCTION, 2, printk(KERN_INFO
5563 "cs46xx: cs46xx_remove()+\n"));
5564
5565 card->active_ctrl(card,1);
5566
5567 tmp = cs461x_peek(card, BA1_PFIE);
5568 tmp &= ~0x0000f03f;
5569 tmp |= 0x00000010;
5570 cs461x_poke(card, BA1_PFIE, tmp); /* playback interrupt disable */
5571
5572 tmp = cs461x_peek(card, BA1_CIE);
5573 tmp &= ~0x0000003f;
5574 tmp |= 0x00000011;
5575 cs461x_poke(card, BA1_CIE, tmp); /* capture interrupt disable */
5576
5577 /*
5578 * Stop playback DMA.
5579 */
5580 tmp = cs461x_peek(card, BA1_PCTL);
5581 cs461x_poke(card, BA1_PCTL, tmp & 0x0000ffff);
5582
5583 /*
5584 * Stop capture DMA.
5585 */
5586 tmp = cs461x_peek(card, BA1_CCTL);
5587 cs461x_poke(card, BA1_CCTL, tmp & 0xffff0000);
5588
5589 /*
5590 * Reset the processor.
5591 */
5592 cs461x_reset(card);
5593
5594 cs461x_proc_stop(card);
5595
5596 /*
5597 * Power down the DAC and ADC. We will power them up (if) when we need
5598 * them.
5599 */
5600 if( (tmp = cs461x_powerdown(card, CS_POWER_DAC | CS_POWER_ADC |
5601 CS_POWER_MIXVON, CS_TRUE )) )
5602 {
5603 CS_DBGOUT(CS_ERROR | CS_INIT, 1, printk(KERN_INFO
5604 "cs46xx: cs461x_powerdown() failure (0x%x)\n",tmp) );
5605 }
5606
5607 /*
5608 * Power down the PLL.
5609 */
5610 cs461x_pokeBA0(card, BA0_CLKCR1, 0);
5611
5612 /*
5613 * Turn off the Processor by turning off the software clock enable flag in
5614 * the clock control register.
5615 */
5616 tmp = cs461x_peekBA0(card, BA0_CLKCR1) & ~CLKCR1_SWCE;
5617 cs461x_pokeBA0(card, BA0_CLKCR1, tmp);
5618
5619 card->active_ctrl(card,-1);
5620
5621 /* free hardware resources */
5622 free_irq(card->irq, card);
5623 iounmap(card->ba0);
5624 iounmap(card->ba1.name.data0);
5625 iounmap(card->ba1.name.data1);
5626 iounmap(card->ba1.name.pmem);
5627 iounmap(card->ba1.name.reg);
5628
5629 /* unregister audio devices */
5630 for (i = 0; i < NR_AC97; i++)
5631 if (card->ac97_codec[i] != NULL) {
5632 unregister_sound_mixer(card->ac97_codec[i]->dev_mixer);
5633 ac97_release_codec(card->ac97_codec[i]);
5634 }
5635 unregister_sound_dsp(card->dev_audio);
5636 if(card->dev_midi)
5637 unregister_sound_midi(card->dev_midi);
5638 list_del(&card->list);
5639 kfree(card);
5640 PCI_SET_DRIVER_DATA(pci_dev,NULL);
5641
5642 CS_DBGOUT(CS_INIT | CS_FUNCTION, 2, printk(KERN_INFO
5643 "cs46xx: cs46xx_remove()-: remove successful\n"));
5644 }
5645
5646 enum {
5647 CS46XX_4610 = 0,
5648 CS46XX_4612, /* same as 4630 */
5649 CS46XX_4615, /* same as 4624 */
5650 };
5651
5652 static struct pci_device_id cs46xx_pci_tbl[] = {
5653 {
5654 .vendor = PCI_VENDOR_ID_CIRRUS,
5655 .device = PCI_DEVICE_ID_CIRRUS_4610,
5656 .subvendor = PCI_ANY_ID,
5657 .subdevice = PCI_ANY_ID,
5658 .driver_data = CS46XX_4610,
5659 },
5660 {
5661 .vendor = PCI_VENDOR_ID_CIRRUS,
5662 .device = PCI_DEVICE_ID_CIRRUS_4612,
5663 .subvendor = PCI_ANY_ID,
5664 .subdevice = PCI_ANY_ID,
5665 .driver_data = CS46XX_4612,
5666 },
5667 {
5668 .vendor = PCI_VENDOR_ID_CIRRUS,
5669 .device = PCI_DEVICE_ID_CIRRUS_4615,
5670 .subvendor = PCI_ANY_ID,
5671 .subdevice = PCI_ANY_ID,
5672 .driver_data = CS46XX_4615,
5673 },
5674 { 0, },
5675 };
5676
5677 MODULE_DEVICE_TABLE(pci, cs46xx_pci_tbl);
5678
5679 static struct pci_driver cs46xx_pci_driver = {
5680 .name = "cs46xx",
5681 .id_table = cs46xx_pci_tbl,
5682 .probe = cs46xx_probe,
5683 .remove = __devexit_p(cs46xx_remove),
5684 .suspend = CS46XX_SUSPEND_TBL,
5685 .resume = CS46XX_RESUME_TBL,
5686 };
5687
5688 static int __init cs46xx_init_module(void)
5689 {
5690 int rtn = 0;
5691 CS_DBGOUT(CS_INIT | CS_FUNCTION, 2, printk(KERN_INFO
5692 "cs46xx: cs46xx_init_module()+ \n"));
5693 rtn = pci_register_driver(&cs46xx_pci_driver);
5694
5695 if(rtn == -ENODEV)
5696 {
5697 CS_DBGOUT(CS_ERROR | CS_INIT, 1, printk(
5698 "cs46xx: Unable to detect valid cs46xx device\n"));
5699 }
5700
5701 CS_DBGOUT(CS_INIT | CS_FUNCTION, 2,
5702 printk(KERN_INFO "cs46xx: cs46xx_init_module()- (%d)\n",rtn));
5703 return rtn;
5704 }
5705
5706 static void __exit cs46xx_cleanup_module(void)
5707 {
5708 pci_unregister_driver(&cs46xx_pci_driver);
5709 CS_DBGOUT(CS_INIT | CS_FUNCTION, 2,
5710 printk(KERN_INFO "cs46xx: cleanup_cs46xx() finished\n"));
5711 }
5712
5713 module_init(cs46xx_init_module);
5714 module_exit(cs46xx_cleanup_module);
5715
5716 #if CS46XX_ACPI_SUPPORT
5717 static int cs46xx_suspend_tbl(struct pci_dev *pcidev, pm_message_t state)
5718 {
5719 struct cs_card *s = PCI_GET_DRIVER_DATA(pcidev);
5720 CS_DBGOUT(CS_PM | CS_FUNCTION, 2,
5721 printk(KERN_INFO "cs46xx: cs46xx_suspend_tbl request\n"));
5722 cs46xx_suspend(s, state);
5723 return 0;
5724 }
5725
5726 static int cs46xx_resume_tbl(struct pci_dev *pcidev)
5727 {
5728 struct cs_card *s = PCI_GET_DRIVER_DATA(pcidev);
5729 CS_DBGOUT(CS_PM | CS_FUNCTION, 2,
5730 printk(KERN_INFO "cs46xx: cs46xx_resume_tbl request\n"));
5731 cs46xx_resume(s);
5732 return 0;
5733 }
5734 #endif
Support for the Chinese Samsung S3C2440 based development boards