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[CPUFREQ] Fix the p4-clockmod N60 errata workaround.
[linux-2.6/mini2440.git] / drivers / serial / serial_txx9.c
blobee98a867bc6dabd5604763fb7c0c26518bdb57bf
1 /*
2 * drivers/serial/serial_txx9.c
3 *
4 * Derived from many drivers using generic_serial interface,
5 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
6 * (was in Linux/VR tree) by Jim Pick.
7 *
8 * Copyright (C) 1999 Harald Koerfgen
9 * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
10 * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
11 * Copyright (C) 2000-2002 Toshiba Corporation
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
18 *
19 * Revision History:
20 * 0.30 Initial revision. (Renamed from serial_txx927.c)
21 * 0.31 Use save_flags instead of local_irq_save.
22 * 0.32 Support SCLK.
23 * 0.33 Switch TXX9_TTY_NAME by CONFIG_SERIAL_TXX9_STDSERIAL.
24 * Support TIOCSERGETLSR.
25 * 0.34 Support slow baudrate.
26 * 0.40 Merge codes from mainstream kernel (2.4.22).
27 * 0.41 Fix console checking in rs_shutdown_port().
28 * Disable flow-control in serial_console_write().
29 * 0.42 Fix minor compiler warning.
30 * 1.00 Kernel 2.6. Converted to new serial core (based on 8250.c).
31 * 1.01 Set fifosize to make tx_empry called properly.
32 * Use standard uart_get_divisor.
33 * 1.02 Cleanup. (import 8250.c changes)
34 * 1.03 Fix low-latency mode. (import 8250.c changes)
35 * 1.04 Remove usage of deprecated functions, cleanup.
36 */
37 #include <linux/config.h>
38
39 #if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
40 #define SUPPORT_SYSRQ
41 #endif
42
43 #include <linux/module.h>
44 #include <linux/ioport.h>
45 #include <linux/init.h>
46 #include <linux/console.h>
47 #include <linux/sysrq.h>
48 #include <linux/delay.h>
49 #include <linux/device.h>
50 #include <linux/pci.h>
51 #include <linux/tty.h>
52 #include <linux/tty_flip.h>
53 #include <linux/serial_core.h>
54 #include <linux/serial.h>
55 #include <linux/mutex.h>
56
57 #include <asm/io.h>
58 #include <asm/irq.h>
59
60 static char *serial_version = "1.04";
61 static char *serial_name = "TX39/49 Serial driver";
62
63 #define PASS_LIMIT 256
64
65 #if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
66 /* "ttyS" is used for standard serial driver */
67 #define TXX9_TTY_NAME "ttyTX"
68 #define TXX9_TTY_DEVFS_NAME "tttx/"
69 #define TXX9_TTY_MINOR_START (64 + 64) /* ttyTX0(128), ttyTX1(129) */
70 #else
71 /* acts like standard serial driver */
72 #define TXX9_TTY_NAME "ttyS"
73 #define TXX9_TTY_DEVFS_NAME "tts/"
74 #define TXX9_TTY_MINOR_START 64
75 #endif
76 #define TXX9_TTY_MAJOR TTY_MAJOR
77
78 /* flag aliases */
79 #define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
80 #define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
81
82 #ifdef CONFIG_PCI
83 /* support for Toshiba TC86C001 SIO */
84 #define ENABLE_SERIAL_TXX9_PCI
85 #endif
86
87 /*
88 * Number of serial ports
89 */
90 #ifdef ENABLE_SERIAL_TXX9_PCI
91 #define NR_PCI_BOARDS 4
92 #define UART_NR (4 + NR_PCI_BOARDS)
93 #else
94 #define UART_NR 4
95 #endif
96
97 struct uart_txx9_port {
98 struct uart_port port;
99
100 /*
101 * We provide a per-port pm hook.
102 */
103 void (*pm)(struct uart_port *port,
104 unsigned int state, unsigned int old);
105 };
106
107 #define TXX9_REGION_SIZE 0x24
108
109 /* TXX9 Serial Registers */
110 #define TXX9_SILCR 0x00
111 #define TXX9_SIDICR 0x04
112 #define TXX9_SIDISR 0x08
113 #define TXX9_SICISR 0x0c
114 #define TXX9_SIFCR 0x10
115 #define TXX9_SIFLCR 0x14
116 #define TXX9_SIBGR 0x18
117 #define TXX9_SITFIFO 0x1c
118 #define TXX9_SIRFIFO 0x20
119
120 /* SILCR : Line Control */
121 #define TXX9_SILCR_SCS_MASK 0x00000060
122 #define TXX9_SILCR_SCS_IMCLK 0x00000000
123 #define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
124 #define TXX9_SILCR_SCS_SCLK 0x00000040
125 #define TXX9_SILCR_SCS_SCLK_BG 0x00000060
126 #define TXX9_SILCR_UEPS 0x00000010
127 #define TXX9_SILCR_UPEN 0x00000008
128 #define TXX9_SILCR_USBL_MASK 0x00000004
129 #define TXX9_SILCR_USBL_1BIT 0x00000000
130 #define TXX9_SILCR_USBL_2BIT 0x00000004
131 #define TXX9_SILCR_UMODE_MASK 0x00000003
132 #define TXX9_SILCR_UMODE_8BIT 0x00000000
133 #define TXX9_SILCR_UMODE_7BIT 0x00000001
134
135 /* SIDICR : DMA/Int. Control */
136 #define TXX9_SIDICR_TDE 0x00008000
137 #define TXX9_SIDICR_RDE 0x00004000
138 #define TXX9_SIDICR_TIE 0x00002000
139 #define TXX9_SIDICR_RIE 0x00001000
140 #define TXX9_SIDICR_SPIE 0x00000800
141 #define TXX9_SIDICR_CTSAC 0x00000600
142 #define TXX9_SIDICR_STIE_MASK 0x0000003f
143 #define TXX9_SIDICR_STIE_OERS 0x00000020
144 #define TXX9_SIDICR_STIE_CTSS 0x00000010
145 #define TXX9_SIDICR_STIE_RBRKD 0x00000008
146 #define TXX9_SIDICR_STIE_TRDY 0x00000004
147 #define TXX9_SIDICR_STIE_TXALS 0x00000002
148 #define TXX9_SIDICR_STIE_UBRKD 0x00000001
149
150 /* SIDISR : DMA/Int. Status */
151 #define TXX9_SIDISR_UBRK 0x00008000
152 #define TXX9_SIDISR_UVALID 0x00004000
153 #define TXX9_SIDISR_UFER 0x00002000
154 #define TXX9_SIDISR_UPER 0x00001000
155 #define TXX9_SIDISR_UOER 0x00000800
156 #define TXX9_SIDISR_ERI 0x00000400
157 #define TXX9_SIDISR_TOUT 0x00000200
158 #define TXX9_SIDISR_TDIS 0x00000100
159 #define TXX9_SIDISR_RDIS 0x00000080
160 #define TXX9_SIDISR_STIS 0x00000040
161 #define TXX9_SIDISR_RFDN_MASK 0x0000001f
162
163 /* SICISR : Change Int. Status */
164 #define TXX9_SICISR_OERS 0x00000020
165 #define TXX9_SICISR_CTSS 0x00000010
166 #define TXX9_SICISR_RBRKD 0x00000008
167 #define TXX9_SICISR_TRDY 0x00000004
168 #define TXX9_SICISR_TXALS 0x00000002
169 #define TXX9_SICISR_UBRKD 0x00000001
170
171 /* SIFCR : FIFO Control */
172 #define TXX9_SIFCR_SWRST 0x00008000
173 #define TXX9_SIFCR_RDIL_MASK 0x00000180
174 #define TXX9_SIFCR_RDIL_1 0x00000000
175 #define TXX9_SIFCR_RDIL_4 0x00000080
176 #define TXX9_SIFCR_RDIL_8 0x00000100
177 #define TXX9_SIFCR_RDIL_12 0x00000180
178 #define TXX9_SIFCR_RDIL_MAX 0x00000180
179 #define TXX9_SIFCR_TDIL_MASK 0x00000018
180 #define TXX9_SIFCR_TDIL_MASK 0x00000018
181 #define TXX9_SIFCR_TDIL_1 0x00000000
182 #define TXX9_SIFCR_TDIL_4 0x00000001
183 #define TXX9_SIFCR_TDIL_8 0x00000010
184 #define TXX9_SIFCR_TDIL_MAX 0x00000010
185 #define TXX9_SIFCR_TFRST 0x00000004
186 #define TXX9_SIFCR_RFRST 0x00000002
187 #define TXX9_SIFCR_FRSTE 0x00000001
188 #define TXX9_SIO_TX_FIFO 8
189 #define TXX9_SIO_RX_FIFO 16
190
191 /* SIFLCR : Flow Control */
192 #define TXX9_SIFLCR_RCS 0x00001000
193 #define TXX9_SIFLCR_TES 0x00000800
194 #define TXX9_SIFLCR_RTSSC 0x00000200
195 #define TXX9_SIFLCR_RSDE 0x00000100
196 #define TXX9_SIFLCR_TSDE 0x00000080
197 #define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
198 #define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
199 #define TXX9_SIFLCR_TBRK 0x00000001
200
201 /* SIBGR : Baudrate Control */
202 #define TXX9_SIBGR_BCLK_MASK 0x00000300
203 #define TXX9_SIBGR_BCLK_T0 0x00000000
204 #define TXX9_SIBGR_BCLK_T2 0x00000100
205 #define TXX9_SIBGR_BCLK_T4 0x00000200
206 #define TXX9_SIBGR_BCLK_T6 0x00000300
207 #define TXX9_SIBGR_BRD_MASK 0x000000ff
208
209 static inline unsigned int sio_in(struct uart_txx9_port *up, int offset)
210 {
211 switch (up->port.iotype) {
212 default:
213 return *(volatile u32 *)(up->port.membase + offset);
214 case UPIO_PORT:
215 return inl(up->port.iobase + offset);
216 }
217 }
218
219 static inline void
220 sio_out(struct uart_txx9_port *up, int offset, int value)
221 {
222 switch (up->port.iotype) {
223 default:
224 *(volatile u32 *)(up->port.membase + offset) = value;
225 break;
226 case UPIO_PORT:
227 outl(value, up->port.iobase + offset);
228 break;
229 }
230 }
231
232 static inline void
233 sio_mask(struct uart_txx9_port *up, int offset, unsigned int value)
234 {
235 sio_out(up, offset, sio_in(up, offset) & ~value);
236 }
237 static inline void
238 sio_set(struct uart_txx9_port *up, int offset, unsigned int value)
239 {
240 sio_out(up, offset, sio_in(up, offset) | value);
241 }
242
243 static inline void
244 sio_quot_set(struct uart_txx9_port *up, int quot)
245 {
246 quot >>= 1;
247 if (quot < 256)
248 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
249 else if (quot < (256 << 2))
250 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
251 else if (quot < (256 << 4))
252 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
253 else if (quot < (256 << 6))
254 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
255 else
256 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
257 }
258
259 static void serial_txx9_stop_tx(struct uart_port *port)
260 {
261 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
262 unsigned long flags;
263
264 spin_lock_irqsave(&up->port.lock, flags);
265 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
266 spin_unlock_irqrestore(&up->port.lock, flags);
267 }
268
269 static void serial_txx9_start_tx(struct uart_port *port)
270 {
271 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
272 unsigned long flags;
273
274 spin_lock_irqsave(&up->port.lock, flags);
275 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
276 spin_unlock_irqrestore(&up->port.lock, flags);
277 }
278
279 static void serial_txx9_stop_rx(struct uart_port *port)
280 {
281 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
282 unsigned long flags;
283
284 spin_lock_irqsave(&up->port.lock, flags);
285 up->port.read_status_mask &= ~TXX9_SIDISR_RDIS;
286 #if 0
287 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
288 #endif
289 spin_unlock_irqrestore(&up->port.lock, flags);
290 }
291
292 static void serial_txx9_enable_ms(struct uart_port *port)
293 {
294 /* TXX9-SIO can not control DTR... */
295 }
296
297 static inline void
298 receive_chars(struct uart_txx9_port *up, unsigned int *status, struct pt_regs *regs)
299 {
300 struct tty_struct *tty = up->port.info->tty;
301 unsigned char ch;
302 unsigned int disr = *status;
303 int max_count = 256;
304 char flag;
305
306 do {
307 ch = sio_in(up, TXX9_SIRFIFO);
308 flag = TTY_NORMAL;
309 up->port.icount.rx++;
310
311 if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
312 TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
313 /*
314 * For statistics only
315 */
316 if (disr & TXX9_SIDISR_UBRK) {
317 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
318 up->port.icount.brk++;
319 /*
320 * We do the SysRQ and SAK checking
321 * here because otherwise the break
322 * may get masked by ignore_status_mask
323 * or read_status_mask.
324 */
325 if (uart_handle_break(&up->port))
326 goto ignore_char;
327 } else if (disr & TXX9_SIDISR_UPER)
328 up->port.icount.parity++;
329 else if (disr & TXX9_SIDISR_UFER)
330 up->port.icount.frame++;
331 if (disr & TXX9_SIDISR_UOER)
332 up->port.icount.overrun++;
333
334 /*
335 * Mask off conditions which should be ingored.
336 */
337 disr &= up->port.read_status_mask;
338
339 if (disr & TXX9_SIDISR_UBRK) {
340 flag = TTY_BREAK;
341 } else if (disr & TXX9_SIDISR_UPER)
342 flag = TTY_PARITY;
343 else if (disr & TXX9_SIDISR_UFER)
344 flag = TTY_FRAME;
345 }
346 if (uart_handle_sysrq_char(&up->port, ch, regs))
347 goto ignore_char;
348
349 uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag);
350
351 ignore_char:
352 disr = sio_in(up, TXX9_SIDISR);
353 } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
354 spin_unlock(&up->port.lock);
355 tty_flip_buffer_push(tty);
356 spin_lock(&up->port.lock);
357 *status = disr;
358 }
359
360 static inline void transmit_chars(struct uart_txx9_port *up)
361 {
362 struct circ_buf *xmit = &up->port.info->xmit;
363 int count;
364
365 if (up->port.x_char) {
366 sio_out(up, TXX9_SITFIFO, up->port.x_char);
367 up->port.icount.tx++;
368 up->port.x_char = 0;
369 return;
370 }
371 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
372 serial_txx9_stop_tx(&up->port);
373 return;
374 }
375
376 count = TXX9_SIO_TX_FIFO;
377 do {
378 sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]);
379 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
380 up->port.icount.tx++;
381 if (uart_circ_empty(xmit))
382 break;
383 } while (--count > 0);
384
385 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
386 uart_write_wakeup(&up->port);
387
388 if (uart_circ_empty(xmit))
389 serial_txx9_stop_tx(&up->port);
390 }
391
392 static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id, struct pt_regs *regs)
393 {
394 int pass_counter = 0;
395 struct uart_txx9_port *up = dev_id;
396 unsigned int status;
397
398 while (1) {
399 spin_lock(&up->port.lock);
400 status = sio_in(up, TXX9_SIDISR);
401 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
402 status &= ~TXX9_SIDISR_TDIS;
403 if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
404 TXX9_SIDISR_TOUT))) {
405 spin_unlock(&up->port.lock);
406 break;
407 }
408
409 if (status & TXX9_SIDISR_RDIS)
410 receive_chars(up, &status, regs);
411 if (status & TXX9_SIDISR_TDIS)
412 transmit_chars(up);
413 /* Clear TX/RX Int. Status */
414 sio_mask(up, TXX9_SIDISR,
415 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
416 TXX9_SIDISR_TOUT);
417 spin_unlock(&up->port.lock);
418
419 if (pass_counter++ > PASS_LIMIT)
420 break;
421 }
422
423 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
424 }
425
426 static unsigned int serial_txx9_tx_empty(struct uart_port *port)
427 {
428 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
429 unsigned long flags;
430 unsigned int ret;
431
432 spin_lock_irqsave(&up->port.lock, flags);
433 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
434 spin_unlock_irqrestore(&up->port.lock, flags);
435
436 return ret;
437 }
438
439 static unsigned int serial_txx9_get_mctrl(struct uart_port *port)
440 {
441 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
442 unsigned int ret;
443
444 ret = ((sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS)
445 | ((sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS);
446
447 return ret;
448 }
449
450 static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl)
451 {
452 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
453 unsigned long flags;
454
455 spin_lock_irqsave(&up->port.lock, flags);
456 if (mctrl & TIOCM_RTS)
457 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
458 else
459 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
460 spin_unlock_irqrestore(&up->port.lock, flags);
461 }
462
463 static void serial_txx9_break_ctl(struct uart_port *port, int break_state)
464 {
465 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
466 unsigned long flags;
467
468 spin_lock_irqsave(&up->port.lock, flags);
469 if (break_state == -1)
470 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
471 else
472 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
473 spin_unlock_irqrestore(&up->port.lock, flags);
474 }
475
476 static int serial_txx9_startup(struct uart_port *port)
477 {
478 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
479 unsigned long flags;
480 int retval;
481
482 /*
483 * Clear the FIFO buffers and disable them.
484 * (they will be reeanbled in set_termios())
485 */
486 sio_set(up, TXX9_SIFCR,
487 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
488 /* clear reset */
489 sio_mask(up, TXX9_SIFCR,
490 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
491 sio_out(up, TXX9_SIDICR, 0);
492
493 /*
494 * Clear the interrupt registers.
495 */
496 sio_out(up, TXX9_SIDISR, 0);
497
498 retval = request_irq(up->port.irq, serial_txx9_interrupt,
499 SA_SHIRQ, "serial_txx9", up);
500 if (retval)
501 return retval;
502
503 /*
504 * Now, initialize the UART
505 */
506 spin_lock_irqsave(&up->port.lock, flags);
507 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
508 spin_unlock_irqrestore(&up->port.lock, flags);
509
510 /* Enable RX/TX */
511 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
512
513 /*
514 * Finally, enable interrupts.
515 */
516 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
517
518 return 0;
519 }
520
521 static void serial_txx9_shutdown(struct uart_port *port)
522 {
523 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
524 unsigned long flags;
525
526 /*
527 * Disable interrupts from this port
528 */
529 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
530
531 spin_lock_irqsave(&up->port.lock, flags);
532 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
533 spin_unlock_irqrestore(&up->port.lock, flags);
534
535 /*
536 * Disable break condition
537 */
538 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
539
540 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
541 if (up->port.cons && up->port.line == up->port.cons->index) {
542 free_irq(up->port.irq, up);
543 return;
544 }
545 #endif
546 /* reset FIFOs */
547 sio_set(up, TXX9_SIFCR,
548 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
549 /* clear reset */
550 sio_mask(up, TXX9_SIFCR,
551 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
552
553 /* Disable RX/TX */
554 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
555
556 free_irq(up->port.irq, up);
557 }
558
559 static void
560 serial_txx9_set_termios(struct uart_port *port, struct termios *termios,
561 struct termios *old)
562 {
563 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
564 unsigned int cval, fcr = 0;
565 unsigned long flags;
566 unsigned int baud, quot;
567
568 cval = sio_in(up, TXX9_SILCR);
569 /* byte size and parity */
570 cval &= ~TXX9_SILCR_UMODE_MASK;
571 switch (termios->c_cflag & CSIZE) {
572 case CS7:
573 cval |= TXX9_SILCR_UMODE_7BIT;
574 break;
575 default:
576 case CS5: /* not supported */
577 case CS6: /* not supported */
578 case CS8:
579 cval |= TXX9_SILCR_UMODE_8BIT;
580 break;
581 }
582
583 cval &= ~TXX9_SILCR_USBL_MASK;
584 if (termios->c_cflag & CSTOPB)
585 cval |= TXX9_SILCR_USBL_2BIT;
586 else
587 cval |= TXX9_SILCR_USBL_1BIT;
588 cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
589 if (termios->c_cflag & PARENB)
590 cval |= TXX9_SILCR_UPEN;
591 if (!(termios->c_cflag & PARODD))
592 cval |= TXX9_SILCR_UEPS;
593
594 /*
595 * Ask the core to calculate the divisor for us.
596 */
597 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2);
598 quot = uart_get_divisor(port, baud);
599
600 /* Set up FIFOs */
601 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
602 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
603
604 /*
605 * Ok, we're now changing the port state. Do it with
606 * interrupts disabled.
607 */
608 spin_lock_irqsave(&up->port.lock, flags);
609
610 /*
611 * Update the per-port timeout.
612 */
613 uart_update_timeout(port, termios->c_cflag, baud);
614
615 up->port.read_status_mask = TXX9_SIDISR_UOER |
616 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
617 if (termios->c_iflag & INPCK)
618 up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
619 if (termios->c_iflag & (BRKINT | PARMRK))
620 up->port.read_status_mask |= TXX9_SIDISR_UBRK;
621
622 /*
623 * Characteres to ignore
624 */
625 up->port.ignore_status_mask = 0;
626 if (termios->c_iflag & IGNPAR)
627 up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
628 if (termios->c_iflag & IGNBRK) {
629 up->port.ignore_status_mask |= TXX9_SIDISR_UBRK;
630 /*
631 * If we're ignoring parity and break indicators,
632 * ignore overruns too (for real raw support).
633 */
634 if (termios->c_iflag & IGNPAR)
635 up->port.ignore_status_mask |= TXX9_SIDISR_UOER;
636 }
637
638 /*
639 * ignore all characters if CREAD is not set
640 */
641 if ((termios->c_cflag & CREAD) == 0)
642 up->port.ignore_status_mask |= TXX9_SIDISR_RDIS;
643
644 /* CTS flow control flag */
645 if ((termios->c_cflag & CRTSCTS) &&
646 (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) {
647 sio_set(up, TXX9_SIFLCR,
648 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
649 } else {
650 sio_mask(up, TXX9_SIFLCR,
651 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
652 }
653
654 sio_out(up, TXX9_SILCR, cval);
655 sio_quot_set(up, quot);
656 sio_out(up, TXX9_SIFCR, fcr);
657
658 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
659 spin_unlock_irqrestore(&up->port.lock, flags);
660 }
661
662 static void
663 serial_txx9_pm(struct uart_port *port, unsigned int state,
664 unsigned int oldstate)
665 {
666 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
667 if (up->pm)
668 up->pm(port, state, oldstate);
669 }
670
671 static int serial_txx9_request_resource(struct uart_txx9_port *up)
672 {
673 unsigned int size = TXX9_REGION_SIZE;
674 int ret = 0;
675
676 switch (up->port.iotype) {
677 default:
678 if (!up->port.mapbase)
679 break;
680
681 if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) {
682 ret = -EBUSY;
683 break;
684 }
685
686 if (up->port.flags & UPF_IOREMAP) {
687 up->port.membase = ioremap(up->port.mapbase, size);
688 if (!up->port.membase) {
689 release_mem_region(up->port.mapbase, size);
690 ret = -ENOMEM;
691 }
692 }
693 break;
694
695 case UPIO_PORT:
696 if (!request_region(up->port.iobase, size, "serial_txx9"))
697 ret = -EBUSY;
698 break;
699 }
700 return ret;
701 }
702
703 static void serial_txx9_release_resource(struct uart_txx9_port *up)
704 {
705 unsigned int size = TXX9_REGION_SIZE;
706
707 switch (up->port.iotype) {
708 default:
709 if (!up->port.mapbase)
710 break;
711
712 if (up->port.flags & UPF_IOREMAP) {
713 iounmap(up->port.membase);
714 up->port.membase = NULL;
715 }
716
717 release_mem_region(up->port.mapbase, size);
718 break;
719
720 case UPIO_PORT:
721 release_region(up->port.iobase, size);
722 break;
723 }
724 }
725
726 static void serial_txx9_release_port(struct uart_port *port)
727 {
728 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
729 serial_txx9_release_resource(up);
730 }
731
732 static int serial_txx9_request_port(struct uart_port *port)
733 {
734 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
735 return serial_txx9_request_resource(up);
736 }
737
738 static void serial_txx9_config_port(struct uart_port *port, int uflags)
739 {
740 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
741 unsigned long flags;
742 int ret;
743
744 /*
745 * Find the region that we can probe for. This in turn
746 * tells us whether we can probe for the type of port.
747 */
748 ret = serial_txx9_request_resource(up);
749 if (ret < 0)
750 return;
751 port->type = PORT_TXX9;
752 up->port.fifosize = TXX9_SIO_TX_FIFO;
753
754 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
755 if (up->port.line == up->port.cons->index)
756 return;
757 #endif
758 spin_lock_irqsave(&up->port.lock, flags);
759 /*
760 * Reset the UART.
761 */
762 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
763 #ifdef CONFIG_CPU_TX49XX
764 /* TX4925 BUG WORKAROUND. Accessing SIOC register
765 * immediately after soft reset causes bus error. */
766 iob();
767 udelay(1);
768 #endif
769 while (sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST)
770 ;
771 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
772 sio_set(up, TXX9_SIFCR,
773 TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
774 /* initial settings */
775 sio_out(up, TXX9_SILCR,
776 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
777 ((up->port.flags & UPF_TXX9_USE_SCLK) ?
778 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
779 sio_quot_set(up, uart_get_divisor(port, 9600));
780 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
781 spin_unlock_irqrestore(&up->port.lock, flags);
782 }
783
784 static int
785 serial_txx9_verify_port(struct uart_port *port, struct serial_struct *ser)
786 {
787 if (ser->irq < 0 ||
788 ser->baud_base < 9600 || ser->type != PORT_TXX9)
789 return -EINVAL;
790 return 0;
791 }
792
793 static const char *
794 serial_txx9_type(struct uart_port *port)
795 {
796 return "txx9";
797 }
798
799 static struct uart_ops serial_txx9_pops = {
800 .tx_empty = serial_txx9_tx_empty,
801 .set_mctrl = serial_txx9_set_mctrl,
802 .get_mctrl = serial_txx9_get_mctrl,
803 .stop_tx = serial_txx9_stop_tx,
804 .start_tx = serial_txx9_start_tx,
805 .stop_rx = serial_txx9_stop_rx,
806 .enable_ms = serial_txx9_enable_ms,
807 .break_ctl = serial_txx9_break_ctl,
808 .startup = serial_txx9_startup,
809 .shutdown = serial_txx9_shutdown,
810 .set_termios = serial_txx9_set_termios,
811 .pm = serial_txx9_pm,
812 .type = serial_txx9_type,
813 .release_port = serial_txx9_release_port,
814 .request_port = serial_txx9_request_port,
815 .config_port = serial_txx9_config_port,
816 .verify_port = serial_txx9_verify_port,
817 };
818
819 static struct uart_txx9_port serial_txx9_ports[UART_NR];
820
821 static void __init serial_txx9_register_ports(struct uart_driver *drv)
822 {
823 int i;
824
825 for (i = 0; i < UART_NR; i++) {
826 struct uart_txx9_port *up = &serial_txx9_ports[i];
827
828 up->port.line = i;
829 up->port.ops = &serial_txx9_pops;
830 uart_add_one_port(drv, &up->port);
831 }
832 }
833
834 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
835
836 /*
837 * Wait for transmitter & holding register to empty
838 */
839 static inline void wait_for_xmitr(struct uart_txx9_port *up)
840 {
841 unsigned int tmout = 10000;
842
843 /* Wait up to 10ms for the character(s) to be sent. */
844 while (--tmout &&
845 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
846 udelay(1);
847
848 /* Wait up to 1s for flow control if necessary */
849 if (up->port.flags & UPF_CONS_FLOW) {
850 tmout = 1000000;
851 while (--tmout &&
852 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
853 udelay(1);
854 }
855 }
856
857 /*
858 * Print a string to the serial port trying not to disturb
859 * any possible real use of the port...
860 *
861 * The console_lock must be held when we get here.
862 */
863 static void
864 serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
865 {
866 struct uart_txx9_port *up = &serial_txx9_ports[co->index];
867 unsigned int ier, flcr;
868 int i;
869
870 /*
871 * First save the UER then disable the interrupts
872 */
873 ier = sio_in(up, TXX9_SIDICR);
874 sio_out(up, TXX9_SIDICR, 0);
875 /*
876 * Disable flow-control if enabled (and unnecessary)
877 */
878 flcr = sio_in(up, TXX9_SIFLCR);
879 if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
880 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
881
882 /*
883 * Now, do each character
884 */
885 for (i = 0; i < count; i++, s++) {
886 wait_for_xmitr(up);
887
888 /*
889 * Send the character out.
890 * If a LF, also do CR...
891 */
892 sio_out(up, TXX9_SITFIFO, *s);
893 if (*s == 10) {
894 wait_for_xmitr(up);
895 sio_out(up, TXX9_SITFIFO, 13);
896 }
897 }
898
899 /*
900 * Finally, wait for transmitter to become empty
901 * and restore the IER
902 */
903 wait_for_xmitr(up);
904 sio_out(up, TXX9_SIFLCR, flcr);
905 sio_out(up, TXX9_SIDICR, ier);
906 }
907
908 static int serial_txx9_console_setup(struct console *co, char *options)
909 {
910 struct uart_port *port;
911 struct uart_txx9_port *up;
912 int baud = 9600;
913 int bits = 8;
914 int parity = 'n';
915 int flow = 'n';
916
917 /*
918 * Check whether an invalid uart number has been specified, and
919 * if so, search for the first available port that does have
920 * console support.
921 */
922 if (co->index >= UART_NR)
923 co->index = 0;
924 up = &serial_txx9_ports[co->index];
925 port = &up->port;
926 if (!port->ops)
927 return -ENODEV;
928
929 /*
930 * Temporary fix.
931 */
932 spin_lock_init(&port->lock);
933
934 /*
935 * Disable UART interrupts, set DTR and RTS high
936 * and set speed.
937 */
938 sio_out(up, TXX9_SIDICR, 0);
939 /* initial settings */
940 sio_out(up, TXX9_SILCR,
941 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
942 ((port->flags & UPF_TXX9_USE_SCLK) ?
943 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
944 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
945
946 if (options)
947 uart_parse_options(options, &baud, &parity, &bits, &flow);
948
949 return uart_set_options(port, co, baud, parity, bits, flow);
950 }
951
952 static struct uart_driver serial_txx9_reg;
953 static struct console serial_txx9_console = {
954 .name = TXX9_TTY_NAME,
955 .write = serial_txx9_console_write,
956 .device = uart_console_device,
957 .setup = serial_txx9_console_setup,
958 .flags = CON_PRINTBUFFER,
959 .index = -1,
960 .data = &serial_txx9_reg,
961 };
962
963 static int __init serial_txx9_console_init(void)
964 {
965 register_console(&serial_txx9_console);
966 return 0;
967 }
968 console_initcall(serial_txx9_console_init);
969
970 #define SERIAL_TXX9_CONSOLE &serial_txx9_console
971 #else
972 #define SERIAL_TXX9_CONSOLE NULL
973 #endif
974
975 static struct uart_driver serial_txx9_reg = {
976 .owner = THIS_MODULE,
977 .driver_name = "serial_txx9",
978 .devfs_name = TXX9_TTY_DEVFS_NAME,
979 .dev_name = TXX9_TTY_NAME,
980 .major = TXX9_TTY_MAJOR,
981 .minor = TXX9_TTY_MINOR_START,
982 .nr = UART_NR,
983 .cons = SERIAL_TXX9_CONSOLE,
984 };
985
986 int __init early_serial_txx9_setup(struct uart_port *port)
987 {
988 if (port->line >= ARRAY_SIZE(serial_txx9_ports))
989 return -ENODEV;
990
991 serial_txx9_ports[port->line].port = *port;
992 serial_txx9_ports[port->line].port.ops = &serial_txx9_pops;
993 serial_txx9_ports[port->line].port.flags |= UPF_BOOT_AUTOCONF;
994 return 0;
995 }
996
997 #ifdef ENABLE_SERIAL_TXX9_PCI
998 /**
999 * serial_txx9_suspend_port - suspend one serial port
1000 * @line: serial line number
1001 * @level: the level of port suspension, as per uart_suspend_port
1002 *
1003 * Suspend one serial port.
1004 */
1005 static void serial_txx9_suspend_port(int line)
1006 {
1007 uart_suspend_port(&serial_txx9_reg, &serial_txx9_ports[line].port);
1008 }
1009
1010 /**
1011 * serial_txx9_resume_port - resume one serial port
1012 * @line: serial line number
1013 * @level: the level of port resumption, as per uart_resume_port
1014 *
1015 * Resume one serial port.
1016 */
1017 static void serial_txx9_resume_port(int line)
1018 {
1019 uart_resume_port(&serial_txx9_reg, &serial_txx9_ports[line].port);
1020 }
1021
1022 static DEFINE_MUTEX(serial_txx9_mutex);
1023
1024 /**
1025 * serial_txx9_register_port - register a serial port
1026 * @port: serial port template
1027 *
1028 * Configure the serial port specified by the request.
1029 *
1030 * The port is then probed and if necessary the IRQ is autodetected
1031 * If this fails an error is returned.
1032 *
1033 * On success the port is ready to use and the line number is returned.
1034 */
1035 static int __devinit serial_txx9_register_port(struct uart_port *port)
1036 {
1037 int i;
1038 struct uart_txx9_port *uart;
1039 int ret = -ENOSPC;
1040
1041 mutex_lock(&serial_txx9_mutex);
1042 for (i = 0; i < UART_NR; i++) {
1043 uart = &serial_txx9_ports[i];
1044 if (uart->port.type == PORT_UNKNOWN)
1045 break;
1046 }
1047 if (i < UART_NR) {
1048 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1049 uart->port.iobase = port->iobase;
1050 uart->port.membase = port->membase;
1051 uart->port.irq = port->irq;
1052 uart->port.uartclk = port->uartclk;
1053 uart->port.iotype = port->iotype;
1054 uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;
1055 uart->port.mapbase = port->mapbase;
1056 if (port->dev)
1057 uart->port.dev = port->dev;
1058 ret = uart_add_one_port(&serial_txx9_reg, &uart->port);
1059 if (ret == 0)
1060 ret = uart->port.line;
1061 }
1062 mutex_unlock(&serial_txx9_mutex);
1063 return ret;
1064 }
1065
1066 /**
1067 * serial_txx9_unregister_port - remove a txx9 serial port at runtime
1068 * @line: serial line number
1069 *
1070 * Remove one serial port. This may not be called from interrupt
1071 * context. We hand the port back to the our control.
1072 */
1073 static void __devexit serial_txx9_unregister_port(int line)
1074 {
1075 struct uart_txx9_port *uart = &serial_txx9_ports[line];
1076
1077 mutex_lock(&serial_txx9_mutex);
1078 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1079 uart->port.flags = 0;
1080 uart->port.type = PORT_UNKNOWN;
1081 uart->port.iobase = 0;
1082 uart->port.mapbase = 0;
1083 uart->port.membase = 0;
1084 uart->port.dev = NULL;
1085 uart_add_one_port(&serial_txx9_reg, &uart->port);
1086 mutex_unlock(&serial_txx9_mutex);
1087 }
1088
1089 /*
1090 * Probe one serial board. Unfortunately, there is no rhyme nor reason
1091 * to the arrangement of serial ports on a PCI card.
1092 */
1093 static int __devinit
1094 pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
1095 {
1096 struct uart_port port;
1097 int line;
1098 int rc;
1099
1100 rc = pci_enable_device(dev);
1101 if (rc)
1102 return rc;
1103
1104 memset(&port, 0, sizeof(port));
1105 port.ops = &serial_txx9_pops;
1106 port.flags |= UPF_TXX9_HAVE_CTS_LINE;
1107 port.uartclk = 66670000;
1108 port.irq = dev->irq;
1109 port.iotype = UPIO_PORT;
1110 port.iobase = pci_resource_start(dev, 1);
1111 port.dev = &dev->dev;
1112 line = serial_txx9_register_port(&port);
1113 if (line < 0) {
1114 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
1115 }
1116 pci_set_drvdata(dev, (void *)(long)line);
1117
1118 return 0;
1119 }
1120
1121 static void __devexit pciserial_txx9_remove_one(struct pci_dev *dev)
1122 {
1123 int line = (int)(long)pci_get_drvdata(dev);
1124
1125 pci_set_drvdata(dev, NULL);
1126
1127 if (line) {
1128 serial_txx9_unregister_port(line);
1129 pci_disable_device(dev);
1130 }
1131 }
1132
1133 static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
1134 {
1135 int line = (int)(long)pci_get_drvdata(dev);
1136
1137 if (line)
1138 serial_txx9_suspend_port(line);
1139 pci_save_state(dev);
1140 pci_set_power_state(dev, pci_choose_state(dev, state));
1141 return 0;
1142 }
1143
1144 static int pciserial_txx9_resume_one(struct pci_dev *dev)
1145 {
1146 int line = (int)(long)pci_get_drvdata(dev);
1147
1148 pci_set_power_state(dev, PCI_D0);
1149 pci_restore_state(dev);
1150
1151 if (line) {
1152 pci_enable_device(dev);
1153 serial_txx9_resume_port(line);
1154 }
1155 return 0;
1156 }
1157
1158 static struct pci_device_id serial_txx9_pci_tbl[] = {
1159 { PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC,
1160 PCI_ANY_ID, PCI_ANY_ID,
1161 0, 0, 0 },
1162 { 0, }
1163 };
1164
1165 static struct pci_driver serial_txx9_pci_driver = {
1166 .name = "serial_txx9",
1167 .probe = pciserial_txx9_init_one,
1168 .remove = __devexit_p(pciserial_txx9_remove_one),
1169 .suspend = pciserial_txx9_suspend_one,
1170 .resume = pciserial_txx9_resume_one,
1171 .id_table = serial_txx9_pci_tbl,
1172 };
1173
1174 MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
1175 #endif /* ENABLE_SERIAL_TXX9_PCI */
1176
1177 static int __init serial_txx9_init(void)
1178 {
1179 int ret;
1180
1181 printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
1182
1183 ret = uart_register_driver(&serial_txx9_reg);
1184 if (ret >= 0) {
1185 serial_txx9_register_ports(&serial_txx9_reg);
1186
1187 #ifdef ENABLE_SERIAL_TXX9_PCI
1188 ret = pci_register_driver(&serial_txx9_pci_driver);
1189 #endif
1190 }
1191 return ret;
1192 }
1193
1194 static void __exit serial_txx9_exit(void)
1195 {
1196 int i;
1197
1198 #ifdef ENABLE_SERIAL_TXX9_PCI
1199 pci_unregister_driver(&serial_txx9_pci_driver);
1200 #endif
1201 for (i = 0; i < UART_NR; i++)
1202 uart_remove_one_port(&serial_txx9_reg, &serial_txx9_ports[i].port);
1203
1204 uart_unregister_driver(&serial_txx9_reg);
1205 }
1206
1207 module_init(serial_txx9_init);
1208 module_exit(serial_txx9_exit);
1209
1210 MODULE_LICENSE("GPL");
1211 MODULE_DESCRIPTION("TX39/49 serial driver");
1212
1213 MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);
Support for the Chinese Samsung S3C2440 based development boards