[CPUFREQ] Fix the p4-clockmod N60 errata workaround.
[linux-2.6/mini2440.git] / drivers / serial / crisv10.c
blobbe12623d85447348980d59240ae6244ba6305360
1 /* $Id: serial.c,v 1.25 2004/09/29 10:33:49 starvik Exp $
3 * Serial port driver for the ETRAX 100LX chip
5 * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Axis Communications AB
7 * Many, many authors. Based once upon a time on serial.c for 16x50.
9 * $Log: serial.c,v $
10 * Revision 1.25 2004/09/29 10:33:49 starvik
11 * Resolved a dealock when printing debug from kernel.
13 * Revision 1.24 2004/08/27 23:25:59 johana
14 * rs_set_termios() must call change_speed() if c_iflag has changed or
15 * automatic XOFF handling will be enabled and transmitter will stop
16 * if 0x13 is received.
18 * Revision 1.23 2004/08/24 06:57:13 starvik
19 * More whitespace cleanup
21 * Revision 1.22 2004/08/24 06:12:20 starvik
22 * Whitespace cleanup
24 * Revision 1.20 2004/05/24 12:00:20 starvik
25 * Big merge of stuff from Linux 2.4 (e.g. manual mode for the serial port).
27 * Revision 1.19 2004/05/17 13:12:15 starvik
28 * Kernel console hook
29 * Big merge from Linux 2.4 still pending.
31 * Revision 1.18 2003/10/28 07:18:30 starvik
32 * Compiles with debug info
34 * Revision 1.17 2003/07/04 08:27:37 starvik
35 * Merge of Linux 2.5.74
37 * Revision 1.16 2003/06/13 10:05:19 johana
38 * Help the user to avoid trouble by:
39 * Forcing mixed mode for status/control lines if not all pins are used.
41 * Revision 1.15 2003/06/13 09:43:01 johana
42 * Merged in the following changes from os/linux/arch/cris/drivers/serial.c
43 * + some minor changes to reduce diff.
45 * Revision 1.49 2003/05/30 11:31:54 johana
46 * Merged in change-branch--serial9bit that adds CMSPAR support for sticky
47 * parity (mark/space)
49 * Revision 1.48 2003/05/30 11:03:57 johana
50 * Implemented rs_send_xchar() by disabling the DMA and writing manually.
51 * Added e100_disable_txdma_channel() and e100_enable_txdma_channel().
52 * Fixed rs_throttle() and rs_unthrottle() to properly call rs_send_xchar
53 * instead of setting info->x_char and check the CRTSCTS flag before
54 * controlling the rts pin.
56 * Revision 1.14 2003/04/09 08:12:44 pkj
57 * Corrected typo changes made upstream.
59 * Revision 1.13 2003/04/09 05:20:47 starvik
60 * Merge of Linux 2.5.67
62 * Revision 1.11 2003/01/22 06:48:37 starvik
63 * Fixed warnings issued by GCC 3.2.1
65 * Revision 1.9 2002/12/13 09:07:47 starvik
66 * Alert user that RX_TIMEOUT_TICKS==0 doesn't work
68 * Revision 1.8 2002/12/11 13:13:57 starvik
69 * Added arch/ to v10 specific includes
70 * Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
72 * Revision 1.7 2002/12/06 07:13:57 starvik
73 * Corrected work queue stuff
74 * Removed CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
76 * Revision 1.6 2002/11/21 07:17:46 starvik
77 * Change static inline to extern inline where otherwise outlined with gcc-3.2
79 * Revision 1.5 2002/11/14 15:59:49 starvik
80 * Linux 2.5 port of the latest serial driver from 2.4. The work queue stuff
81 * probably doesn't work yet.
83 * Revision 1.42 2002/11/05 09:08:47 johana
84 * Better implementation of rs_stop() and rs_start() that uses the XOFF
85 * register to start/stop transmission.
86 * change_speed() also initilises XOFF register correctly so that
87 * auto_xoff is enabled when IXON flag is set by user.
88 * This gives fast XOFF response times.
90 * Revision 1.41 2002/11/04 18:40:57 johana
91 * Implemented rs_stop() and rs_start().
92 * Simple tests using hwtestserial indicates that this should be enough
93 * to make it work.
95 * Revision 1.40 2002/10/14 05:33:18 starvik
96 * RS-485 uses fast timers even if SERIAL_FAST_TIMER is disabled
98 * Revision 1.39 2002/09/30 21:00:57 johana
99 * Support for CONFIG_ETRAX_SERx_DTR_RI_DSR_CD_MIXED where the status and
100 * control pins can be mixed between PA and PB.
101 * If no serial port uses MIXED old solution is used
102 * (saves a few bytes and cycles).
103 * control_pins struct uses masks instead of bit numbers.
104 * Corrected dummy values and polarity in line_info() so
105 * /proc/tty/driver/serial is now correct.
106 * (the E100_xxx_GET() macros is really active low - perhaps not obvious)
108 * Revision 1.38 2002/08/23 11:01:36 starvik
109 * Check that serial port is enabled in all interrupt handlers to avoid
110 * restarts of DMA channels not assigned to serial ports
112 * Revision 1.37 2002/08/13 13:02:37 bjornw
113 * Removed some warnings because of unused code
115 * Revision 1.36 2002/08/08 12:50:01 starvik
116 * Serial interrupt is shared with synchronous serial port driver
118 * Revision 1.35 2002/06/03 10:40:49 starvik
119 * Increased RS-485 RTS toggle timer to 2 characters
121 * Revision 1.34 2002/05/28 18:59:36 johana
122 * Whitespace and comment fixing to be more like etrax100ser.c 1.71.
124 * Revision 1.33 2002/05/28 17:55:43 johana
125 * RS-485 uses FAST_TIMER if enabled, and starts a short (one char time)
126 * timer from tranismit_chars (interrupt context).
127 * The timer toggles RTS in interrupt context when expired giving minimum
128 * latencies.
130 * Revision 1.32 2002/05/22 13:58:00 johana
131 * Renamed rs_write() to raw_write() and made it inline.
132 * New rs_write() handles RS-485 if configured and enabled
133 * (moved code from e100_write_rs485()).
134 * RS-485 ioctl's uses copy_from_user() instead of verify_area().
136 * Revision 1.31 2002/04/22 11:20:03 johana
137 * Updated copyright years.
139 * Revision 1.30 2002/04/22 09:39:12 johana
140 * RS-485 support compiles.
142 * Revision 1.29 2002/01/14 16:10:01 pkj
143 * Allocate the receive buffers dynamically. The static 4kB buffer was
144 * too small for the peaks. This means that we can get rid of the extra
145 * buffer and the copying to it. It also means we require less memory
146 * under normal operations, but can use more when needed (there is a
147 * cap at 64kB for safety reasons). If there is no memory available
148 * we panic(), and die a horrible death...
150 * Revision 1.28 2001/12/18 15:04:53 johana
151 * Cleaned up write_rs485() - now it works correctly without padding extra
152 * char.
153 * Added sane default initialisation of rs485.
154 * Added #ifdef around dummy variables.
156 * Revision 1.27 2001/11/29 17:00:41 pkj
157 * 2kB seems to be too small a buffer when using 921600 bps,
158 * so increase it to 4kB (this was already done for the elinux
159 * version of the serial driver).
161 * Revision 1.26 2001/11/19 14:20:41 pkj
162 * Minor changes to comments and unused code.
164 * Revision 1.25 2001/11/12 20:03:43 pkj
165 * Fixed compiler warnings.
167 * Revision 1.24 2001/11/12 15:10:05 pkj
168 * Total redesign of the receiving part of the serial driver.
169 * Uses eight chained descriptors to write to a 4kB buffer.
170 * This data is then serialised into a 2kB buffer. From there it
171 * is copied into the TTY's flip buffers when they become available.
172 * A lot of copying, and the sizes of the buffers might need to be
173 * tweaked, but all in all it should work better than the previous
174 * version, without the need to modify the TTY code in any way.
175 * Also note that erroneous bytes are now correctly marked in the
176 * flag buffers (instead of always marking the first byte).
178 * Revision 1.23 2001/10/30 17:53:26 pkj
179 * * Set info->uses_dma to 0 when a port is closed.
180 * * Mark the timer1 interrupt as a fast one (SA_INTERRUPT).
181 * * Call start_flush_timer() in start_receive() if
182 * CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST is defined.
184 * Revision 1.22 2001/10/30 17:44:03 pkj
185 * Use %lu for received and transmitted counters in line_info().
187 * Revision 1.21 2001/10/30 17:40:34 pkj
188 * Clean-up. The only change to functionality is that
189 * CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS(=5) is used instead of
190 * MAX_FLUSH_TIME(=8).
192 * Revision 1.20 2001/10/30 15:24:49 johana
193 * Added char_time stuff from 2.0 driver.
195 * Revision 1.19 2001/10/30 15:23:03 johana
196 * Merged with 1.13.2 branch + fixed indentation
197 * and changed CONFIG_ETRAX100_XYS to CONFIG_ETRAX_XYZ
199 * Revision 1.18 2001/09/24 09:27:22 pkj
200 * Completed ext_baud_table[] in cflag_to_baud() and cflag_to_etrax_baud().
202 * Revision 1.17 2001/08/24 11:32:49 ronny
203 * More fixes for the CONFIG_ETRAX_SERIAL_PORT0 define.
205 * Revision 1.16 2001/08/24 07:56:22 ronny
206 * Added config ifdefs around ser0 irq requests.
208 * Revision 1.15 2001/08/16 09:10:31 bjarne
209 * serial.c - corrected the initialization of rs_table, the wrong defines
210 * where used.
211 * Corrected a test in timed_flush_handler.
212 * Changed configured to enabled.
213 * serial.h - Changed configured to enabled.
215 * Revision 1.14 2001/08/15 07:31:23 bjarne
216 * Introduced two new members to the e100_serial struct.
217 * configured - Will be set to 1 if the port has been configured in .config
218 * uses_dma - Should be set to 1 if the port uses DMA. Currently it is set
219 * to 1
220 * when a port is opened. This is used to limit the DMA interrupt
221 * routines to only manipulate DMA channels actually used by the
222 * serial driver.
224 * Revision 1.13.2.2 2001/10/17 13:57:13 starvik
225 * Receiver was broken by the break fixes
227 * Revision 1.13.2.1 2001/07/20 13:57:39 ronny
228 * Merge with new stuff from etrax100ser.c. Works but haven't checked stuff
229 * like break handling.
231 * Revision 1.13 2001/05/09 12:40:31 johana
232 * Use DMA_NBR and IRQ_NBR defines from dma.h and irq.h
234 * Revision 1.12 2001/04/19 12:23:07 bjornw
235 * CONFIG_RS485 -> CONFIG_ETRAX_RS485
237 * Revision 1.11 2001/04/05 14:29:48 markusl
238 * Updated according to review remarks i.e.
239 * -Use correct types in port structure to avoid compiler warnings
240 * -Try to use IO_* macros whenever possible
241 * -Open should never return -EBUSY
243 * Revision 1.10 2001/03/05 13:14:07 bjornw
244 * Another spelling fix
246 * Revision 1.9 2001/02/23 13:46:38 bjornw
247 * Spellling check
249 * Revision 1.8 2001/01/23 14:56:35 markusl
250 * Made use of ser1 optional
251 * Needed by USB
253 * Revision 1.7 2001/01/19 16:14:48 perf
254 * Added kernel options for serial ports 234.
255 * Changed option names from CONFIG_ETRAX100_XYZ to CONFIG_ETRAX_XYZ.
257 * Revision 1.6 2000/11/22 16:36:09 bjornw
258 * Please marketing by using the correct case when spelling Etrax.
260 * Revision 1.5 2000/11/21 16:43:37 bjornw
261 * Fixed so it compiles under CONFIG_SVINTO_SIM
263 * Revision 1.4 2000/11/15 17:34:12 bjornw
264 * Added a timeout timer for flushing input channels. The interrupt-based
265 * fast flush system should be easy to merge with this later (works the same
266 * way, only with an irq instead of a system timer_list)
268 * Revision 1.3 2000/11/13 17:19:57 bjornw
269 * * Incredibly, this almost complete rewrite of serial.c worked (at least
270 * for output) the first time.
272 * Items worth noticing:
274 * No Etrax100 port 1 workarounds (does only compile on 2.4 anyway now)
275 * RS485 is not ported (why can't it be done in userspace as on x86 ?)
276 * Statistics done through async_icount - if any more stats are needed,
277 * that's the place to put them or in an arch-dep version of it.
278 * timeout_interrupt and the other fast timeout stuff not ported yet
279 * There be dragons in this 3k+ line driver
281 * Revision 1.2 2000/11/10 16:50:28 bjornw
282 * First shot at a 2.4 port, does not compile totally yet
284 * Revision 1.1 2000/11/10 16:47:32 bjornw
285 * Added verbatim copy of rev 1.49 etrax100ser.c from elinux
287 * Revision 1.49 2000/10/30 15:47:14 tobiasa
288 * Changed version number.
290 * Revision 1.48 2000/10/25 11:02:43 johana
291 * Changed %ul to %lu in printf's
293 * Revision 1.47 2000/10/18 15:06:53 pkj
294 * Compile correctly with CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST and
295 * CONFIG_ETRAX_SERIAL_PROC_ENTRY together.
296 * Some clean-up of the /proc/serial file.
298 * Revision 1.46 2000/10/16 12:59:40 johana
299 * Added CONFIG_ETRAX_SERIAL_PROC_ENTRY for statistics and debug info.
301 * Revision 1.45 2000/10/13 17:10:59 pkj
302 * Do not flush DMAs while flipping TTY buffers.
304 * Revision 1.44 2000/10/13 16:34:29 pkj
305 * Added a delay in ser_interrupt() for 2.3ms when an error is detected.
306 * We do not know why this delay is required yet, but without it the
307 * irmaflash program does not work (this was the program that needed
308 * the ser_interrupt() to be needed in the first place). This should not
309 * affect normal use of the serial ports.
311 * Revision 1.43 2000/10/13 16:30:44 pkj
312 * New version of the fast flush of serial buffers code. This time
313 * it is localized to the serial driver and uses a fast timer to
314 * do the work.
316 * Revision 1.42 2000/10/13 14:54:26 bennyo
317 * Fix for switching RTS when using rs485
319 * Revision 1.41 2000/10/12 11:43:44 pkj
320 * Cleaned up a number of comments.
322 * Revision 1.40 2000/10/10 11:58:39 johana
323 * Made RS485 support generic for all ports.
324 * Toggle rts in interrupt if no delay wanted.
325 * WARNING: No true transmitter empty check??
326 * Set d_wait bit when sending data so interrupt is delayed until
327 * fifo flushed. (Fix tcdrain() problem)
329 * Revision 1.39 2000/10/04 16:08:02 bjornw
330 * * Use virt_to_phys etc. for DMA addresses
331 * * Removed CONFIG_FLUSH_DMA_FAST hacks
332 * * Indentation fix
334 * Revision 1.38 2000/10/02 12:27:10 mattias
335 * * added variable used when using fast flush on serial dma.
336 * (CONFIG_FLUSH_DMA_FAST)
338 * Revision 1.37 2000/09/27 09:44:24 pkj
339 * Uncomment definition of SERIAL_HANDLE_EARLY_ERRORS.
341 * Revision 1.36 2000/09/20 13:12:52 johana
342 * Support for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS:
343 * Number of timer ticks between flush of receive fifo (1 tick = 10ms).
344 * Try 0-3 for low latency applications. Approx 5 for high load
345 * applications (e.g. PPP). Maybe this should be more adaptive some day...
347 * Revision 1.35 2000/09/20 10:36:08 johana
348 * Typo in get_lsr_info()
350 * Revision 1.34 2000/09/20 10:29:59 johana
351 * Let rs_chars_in_buffer() check fifo content as well.
352 * get_lsr_info() might work now (not tested).
353 * Easier to change the port to debug.
355 * Revision 1.33 2000/09/13 07:52:11 torbjore
356 * Support RS485
358 * Revision 1.32 2000/08/31 14:45:37 bjornw
359 * After sending a break we need to reset the transmit DMA channel
361 * Revision 1.31 2000/06/21 12:13:29 johana
362 * Fixed wait for all chars sent when closing port.
363 * (Used to always take 1 second!)
364 * Added shadows for directions of status/ctrl signals.
366 * Revision 1.30 2000/05/29 16:27:55 bjornw
367 * Simulator ifdef moved a bit
369 * Revision 1.29 2000/05/09 09:40:30 mattias
370 * * Added description of dma registers used in timeout_interrupt
371 * * Removed old code
373 * Revision 1.28 2000/05/08 16:38:58 mattias
374 * * Bugfix for flushing fifo in timeout_interrupt
375 * Problem occurs when bluetooth stack waits for a small number of bytes
376 * containing an event acknowledging free buffers in bluetooth HW
377 * As before, data was stuck in fifo until more data came on uart and
378 * flushed it up to the stack.
380 * Revision 1.27 2000/05/02 09:52:28 jonasd
381 * Added fix for peculiar etrax behaviour when eop is forced on an empty
382 * fifo. This is used when flashing the IRMA chip. Disabled by default.
384 * Revision 1.26 2000/03/29 15:32:02 bjornw
385 * 2.0.34 updates
387 * Revision 1.25 2000/02/16 16:59:36 bjornw
388 * * Receive DMA directly into the flip-buffer, eliminating an intermediary
389 * receive buffer and a memcpy. Will avoid some overruns.
390 * * Error message on debug port if an overrun or flip buffer overrun occurs.
391 * * Just use the first byte in the flag flip buffer for errors.
392 * * Check for timeout on the serial ports only each 5/100 s, not 1/100.
394 * Revision 1.24 2000/02/09 18:02:28 bjornw
395 * * Clear serial errors (overrun, framing, parity) correctly. Before, the
396 * receiver would get stuck if an error occurred and we did not restart
397 * the input DMA.
398 * * Cosmetics (indentation, some code made into inlines)
399 * * Some more debug options
400 * * Actually shut down the serial port (DMA irq, DMA reset, receiver stop)
401 * when the last open is closed. Corresponding fixes in startup().
402 * * rs_close() "tx FIFO wait" code moved into right place, bug & -> && fixed
403 * and make a special case out of port 1 (R_DMA_CHx_STATUS is broken for that)
404 * * e100_disable_rx/enable_rx just disables/enables the receiver, not RTS
406 * Revision 1.23 2000/01/24 17:46:19 johana
407 * Wait for flush of DMA/FIFO when closing port.
409 * Revision 1.22 2000/01/20 18:10:23 johana
410 * Added TIOCMGET ioctl to return modem status.
411 * Implemented modem status/control that works with the extra signals
412 * (DTR, DSR, RI,CD) as well.
413 * 3 different modes supported:
414 * ser0 on PB (Bundy), ser1 on PB (Lisa) and ser2 on PA (Bundy)
415 * Fixed DEF_TX value that caused the serial transmitter pin (txd) to go to 0 when
416 * closing the last filehandle, NASTY!.
417 * Added break generation, not tested though!
418 * Use SA_SHIRQ when request_irq() for ser2 and ser3 (shared with) par0 and par1.
419 * You can't use them at the same time (yet..), but you can hopefully switch
420 * between ser2/par0, ser3/par1 with the same kernel config.
421 * Replaced some magic constants with defines
426 static char *serial_version = "$Revision: 1.25 $";
428 #include <linux/config.h>
429 #include <linux/types.h>
430 #include <linux/errno.h>
431 #include <linux/signal.h>
432 #include <linux/sched.h>
433 #include <linux/timer.h>
434 #include <linux/interrupt.h>
435 #include <linux/tty.h>
436 #include <linux/tty_flip.h>
437 #include <linux/major.h>
438 #include <linux/string.h>
439 #include <linux/fcntl.h>
440 #include <linux/mm.h>
441 #include <linux/slab.h>
442 #include <linux/init.h>
443 #include <asm/uaccess.h>
444 #include <linux/kernel.h>
445 #include <linux/mutex.h>
447 #include <asm/io.h>
448 #include <asm/irq.h>
449 #include <asm/system.h>
450 #include <asm/bitops.h>
451 #include <linux/delay.h>
453 #include <asm/arch/svinto.h>
455 /* non-arch dependent serial structures are in linux/serial.h */
456 #include <linux/serial.h>
457 /* while we keep our own stuff (struct e100_serial) in a local .h file */
458 #include "serial.h"
459 #include <asm/fasttimer.h>
461 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
462 #ifndef CONFIG_ETRAX_FAST_TIMER
463 #error "Enable FAST_TIMER to use SERIAL_FAST_TIMER"
464 #endif
465 #endif
467 #if defined(CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS) && \
468 (CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS == 0)
469 #error "RX_TIMEOUT_TICKS == 0 not allowed, use 1"
470 #endif
472 #if defined(CONFIG_ETRAX_RS485_ON_PA) && defined(CONFIG_ETRAX_RS485_ON_PORT_G)
473 #error "Disable either CONFIG_ETRAX_RS485_ON_PA or CONFIG_ETRAX_RS485_ON_PORT_G"
474 #endif
477 * All of the compatibilty code so we can compile serial.c against
478 * older kernels is hidden in serial_compat.h
480 #if defined(LOCAL_HEADERS)
481 #include "serial_compat.h"
482 #endif
484 #define _INLINE_ inline
486 struct tty_driver *serial_driver;
488 /* serial subtype definitions */
489 #ifndef SERIAL_TYPE_NORMAL
490 #define SERIAL_TYPE_NORMAL 1
491 #endif
493 /* number of characters left in xmit buffer before we ask for more */
494 #define WAKEUP_CHARS 256
496 //#define SERIAL_DEBUG_INTR
497 //#define SERIAL_DEBUG_OPEN
498 //#define SERIAL_DEBUG_FLOW
499 //#define SERIAL_DEBUG_DATA
500 //#define SERIAL_DEBUG_THROTTLE
501 //#define SERIAL_DEBUG_IO /* Debug for Extra control and status pins */
502 //#define SERIAL_DEBUG_LINE 0 /* What serport we want to debug */
504 /* Enable this to use serial interrupts to handle when you
505 expect the first received event on the serial port to
506 be an error, break or similar. Used to be able to flash IRMA
507 from eLinux */
508 #define SERIAL_HANDLE_EARLY_ERRORS
510 /* Defined and used in n_tty.c, but we need it here as well */
511 #define TTY_THRESHOLD_THROTTLE 128
513 /* Due to buffersizes and threshold values, our SERIAL_DESCR_BUF_SIZE
514 * must not be to high or flow control won't work if we leave it to the tty
515 * layer so we have our own throttling in flush_to_flip
516 * TTY_FLIPBUF_SIZE=512,
517 * TTY_THRESHOLD_THROTTLE/UNTHROTTLE=128
518 * BUF_SIZE can't be > 128
520 /* Currently 16 descriptors x 128 bytes = 2048 bytes */
521 #define SERIAL_DESCR_BUF_SIZE 256
523 #define SERIAL_PRESCALE_BASE 3125000 /* 3.125MHz */
524 #define DEF_BAUD_BASE SERIAL_PRESCALE_BASE
526 /* We don't want to load the system with massive fast timer interrupt
527 * on high baudrates so limit it to 250 us (4kHz) */
528 #define MIN_FLUSH_TIME_USEC 250
530 /* Add an x here to log a lot of timer stuff */
531 #define TIMERD(x)
532 /* Debug details of interrupt handling */
533 #define DINTR1(x) /* irq on/off, errors */
534 #define DINTR2(x) /* tx and rx */
535 /* Debug flip buffer stuff */
536 #define DFLIP(x)
537 /* Debug flow control and overview of data flow */
538 #define DFLOW(x)
539 #define DBAUD(x)
540 #define DLOG_INT_TRIG(x)
542 //#define DEBUG_LOG_INCLUDED
543 #ifndef DEBUG_LOG_INCLUDED
544 #define DEBUG_LOG(line, string, value)
545 #else
546 struct debug_log_info
548 unsigned long time;
549 unsigned long timer_data;
550 // int line;
551 const char *string;
552 int value;
554 #define DEBUG_LOG_SIZE 4096
556 struct debug_log_info debug_log[DEBUG_LOG_SIZE];
557 int debug_log_pos = 0;
559 #define DEBUG_LOG(_line, _string, _value) do { \
560 if ((_line) == SERIAL_DEBUG_LINE) {\
561 debug_log_func(_line, _string, _value); \
563 }while(0)
565 void debug_log_func(int line, const char *string, int value)
567 if (debug_log_pos < DEBUG_LOG_SIZE) {
568 debug_log[debug_log_pos].time = jiffies;
569 debug_log[debug_log_pos].timer_data = *R_TIMER_DATA;
570 // debug_log[debug_log_pos].line = line;
571 debug_log[debug_log_pos].string = string;
572 debug_log[debug_log_pos].value = value;
573 debug_log_pos++;
575 /*printk(string, value);*/
577 #endif
579 #ifndef CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS
580 /* Default number of timer ticks before flushing rx fifo
581 * When using "little data, low latency applications: use 0
582 * When using "much data applications (PPP)" use ~5
584 #define CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS 5
585 #endif
587 unsigned long timer_data_to_ns(unsigned long timer_data);
589 static void change_speed(struct e100_serial *info);
590 static void rs_throttle(struct tty_struct * tty);
591 static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
592 static int rs_write(struct tty_struct * tty, int from_user,
593 const unsigned char *buf, int count);
594 extern _INLINE_ int rs_raw_write(struct tty_struct * tty, int from_user,
595 const unsigned char *buf, int count);
596 #ifdef CONFIG_ETRAX_RS485
597 static int e100_write_rs485(struct tty_struct * tty, int from_user,
598 const unsigned char *buf, int count);
599 #endif
600 static int get_lsr_info(struct e100_serial * info, unsigned int *value);
603 #define DEF_BAUD 115200 /* 115.2 kbit/s */
604 #define STD_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
605 #define DEF_RX 0x20 /* or SERIAL_CTRL_W >> 8 */
606 /* Default value of tx_ctrl register: has txd(bit 7)=1 (idle) as default */
607 #define DEF_TX 0x80 /* or SERIAL_CTRL_B */
609 /* offsets from R_SERIALx_CTRL */
611 #define REG_DATA 0
612 #define REG_DATA_STATUS32 0 /* this is the 32 bit register R_SERIALx_READ */
613 #define REG_TR_DATA 0
614 #define REG_STATUS 1
615 #define REG_TR_CTRL 1
616 #define REG_REC_CTRL 2
617 #define REG_BAUD 3
618 #define REG_XOFF 4 /* this is a 32 bit register */
620 /* The bitfields are the same for all serial ports */
621 #define SER_RXD_MASK IO_MASK(R_SERIAL0_STATUS, rxd)
622 #define SER_DATA_AVAIL_MASK IO_MASK(R_SERIAL0_STATUS, data_avail)
623 #define SER_FRAMING_ERR_MASK IO_MASK(R_SERIAL0_STATUS, framing_err)
624 #define SER_PAR_ERR_MASK IO_MASK(R_SERIAL0_STATUS, par_err)
625 #define SER_OVERRUN_MASK IO_MASK(R_SERIAL0_STATUS, overrun)
627 #define SER_ERROR_MASK (SER_OVERRUN_MASK | SER_PAR_ERR_MASK | SER_FRAMING_ERR_MASK)
629 /* Values for info->errorcode */
630 #define ERRCODE_SET_BREAK (TTY_BREAK)
631 #define ERRCODE_INSERT 0x100
632 #define ERRCODE_INSERT_BREAK (ERRCODE_INSERT | TTY_BREAK)
634 #define FORCE_EOP(info) *R_SET_EOP = 1U << info->iseteop;
637 * General note regarding the use of IO_* macros in this file:
639 * We will use the bits defined for DMA channel 6 when using various
640 * IO_* macros (e.g. IO_STATE, IO_MASK, IO_EXTRACT) and _assume_ they are
641 * the same for all channels (which of course they are).
643 * We will also use the bits defined for serial port 0 when writing commands
644 * to the different ports, as these bits too are the same for all ports.
648 /* Mask for the irqs possibly enabled in R_IRQ_MASK1_RD etc. */
649 static const unsigned long e100_ser_int_mask = 0
650 #ifdef CONFIG_ETRAX_SERIAL_PORT0
651 | IO_MASK(R_IRQ_MASK1_RD, ser0_data) | IO_MASK(R_IRQ_MASK1_RD, ser0_ready)
652 #endif
653 #ifdef CONFIG_ETRAX_SERIAL_PORT1
654 | IO_MASK(R_IRQ_MASK1_RD, ser1_data) | IO_MASK(R_IRQ_MASK1_RD, ser1_ready)
655 #endif
656 #ifdef CONFIG_ETRAX_SERIAL_PORT2
657 | IO_MASK(R_IRQ_MASK1_RD, ser2_data) | IO_MASK(R_IRQ_MASK1_RD, ser2_ready)
658 #endif
659 #ifdef CONFIG_ETRAX_SERIAL_PORT3
660 | IO_MASK(R_IRQ_MASK1_RD, ser3_data) | IO_MASK(R_IRQ_MASK1_RD, ser3_ready)
661 #endif
663 unsigned long r_alt_ser_baudrate_shadow = 0;
665 /* this is the data for the four serial ports in the etrax100 */
666 /* DMA2(ser2), DMA4(ser3), DMA6(ser0) or DMA8(ser1) */
667 /* R_DMA_CHx_CLR_INTR, R_DMA_CHx_FIRST, R_DMA_CHx_CMD */
669 static struct e100_serial rs_table[] = {
670 { .baud = DEF_BAUD,
671 .port = (unsigned char *)R_SERIAL0_CTRL,
672 .irq = 1U << 12, /* uses DMA 6 and 7 */
673 .oclrintradr = R_DMA_CH6_CLR_INTR,
674 .ofirstadr = R_DMA_CH6_FIRST,
675 .ocmdadr = R_DMA_CH6_CMD,
676 .ostatusadr = R_DMA_CH6_STATUS,
677 .iclrintradr = R_DMA_CH7_CLR_INTR,
678 .ifirstadr = R_DMA_CH7_FIRST,
679 .icmdadr = R_DMA_CH7_CMD,
680 .idescradr = R_DMA_CH7_DESCR,
681 .flags = STD_FLAGS,
682 .rx_ctrl = DEF_RX,
683 .tx_ctrl = DEF_TX,
684 .iseteop = 2,
685 #ifdef CONFIG_ETRAX_SERIAL_PORT0
686 .enabled = 1,
687 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
688 .dma_out_enabled = 1,
689 #else
690 .dma_out_enabled = 0,
691 #endif
692 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
693 .dma_in_enabled = 1,
694 #else
695 .dma_in_enabled = 0
696 #endif
697 #else
698 .enabled = 0,
699 .dma_out_enabled = 0,
700 .dma_in_enabled = 0
701 #endif
703 }, /* ttyS0 */
704 #ifndef CONFIG_SVINTO_SIM
705 { .baud = DEF_BAUD,
706 .port = (unsigned char *)R_SERIAL1_CTRL,
707 .irq = 1U << 16, /* uses DMA 8 and 9 */
708 .oclrintradr = R_DMA_CH8_CLR_INTR,
709 .ofirstadr = R_DMA_CH8_FIRST,
710 .ocmdadr = R_DMA_CH8_CMD,
711 .ostatusadr = R_DMA_CH8_STATUS,
712 .iclrintradr = R_DMA_CH9_CLR_INTR,
713 .ifirstadr = R_DMA_CH9_FIRST,
714 .icmdadr = R_DMA_CH9_CMD,
715 .idescradr = R_DMA_CH9_DESCR,
716 .flags = STD_FLAGS,
717 .rx_ctrl = DEF_RX,
718 .tx_ctrl = DEF_TX,
719 .iseteop = 3,
720 #ifdef CONFIG_ETRAX_SERIAL_PORT1
721 .enabled = 1,
722 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
723 .dma_out_enabled = 1,
724 #else
725 .dma_out_enabled = 0,
726 #endif
727 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
728 .dma_in_enabled = 1,
729 #else
730 .dma_in_enabled = 0
731 #endif
732 #else
733 .enabled = 0,
734 .dma_out_enabled = 0,
735 .dma_in_enabled = 0
736 #endif
737 }, /* ttyS1 */
739 { .baud = DEF_BAUD,
740 .port = (unsigned char *)R_SERIAL2_CTRL,
741 .irq = 1U << 4, /* uses DMA 2 and 3 */
742 .oclrintradr = R_DMA_CH2_CLR_INTR,
743 .ofirstadr = R_DMA_CH2_FIRST,
744 .ocmdadr = R_DMA_CH2_CMD,
745 .ostatusadr = R_DMA_CH2_STATUS,
746 .iclrintradr = R_DMA_CH3_CLR_INTR,
747 .ifirstadr = R_DMA_CH3_FIRST,
748 .icmdadr = R_DMA_CH3_CMD,
749 .idescradr = R_DMA_CH3_DESCR,
750 .flags = STD_FLAGS,
751 .rx_ctrl = DEF_RX,
752 .tx_ctrl = DEF_TX,
753 .iseteop = 0,
754 #ifdef CONFIG_ETRAX_SERIAL_PORT2
755 .enabled = 1,
756 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
757 .dma_out_enabled = 1,
758 #else
759 .dma_out_enabled = 0,
760 #endif
761 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
762 .dma_in_enabled = 1,
763 #else
764 .dma_in_enabled = 0
765 #endif
766 #else
767 .enabled = 0,
768 .dma_out_enabled = 0,
769 .dma_in_enabled = 0
770 #endif
771 }, /* ttyS2 */
773 { .baud = DEF_BAUD,
774 .port = (unsigned char *)R_SERIAL3_CTRL,
775 .irq = 1U << 8, /* uses DMA 4 and 5 */
776 .oclrintradr = R_DMA_CH4_CLR_INTR,
777 .ofirstadr = R_DMA_CH4_FIRST,
778 .ocmdadr = R_DMA_CH4_CMD,
779 .ostatusadr = R_DMA_CH4_STATUS,
780 .iclrintradr = R_DMA_CH5_CLR_INTR,
781 .ifirstadr = R_DMA_CH5_FIRST,
782 .icmdadr = R_DMA_CH5_CMD,
783 .idescradr = R_DMA_CH5_DESCR,
784 .flags = STD_FLAGS,
785 .rx_ctrl = DEF_RX,
786 .tx_ctrl = DEF_TX,
787 .iseteop = 1,
788 #ifdef CONFIG_ETRAX_SERIAL_PORT3
789 .enabled = 1,
790 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
791 .dma_out_enabled = 1,
792 #else
793 .dma_out_enabled = 0,
794 #endif
795 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
796 .dma_in_enabled = 1,
797 #else
798 .dma_in_enabled = 0
799 #endif
800 #else
801 .enabled = 0,
802 .dma_out_enabled = 0,
803 .dma_in_enabled = 0
804 #endif
805 } /* ttyS3 */
806 #endif
810 #define NR_PORTS (sizeof(rs_table)/sizeof(struct e100_serial))
812 static struct termios *serial_termios[NR_PORTS];
813 static struct termios *serial_termios_locked[NR_PORTS];
814 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
815 static struct fast_timer fast_timers[NR_PORTS];
816 #endif
818 #ifdef CONFIG_ETRAX_SERIAL_PROC_ENTRY
819 #define PROCSTAT(x) x
820 struct ser_statistics_type {
821 int overrun_cnt;
822 int early_errors_cnt;
823 int ser_ints_ok_cnt;
824 int errors_cnt;
825 unsigned long int processing_flip;
826 unsigned long processing_flip_still_room;
827 unsigned long int timeout_flush_cnt;
828 int rx_dma_ints;
829 int tx_dma_ints;
830 int rx_tot;
831 int tx_tot;
834 static struct ser_statistics_type ser_stat[NR_PORTS];
836 #else
838 #define PROCSTAT(x)
840 #endif /* CONFIG_ETRAX_SERIAL_PROC_ENTRY */
842 /* RS-485 */
843 #if defined(CONFIG_ETRAX_RS485)
844 #ifdef CONFIG_ETRAX_FAST_TIMER
845 static struct fast_timer fast_timers_rs485[NR_PORTS];
846 #endif
847 #if defined(CONFIG_ETRAX_RS485_ON_PA)
848 static int rs485_pa_bit = CONFIG_ETRAX_RS485_ON_PA_BIT;
849 #endif
850 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
851 static int rs485_port_g_bit = CONFIG_ETRAX_RS485_ON_PORT_G_BIT;
852 #endif
853 #endif
855 /* Info and macros needed for each ports extra control/status signals. */
856 #define E100_STRUCT_PORT(line, pinname) \
857 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
858 (R_PORT_PA_DATA): ( \
859 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
860 (R_PORT_PB_DATA):&dummy_ser[line]))
862 #define E100_STRUCT_SHADOW(line, pinname) \
863 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
864 (&port_pa_data_shadow): ( \
865 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
866 (&port_pb_data_shadow):&dummy_ser[line]))
867 #define E100_STRUCT_MASK(line, pinname) \
868 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
869 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT): ( \
870 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
871 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT):DUMMY_##pinname##_MASK))
873 #define DUMMY_DTR_MASK 1
874 #define DUMMY_RI_MASK 2
875 #define DUMMY_DSR_MASK 4
876 #define DUMMY_CD_MASK 8
877 static unsigned char dummy_ser[NR_PORTS] = {0xFF, 0xFF, 0xFF,0xFF};
879 /* If not all status pins are used or disabled, use mixed mode */
880 #ifdef CONFIG_ETRAX_SERIAL_PORT0
882 #define SER0_PA_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PA_BIT+CONFIG_ETRAX_SER0_RI_ON_PA_BIT+CONFIG_ETRAX_SER0_DSR_ON_PA_BIT+CONFIG_ETRAX_SER0_CD_ON_PA_BIT)
884 #if SER0_PA_BITSUM != -4
885 # if CONFIG_ETRAX_SER0_DTR_ON_PA_BIT == -1
886 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
887 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
888 # endif
889 # endif
890 # if CONFIG_ETRAX_SER0_RI_ON_PA_BIT == -1
891 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
892 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
893 # endif
894 # endif
895 # if CONFIG_ETRAX_SER0_DSR_ON_PA_BIT == -1
896 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
897 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
898 # endif
899 # endif
900 # if CONFIG_ETRAX_SER0_CD_ON_PA_BIT == -1
901 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
902 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
903 # endif
904 # endif
905 #endif
907 #define SER0_PB_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PB_BIT+CONFIG_ETRAX_SER0_RI_ON_PB_BIT+CONFIG_ETRAX_SER0_DSR_ON_PB_BIT+CONFIG_ETRAX_SER0_CD_ON_PB_BIT)
909 #if SER0_PB_BITSUM != -4
910 # if CONFIG_ETRAX_SER0_DTR_ON_PB_BIT == -1
911 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
912 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
913 # endif
914 # endif
915 # if CONFIG_ETRAX_SER0_RI_ON_PB_BIT == -1
916 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
917 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
918 # endif
919 # endif
920 # if CONFIG_ETRAX_SER0_DSR_ON_PB_BIT == -1
921 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
922 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
923 # endif
924 # endif
925 # if CONFIG_ETRAX_SER0_CD_ON_PB_BIT == -1
926 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
927 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
928 # endif
929 # endif
930 #endif
932 #endif /* PORT0 */
935 #ifdef CONFIG_ETRAX_SERIAL_PORT1
937 #define SER1_PA_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PA_BIT+CONFIG_ETRAX_SER1_RI_ON_PA_BIT+CONFIG_ETRAX_SER1_DSR_ON_PA_BIT+CONFIG_ETRAX_SER1_CD_ON_PA_BIT)
939 #if SER1_PA_BITSUM != -4
940 # if CONFIG_ETRAX_SER1_DTR_ON_PA_BIT == -1
941 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
942 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
943 # endif
944 # endif
945 # if CONFIG_ETRAX_SER1_RI_ON_PA_BIT == -1
946 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
947 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
948 # endif
949 # endif
950 # if CONFIG_ETRAX_SER1_DSR_ON_PA_BIT == -1
951 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
952 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
953 # endif
954 # endif
955 # if CONFIG_ETRAX_SER1_CD_ON_PA_BIT == -1
956 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
957 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
958 # endif
959 # endif
960 #endif
962 #define SER1_PB_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PB_BIT+CONFIG_ETRAX_SER1_RI_ON_PB_BIT+CONFIG_ETRAX_SER1_DSR_ON_PB_BIT+CONFIG_ETRAX_SER1_CD_ON_PB_BIT)
964 #if SER1_PB_BITSUM != -4
965 # if CONFIG_ETRAX_SER1_DTR_ON_PB_BIT == -1
966 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
967 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
968 # endif
969 # endif
970 # if CONFIG_ETRAX_SER1_RI_ON_PB_BIT == -1
971 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
972 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
973 # endif
974 # endif
975 # if CONFIG_ETRAX_SER1_DSR_ON_PB_BIT == -1
976 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
977 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
978 # endif
979 # endif
980 # if CONFIG_ETRAX_SER1_CD_ON_PB_BIT == -1
981 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
982 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
983 # endif
984 # endif
985 #endif
987 #endif /* PORT1 */
989 #ifdef CONFIG_ETRAX_SERIAL_PORT2
991 #define SER2_PA_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PA_BIT+CONFIG_ETRAX_SER2_RI_ON_PA_BIT+CONFIG_ETRAX_SER2_DSR_ON_PA_BIT+CONFIG_ETRAX_SER2_CD_ON_PA_BIT)
993 #if SER2_PA_BITSUM != -4
994 # if CONFIG_ETRAX_SER2_DTR_ON_PA_BIT == -1
995 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
996 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
997 # endif
998 # endif
999 # if CONFIG_ETRAX_SER2_RI_ON_PA_BIT == -1
1000 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1001 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1002 # endif
1003 # endif
1004 # if CONFIG_ETRAX_SER2_DSR_ON_PA_BIT == -1
1005 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1006 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1007 # endif
1008 # endif
1009 # if CONFIG_ETRAX_SER2_CD_ON_PA_BIT == -1
1010 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1011 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1012 # endif
1013 # endif
1014 #endif
1016 #define SER2_PB_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PB_BIT+CONFIG_ETRAX_SER2_RI_ON_PB_BIT+CONFIG_ETRAX_SER2_DSR_ON_PB_BIT+CONFIG_ETRAX_SER2_CD_ON_PB_BIT)
1018 #if SER2_PB_BITSUM != -4
1019 # if CONFIG_ETRAX_SER2_DTR_ON_PB_BIT == -1
1020 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1021 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1022 # endif
1023 # endif
1024 # if CONFIG_ETRAX_SER2_RI_ON_PB_BIT == -1
1025 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1026 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1027 # endif
1028 # endif
1029 # if CONFIG_ETRAX_SER2_DSR_ON_PB_BIT == -1
1030 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1031 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1032 # endif
1033 # endif
1034 # if CONFIG_ETRAX_SER2_CD_ON_PB_BIT == -1
1035 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1036 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1037 # endif
1038 # endif
1039 #endif
1041 #endif /* PORT2 */
1043 #ifdef CONFIG_ETRAX_SERIAL_PORT3
1045 #define SER3_PA_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PA_BIT+CONFIG_ETRAX_SER3_RI_ON_PA_BIT+CONFIG_ETRAX_SER3_DSR_ON_PA_BIT+CONFIG_ETRAX_SER3_CD_ON_PA_BIT)
1047 #if SER3_PA_BITSUM != -4
1048 # if CONFIG_ETRAX_SER3_DTR_ON_PA_BIT == -1
1049 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1050 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1051 # endif
1052 # endif
1053 # if CONFIG_ETRAX_SER3_RI_ON_PA_BIT == -1
1054 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1055 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1056 # endif
1057 # endif
1058 # if CONFIG_ETRAX_SER3_DSR_ON_PA_BIT == -1
1059 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1060 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1061 # endif
1062 # endif
1063 # if CONFIG_ETRAX_SER3_CD_ON_PA_BIT == -1
1064 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1065 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1066 # endif
1067 # endif
1068 #endif
1070 #define SER3_PB_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PB_BIT+CONFIG_ETRAX_SER3_RI_ON_PB_BIT+CONFIG_ETRAX_SER3_DSR_ON_PB_BIT+CONFIG_ETRAX_SER3_CD_ON_PB_BIT)
1072 #if SER3_PB_BITSUM != -4
1073 # if CONFIG_ETRAX_SER3_DTR_ON_PB_BIT == -1
1074 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1075 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1076 # endif
1077 # endif
1078 # if CONFIG_ETRAX_SER3_RI_ON_PB_BIT == -1
1079 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1080 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1081 # endif
1082 # endif
1083 # if CONFIG_ETRAX_SER3_DSR_ON_PB_BIT == -1
1084 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1085 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1086 # endif
1087 # endif
1088 # if CONFIG_ETRAX_SER3_CD_ON_PB_BIT == -1
1089 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1090 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1091 # endif
1092 # endif
1093 #endif
1095 #endif /* PORT3 */
1098 #if defined(CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED) || \
1099 defined(CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED) || \
1100 defined(CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED) || \
1101 defined(CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED)
1102 #define CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
1103 #endif
1105 #ifdef CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
1106 /* The pins can be mixed on PA and PB */
1107 #define CONTROL_PINS_PORT_NOT_USED(line) \
1108 &dummy_ser[line], &dummy_ser[line], \
1109 &dummy_ser[line], &dummy_ser[line], \
1110 &dummy_ser[line], &dummy_ser[line], \
1111 &dummy_ser[line], &dummy_ser[line], \
1112 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
1115 struct control_pins
1117 volatile unsigned char *dtr_port;
1118 unsigned char *dtr_shadow;
1119 volatile unsigned char *ri_port;
1120 unsigned char *ri_shadow;
1121 volatile unsigned char *dsr_port;
1122 unsigned char *dsr_shadow;
1123 volatile unsigned char *cd_port;
1124 unsigned char *cd_shadow;
1126 unsigned char dtr_mask;
1127 unsigned char ri_mask;
1128 unsigned char dsr_mask;
1129 unsigned char cd_mask;
1132 static const struct control_pins e100_modem_pins[NR_PORTS] =
1134 /* Ser 0 */
1136 #ifdef CONFIG_ETRAX_SERIAL_PORT0
1137 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
1138 E100_STRUCT_PORT(0,RI), E100_STRUCT_SHADOW(0,RI),
1139 E100_STRUCT_PORT(0,DSR), E100_STRUCT_SHADOW(0,DSR),
1140 E100_STRUCT_PORT(0,CD), E100_STRUCT_SHADOW(0,CD),
1141 E100_STRUCT_MASK(0,DTR),
1142 E100_STRUCT_MASK(0,RI),
1143 E100_STRUCT_MASK(0,DSR),
1144 E100_STRUCT_MASK(0,CD)
1145 #else
1146 CONTROL_PINS_PORT_NOT_USED(0)
1147 #endif
1150 /* Ser 1 */
1152 #ifdef CONFIG_ETRAX_SERIAL_PORT1
1153 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
1154 E100_STRUCT_PORT(1,RI), E100_STRUCT_SHADOW(1,RI),
1155 E100_STRUCT_PORT(1,DSR), E100_STRUCT_SHADOW(1,DSR),
1156 E100_STRUCT_PORT(1,CD), E100_STRUCT_SHADOW(1,CD),
1157 E100_STRUCT_MASK(1,DTR),
1158 E100_STRUCT_MASK(1,RI),
1159 E100_STRUCT_MASK(1,DSR),
1160 E100_STRUCT_MASK(1,CD)
1161 #else
1162 CONTROL_PINS_PORT_NOT_USED(1)
1163 #endif
1166 /* Ser 2 */
1168 #ifdef CONFIG_ETRAX_SERIAL_PORT2
1169 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
1170 E100_STRUCT_PORT(2,RI), E100_STRUCT_SHADOW(2,RI),
1171 E100_STRUCT_PORT(2,DSR), E100_STRUCT_SHADOW(2,DSR),
1172 E100_STRUCT_PORT(2,CD), E100_STRUCT_SHADOW(2,CD),
1173 E100_STRUCT_MASK(2,DTR),
1174 E100_STRUCT_MASK(2,RI),
1175 E100_STRUCT_MASK(2,DSR),
1176 E100_STRUCT_MASK(2,CD)
1177 #else
1178 CONTROL_PINS_PORT_NOT_USED(2)
1179 #endif
1182 /* Ser 3 */
1184 #ifdef CONFIG_ETRAX_SERIAL_PORT3
1185 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
1186 E100_STRUCT_PORT(3,RI), E100_STRUCT_SHADOW(3,RI),
1187 E100_STRUCT_PORT(3,DSR), E100_STRUCT_SHADOW(3,DSR),
1188 E100_STRUCT_PORT(3,CD), E100_STRUCT_SHADOW(3,CD),
1189 E100_STRUCT_MASK(3,DTR),
1190 E100_STRUCT_MASK(3,RI),
1191 E100_STRUCT_MASK(3,DSR),
1192 E100_STRUCT_MASK(3,CD)
1193 #else
1194 CONTROL_PINS_PORT_NOT_USED(3)
1195 #endif
1198 #else /* CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
1200 /* All pins are on either PA or PB for each serial port */
1201 #define CONTROL_PINS_PORT_NOT_USED(line) \
1202 &dummy_ser[line], &dummy_ser[line], \
1203 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
1206 struct control_pins
1208 volatile unsigned char *port;
1209 unsigned char *shadow;
1211 unsigned char dtr_mask;
1212 unsigned char ri_mask;
1213 unsigned char dsr_mask;
1214 unsigned char cd_mask;
1217 #define dtr_port port
1218 #define dtr_shadow shadow
1219 #define ri_port port
1220 #define ri_shadow shadow
1221 #define dsr_port port
1222 #define dsr_shadow shadow
1223 #define cd_port port
1224 #define cd_shadow shadow
1226 static const struct control_pins e100_modem_pins[NR_PORTS] =
1228 /* Ser 0 */
1230 #ifdef CONFIG_ETRAX_SERIAL_PORT0
1231 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
1232 E100_STRUCT_MASK(0,DTR),
1233 E100_STRUCT_MASK(0,RI),
1234 E100_STRUCT_MASK(0,DSR),
1235 E100_STRUCT_MASK(0,CD)
1236 #else
1237 CONTROL_PINS_PORT_NOT_USED(0)
1238 #endif
1241 /* Ser 1 */
1243 #ifdef CONFIG_ETRAX_SERIAL_PORT1
1244 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
1245 E100_STRUCT_MASK(1,DTR),
1246 E100_STRUCT_MASK(1,RI),
1247 E100_STRUCT_MASK(1,DSR),
1248 E100_STRUCT_MASK(1,CD)
1249 #else
1250 CONTROL_PINS_PORT_NOT_USED(1)
1251 #endif
1254 /* Ser 2 */
1256 #ifdef CONFIG_ETRAX_SERIAL_PORT2
1257 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
1258 E100_STRUCT_MASK(2,DTR),
1259 E100_STRUCT_MASK(2,RI),
1260 E100_STRUCT_MASK(2,DSR),
1261 E100_STRUCT_MASK(2,CD)
1262 #else
1263 CONTROL_PINS_PORT_NOT_USED(2)
1264 #endif
1267 /* Ser 3 */
1269 #ifdef CONFIG_ETRAX_SERIAL_PORT3
1270 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
1271 E100_STRUCT_MASK(3,DTR),
1272 E100_STRUCT_MASK(3,RI),
1273 E100_STRUCT_MASK(3,DSR),
1274 E100_STRUCT_MASK(3,CD)
1275 #else
1276 CONTROL_PINS_PORT_NOT_USED(3)
1277 #endif
1280 #endif /* !CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
1282 #define E100_RTS_MASK 0x20
1283 #define E100_CTS_MASK 0x40
1285 /* All serial port signals are active low:
1286 * active = 0 -> 3.3V to RS-232 driver -> -12V on RS-232 level
1287 * inactive = 1 -> 0V to RS-232 driver -> +12V on RS-232 level
1289 * These macros returns the pin value: 0=0V, >=1 = 3.3V on ETRAX chip
1292 /* Output */
1293 #define E100_RTS_GET(info) ((info)->rx_ctrl & E100_RTS_MASK)
1294 /* Input */
1295 #define E100_CTS_GET(info) ((info)->port[REG_STATUS] & E100_CTS_MASK)
1297 /* These are typically PA or PB and 0 means 0V, 1 means 3.3V */
1298 /* Is an output */
1299 #define E100_DTR_GET(info) ((*e100_modem_pins[(info)->line].dtr_shadow) & e100_modem_pins[(info)->line].dtr_mask)
1301 /* Normally inputs */
1302 #define E100_RI_GET(info) ((*e100_modem_pins[(info)->line].ri_port) & e100_modem_pins[(info)->line].ri_mask)
1303 #define E100_CD_GET(info) ((*e100_modem_pins[(info)->line].cd_port) & e100_modem_pins[(info)->line].cd_mask)
1305 /* Input */
1306 #define E100_DSR_GET(info) ((*e100_modem_pins[(info)->line].dsr_port) & e100_modem_pins[(info)->line].dsr_mask)
1310 * tmp_buf is used as a temporary buffer by serial_write. We need to
1311 * lock it in case the memcpy_fromfs blocks while swapping in a page,
1312 * and some other program tries to do a serial write at the same time.
1313 * Since the lock will only come under contention when the system is
1314 * swapping and available memory is low, it makes sense to share one
1315 * buffer across all the serial ports, since it significantly saves
1316 * memory if large numbers of serial ports are open.
1318 static unsigned char *tmp_buf;
1319 static DEFINE_MUTEX(tmp_buf_mutex);
1321 /* Calculate the chartime depending on baudrate, numbor of bits etc. */
1322 static void update_char_time(struct e100_serial * info)
1324 tcflag_t cflags = info->tty->termios->c_cflag;
1325 int bits;
1327 /* calc. number of bits / data byte */
1328 /* databits + startbit and 1 stopbit */
1329 if ((cflags & CSIZE) == CS7)
1330 bits = 9;
1331 else
1332 bits = 10;
1334 if (cflags & CSTOPB) /* 2 stopbits ? */
1335 bits++;
1337 if (cflags & PARENB) /* parity bit ? */
1338 bits++;
1340 /* calc timeout */
1341 info->char_time_usec = ((bits * 1000000) / info->baud) + 1;
1342 info->flush_time_usec = 4*info->char_time_usec;
1343 if (info->flush_time_usec < MIN_FLUSH_TIME_USEC)
1344 info->flush_time_usec = MIN_FLUSH_TIME_USEC;
1349 * This function maps from the Bxxxx defines in asm/termbits.h into real
1350 * baud rates.
1353 static int
1354 cflag_to_baud(unsigned int cflag)
1356 static int baud_table[] = {
1357 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400,
1358 4800, 9600, 19200, 38400 };
1360 static int ext_baud_table[] = {
1361 0, 57600, 115200, 230400, 460800, 921600, 1843200, 6250000,
1362 0, 0, 0, 0, 0, 0, 0, 0 };
1364 if (cflag & CBAUDEX)
1365 return ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1366 else
1367 return baud_table[cflag & CBAUD];
1370 /* and this maps to an etrax100 hardware baud constant */
1372 static unsigned char
1373 cflag_to_etrax_baud(unsigned int cflag)
1375 char retval;
1377 static char baud_table[] = {
1378 -1, -1, -1, -1, -1, -1, -1, 0, 1, 2, -1, 3, 4, 5, 6, 7 };
1380 static char ext_baud_table[] = {
1381 -1, 8, 9, 10, 11, 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1 };
1383 if (cflag & CBAUDEX)
1384 retval = ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1385 else
1386 retval = baud_table[cflag & CBAUD];
1388 if (retval < 0) {
1389 printk(KERN_WARNING "serdriver tried setting invalid baud rate, flags %x.\n", cflag);
1390 retval = 5; /* choose default 9600 instead */
1393 return retval | (retval << 4); /* choose same for both TX and RX */
1397 /* Various static support functions */
1399 /* Functions to set or clear DTR/RTS on the requested line */
1400 /* It is complicated by the fact that RTS is a serial port register, while
1401 * DTR might not be implemented in the HW at all, and if it is, it can be on
1402 * any general port.
1406 static inline void
1407 e100_dtr(struct e100_serial *info, int set)
1409 #ifndef CONFIG_SVINTO_SIM
1410 unsigned char mask = e100_modem_pins[info->line].dtr_mask;
1412 #ifdef SERIAL_DEBUG_IO
1413 printk("ser%i dtr %i mask: 0x%02X\n", info->line, set, mask);
1414 printk("ser%i shadow before 0x%02X get: %i\n",
1415 info->line, *e100_modem_pins[info->line].dtr_shadow,
1416 E100_DTR_GET(info));
1417 #endif
1418 /* DTR is active low */
1420 unsigned long flags;
1422 save_flags(flags);
1423 cli();
1424 *e100_modem_pins[info->line].dtr_shadow &= ~mask;
1425 *e100_modem_pins[info->line].dtr_shadow |= (set ? 0 : mask);
1426 *e100_modem_pins[info->line].dtr_port = *e100_modem_pins[info->line].dtr_shadow;
1427 restore_flags(flags);
1430 #ifdef SERIAL_DEBUG_IO
1431 printk("ser%i shadow after 0x%02X get: %i\n",
1432 info->line, *e100_modem_pins[info->line].dtr_shadow,
1433 E100_DTR_GET(info));
1434 #endif
1435 #endif
1438 /* set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
1439 * 0=0V , 1=3.3V
1441 static inline void
1442 e100_rts(struct e100_serial *info, int set)
1444 #ifndef CONFIG_SVINTO_SIM
1445 unsigned long flags;
1446 save_flags(flags);
1447 cli();
1448 info->rx_ctrl &= ~E100_RTS_MASK;
1449 info->rx_ctrl |= (set ? 0 : E100_RTS_MASK); /* RTS is active low */
1450 info->port[REG_REC_CTRL] = info->rx_ctrl;
1451 restore_flags(flags);
1452 #ifdef SERIAL_DEBUG_IO
1453 printk("ser%i rts %i\n", info->line, set);
1454 #endif
1455 #endif
1459 /* If this behaves as a modem, RI and CD is an output */
1460 static inline void
1461 e100_ri_out(struct e100_serial *info, int set)
1463 #ifndef CONFIG_SVINTO_SIM
1464 /* RI is active low */
1466 unsigned char mask = e100_modem_pins[info->line].ri_mask;
1467 unsigned long flags;
1469 save_flags(flags);
1470 cli();
1471 *e100_modem_pins[info->line].ri_shadow &= ~mask;
1472 *e100_modem_pins[info->line].ri_shadow |= (set ? 0 : mask);
1473 *e100_modem_pins[info->line].ri_port = *e100_modem_pins[info->line].ri_shadow;
1474 restore_flags(flags);
1476 #endif
1478 static inline void
1479 e100_cd_out(struct e100_serial *info, int set)
1481 #ifndef CONFIG_SVINTO_SIM
1482 /* CD is active low */
1484 unsigned char mask = e100_modem_pins[info->line].cd_mask;
1485 unsigned long flags;
1487 save_flags(flags);
1488 cli();
1489 *e100_modem_pins[info->line].cd_shadow &= ~mask;
1490 *e100_modem_pins[info->line].cd_shadow |= (set ? 0 : mask);
1491 *e100_modem_pins[info->line].cd_port = *e100_modem_pins[info->line].cd_shadow;
1492 restore_flags(flags);
1494 #endif
1497 static inline void
1498 e100_disable_rx(struct e100_serial *info)
1500 #ifndef CONFIG_SVINTO_SIM
1501 /* disable the receiver */
1502 info->port[REG_REC_CTRL] =
1503 (info->rx_ctrl &= ~IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1504 #endif
1507 static inline void
1508 e100_enable_rx(struct e100_serial *info)
1510 #ifndef CONFIG_SVINTO_SIM
1511 /* enable the receiver */
1512 info->port[REG_REC_CTRL] =
1513 (info->rx_ctrl |= IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1514 #endif
1517 /* the rx DMA uses both the dma_descr and the dma_eop interrupts */
1519 static inline void
1520 e100_disable_rxdma_irq(struct e100_serial *info)
1522 #ifdef SERIAL_DEBUG_INTR
1523 printk("rxdma_irq(%d): 0\n",info->line);
1524 #endif
1525 DINTR1(DEBUG_LOG(info->line,"IRQ disable_rxdma_irq %i\n", info->line));
1526 *R_IRQ_MASK2_CLR = (info->irq << 2) | (info->irq << 3);
1529 static inline void
1530 e100_enable_rxdma_irq(struct e100_serial *info)
1532 #ifdef SERIAL_DEBUG_INTR
1533 printk("rxdma_irq(%d): 1\n",info->line);
1534 #endif
1535 DINTR1(DEBUG_LOG(info->line,"IRQ enable_rxdma_irq %i\n", info->line));
1536 *R_IRQ_MASK2_SET = (info->irq << 2) | (info->irq << 3);
1539 /* the tx DMA uses only dma_descr interrupt */
1541 static _INLINE_ void
1542 e100_disable_txdma_irq(struct e100_serial *info)
1544 #ifdef SERIAL_DEBUG_INTR
1545 printk("txdma_irq(%d): 0\n",info->line);
1546 #endif
1547 DINTR1(DEBUG_LOG(info->line,"IRQ disable_txdma_irq %i\n", info->line));
1548 *R_IRQ_MASK2_CLR = info->irq;
1551 static _INLINE_ void
1552 e100_enable_txdma_irq(struct e100_serial *info)
1554 #ifdef SERIAL_DEBUG_INTR
1555 printk("txdma_irq(%d): 1\n",info->line);
1556 #endif
1557 DINTR1(DEBUG_LOG(info->line,"IRQ enable_txdma_irq %i\n", info->line));
1558 *R_IRQ_MASK2_SET = info->irq;
1561 static _INLINE_ void
1562 e100_disable_txdma_channel(struct e100_serial *info)
1564 unsigned long flags;
1566 /* Disable output DMA channel for the serial port in question
1567 * ( set to something other then serialX)
1569 save_flags(flags);
1570 cli();
1571 DFLOW(DEBUG_LOG(info->line, "disable_txdma_channel %i\n", info->line));
1572 if (info->line == 0) {
1573 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma6)) ==
1574 IO_STATE(R_GEN_CONFIG, dma6, serial0)) {
1575 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1576 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, unused);
1578 } else if (info->line == 1) {
1579 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma8)) ==
1580 IO_STATE(R_GEN_CONFIG, dma8, serial1)) {
1581 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1582 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, usb);
1584 } else if (info->line == 2) {
1585 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma2)) ==
1586 IO_STATE(R_GEN_CONFIG, dma2, serial2)) {
1587 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1588 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, par0);
1590 } else if (info->line == 3) {
1591 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma4)) ==
1592 IO_STATE(R_GEN_CONFIG, dma4, serial3)) {
1593 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1594 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, par1);
1597 *R_GEN_CONFIG = genconfig_shadow;
1598 restore_flags(flags);
1602 static _INLINE_ void
1603 e100_enable_txdma_channel(struct e100_serial *info)
1605 unsigned long flags;
1607 save_flags(flags);
1608 cli();
1609 DFLOW(DEBUG_LOG(info->line, "enable_txdma_channel %i\n", info->line));
1610 /* Enable output DMA channel for the serial port in question */
1611 if (info->line == 0) {
1612 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1613 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, serial0);
1614 } else if (info->line == 1) {
1615 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1616 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, serial1);
1617 } else if (info->line == 2) {
1618 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1619 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, serial2);
1620 } else if (info->line == 3) {
1621 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1622 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, serial3);
1624 *R_GEN_CONFIG = genconfig_shadow;
1625 restore_flags(flags);
1628 static _INLINE_ void
1629 e100_disable_rxdma_channel(struct e100_serial *info)
1631 unsigned long flags;
1633 /* Disable input DMA channel for the serial port in question
1634 * ( set to something other then serialX)
1636 save_flags(flags);
1637 cli();
1638 if (info->line == 0) {
1639 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma7)) ==
1640 IO_STATE(R_GEN_CONFIG, dma7, serial0)) {
1641 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1642 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, unused);
1644 } else if (info->line == 1) {
1645 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma9)) ==
1646 IO_STATE(R_GEN_CONFIG, dma9, serial1)) {
1647 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1648 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, usb);
1650 } else if (info->line == 2) {
1651 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma3)) ==
1652 IO_STATE(R_GEN_CONFIG, dma3, serial2)) {
1653 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1654 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, par0);
1656 } else if (info->line == 3) {
1657 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma5)) ==
1658 IO_STATE(R_GEN_CONFIG, dma5, serial3)) {
1659 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1660 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, par1);
1663 *R_GEN_CONFIG = genconfig_shadow;
1664 restore_flags(flags);
1668 static _INLINE_ void
1669 e100_enable_rxdma_channel(struct e100_serial *info)
1671 unsigned long flags;
1673 save_flags(flags);
1674 cli();
1675 /* Enable input DMA channel for the serial port in question */
1676 if (info->line == 0) {
1677 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1678 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, serial0);
1679 } else if (info->line == 1) {
1680 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1681 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, serial1);
1682 } else if (info->line == 2) {
1683 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1684 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, serial2);
1685 } else if (info->line == 3) {
1686 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1687 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, serial3);
1689 *R_GEN_CONFIG = genconfig_shadow;
1690 restore_flags(flags);
1693 #ifdef SERIAL_HANDLE_EARLY_ERRORS
1694 /* in order to detect and fix errors on the first byte
1695 we have to use the serial interrupts as well. */
1697 static inline void
1698 e100_disable_serial_data_irq(struct e100_serial *info)
1700 #ifdef SERIAL_DEBUG_INTR
1701 printk("ser_irq(%d): 0\n",info->line);
1702 #endif
1703 DINTR1(DEBUG_LOG(info->line,"IRQ disable data_irq %i\n", info->line));
1704 *R_IRQ_MASK1_CLR = (1U << (8+2*info->line));
1707 static inline void
1708 e100_enable_serial_data_irq(struct e100_serial *info)
1710 #ifdef SERIAL_DEBUG_INTR
1711 printk("ser_irq(%d): 1\n",info->line);
1712 printk("**** %d = %d\n",
1713 (8+2*info->line),
1714 (1U << (8+2*info->line)));
1715 #endif
1716 DINTR1(DEBUG_LOG(info->line,"IRQ enable data_irq %i\n", info->line));
1717 *R_IRQ_MASK1_SET = (1U << (8+2*info->line));
1719 #endif
1721 static inline void
1722 e100_disable_serial_tx_ready_irq(struct e100_serial *info)
1724 #ifdef SERIAL_DEBUG_INTR
1725 printk("ser_tx_irq(%d): 0\n",info->line);
1726 #endif
1727 DINTR1(DEBUG_LOG(info->line,"IRQ disable ready_irq %i\n", info->line));
1728 *R_IRQ_MASK1_CLR = (1U << (8+1+2*info->line));
1731 static inline void
1732 e100_enable_serial_tx_ready_irq(struct e100_serial *info)
1734 #ifdef SERIAL_DEBUG_INTR
1735 printk("ser_tx_irq(%d): 1\n",info->line);
1736 printk("**** %d = %d\n",
1737 (8+1+2*info->line),
1738 (1U << (8+1+2*info->line)));
1739 #endif
1740 DINTR2(DEBUG_LOG(info->line,"IRQ enable ready_irq %i\n", info->line));
1741 *R_IRQ_MASK1_SET = (1U << (8+1+2*info->line));
1744 static inline void e100_enable_rx_irq(struct e100_serial *info)
1746 if (info->uses_dma_in)
1747 e100_enable_rxdma_irq(info);
1748 else
1749 e100_enable_serial_data_irq(info);
1751 static inline void e100_disable_rx_irq(struct e100_serial *info)
1753 if (info->uses_dma_in)
1754 e100_disable_rxdma_irq(info);
1755 else
1756 e100_disable_serial_data_irq(info);
1759 #if defined(CONFIG_ETRAX_RS485)
1760 /* Enable RS-485 mode on selected port. This is UGLY. */
1761 static int
1762 e100_enable_rs485(struct tty_struct *tty,struct rs485_control *r)
1764 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1766 #if defined(CONFIG_ETRAX_RS485_ON_PA)
1767 *R_PORT_PA_DATA = port_pa_data_shadow |= (1 << rs485_pa_bit);
1768 #endif
1769 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
1770 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1771 rs485_port_g_bit, 1);
1772 #endif
1773 #if defined(CONFIG_ETRAX_RS485_LTC1387)
1774 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1775 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 1);
1776 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1777 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 1);
1778 #endif
1780 info->rs485.rts_on_send = 0x01 & r->rts_on_send;
1781 info->rs485.rts_after_sent = 0x01 & r->rts_after_sent;
1782 if (r->delay_rts_before_send >= 1000)
1783 info->rs485.delay_rts_before_send = 1000;
1784 else
1785 info->rs485.delay_rts_before_send = r->delay_rts_before_send;
1786 info->rs485.enabled = r->enabled;
1787 /* printk("rts: on send = %i, after = %i, enabled = %i",
1788 info->rs485.rts_on_send,
1789 info->rs485.rts_after_sent,
1790 info->rs485.enabled
1793 return 0;
1796 static int
1797 e100_write_rs485(struct tty_struct *tty, int from_user,
1798 const unsigned char *buf, int count)
1800 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1801 int old_enabled = info->rs485.enabled;
1803 /* rs485 is always implicitly enabled if we're using the ioctl()
1804 * but it doesn't have to be set in the rs485_control
1805 * (to be backward compatible with old apps)
1806 * So we store, set and restore it.
1808 info->rs485.enabled = 1;
1809 /* rs_write now deals with RS485 if enabled */
1810 count = rs_write(tty, from_user, buf, count);
1811 info->rs485.enabled = old_enabled;
1812 return count;
1815 #ifdef CONFIG_ETRAX_FAST_TIMER
1816 /* Timer function to toggle RTS when using FAST_TIMER */
1817 static void rs485_toggle_rts_timer_function(unsigned long data)
1819 struct e100_serial *info = (struct e100_serial *)data;
1821 fast_timers_rs485[info->line].function = NULL;
1822 e100_rts(info, info->rs485.rts_after_sent);
1823 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
1824 e100_enable_rx(info);
1825 e100_enable_rx_irq(info);
1826 #endif
1828 #endif
1829 #endif /* CONFIG_ETRAX_RS485 */
1832 * ------------------------------------------------------------
1833 * rs_stop() and rs_start()
1835 * This routines are called before setting or resetting tty->stopped.
1836 * They enable or disable transmitter using the XOFF registers, as necessary.
1837 * ------------------------------------------------------------
1840 static void
1841 rs_stop(struct tty_struct *tty)
1843 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1844 if (info) {
1845 unsigned long flags;
1846 unsigned long xoff;
1848 save_flags(flags); cli();
1849 DFLOW(DEBUG_LOG(info->line, "XOFF rs_stop xmit %i\n",
1850 CIRC_CNT(info->xmit.head,
1851 info->xmit.tail,SERIAL_XMIT_SIZE)));
1853 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->tty));
1854 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, stop);
1855 if (tty->termios->c_iflag & IXON ) {
1856 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1859 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
1860 restore_flags(flags);
1864 static void
1865 rs_start(struct tty_struct *tty)
1867 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1868 if (info) {
1869 unsigned long flags;
1870 unsigned long xoff;
1872 save_flags(flags); cli();
1873 DFLOW(DEBUG_LOG(info->line, "XOFF rs_start xmit %i\n",
1874 CIRC_CNT(info->xmit.head,
1875 info->xmit.tail,SERIAL_XMIT_SIZE)));
1876 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(tty));
1877 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
1878 if (tty->termios->c_iflag & IXON ) {
1879 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1882 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
1883 if (!info->uses_dma_out &&
1884 info->xmit.head != info->xmit.tail && info->xmit.buf)
1885 e100_enable_serial_tx_ready_irq(info);
1887 restore_flags(flags);
1892 * ----------------------------------------------------------------------
1894 * Here starts the interrupt handling routines. All of the following
1895 * subroutines are declared as inline and are folded into
1896 * rs_interrupt(). They were separated out for readability's sake.
1898 * Note: rs_interrupt() is a "fast" interrupt, which means that it
1899 * runs with interrupts turned off. People who may want to modify
1900 * rs_interrupt() should try to keep the interrupt handler as fast as
1901 * possible. After you are done making modifications, it is not a bad
1902 * idea to do:
1904 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
1906 * and look at the resulting assemble code in serial.s.
1908 * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
1909 * -----------------------------------------------------------------------
1913 * This routine is used by the interrupt handler to schedule
1914 * processing in the software interrupt portion of the driver.
1916 static _INLINE_ void
1917 rs_sched_event(struct e100_serial *info,
1918 int event)
1920 if (info->event & (1 << event))
1921 return;
1922 info->event |= 1 << event;
1923 schedule_work(&info->work);
1926 /* The output DMA channel is free - use it to send as many chars as possible
1927 * NOTES:
1928 * We don't pay attention to info->x_char, which means if the TTY wants to
1929 * use XON/XOFF it will set info->x_char but we won't send any X char!
1931 * To implement this, we'd just start a DMA send of 1 byte pointing at a
1932 * buffer containing the X char, and skip updating xmit. We'd also have to
1933 * check if the last sent char was the X char when we enter this function
1934 * the next time, to avoid updating xmit with the sent X value.
1937 static void
1938 transmit_chars_dma(struct e100_serial *info)
1940 unsigned int c, sentl;
1941 struct etrax_dma_descr *descr;
1943 #ifdef CONFIG_SVINTO_SIM
1944 /* This will output too little if tail is not 0 always since
1945 * we don't reloop to send the other part. Anyway this SHOULD be a
1946 * no-op - transmit_chars_dma would never really be called during sim
1947 * since rs_write does not write into the xmit buffer then.
1949 if (info->xmit.tail)
1950 printk("Error in serial.c:transmit_chars-dma(), tail!=0\n");
1951 if (info->xmit.head != info->xmit.tail) {
1952 SIMCOUT(info->xmit.buf + info->xmit.tail,
1953 CIRC_CNT(info->xmit.head,
1954 info->xmit.tail,
1955 SERIAL_XMIT_SIZE));
1956 info->xmit.head = info->xmit.tail; /* move back head */
1957 info->tr_running = 0;
1959 return;
1960 #endif
1961 /* acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1962 *info->oclrintradr =
1963 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
1964 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
1966 #ifdef SERIAL_DEBUG_INTR
1967 if (info->line == SERIAL_DEBUG_LINE)
1968 printk("tc\n");
1969 #endif
1970 if (!info->tr_running) {
1971 /* weirdo... we shouldn't get here! */
1972 printk(KERN_WARNING "Achtung: transmit_chars_dma with !tr_running\n");
1973 return;
1976 descr = &info->tr_descr;
1978 /* first get the amount of bytes sent during the last DMA transfer,
1979 and update xmit accordingly */
1981 /* if the stop bit was not set, all data has been sent */
1982 if (!(descr->status & d_stop)) {
1983 sentl = descr->sw_len;
1984 } else
1985 /* otherwise we find the amount of data sent here */
1986 sentl = descr->hw_len;
1988 DFLOW(DEBUG_LOG(info->line, "TX %i done\n", sentl));
1990 /* update stats */
1991 info->icount.tx += sentl;
1993 /* update xmit buffer */
1994 info->xmit.tail = (info->xmit.tail + sentl) & (SERIAL_XMIT_SIZE - 1);
1996 /* if there is only a few chars left in the buf, wake up the blocked
1997 write if any */
1998 if (CIRC_CNT(info->xmit.head,
1999 info->xmit.tail,
2000 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
2001 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
2003 /* find out the largest amount of consecutive bytes we want to send now */
2005 c = CIRC_CNT_TO_END(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
2007 /* Don't send all in one DMA transfer - divide it so we wake up
2008 * application before all is sent
2011 if (c >= 4*WAKEUP_CHARS)
2012 c = c/2;
2014 if (c <= 0) {
2015 /* our job here is done, don't schedule any new DMA transfer */
2016 info->tr_running = 0;
2018 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
2019 if (info->rs485.enabled) {
2020 /* Set a short timer to toggle RTS */
2021 start_one_shot_timer(&fast_timers_rs485[info->line],
2022 rs485_toggle_rts_timer_function,
2023 (unsigned long)info,
2024 info->char_time_usec*2,
2025 "RS-485");
2027 #endif /* RS485 */
2028 return;
2031 /* ok we can schedule a dma send of c chars starting at info->xmit.tail */
2032 /* set up the descriptor correctly for output */
2033 DFLOW(DEBUG_LOG(info->line, "TX %i\n", c));
2034 descr->ctrl = d_int | d_eol | d_wait; /* Wait needed for tty_wait_until_sent() */
2035 descr->sw_len = c;
2036 descr->buf = virt_to_phys(info->xmit.buf + info->xmit.tail);
2037 descr->status = 0;
2039 *info->ofirstadr = virt_to_phys(descr); /* write to R_DMAx_FIRST */
2040 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
2042 /* DMA is now running (hopefully) */
2043 } /* transmit_chars_dma */
2045 static void
2046 start_transmit(struct e100_serial *info)
2048 #if 0
2049 if (info->line == SERIAL_DEBUG_LINE)
2050 printk("x\n");
2051 #endif
2053 info->tr_descr.sw_len = 0;
2054 info->tr_descr.hw_len = 0;
2055 info->tr_descr.status = 0;
2056 info->tr_running = 1;
2057 if (info->uses_dma_out)
2058 transmit_chars_dma(info);
2059 else
2060 e100_enable_serial_tx_ready_irq(info);
2061 } /* start_transmit */
2063 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2064 static int serial_fast_timer_started = 0;
2065 static int serial_fast_timer_expired = 0;
2066 static void flush_timeout_function(unsigned long data);
2067 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec) {\
2068 unsigned long timer_flags; \
2069 save_flags(timer_flags); \
2070 cli(); \
2071 if (fast_timers[info->line].function == NULL) { \
2072 serial_fast_timer_started++; \
2073 TIMERD(DEBUG_LOG(info->line, "start_timer %i ", info->line)); \
2074 TIMERD(DEBUG_LOG(info->line, "num started: %i\n", serial_fast_timer_started)); \
2075 start_one_shot_timer(&fast_timers[info->line], \
2076 flush_timeout_function, \
2077 (unsigned long)info, \
2078 (usec), \
2079 string); \
2081 else { \
2082 TIMERD(DEBUG_LOG(info->line, "timer %i already running\n", info->line)); \
2084 restore_flags(timer_flags); \
2086 #define START_FLUSH_FAST_TIMER(info, string) START_FLUSH_FAST_TIMER_TIME(info, string, info->flush_time_usec)
2088 #else
2089 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec)
2090 #define START_FLUSH_FAST_TIMER(info, string)
2091 #endif
2093 static struct etrax_recv_buffer *
2094 alloc_recv_buffer(unsigned int size)
2096 struct etrax_recv_buffer *buffer;
2098 if (!(buffer = kmalloc(sizeof *buffer + size, GFP_ATOMIC)))
2099 return NULL;
2101 buffer->next = NULL;
2102 buffer->length = 0;
2103 buffer->error = TTY_NORMAL;
2105 return buffer;
2108 static void
2109 append_recv_buffer(struct e100_serial *info, struct etrax_recv_buffer *buffer)
2111 unsigned long flags;
2113 save_flags(flags);
2114 cli();
2116 if (!info->first_recv_buffer)
2117 info->first_recv_buffer = buffer;
2118 else
2119 info->last_recv_buffer->next = buffer;
2121 info->last_recv_buffer = buffer;
2123 info->recv_cnt += buffer->length;
2124 if (info->recv_cnt > info->max_recv_cnt)
2125 info->max_recv_cnt = info->recv_cnt;
2127 restore_flags(flags);
2130 static int
2131 add_char_and_flag(struct e100_serial *info, unsigned char data, unsigned char flag)
2133 struct etrax_recv_buffer *buffer;
2134 if (info->uses_dma_in) {
2135 if (!(buffer = alloc_recv_buffer(4)))
2136 return 0;
2138 buffer->length = 1;
2139 buffer->error = flag;
2140 buffer->buffer[0] = data;
2142 append_recv_buffer(info, buffer);
2144 info->icount.rx++;
2145 } else {
2146 struct tty_struct *tty = info->tty;
2147 *tty->flip.char_buf_ptr = data;
2148 *tty->flip.flag_buf_ptr = flag;
2149 tty->flip.flag_buf_ptr++;
2150 tty->flip.char_buf_ptr++;
2151 tty->flip.count++;
2152 info->icount.rx++;
2155 return 1;
2158 extern _INLINE_ unsigned int
2159 handle_descr_data(struct e100_serial *info, struct etrax_dma_descr *descr, unsigned int recvl)
2161 struct etrax_recv_buffer *buffer = phys_to_virt(descr->buf) - sizeof *buffer;
2163 if (info->recv_cnt + recvl > 65536) {
2164 printk(KERN_CRIT
2165 "%s: Too much pending incoming serial data! Dropping %u bytes.\n", __FUNCTION__, recvl);
2166 return 0;
2169 buffer->length = recvl;
2171 if (info->errorcode == ERRCODE_SET_BREAK)
2172 buffer->error = TTY_BREAK;
2173 info->errorcode = 0;
2175 append_recv_buffer(info, buffer);
2177 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
2178 panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__);
2180 descr->buf = virt_to_phys(buffer->buffer);
2182 return recvl;
2185 static _INLINE_ unsigned int
2186 handle_all_descr_data(struct e100_serial *info)
2188 struct etrax_dma_descr *descr;
2189 unsigned int recvl;
2190 unsigned int ret = 0;
2192 while (1)
2194 descr = &info->rec_descr[info->cur_rec_descr];
2196 if (descr == phys_to_virt(*info->idescradr))
2197 break;
2199 if (++info->cur_rec_descr == SERIAL_RECV_DESCRIPTORS)
2200 info->cur_rec_descr = 0;
2202 /* find out how many bytes were read */
2204 /* if the eop bit was not set, all data has been received */
2205 if (!(descr->status & d_eop)) {
2206 recvl = descr->sw_len;
2207 } else {
2208 /* otherwise we find the amount of data received here */
2209 recvl = descr->hw_len;
2212 /* Reset the status information */
2213 descr->status = 0;
2215 DFLOW( DEBUG_LOG(info->line, "RX %lu\n", recvl);
2216 if (info->tty->stopped) {
2217 unsigned char *buf = phys_to_virt(descr->buf);
2218 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[0]);
2219 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[1]);
2220 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[2]);
2224 /* update stats */
2225 info->icount.rx += recvl;
2227 ret += handle_descr_data(info, descr, recvl);
2230 return ret;
2233 static _INLINE_ void
2234 receive_chars_dma(struct e100_serial *info)
2236 struct tty_struct *tty;
2237 unsigned char rstat;
2239 #ifdef CONFIG_SVINTO_SIM
2240 /* No receive in the simulator. Will probably be when the rest of
2241 * the serial interface works, and this piece will just be removed.
2243 return;
2244 #endif
2246 /* Acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
2247 *info->iclrintradr =
2248 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
2249 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
2251 tty = info->tty;
2252 if (!tty) /* Something wrong... */
2253 return;
2255 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2256 if (info->uses_dma_in)
2257 e100_enable_serial_data_irq(info);
2258 #endif
2260 if (info->errorcode == ERRCODE_INSERT_BREAK)
2261 add_char_and_flag(info, '\0', TTY_BREAK);
2263 handle_all_descr_data(info);
2265 /* Read the status register to detect errors */
2266 rstat = info->port[REG_STATUS];
2267 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
2268 DFLOW(DEBUG_LOG(info->line, "XOFF detect stat %x\n", rstat));
2271 if (rstat & SER_ERROR_MASK) {
2272 /* If we got an error, we must reset it by reading the
2273 * data_in field
2275 unsigned char data = info->port[REG_DATA];
2277 PROCSTAT(ser_stat[info->line].errors_cnt++);
2278 DEBUG_LOG(info->line, "#dERR: s d 0x%04X\n",
2279 ((rstat & SER_ERROR_MASK) << 8) | data);
2281 if (rstat & SER_PAR_ERR_MASK)
2282 add_char_and_flag(info, data, TTY_PARITY);
2283 else if (rstat & SER_OVERRUN_MASK)
2284 add_char_and_flag(info, data, TTY_OVERRUN);
2285 else if (rstat & SER_FRAMING_ERR_MASK)
2286 add_char_and_flag(info, data, TTY_FRAME);
2289 START_FLUSH_FAST_TIMER(info, "receive_chars");
2291 /* Restart the receiving DMA */
2292 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
2295 static _INLINE_ int
2296 start_recv_dma(struct e100_serial *info)
2298 struct etrax_dma_descr *descr = info->rec_descr;
2299 struct etrax_recv_buffer *buffer;
2300 int i;
2302 /* Set up the receiving descriptors */
2303 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++) {
2304 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
2305 panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__);
2307 descr[i].ctrl = d_int;
2308 descr[i].buf = virt_to_phys(buffer->buffer);
2309 descr[i].sw_len = SERIAL_DESCR_BUF_SIZE;
2310 descr[i].hw_len = 0;
2311 descr[i].status = 0;
2312 descr[i].next = virt_to_phys(&descr[i+1]);
2315 /* Link the last descriptor to the first */
2316 descr[i-1].next = virt_to_phys(&descr[0]);
2318 /* Start with the first descriptor in the list */
2319 info->cur_rec_descr = 0;
2321 /* Start the DMA */
2322 *info->ifirstadr = virt_to_phys(&descr[info->cur_rec_descr]);
2323 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
2325 /* Input DMA should be running now */
2326 return 1;
2329 static void
2330 start_receive(struct e100_serial *info)
2332 #ifdef CONFIG_SVINTO_SIM
2333 /* No receive in the simulator. Will probably be when the rest of
2334 * the serial interface works, and this piece will just be removed.
2336 return;
2337 #endif
2338 info->tty->flip.count = 0;
2339 if (info->uses_dma_in) {
2340 /* reset the input dma channel to be sure it works */
2342 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2343 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
2344 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
2346 start_recv_dma(info);
2351 static _INLINE_ void
2352 status_handle(struct e100_serial *info, unsigned short status)
2356 /* the bits in the MASK2 register are laid out like this:
2357 DMAI_EOP DMAI_DESCR DMAO_EOP DMAO_DESCR
2358 where I is the input channel and O is the output channel for the port.
2359 info->irq is the bit number for the DMAO_DESCR so to check the others we
2360 shift info->irq to the left.
2363 /* dma output channel interrupt handler
2364 this interrupt is called from DMA2(ser2), DMA4(ser3), DMA6(ser0) or
2365 DMA8(ser1) when they have finished a descriptor with the intr flag set.
2368 static irqreturn_t
2369 tr_interrupt(int irq, void *dev_id, struct pt_regs * regs)
2371 struct e100_serial *info;
2372 unsigned long ireg;
2373 int i;
2374 int handled = 0;
2376 #ifdef CONFIG_SVINTO_SIM
2377 /* No receive in the simulator. Will probably be when the rest of
2378 * the serial interface works, and this piece will just be removed.
2381 const char *s = "What? tr_interrupt in simulator??\n";
2382 SIMCOUT(s,strlen(s));
2384 return IRQ_HANDLED;
2385 #endif
2387 /* find out the line that caused this irq and get it from rs_table */
2389 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
2391 for (i = 0; i < NR_PORTS; i++) {
2392 info = rs_table + i;
2393 if (!info->enabled || !info->uses_dma_out)
2394 continue;
2395 /* check for dma_descr (don't need to check for dma_eop in output dma for serial */
2396 if (ireg & info->irq) {
2397 handled = 1;
2398 /* we can send a new dma bunch. make it so. */
2399 DINTR2(DEBUG_LOG(info->line, "tr_interrupt %i\n", i));
2400 /* Read jiffies_usec first,
2401 * we want this time to be as late as possible
2403 PROCSTAT(ser_stat[info->line].tx_dma_ints++);
2404 info->last_tx_active_usec = GET_JIFFIES_USEC();
2405 info->last_tx_active = jiffies;
2406 transmit_chars_dma(info);
2409 /* FIXME: here we should really check for a change in the
2410 status lines and if so call status_handle(info) */
2412 return IRQ_RETVAL(handled);
2413 } /* tr_interrupt */
2415 /* dma input channel interrupt handler */
2417 static irqreturn_t
2418 rec_interrupt(int irq, void *dev_id, struct pt_regs * regs)
2420 struct e100_serial *info;
2421 unsigned long ireg;
2422 int i;
2423 int handled = 0;
2425 #ifdef CONFIG_SVINTO_SIM
2426 /* No receive in the simulator. Will probably be when the rest of
2427 * the serial interface works, and this piece will just be removed.
2430 const char *s = "What? rec_interrupt in simulator??\n";
2431 SIMCOUT(s,strlen(s));
2433 return IRQ_HANDLED;
2434 #endif
2436 /* find out the line that caused this irq and get it from rs_table */
2438 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
2440 for (i = 0; i < NR_PORTS; i++) {
2441 info = rs_table + i;
2442 if (!info->enabled || !info->uses_dma_in)
2443 continue;
2444 /* check for both dma_eop and dma_descr for the input dma channel */
2445 if (ireg & ((info->irq << 2) | (info->irq << 3))) {
2446 handled = 1;
2447 /* we have received something */
2448 receive_chars_dma(info);
2451 /* FIXME: here we should really check for a change in the
2452 status lines and if so call status_handle(info) */
2454 return IRQ_RETVAL(handled);
2455 } /* rec_interrupt */
2457 static _INLINE_ int
2458 force_eop_if_needed(struct e100_serial *info)
2460 /* We check data_avail bit to determine if data has
2461 * arrived since last time
2463 unsigned char rstat = info->port[REG_STATUS];
2465 /* error or datavail? */
2466 if (rstat & SER_ERROR_MASK) {
2467 /* Some error has occurred. If there has been valid data, an
2468 * EOP interrupt will be made automatically. If no data, the
2469 * normal ser_interrupt should be enabled and handle it.
2470 * So do nothing!
2472 DEBUG_LOG(info->line, "timeout err: rstat 0x%03X\n",
2473 rstat | (info->line << 8));
2474 return 0;
2477 if (rstat & SER_DATA_AVAIL_MASK) {
2478 /* Ok data, no error, count it */
2479 TIMERD(DEBUG_LOG(info->line, "timeout: rstat 0x%03X\n",
2480 rstat | (info->line << 8)));
2481 /* Read data to clear status flags */
2482 (void)info->port[REG_DATA];
2484 info->forced_eop = 0;
2485 START_FLUSH_FAST_TIMER(info, "magic");
2486 return 0;
2489 /* hit the timeout, force an EOP for the input
2490 * dma channel if we haven't already
2492 if (!info->forced_eop) {
2493 info->forced_eop = 1;
2494 PROCSTAT(ser_stat[info->line].timeout_flush_cnt++);
2495 TIMERD(DEBUG_LOG(info->line, "timeout EOP %i\n", info->line));
2496 FORCE_EOP(info);
2499 return 1;
2502 extern _INLINE_ void
2503 flush_to_flip_buffer(struct e100_serial *info)
2505 struct tty_struct *tty;
2506 struct etrax_recv_buffer *buffer;
2507 unsigned int length;
2508 unsigned long flags;
2509 int max_flip_size;
2511 if (!info->first_recv_buffer)
2512 return;
2514 save_flags(flags);
2515 cli();
2517 if (!(tty = info->tty)) {
2518 restore_flags(flags);
2519 return;
2522 length = tty->flip.count;
2523 /* Don't flip more than the ldisc has room for.
2524 * The return value from ldisc.receive_room(tty) - might not be up to
2525 * date, the previous flip of up to TTY_FLIPBUF_SIZE might be on the
2526 * processed and not accounted for yet.
2527 * Since we use DMA, 1 SERIAL_DESCR_BUF_SIZE could be on the way.
2528 * Lets buffer data here and let flow control take care of it.
2529 * Since we normally flip large chunks, the ldisc don't react
2530 * with throttle until too late if we flip to much.
2532 max_flip_size = tty->ldisc.receive_room(tty);
2533 if (max_flip_size < 0)
2534 max_flip_size = 0;
2535 if (max_flip_size <= (TTY_FLIPBUF_SIZE + /* Maybe not accounted for */
2536 length + info->recv_cnt + /* We have this queued */
2537 2*SERIAL_DESCR_BUF_SIZE + /* This could be on the way */
2538 TTY_THRESHOLD_THROTTLE)) { /* Some slack */
2539 /* check TTY_THROTTLED first so it indicates our state */
2540 if (!test_and_set_bit(TTY_THROTTLED, &tty->flags)) {
2541 DFLOW(DEBUG_LOG(info->line,"flush_to_flip throttles room %lu\n", max_flip_size));
2542 rs_throttle(tty);
2544 #if 0
2545 else if (max_flip_size <= (TTY_FLIPBUF_SIZE + /* Maybe not accounted for */
2546 length + info->recv_cnt + /* We have this queued */
2547 SERIAL_DESCR_BUF_SIZE + /* This could be on the way */
2548 TTY_THRESHOLD_THROTTLE)) { /* Some slack */
2549 DFLOW(DEBUG_LOG(info->line,"flush_to_flip throttles again! %lu\n", max_flip_size));
2550 rs_throttle(tty);
2552 #endif
2555 if (max_flip_size > TTY_FLIPBUF_SIZE)
2556 max_flip_size = TTY_FLIPBUF_SIZE;
2558 while ((buffer = info->first_recv_buffer) && length < max_flip_size) {
2559 unsigned int count = buffer->length;
2561 if (length + count > max_flip_size)
2562 count = max_flip_size - length;
2564 memcpy(tty->flip.char_buf_ptr + length, buffer->buffer, count);
2565 memset(tty->flip.flag_buf_ptr + length, TTY_NORMAL, count);
2566 tty->flip.flag_buf_ptr[length] = buffer->error;
2568 length += count;
2569 info->recv_cnt -= count;
2570 DFLIP(DEBUG_LOG(info->line,"flip: %i\n", length));
2572 if (count == buffer->length) {
2573 info->first_recv_buffer = buffer->next;
2574 kfree(buffer);
2575 } else {
2576 buffer->length -= count;
2577 memmove(buffer->buffer, buffer->buffer + count, buffer->length);
2578 buffer->error = TTY_NORMAL;
2582 if (!info->first_recv_buffer)
2583 info->last_recv_buffer = NULL;
2585 tty->flip.count = length;
2586 DFLIP(if (tty->ldisc.chars_in_buffer(tty) > 3500) {
2587 DEBUG_LOG(info->line, "ldisc %lu\n",
2588 tty->ldisc.chars_in_buffer(tty));
2589 DEBUG_LOG(info->line, "flip.count %lu\n",
2590 tty->flip.count);
2593 restore_flags(flags);
2595 DFLIP(
2596 if (1) {
2598 if (test_bit(TTY_DONT_FLIP, &tty->flags)) {
2599 DEBUG_LOG(info->line, "*** TTY_DONT_FLIP set flip.count %i ***\n", tty->flip.count);
2600 DEBUG_LOG(info->line, "*** recv_cnt %i\n", info->recv_cnt);
2601 } else {
2603 DEBUG_LOG(info->line, "*** rxtot %i\n", info->icount.rx);
2604 DEBUG_LOG(info->line, "ldisc %lu\n", tty->ldisc.chars_in_buffer(tty));
2605 DEBUG_LOG(info->line, "room %lu\n", tty->ldisc.receive_room(tty));
2610 /* this includes a check for low-latency */
2611 tty_flip_buffer_push(tty);
2614 static _INLINE_ void
2615 check_flush_timeout(struct e100_serial *info)
2617 /* Flip what we've got (if we can) */
2618 flush_to_flip_buffer(info);
2620 /* We might need to flip later, but not to fast
2621 * since the system is busy processing input... */
2622 if (info->first_recv_buffer)
2623 START_FLUSH_FAST_TIMER_TIME(info, "flip", 2000);
2625 /* Force eop last, since data might have come while we're processing
2626 * and if we started the slow timer above, we won't start a fast
2627 * below.
2629 force_eop_if_needed(info);
2632 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2633 static void flush_timeout_function(unsigned long data)
2635 struct e100_serial *info = (struct e100_serial *)data;
2637 fast_timers[info->line].function = NULL;
2638 serial_fast_timer_expired++;
2639 TIMERD(DEBUG_LOG(info->line, "flush_timout %i ", info->line));
2640 TIMERD(DEBUG_LOG(info->line, "num expired: %i\n", serial_fast_timer_expired));
2641 check_flush_timeout(info);
2644 #else
2646 /* dma fifo/buffer timeout handler
2647 forces an end-of-packet for the dma input channel if no chars
2648 have been received for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS/100 s.
2651 static struct timer_list flush_timer;
2653 static void
2654 timed_flush_handler(unsigned long ptr)
2656 struct e100_serial *info;
2657 int i;
2659 #ifdef CONFIG_SVINTO_SIM
2660 return;
2661 #endif
2663 for (i = 0; i < NR_PORTS; i++) {
2664 info = rs_table + i;
2665 if (info->uses_dma_in)
2666 check_flush_timeout(info);
2669 /* restart flush timer */
2670 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
2672 #endif
2674 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2676 /* If there is an error (ie break) when the DMA is running and
2677 * there are no bytes in the fifo the DMA is stopped and we get no
2678 * eop interrupt. Thus we have to monitor the first bytes on a DMA
2679 * transfer, and if it is without error we can turn the serial
2680 * interrupts off.
2684 BREAK handling on ETRAX 100:
2685 ETRAX will generate interrupt although there is no stop bit between the
2686 characters.
2688 Depending on how long the break sequence is, the end of the breaksequence
2689 will look differently:
2690 | indicates start/end of a character.
2692 B= Break character (0x00) with framing error.
2693 E= Error byte with parity error received after B characters.
2694 F= "Faked" valid byte received immediately after B characters.
2695 V= Valid byte
2698 B BL ___________________________ V
2699 .._|__________|__________| |valid data |
2701 Multiple frame errors with data == 0x00 (B),
2702 the timing matches up "perfectly" so no extra ending char is detected.
2703 The RXD pin is 1 in the last interrupt, in that case
2704 we set info->errorcode = ERRCODE_INSERT_BREAK, but we can't really
2705 know if another byte will come and this really is case 2. below
2706 (e.g F=0xFF or 0xFE)
2707 If RXD pin is 0 we can expect another character (see 2. below).
2712 B B E or F__________________..__ V
2713 .._|__________|__________|______ | |valid data
2714 "valid" or
2715 parity error
2717 Multiple frame errors with data == 0x00 (B),
2718 but the part of the break trigs is interpreted as a start bit (and possibly
2719 some 0 bits followed by a number of 1 bits and a stop bit).
2720 Depending on parity settings etc. this last character can be either
2721 a fake "valid" char (F) or have a parity error (E).
2723 If the character is valid it will be put in the buffer,
2724 we set info->errorcode = ERRCODE_SET_BREAK so the receive interrupt
2725 will set the flags so the tty will handle it,
2726 if it's an error byte it will not be put in the buffer
2727 and we set info->errorcode = ERRCODE_INSERT_BREAK.
2729 To distinguish a V byte in 1. from an F byte in 2. we keep a timestamp
2730 of the last faulty char (B) and compares it with the current time:
2731 If the time elapsed time is less then 2*char_time_usec we will assume
2732 it's a faked F char and not a Valid char and set
2733 info->errorcode = ERRCODE_SET_BREAK.
2735 Flaws in the above solution:
2736 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2737 We use the timer to distinguish a F character from a V character,
2738 if a V character is to close after the break we might make the wrong decision.
2740 TODO: The break will be delayed until an F or V character is received.
2744 extern _INLINE_
2745 struct e100_serial * handle_ser_rx_interrupt_no_dma(struct e100_serial *info)
2747 unsigned long data_read;
2748 struct tty_struct *tty = info->tty;
2750 if (!tty) {
2751 printk("!NO TTY!\n");
2752 return info;
2754 if (tty->flip.count >= TTY_FLIPBUF_SIZE - TTY_THRESHOLD_THROTTLE) {
2755 /* check TTY_THROTTLED first so it indicates our state */
2756 if (!test_and_set_bit(TTY_THROTTLED, &tty->flags)) {
2757 DFLOW(DEBUG_LOG(info->line, "rs_throttle flip.count: %i\n", tty->flip.count));
2758 rs_throttle(tty);
2761 if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
2762 DEBUG_LOG(info->line, "force FLIP! %i\n", tty->flip.count);
2763 tty->flip.work.func((void *) tty);
2764 if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
2765 DEBUG_LOG(info->line, "FLIP FULL! %i\n", tty->flip.count);
2766 return info; /* if TTY_DONT_FLIP is set */
2769 /* Read data and status at the same time */
2770 data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]);
2771 more_data:
2772 if (data_read & IO_MASK(R_SERIAL0_READ, xoff_detect) ) {
2773 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2775 DINTR2(DEBUG_LOG(info->line, "ser_rx %c\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read)));
2777 if (data_read & ( IO_MASK(R_SERIAL0_READ, framing_err) |
2778 IO_MASK(R_SERIAL0_READ, par_err) |
2779 IO_MASK(R_SERIAL0_READ, overrun) )) {
2780 /* An error */
2781 info->last_rx_active_usec = GET_JIFFIES_USEC();
2782 info->last_rx_active = jiffies;
2783 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat_data %04X\n", data_read));
2784 DLOG_INT_TRIG(
2785 if (!log_int_trig1_pos) {
2786 log_int_trig1_pos = log_int_pos;
2787 log_int(rdpc(), 0, 0);
2792 if ( ((data_read & IO_MASK(R_SERIAL0_READ, data_in)) == 0) &&
2793 (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) ) {
2794 /* Most likely a break, but we get interrupts over and
2795 * over again.
2798 if (!info->break_detected_cnt) {
2799 DEBUG_LOG(info->line, "#BRK start\n", 0);
2801 if (data_read & IO_MASK(R_SERIAL0_READ, rxd)) {
2802 /* The RX pin is high now, so the break
2803 * must be over, but....
2804 * we can't really know if we will get another
2805 * last byte ending the break or not.
2806 * And we don't know if the byte (if any) will
2807 * have an error or look valid.
2809 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2810 info->errorcode = ERRCODE_INSERT_BREAK;
2812 info->break_detected_cnt++;
2813 } else {
2814 /* The error does not look like a break, but could be
2815 * the end of one
2817 if (info->break_detected_cnt) {
2818 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2819 info->errorcode = ERRCODE_INSERT_BREAK;
2820 } else {
2821 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2822 info->icount.brk++;
2823 *tty->flip.char_buf_ptr = 0;
2824 *tty->flip.flag_buf_ptr = TTY_BREAK;
2825 tty->flip.flag_buf_ptr++;
2826 tty->flip.char_buf_ptr++;
2827 tty->flip.count++;
2828 info->icount.rx++;
2830 *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
2832 if (data_read & IO_MASK(R_SERIAL0_READ, par_err)) {
2833 info->icount.parity++;
2834 *tty->flip.flag_buf_ptr = TTY_PARITY;
2835 } else if (data_read & IO_MASK(R_SERIAL0_READ, overrun)) {
2836 info->icount.overrun++;
2837 *tty->flip.flag_buf_ptr = TTY_OVERRUN;
2838 } else if (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) {
2839 info->icount.frame++;
2840 *tty->flip.flag_buf_ptr = TTY_FRAME;
2842 info->errorcode = 0;
2844 info->break_detected_cnt = 0;
2846 } else if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2847 /* No error */
2848 DLOG_INT_TRIG(
2849 if (!log_int_trig1_pos) {
2850 if (log_int_pos >= log_int_size) {
2851 log_int_pos = 0;
2853 log_int_trig0_pos = log_int_pos;
2854 log_int(rdpc(), 0, 0);
2857 *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
2858 *tty->flip.flag_buf_ptr = 0;
2859 } else {
2860 DEBUG_LOG(info->line, "ser_rx int but no data_avail %08lX\n", data_read);
2864 tty->flip.flag_buf_ptr++;
2865 tty->flip.char_buf_ptr++;
2866 tty->flip.count++;
2867 info->icount.rx++;
2868 data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]);
2869 if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2870 DEBUG_LOG(info->line, "ser_rx %c in loop\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read));
2871 goto more_data;
2874 tty_flip_buffer_push(info->tty);
2875 return info;
2878 extern _INLINE_
2879 struct e100_serial* handle_ser_rx_interrupt(struct e100_serial *info)
2881 unsigned char rstat;
2883 #ifdef SERIAL_DEBUG_INTR
2884 printk("Interrupt from serport %d\n", i);
2885 #endif
2886 /* DEBUG_LOG(info->line, "ser_interrupt stat %03X\n", rstat | (i << 8)); */
2887 if (!info->uses_dma_in) {
2888 return handle_ser_rx_interrupt_no_dma(info);
2890 /* DMA is used */
2891 rstat = info->port[REG_STATUS];
2892 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
2893 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2896 if (rstat & SER_ERROR_MASK) {
2897 unsigned char data;
2899 info->last_rx_active_usec = GET_JIFFIES_USEC();
2900 info->last_rx_active = jiffies;
2901 /* If we got an error, we must reset it by reading the
2902 * data_in field
2904 data = info->port[REG_DATA];
2905 DINTR1(DEBUG_LOG(info->line, "ser_rx! %c\n", data));
2906 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat %02X\n", rstat));
2907 if (!data && (rstat & SER_FRAMING_ERR_MASK)) {
2908 /* Most likely a break, but we get interrupts over and
2909 * over again.
2912 if (!info->break_detected_cnt) {
2913 DEBUG_LOG(info->line, "#BRK start\n", 0);
2915 if (rstat & SER_RXD_MASK) {
2916 /* The RX pin is high now, so the break
2917 * must be over, but....
2918 * we can't really know if we will get another
2919 * last byte ending the break or not.
2920 * And we don't know if the byte (if any) will
2921 * have an error or look valid.
2923 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2924 info->errorcode = ERRCODE_INSERT_BREAK;
2926 info->break_detected_cnt++;
2927 } else {
2928 /* The error does not look like a break, but could be
2929 * the end of one
2931 if (info->break_detected_cnt) {
2932 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2933 info->errorcode = ERRCODE_INSERT_BREAK;
2934 } else {
2935 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2936 info->icount.brk++;
2937 add_char_and_flag(info, '\0', TTY_BREAK);
2940 if (rstat & SER_PAR_ERR_MASK) {
2941 info->icount.parity++;
2942 add_char_and_flag(info, data, TTY_PARITY);
2943 } else if (rstat & SER_OVERRUN_MASK) {
2944 info->icount.overrun++;
2945 add_char_and_flag(info, data, TTY_OVERRUN);
2946 } else if (rstat & SER_FRAMING_ERR_MASK) {
2947 info->icount.frame++;
2948 add_char_and_flag(info, data, TTY_FRAME);
2951 info->errorcode = 0;
2953 info->break_detected_cnt = 0;
2954 DEBUG_LOG(info->line, "#iERR s d %04X\n",
2955 ((rstat & SER_ERROR_MASK) << 8) | data);
2957 PROCSTAT(ser_stat[info->line].early_errors_cnt++);
2958 } else { /* It was a valid byte, now let the DMA do the rest */
2959 unsigned long curr_time_u = GET_JIFFIES_USEC();
2960 unsigned long curr_time = jiffies;
2962 if (info->break_detected_cnt) {
2963 /* Detect if this character is a new valid char or the
2964 * last char in a break sequence: If LSBits are 0 and
2965 * MSBits are high AND the time is close to the
2966 * previous interrupt we should discard it.
2968 long elapsed_usec =
2969 (curr_time - info->last_rx_active) * (1000000/HZ) +
2970 curr_time_u - info->last_rx_active_usec;
2971 if (elapsed_usec < 2*info->char_time_usec) {
2972 DEBUG_LOG(info->line, "FBRK %i\n", info->line);
2973 /* Report as BREAK (error) and let
2974 * receive_chars_dma() handle it
2976 info->errorcode = ERRCODE_SET_BREAK;
2977 } else {
2978 DEBUG_LOG(info->line, "Not end of BRK (V)%i\n", info->line);
2980 DEBUG_LOG(info->line, "num brk %i\n", info->break_detected_cnt);
2983 #ifdef SERIAL_DEBUG_INTR
2984 printk("** OK, disabling ser_interrupts\n");
2985 #endif
2986 e100_disable_serial_data_irq(info);
2987 DINTR2(DEBUG_LOG(info->line, "ser_rx OK %d\n", info->line));
2988 info->break_detected_cnt = 0;
2990 PROCSTAT(ser_stat[info->line].ser_ints_ok_cnt++);
2992 /* Restarting the DMA never hurts */
2993 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
2994 START_FLUSH_FAST_TIMER(info, "ser_int");
2995 return info;
2996 } /* handle_ser_rx_interrupt */
2998 extern _INLINE_ void handle_ser_tx_interrupt(struct e100_serial *info)
3000 unsigned long flags;
3002 if (info->x_char) {
3003 unsigned char rstat;
3004 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar 0x%02X\n", info->x_char));
3005 save_flags(flags); cli();
3006 rstat = info->port[REG_STATUS];
3007 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
3009 info->port[REG_TR_DATA] = info->x_char;
3010 info->icount.tx++;
3011 info->x_char = 0;
3012 /* We must enable since it is disabled in ser_interrupt */
3013 e100_enable_serial_tx_ready_irq(info);
3014 restore_flags(flags);
3015 return;
3017 if (info->uses_dma_out) {
3018 unsigned char rstat;
3019 int i;
3020 /* We only use normal tx interrupt when sending x_char */
3021 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar sent\n", 0));
3022 save_flags(flags); cli();
3023 rstat = info->port[REG_STATUS];
3024 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
3025 e100_disable_serial_tx_ready_irq(info);
3026 if (info->tty->stopped)
3027 rs_stop(info->tty);
3028 /* Enable the DMA channel and tell it to continue */
3029 e100_enable_txdma_channel(info);
3030 /* Wait 12 cycles before doing the DMA command */
3031 for(i = 6; i > 0; i--)
3032 nop();
3034 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, continue);
3035 restore_flags(flags);
3036 return;
3038 /* Normal char-by-char interrupt */
3039 if (info->xmit.head == info->xmit.tail
3040 || info->tty->stopped
3041 || info->tty->hw_stopped) {
3042 DFLOW(DEBUG_LOG(info->line, "tx_int: stopped %i\n", info->tty->stopped));
3043 e100_disable_serial_tx_ready_irq(info);
3044 info->tr_running = 0;
3045 return;
3047 DINTR2(DEBUG_LOG(info->line, "tx_int %c\n", info->xmit.buf[info->xmit.tail]));
3048 /* Send a byte, rs485 timing is critical so turn of ints */
3049 save_flags(flags); cli();
3050 info->port[REG_TR_DATA] = info->xmit.buf[info->xmit.tail];
3051 info->xmit.tail = (info->xmit.tail + 1) & (SERIAL_XMIT_SIZE-1);
3052 info->icount.tx++;
3053 if (info->xmit.head == info->xmit.tail) {
3054 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
3055 if (info->rs485.enabled) {
3056 /* Set a short timer to toggle RTS */
3057 start_one_shot_timer(&fast_timers_rs485[info->line],
3058 rs485_toggle_rts_timer_function,
3059 (unsigned long)info,
3060 info->char_time_usec*2,
3061 "RS-485");
3063 #endif /* RS485 */
3064 info->last_tx_active_usec = GET_JIFFIES_USEC();
3065 info->last_tx_active = jiffies;
3066 e100_disable_serial_tx_ready_irq(info);
3067 info->tr_running = 0;
3068 DFLOW(DEBUG_LOG(info->line, "tx_int: stop2\n", 0));
3069 } else {
3070 /* We must enable since it is disabled in ser_interrupt */
3071 e100_enable_serial_tx_ready_irq(info);
3073 restore_flags(flags);
3075 if (CIRC_CNT(info->xmit.head,
3076 info->xmit.tail,
3077 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
3078 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
3080 } /* handle_ser_tx_interrupt */
3082 /* result of time measurements:
3083 * RX duration 54-60 us when doing something, otherwise 6-9 us
3084 * ser_int duration: just sending: 8-15 us normally, up to 73 us
3086 static irqreturn_t
3087 ser_interrupt(int irq, void *dev_id, struct pt_regs *regs)
3089 static volatile int tx_started = 0;
3090 struct e100_serial *info;
3091 int i;
3092 unsigned long flags;
3093 unsigned long irq_mask1_rd;
3094 unsigned long data_mask = (1 << (8+2*0)); /* ser0 data_avail */
3095 int handled = 0;
3096 static volatile unsigned long reentered_ready_mask = 0;
3098 save_flags(flags); cli();
3099 irq_mask1_rd = *R_IRQ_MASK1_RD;
3100 /* First handle all rx interrupts with ints disabled */
3101 info = rs_table;
3102 irq_mask1_rd &= e100_ser_int_mask;
3103 for (i = 0; i < NR_PORTS; i++) {
3104 /* Which line caused the data irq? */
3105 if (irq_mask1_rd & data_mask) {
3106 handled = 1;
3107 handle_ser_rx_interrupt(info);
3109 info += 1;
3110 data_mask <<= 2;
3112 /* Handle tx interrupts with interrupts enabled so we
3113 * can take care of new data interrupts while transmitting
3114 * We protect the tx part with the tx_started flag.
3115 * We disable the tr_ready interrupts we are about to handle and
3116 * unblock the serial interrupt so new serial interrupts may come.
3118 * If we get a new interrupt:
3119 * - it migth be due to synchronous serial ports.
3120 * - serial irq will be blocked by general irq handler.
3121 * - async data will be handled above (sync will be ignored).
3122 * - tx_started flag will prevent us from trying to send again and
3123 * we will exit fast - no need to unblock serial irq.
3124 * - Next (sync) serial interrupt handler will be runned with
3125 * disabled interrupt due to restore_flags() at end of function,
3126 * so sync handler will not be preempted or reentered.
3128 if (!tx_started) {
3129 unsigned long ready_mask;
3130 unsigned long
3131 tx_started = 1;
3132 /* Only the tr_ready interrupts left */
3133 irq_mask1_rd &= (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
3134 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
3135 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
3136 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
3137 while (irq_mask1_rd) {
3138 /* Disable those we are about to handle */
3139 *R_IRQ_MASK1_CLR = irq_mask1_rd;
3140 /* Unblock the serial interrupt */
3141 *R_VECT_MASK_SET = IO_STATE(R_VECT_MASK_SET, serial, set);
3143 sti();
3144 ready_mask = (1 << (8+1+2*0)); /* ser0 tr_ready */
3145 info = rs_table;
3146 for (i = 0; i < NR_PORTS; i++) {
3147 /* Which line caused the ready irq? */
3148 if (irq_mask1_rd & ready_mask) {
3149 handled = 1;
3150 handle_ser_tx_interrupt(info);
3152 info += 1;
3153 ready_mask <<= 2;
3155 /* handle_ser_tx_interrupt enables tr_ready interrupts */
3156 cli();
3157 /* Handle reentered TX interrupt */
3158 irq_mask1_rd = reentered_ready_mask;
3160 cli();
3161 tx_started = 0;
3162 } else {
3163 unsigned long ready_mask;
3164 ready_mask = irq_mask1_rd & (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
3165 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
3166 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
3167 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
3168 if (ready_mask) {
3169 reentered_ready_mask |= ready_mask;
3170 /* Disable those we are about to handle */
3171 *R_IRQ_MASK1_CLR = ready_mask;
3172 DFLOW(DEBUG_LOG(SERIAL_DEBUG_LINE, "ser_int reentered with TX %X\n", ready_mask));
3176 restore_flags(flags);
3177 return IRQ_RETVAL(handled);
3178 } /* ser_interrupt */
3179 #endif
3182 * -------------------------------------------------------------------
3183 * Here ends the serial interrupt routines.
3184 * -------------------------------------------------------------------
3188 * This routine is used to handle the "bottom half" processing for the
3189 * serial driver, known also the "software interrupt" processing.
3190 * This processing is done at the kernel interrupt level, after the
3191 * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON. This
3192 * is where time-consuming activities which can not be done in the
3193 * interrupt driver proper are done; the interrupt driver schedules
3194 * them using rs_sched_event(), and they get done here.
3196 static void
3197 do_softint(void *private_)
3199 struct e100_serial *info = (struct e100_serial *) private_;
3200 struct tty_struct *tty;
3202 tty = info->tty;
3203 if (!tty)
3204 return;
3206 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) {
3207 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
3208 tty->ldisc.write_wakeup)
3209 (tty->ldisc.write_wakeup)(tty);
3210 wake_up_interruptible(&tty->write_wait);
3214 static int
3215 startup(struct e100_serial * info)
3217 unsigned long flags;
3218 unsigned long xmit_page;
3219 int i;
3221 xmit_page = get_zeroed_page(GFP_KERNEL);
3222 if (!xmit_page)
3223 return -ENOMEM;
3225 save_flags(flags);
3226 cli();
3228 /* if it was already initialized, skip this */
3230 if (info->flags & ASYNC_INITIALIZED) {
3231 restore_flags(flags);
3232 free_page(xmit_page);
3233 return 0;
3236 if (info->xmit.buf)
3237 free_page(xmit_page);
3238 else
3239 info->xmit.buf = (unsigned char *) xmit_page;
3241 #ifdef SERIAL_DEBUG_OPEN
3242 printk("starting up ttyS%d (xmit_buf 0x%p)...\n", info->line, info->xmit.buf);
3243 #endif
3245 #ifdef CONFIG_SVINTO_SIM
3246 /* Bits and pieces collected from below. Better to have them
3247 in one ifdef:ed clause than to mix in a lot of ifdefs,
3248 right? */
3249 if (info->tty)
3250 clear_bit(TTY_IO_ERROR, &info->tty->flags);
3252 info->xmit.head = info->xmit.tail = 0;
3253 info->first_recv_buffer = info->last_recv_buffer = NULL;
3254 info->recv_cnt = info->max_recv_cnt = 0;
3256 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3257 info->rec_descr[i].buf = NULL;
3259 /* No real action in the simulator, but may set info important
3260 to ioctl. */
3261 change_speed(info);
3262 #else
3265 * Clear the FIFO buffers and disable them
3266 * (they will be reenabled in change_speed())
3270 * Reset the DMA channels and make sure their interrupts are cleared
3273 if (info->dma_in_enabled) {
3274 info->uses_dma_in = 1;
3275 e100_enable_rxdma_channel(info);
3277 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3279 /* Wait until reset cycle is complete */
3280 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
3281 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
3283 /* Make sure the irqs are cleared */
3284 *info->iclrintradr =
3285 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
3286 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
3287 } else {
3288 e100_disable_rxdma_channel(info);
3291 if (info->dma_out_enabled) {
3292 info->uses_dma_out = 1;
3293 e100_enable_txdma_channel(info);
3294 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3296 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) ==
3297 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
3299 /* Make sure the irqs are cleared */
3300 *info->oclrintradr =
3301 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
3302 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
3303 } else {
3304 e100_disable_txdma_channel(info);
3307 if (info->tty)
3308 clear_bit(TTY_IO_ERROR, &info->tty->flags);
3310 info->xmit.head = info->xmit.tail = 0;
3311 info->first_recv_buffer = info->last_recv_buffer = NULL;
3312 info->recv_cnt = info->max_recv_cnt = 0;
3314 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3315 info->rec_descr[i].buf = 0;
3318 * and set the speed and other flags of the serial port
3319 * this will start the rx/tx as well
3321 #ifdef SERIAL_HANDLE_EARLY_ERRORS
3322 e100_enable_serial_data_irq(info);
3323 #endif
3324 change_speed(info);
3326 /* dummy read to reset any serial errors */
3328 (void)info->port[REG_DATA];
3330 /* enable the interrupts */
3331 if (info->uses_dma_out)
3332 e100_enable_txdma_irq(info);
3334 e100_enable_rx_irq(info);
3336 info->tr_running = 0; /* to be sure we don't lock up the transmitter */
3338 /* setup the dma input descriptor and start dma */
3340 start_receive(info);
3342 /* for safety, make sure the descriptors last result is 0 bytes written */
3344 info->tr_descr.sw_len = 0;
3345 info->tr_descr.hw_len = 0;
3346 info->tr_descr.status = 0;
3348 /* enable RTS/DTR last */
3350 e100_rts(info, 1);
3351 e100_dtr(info, 1);
3353 #endif /* CONFIG_SVINTO_SIM */
3355 info->flags |= ASYNC_INITIALIZED;
3357 restore_flags(flags);
3358 return 0;
3362 * This routine will shutdown a serial port; interrupts are disabled, and
3363 * DTR is dropped if the hangup on close termio flag is on.
3365 static void
3366 shutdown(struct e100_serial * info)
3368 unsigned long flags;
3369 struct etrax_dma_descr *descr = info->rec_descr;
3370 struct etrax_recv_buffer *buffer;
3371 int i;
3373 #ifndef CONFIG_SVINTO_SIM
3374 /* shut down the transmitter and receiver */
3375 DFLOW(DEBUG_LOG(info->line, "shutdown %i\n", info->line));
3376 e100_disable_rx(info);
3377 info->port[REG_TR_CTRL] = (info->tx_ctrl &= ~0x40);
3379 /* disable interrupts, reset dma channels */
3380 if (info->uses_dma_in) {
3381 e100_disable_rxdma_irq(info);
3382 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3383 info->uses_dma_in = 0;
3384 } else {
3385 e100_disable_serial_data_irq(info);
3388 if (info->uses_dma_out) {
3389 e100_disable_txdma_irq(info);
3390 info->tr_running = 0;
3391 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3392 info->uses_dma_out = 0;
3393 } else {
3394 e100_disable_serial_tx_ready_irq(info);
3395 info->tr_running = 0;
3398 #endif /* CONFIG_SVINTO_SIM */
3400 if (!(info->flags & ASYNC_INITIALIZED))
3401 return;
3403 #ifdef SERIAL_DEBUG_OPEN
3404 printk("Shutting down serial port %d (irq %d)....\n", info->line,
3405 info->irq);
3406 #endif
3408 save_flags(flags);
3409 cli(); /* Disable interrupts */
3411 if (info->xmit.buf) {
3412 free_page((unsigned long)info->xmit.buf);
3413 info->xmit.buf = NULL;
3416 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3417 if (descr[i].buf) {
3418 buffer = phys_to_virt(descr[i].buf) - sizeof *buffer;
3419 kfree(buffer);
3420 descr[i].buf = 0;
3423 if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) {
3424 /* hang up DTR and RTS if HUPCL is enabled */
3425 e100_dtr(info, 0);
3426 e100_rts(info, 0); /* could check CRTSCTS before doing this */
3429 if (info->tty)
3430 set_bit(TTY_IO_ERROR, &info->tty->flags);
3432 info->flags &= ~ASYNC_INITIALIZED;
3433 restore_flags(flags);
3437 /* change baud rate and other assorted parameters */
3439 static void
3440 change_speed(struct e100_serial *info)
3442 unsigned int cflag;
3443 unsigned long xoff;
3444 unsigned long flags;
3445 /* first some safety checks */
3447 if (!info->tty || !info->tty->termios)
3448 return;
3449 if (!info->port)
3450 return;
3452 cflag = info->tty->termios->c_cflag;
3454 /* possibly, the tx/rx should be disabled first to do this safely */
3456 /* change baud-rate and write it to the hardware */
3457 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST) {
3458 /* Special baudrate */
3459 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
3460 unsigned long alt_source =
3461 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
3462 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
3463 /* R_ALT_SER_BAUDRATE selects the source */
3464 DBAUD(printk("Custom baudrate: baud_base/divisor %lu/%i\n",
3465 (unsigned long)info->baud_base, info->custom_divisor));
3466 if (info->baud_base == SERIAL_PRESCALE_BASE) {
3467 /* 0, 2-65535 (0=65536) */
3468 u16 divisor = info->custom_divisor;
3469 /* R_SERIAL_PRESCALE (upper 16 bits of R_CLOCK_PRESCALE) */
3470 /* baudrate is 3.125MHz/custom_divisor */
3471 alt_source =
3472 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, prescale) |
3473 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, prescale);
3474 alt_source = 0x11;
3475 DBAUD(printk("Writing SERIAL_PRESCALE: divisor %i\n", divisor));
3476 *R_SERIAL_PRESCALE = divisor;
3477 info->baud = SERIAL_PRESCALE_BASE/divisor;
3479 #ifdef CONFIG_ETRAX_EXTERN_PB6CLK_ENABLED
3480 else if ((info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8 &&
3481 info->custom_divisor == 1) ||
3482 (info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ &&
3483 info->custom_divisor == 8)) {
3484 /* ext_clk selected */
3485 alt_source =
3486 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, extern) |
3487 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, extern);
3488 DBAUD(printk("using external baudrate: %lu\n", CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8));
3489 info->baud = CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8;
3492 #endif
3493 else
3495 /* Bad baudbase, we don't support using timer0
3496 * for baudrate.
3498 printk(KERN_WARNING "Bad baud_base/custom_divisor: %lu/%i\n",
3499 (unsigned long)info->baud_base, info->custom_divisor);
3501 r_alt_ser_baudrate_shadow &= ~mask;
3502 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
3503 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3504 } else {
3505 /* Normal baudrate */
3506 /* Make sure we use normal baudrate */
3507 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
3508 unsigned long alt_source =
3509 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
3510 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
3511 r_alt_ser_baudrate_shadow &= ~mask;
3512 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
3513 #ifndef CONFIG_SVINTO_SIM
3514 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3515 #endif /* CONFIG_SVINTO_SIM */
3517 info->baud = cflag_to_baud(cflag);
3518 #ifndef CONFIG_SVINTO_SIM
3519 info->port[REG_BAUD] = cflag_to_etrax_baud(cflag);
3520 #endif /* CONFIG_SVINTO_SIM */
3523 #ifndef CONFIG_SVINTO_SIM
3524 /* start with default settings and then fill in changes */
3525 save_flags(flags);
3526 cli();
3527 /* 8 bit, no/even parity */
3528 info->rx_ctrl &= ~(IO_MASK(R_SERIAL0_REC_CTRL, rec_bitnr) |
3529 IO_MASK(R_SERIAL0_REC_CTRL, rec_par_en) |
3530 IO_MASK(R_SERIAL0_REC_CTRL, rec_par));
3532 /* 8 bit, no/even parity, 1 stop bit, no cts */
3533 info->tx_ctrl &= ~(IO_MASK(R_SERIAL0_TR_CTRL, tr_bitnr) |
3534 IO_MASK(R_SERIAL0_TR_CTRL, tr_par_en) |
3535 IO_MASK(R_SERIAL0_TR_CTRL, tr_par) |
3536 IO_MASK(R_SERIAL0_TR_CTRL, stop_bits) |
3537 IO_MASK(R_SERIAL0_TR_CTRL, auto_cts));
3539 if ((cflag & CSIZE) == CS7) {
3540 /* set 7 bit mode */
3541 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_bitnr, tr_7bit);
3542 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_bitnr, rec_7bit);
3545 if (cflag & CSTOPB) {
3546 /* set 2 stop bit mode */
3547 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, stop_bits, two_bits);
3550 if (cflag & PARENB) {
3551 /* enable parity */
3552 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par_en, enable);
3553 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par_en, enable);
3556 if (cflag & CMSPAR) {
3557 /* enable stick parity, PARODD mean Mark which matches ETRAX */
3558 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_stick_par, stick);
3559 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_stick_par, stick);
3561 if (cflag & PARODD) {
3562 /* set odd parity (or Mark if CMSPAR) */
3563 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par, odd);
3564 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par, odd);
3567 if (cflag & CRTSCTS) {
3568 /* enable automatic CTS handling */
3569 DFLOW(DEBUG_LOG(info->line, "FLOW auto_cts enabled\n", 0));
3570 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, auto_cts, active);
3573 /* make sure the tx and rx are enabled */
3575 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_enable, enable);
3576 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_enable, enable);
3578 /* actually write the control regs to the hardware */
3580 info->port[REG_TR_CTRL] = info->tx_ctrl;
3581 info->port[REG_REC_CTRL] = info->rx_ctrl;
3582 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->tty));
3583 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
3584 if (info->tty->termios->c_iflag & IXON ) {
3585 DFLOW(DEBUG_LOG(info->line, "FLOW XOFF enabled 0x%02X\n", STOP_CHAR(info->tty)));
3586 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
3589 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
3590 restore_flags(flags);
3591 #endif /* !CONFIG_SVINTO_SIM */
3593 update_char_time(info);
3595 } /* change_speed */
3597 /* start transmitting chars NOW */
3599 static void
3600 rs_flush_chars(struct tty_struct *tty)
3602 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3603 unsigned long flags;
3605 if (info->tr_running ||
3606 info->xmit.head == info->xmit.tail ||
3607 tty->stopped ||
3608 tty->hw_stopped ||
3609 !info->xmit.buf)
3610 return;
3612 #ifdef SERIAL_DEBUG_FLOW
3613 printk("rs_flush_chars\n");
3614 #endif
3616 /* this protection might not exactly be necessary here */
3618 save_flags(flags);
3619 cli();
3620 start_transmit(info);
3621 restore_flags(flags);
3624 extern _INLINE_ int
3625 rs_raw_write(struct tty_struct * tty, int from_user,
3626 const unsigned char *buf, int count)
3628 int c, ret = 0;
3629 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3630 unsigned long flags;
3632 /* first some sanity checks */
3634 if (!tty || !info->xmit.buf || !tmp_buf)
3635 return 0;
3637 #ifdef SERIAL_DEBUG_DATA
3638 if (info->line == SERIAL_DEBUG_LINE)
3639 printk("rs_raw_write (%d), status %d\n",
3640 count, info->port[REG_STATUS]);
3641 #endif
3643 #ifdef CONFIG_SVINTO_SIM
3644 /* Really simple. The output is here and now. */
3645 SIMCOUT(buf, count);
3646 return count;
3647 #endif
3648 save_flags(flags);
3649 DFLOW(DEBUG_LOG(info->line, "write count %i ", count));
3650 DFLOW(DEBUG_LOG(info->line, "ldisc %i\n", tty->ldisc.chars_in_buffer(tty)));
3653 /* the cli/restore_flags pairs below are needed because the
3654 * DMA interrupt handler moves the info->xmit values. the memcpy
3655 * needs to be in the critical region unfortunately, because we
3656 * need to read xmit values, memcpy, write xmit values in one
3657 * atomic operation... this could perhaps be avoided by more clever
3658 * design.
3660 if (from_user) {
3661 mutex_lock(&tmp_buf_mutex);
3662 while (1) {
3663 int c1;
3664 c = CIRC_SPACE_TO_END(info->xmit.head,
3665 info->xmit.tail,
3666 SERIAL_XMIT_SIZE);
3667 if (count < c)
3668 c = count;
3669 if (c <= 0)
3670 break;
3672 c -= copy_from_user(tmp_buf, buf, c);
3673 if (!c) {
3674 if (!ret)
3675 ret = -EFAULT;
3676 break;
3678 cli();
3679 c1 = CIRC_SPACE_TO_END(info->xmit.head,
3680 info->xmit.tail,
3681 SERIAL_XMIT_SIZE);
3682 if (c1 < c)
3683 c = c1;
3684 memcpy(info->xmit.buf + info->xmit.head, tmp_buf, c);
3685 info->xmit.head = ((info->xmit.head + c) &
3686 (SERIAL_XMIT_SIZE-1));
3687 restore_flags(flags);
3688 buf += c;
3689 count -= c;
3690 ret += c;
3692 mutex_unlock(&tmp_buf_mutex);
3693 } else {
3694 cli();
3695 while (count) {
3696 c = CIRC_SPACE_TO_END(info->xmit.head,
3697 info->xmit.tail,
3698 SERIAL_XMIT_SIZE);
3700 if (count < c)
3701 c = count;
3702 if (c <= 0)
3703 break;
3705 memcpy(info->xmit.buf + info->xmit.head, buf, c);
3706 info->xmit.head = (info->xmit.head + c) &
3707 (SERIAL_XMIT_SIZE-1);
3708 buf += c;
3709 count -= c;
3710 ret += c;
3712 restore_flags(flags);
3715 /* enable transmitter if not running, unless the tty is stopped
3716 * this does not need IRQ protection since if tr_running == 0
3717 * the IRQ's are not running anyway for this port.
3719 DFLOW(DEBUG_LOG(info->line, "write ret %i\n", ret));
3721 if (info->xmit.head != info->xmit.tail &&
3722 !tty->stopped &&
3723 !tty->hw_stopped &&
3724 !info->tr_running) {
3725 start_transmit(info);
3728 return ret;
3729 } /* raw_raw_write() */
3731 static int
3732 rs_write(struct tty_struct * tty, int from_user,
3733 const unsigned char *buf, int count)
3735 #if defined(CONFIG_ETRAX_RS485)
3736 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3738 if (info->rs485.enabled)
3740 /* If we are in RS-485 mode, we need to toggle RTS and disable
3741 * the receiver before initiating a DMA transfer
3743 #ifdef CONFIG_ETRAX_FAST_TIMER
3744 /* Abort any started timer */
3745 fast_timers_rs485[info->line].function = NULL;
3746 del_fast_timer(&fast_timers_rs485[info->line]);
3747 #endif
3748 e100_rts(info, info->rs485.rts_on_send);
3749 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3750 e100_disable_rx(info);
3751 e100_enable_rx_irq(info);
3752 #endif
3754 if (info->rs485.delay_rts_before_send > 0)
3755 msleep(info->rs485.delay_rts_before_send);
3757 #endif /* CONFIG_ETRAX_RS485 */
3759 count = rs_raw_write(tty, from_user, buf, count);
3761 #if defined(CONFIG_ETRAX_RS485)
3762 if (info->rs485.enabled)
3764 unsigned int val;
3765 /* If we are in RS-485 mode the following has to be done:
3766 * wait until DMA is ready
3767 * wait on transmit shift register
3768 * toggle RTS
3769 * enable the receiver
3772 /* Sleep until all sent */
3773 tty_wait_until_sent(tty, 0);
3774 #ifdef CONFIG_ETRAX_FAST_TIMER
3775 /* Now sleep a little more so that shift register is empty */
3776 schedule_usleep(info->char_time_usec * 2);
3777 #endif
3778 /* wait on transmit shift register */
3780 get_lsr_info(info, &val);
3781 }while (!(val & TIOCSER_TEMT));
3783 e100_rts(info, info->rs485.rts_after_sent);
3785 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3786 e100_enable_rx(info);
3787 e100_enable_rxdma_irq(info);
3788 #endif
3790 #endif /* CONFIG_ETRAX_RS485 */
3792 return count;
3793 } /* rs_write */
3796 /* how much space is available in the xmit buffer? */
3798 static int
3799 rs_write_room(struct tty_struct *tty)
3801 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3803 return CIRC_SPACE(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3806 /* How many chars are in the xmit buffer?
3807 * This does not include any chars in the transmitter FIFO.
3808 * Use wait_until_sent for waiting for FIFO drain.
3811 static int
3812 rs_chars_in_buffer(struct tty_struct *tty)
3814 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3816 return CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3819 /* discard everything in the xmit buffer */
3821 static void
3822 rs_flush_buffer(struct tty_struct *tty)
3824 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3825 unsigned long flags;
3827 save_flags(flags);
3828 cli();
3829 info->xmit.head = info->xmit.tail = 0;
3830 restore_flags(flags);
3832 wake_up_interruptible(&tty->write_wait);
3834 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
3835 tty->ldisc.write_wakeup)
3836 (tty->ldisc.write_wakeup)(tty);
3840 * This function is used to send a high-priority XON/XOFF character to
3841 * the device
3843 * Since we use DMA we don't check for info->x_char in transmit_chars_dma(),
3844 * but we do it in handle_ser_tx_interrupt().
3845 * We disable DMA channel and enable tx ready interrupt and write the
3846 * character when possible.
3848 static void rs_send_xchar(struct tty_struct *tty, char ch)
3850 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3851 unsigned long flags;
3852 save_flags(flags); cli();
3853 if (info->uses_dma_out) {
3854 /* Put the DMA on hold and disable the channel */
3855 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, hold);
3856 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) !=
3857 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, hold));
3858 e100_disable_txdma_channel(info);
3861 /* Must make sure transmitter is not stopped before we can transmit */
3862 if (tty->stopped)
3863 rs_start(tty);
3865 /* Enable manual transmit interrupt and send from there */
3866 DFLOW(DEBUG_LOG(info->line, "rs_send_xchar 0x%02X\n", ch));
3867 info->x_char = ch;
3868 e100_enable_serial_tx_ready_irq(info);
3869 restore_flags(flags);
3873 * ------------------------------------------------------------
3874 * rs_throttle()
3876 * This routine is called by the upper-layer tty layer to signal that
3877 * incoming characters should be throttled.
3878 * ------------------------------------------------------------
3880 static void
3881 rs_throttle(struct tty_struct * tty)
3883 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3884 #ifdef SERIAL_DEBUG_THROTTLE
3885 char buf[64];
3887 printk("throttle %s: %lu....\n", tty_name(tty, buf),
3888 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3889 #endif
3890 DFLOW(DEBUG_LOG(info->line,"rs_throttle %lu\n", tty->ldisc.chars_in_buffer(tty)));
3892 /* Do RTS before XOFF since XOFF might take some time */
3893 if (tty->termios->c_cflag & CRTSCTS) {
3894 /* Turn off RTS line */
3895 e100_rts(info, 0);
3897 if (I_IXOFF(tty))
3898 rs_send_xchar(tty, STOP_CHAR(tty));
3902 static void
3903 rs_unthrottle(struct tty_struct * tty)
3905 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3906 #ifdef SERIAL_DEBUG_THROTTLE
3907 char buf[64];
3909 printk("unthrottle %s: %lu....\n", tty_name(tty, buf),
3910 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3911 #endif
3912 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle ldisc %d\n", tty->ldisc.chars_in_buffer(tty)));
3913 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle flip.count: %i\n", tty->flip.count));
3914 /* Do RTS before XOFF since XOFF might take some time */
3915 if (tty->termios->c_cflag & CRTSCTS) {
3916 /* Assert RTS line */
3917 e100_rts(info, 1);
3920 if (I_IXOFF(tty)) {
3921 if (info->x_char)
3922 info->x_char = 0;
3923 else
3924 rs_send_xchar(tty, START_CHAR(tty));
3930 * ------------------------------------------------------------
3931 * rs_ioctl() and friends
3932 * ------------------------------------------------------------
3935 static int
3936 get_serial_info(struct e100_serial * info,
3937 struct serial_struct * retinfo)
3939 struct serial_struct tmp;
3941 /* this is all probably wrong, there are a lot of fields
3942 * here that we don't have in e100_serial and maybe we
3943 * should set them to something else than 0.
3946 if (!retinfo)
3947 return -EFAULT;
3948 memset(&tmp, 0, sizeof(tmp));
3949 tmp.type = info->type;
3950 tmp.line = info->line;
3951 tmp.port = (int)info->port;
3952 tmp.irq = info->irq;
3953 tmp.flags = info->flags;
3954 tmp.baud_base = info->baud_base;
3955 tmp.close_delay = info->close_delay;
3956 tmp.closing_wait = info->closing_wait;
3957 tmp.custom_divisor = info->custom_divisor;
3958 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
3959 return -EFAULT;
3960 return 0;
3963 static int
3964 set_serial_info(struct e100_serial *info,
3965 struct serial_struct *new_info)
3967 struct serial_struct new_serial;
3968 struct e100_serial old_info;
3969 int retval = 0;
3971 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
3972 return -EFAULT;
3974 old_info = *info;
3976 if (!capable(CAP_SYS_ADMIN)) {
3977 if ((new_serial.type != info->type) ||
3978 (new_serial.close_delay != info->close_delay) ||
3979 ((new_serial.flags & ~ASYNC_USR_MASK) !=
3980 (info->flags & ~ASYNC_USR_MASK)))
3981 return -EPERM;
3982 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
3983 (new_serial.flags & ASYNC_USR_MASK));
3984 goto check_and_exit;
3987 if (info->count > 1)
3988 return -EBUSY;
3991 * OK, past this point, all the error checking has been done.
3992 * At this point, we start making changes.....
3995 info->baud_base = new_serial.baud_base;
3996 info->flags = ((info->flags & ~ASYNC_FLAGS) |
3997 (new_serial.flags & ASYNC_FLAGS));
3998 info->custom_divisor = new_serial.custom_divisor;
3999 info->type = new_serial.type;
4000 info->close_delay = new_serial.close_delay;
4001 info->closing_wait = new_serial.closing_wait;
4002 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
4004 check_and_exit:
4005 if (info->flags & ASYNC_INITIALIZED) {
4006 change_speed(info);
4007 } else
4008 retval = startup(info);
4009 return retval;
4013 * get_lsr_info - get line status register info
4015 * Purpose: Let user call ioctl() to get info when the UART physically
4016 * is emptied. On bus types like RS485, the transmitter must
4017 * release the bus after transmitting. This must be done when
4018 * the transmit shift register is empty, not be done when the
4019 * transmit holding register is empty. This functionality
4020 * allows an RS485 driver to be written in user space.
4022 static int
4023 get_lsr_info(struct e100_serial * info, unsigned int *value)
4025 unsigned int result = TIOCSER_TEMT;
4026 #ifndef CONFIG_SVINTO_SIM
4027 unsigned long curr_time = jiffies;
4028 unsigned long curr_time_usec = GET_JIFFIES_USEC();
4029 unsigned long elapsed_usec =
4030 (curr_time - info->last_tx_active) * 1000000/HZ +
4031 curr_time_usec - info->last_tx_active_usec;
4033 if (info->xmit.head != info->xmit.tail ||
4034 elapsed_usec < 2*info->char_time_usec) {
4035 result = 0;
4037 #endif
4039 if (copy_to_user(value, &result, sizeof(int)))
4040 return -EFAULT;
4041 return 0;
4044 #ifdef SERIAL_DEBUG_IO
4045 struct state_str
4047 int state;
4048 const char *str;
4051 const struct state_str control_state_str[] = {
4052 {TIOCM_DTR, "DTR" },
4053 {TIOCM_RTS, "RTS"},
4054 {TIOCM_ST, "ST?" },
4055 {TIOCM_SR, "SR?" },
4056 {TIOCM_CTS, "CTS" },
4057 {TIOCM_CD, "CD" },
4058 {TIOCM_RI, "RI" },
4059 {TIOCM_DSR, "DSR" },
4060 {0, NULL }
4063 char *get_control_state_str(int MLines, char *s)
4065 int i = 0;
4067 s[0]='\0';
4068 while (control_state_str[i].str != NULL) {
4069 if (MLines & control_state_str[i].state) {
4070 if (s[0] != '\0') {
4071 strcat(s, ", ");
4073 strcat(s, control_state_str[i].str);
4075 i++;
4077 return s;
4079 #endif
4081 static int
4082 get_modem_info(struct e100_serial * info, unsigned int *value)
4084 unsigned int result;
4085 /* Polarity isn't verified */
4086 #if 0 /*def SERIAL_DEBUG_IO */
4088 printk("get_modem_info: RTS: %i DTR: %i CD: %i RI: %i DSR: %i CTS: %i\n",
4089 E100_RTS_GET(info),
4090 E100_DTR_GET(info),
4091 E100_CD_GET(info),
4092 E100_RI_GET(info),
4093 E100_DSR_GET(info),
4094 E100_CTS_GET(info));
4095 #endif
4097 result =
4098 (!E100_RTS_GET(info) ? TIOCM_RTS : 0)
4099 | (!E100_DTR_GET(info) ? TIOCM_DTR : 0)
4100 | (!E100_RI_GET(info) ? TIOCM_RNG : 0)
4101 | (!E100_DSR_GET(info) ? TIOCM_DSR : 0)
4102 | (!E100_CD_GET(info) ? TIOCM_CAR : 0)
4103 | (!E100_CTS_GET(info) ? TIOCM_CTS : 0);
4105 #ifdef SERIAL_DEBUG_IO
4106 printk("e100ser: modem state: %i 0x%08X\n", result, result);
4108 char s[100];
4110 get_control_state_str(result, s);
4111 printk("state: %s\n", s);
4113 #endif
4114 if (copy_to_user(value, &result, sizeof(int)))
4115 return -EFAULT;
4116 return 0;
4120 static int
4121 set_modem_info(struct e100_serial * info, unsigned int cmd,
4122 unsigned int *value)
4124 unsigned int arg;
4126 if (copy_from_user(&arg, value, sizeof(int)))
4127 return -EFAULT;
4129 switch (cmd) {
4130 case TIOCMBIS:
4131 if (arg & TIOCM_RTS) {
4132 e100_rts(info, 1);
4134 if (arg & TIOCM_DTR) {
4135 e100_dtr(info, 1);
4137 /* Handle FEMALE behaviour */
4138 if (arg & TIOCM_RI) {
4139 e100_ri_out(info, 1);
4141 if (arg & TIOCM_CD) {
4142 e100_cd_out(info, 1);
4144 break;
4145 case TIOCMBIC:
4146 if (arg & TIOCM_RTS) {
4147 e100_rts(info, 0);
4149 if (arg & TIOCM_DTR) {
4150 e100_dtr(info, 0);
4152 /* Handle FEMALE behaviour */
4153 if (arg & TIOCM_RI) {
4154 e100_ri_out(info, 0);
4156 if (arg & TIOCM_CD) {
4157 e100_cd_out(info, 0);
4159 break;
4160 case TIOCMSET:
4161 e100_rts(info, arg & TIOCM_RTS);
4162 e100_dtr(info, arg & TIOCM_DTR);
4163 /* Handle FEMALE behaviour */
4164 e100_ri_out(info, arg & TIOCM_RI);
4165 e100_cd_out(info, arg & TIOCM_CD);
4166 break;
4167 default:
4168 return -EINVAL;
4170 return 0;
4174 static void
4175 rs_break(struct tty_struct *tty, int break_state)
4177 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4178 unsigned long flags;
4180 if (!info->port)
4181 return;
4183 save_flags(flags);
4184 cli();
4185 if (break_state == -1) {
4186 /* Go to manual mode and set the txd pin to 0 */
4187 info->tx_ctrl &= 0x3F; /* Clear bit 7 (txd) and 6 (tr_enable) */
4188 } else {
4189 info->tx_ctrl |= (0x80 | 0x40); /* Set bit 7 (txd) and 6 (tr_enable) */
4191 info->port[REG_TR_CTRL] = info->tx_ctrl;
4192 restore_flags(flags);
4195 static int
4196 rs_ioctl(struct tty_struct *tty, struct file * file,
4197 unsigned int cmd, unsigned long arg)
4199 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4201 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
4202 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
4203 (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
4204 if (tty->flags & (1 << TTY_IO_ERROR))
4205 return -EIO;
4208 switch (cmd) {
4209 case TIOCMGET:
4210 return get_modem_info(info, (unsigned int *) arg);
4211 case TIOCMBIS:
4212 case TIOCMBIC:
4213 case TIOCMSET:
4214 return set_modem_info(info, cmd, (unsigned int *) arg);
4215 case TIOCGSERIAL:
4216 return get_serial_info(info,
4217 (struct serial_struct *) arg);
4218 case TIOCSSERIAL:
4219 return set_serial_info(info,
4220 (struct serial_struct *) arg);
4221 case TIOCSERGETLSR: /* Get line status register */
4222 return get_lsr_info(info, (unsigned int *) arg);
4224 case TIOCSERGSTRUCT:
4225 if (copy_to_user((struct e100_serial *) arg,
4226 info, sizeof(struct e100_serial)))
4227 return -EFAULT;
4228 return 0;
4230 #if defined(CONFIG_ETRAX_RS485)
4231 case TIOCSERSETRS485:
4233 struct rs485_control rs485ctrl;
4234 if (copy_from_user(&rs485ctrl, (struct rs485_control*)arg, sizeof(rs485ctrl)))
4235 return -EFAULT;
4237 return e100_enable_rs485(tty, &rs485ctrl);
4240 case TIOCSERWRRS485:
4242 struct rs485_write rs485wr;
4243 if (copy_from_user(&rs485wr, (struct rs485_write*)arg, sizeof(rs485wr)))
4244 return -EFAULT;
4246 return e100_write_rs485(tty, 1, rs485wr.outc, rs485wr.outc_size);
4248 #endif
4250 default:
4251 return -ENOIOCTLCMD;
4253 return 0;
4256 static void
4257 rs_set_termios(struct tty_struct *tty, struct termios *old_termios)
4259 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
4261 if (tty->termios->c_cflag == old_termios->c_cflag &&
4262 tty->termios->c_iflag == old_termios->c_iflag)
4263 return;
4265 change_speed(info);
4267 /* Handle turning off CRTSCTS */
4268 if ((old_termios->c_cflag & CRTSCTS) &&
4269 !(tty->termios->c_cflag & CRTSCTS)) {
4270 tty->hw_stopped = 0;
4271 rs_start(tty);
4276 /* In debugport.c - register a console write function that uses the normal
4277 * serial driver
4279 typedef int (*debugport_write_function)(int i, const char *buf, unsigned int len);
4281 extern debugport_write_function debug_write_function;
4283 static int rs_debug_write_function(int i, const char *buf, unsigned int len)
4285 int cnt;
4286 int written = 0;
4287 struct tty_struct *tty;
4288 static int recurse_cnt = 0;
4290 tty = rs_table[i].tty;
4291 if (tty) {
4292 unsigned long flags;
4293 if (recurse_cnt > 5) /* We skip this debug output */
4294 return 1;
4296 local_irq_save(flags);
4297 recurse_cnt++;
4298 local_irq_restore(flags);
4299 do {
4300 cnt = rs_write(tty, 0, buf + written, len);
4301 if (cnt >= 0) {
4302 written += cnt;
4303 buf += cnt;
4304 len -= cnt;
4305 } else
4306 len = cnt;
4307 } while(len > 0);
4308 local_irq_save(flags);
4309 recurse_cnt--;
4310 local_irq_restore(flags);
4311 return 1;
4313 return 0;
4317 * ------------------------------------------------------------
4318 * rs_close()
4320 * This routine is called when the serial port gets closed. First, we
4321 * wait for the last remaining data to be sent. Then, we unlink its
4322 * S structure from the interrupt chain if necessary, and we free
4323 * that IRQ if nothing is left in the chain.
4324 * ------------------------------------------------------------
4326 static void
4327 rs_close(struct tty_struct *tty, struct file * filp)
4329 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4330 unsigned long flags;
4332 if (!info)
4333 return;
4335 /* interrupts are disabled for this entire function */
4337 save_flags(flags);
4338 cli();
4340 if (tty_hung_up_p(filp)) {
4341 restore_flags(flags);
4342 return;
4345 #ifdef SERIAL_DEBUG_OPEN
4346 printk("[%d] rs_close ttyS%d, count = %d\n", current->pid,
4347 info->line, info->count);
4348 #endif
4349 if ((tty->count == 1) && (info->count != 1)) {
4351 * Uh, oh. tty->count is 1, which means that the tty
4352 * structure will be freed. Info->count should always
4353 * be one in these conditions. If it's greater than
4354 * one, we've got real problems, since it means the
4355 * serial port won't be shutdown.
4357 printk(KERN_CRIT
4358 "rs_close: bad serial port count; tty->count is 1, "
4359 "info->count is %d\n", info->count);
4360 info->count = 1;
4362 if (--info->count < 0) {
4363 printk(KERN_CRIT "rs_close: bad serial port count for ttyS%d: %d\n",
4364 info->line, info->count);
4365 info->count = 0;
4367 if (info->count) {
4368 restore_flags(flags);
4369 return;
4371 info->flags |= ASYNC_CLOSING;
4373 * Save the termios structure, since this port may have
4374 * separate termios for callout and dialin.
4376 if (info->flags & ASYNC_NORMAL_ACTIVE)
4377 info->normal_termios = *tty->termios;
4379 * Now we wait for the transmit buffer to clear; and we notify
4380 * the line discipline to only process XON/XOFF characters.
4382 tty->closing = 1;
4383 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
4384 tty_wait_until_sent(tty, info->closing_wait);
4386 * At this point we stop accepting input. To do this, we
4387 * disable the serial receiver and the DMA receive interrupt.
4389 #ifdef SERIAL_HANDLE_EARLY_ERRORS
4390 e100_disable_serial_data_irq(info);
4391 #endif
4393 #ifndef CONFIG_SVINTO_SIM
4394 e100_disable_rx(info);
4395 e100_disable_rx_irq(info);
4397 if (info->flags & ASYNC_INITIALIZED) {
4399 * Before we drop DTR, make sure the UART transmitter
4400 * has completely drained; this is especially
4401 * important as we have a transmit FIFO!
4403 rs_wait_until_sent(tty, HZ);
4405 #endif
4407 shutdown(info);
4408 if (tty->driver->flush_buffer)
4409 tty->driver->flush_buffer(tty);
4410 if (tty->ldisc.flush_buffer)
4411 tty->ldisc.flush_buffer(tty);
4412 tty->closing = 0;
4413 info->event = 0;
4414 info->tty = 0;
4415 if (info->blocked_open) {
4416 if (info->close_delay)
4417 schedule_timeout_interruptible(info->close_delay);
4418 wake_up_interruptible(&info->open_wait);
4420 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
4421 wake_up_interruptible(&info->close_wait);
4422 restore_flags(flags);
4424 /* port closed */
4426 #if defined(CONFIG_ETRAX_RS485)
4427 if (info->rs485.enabled) {
4428 info->rs485.enabled = 0;
4429 #if defined(CONFIG_ETRAX_RS485_ON_PA)
4430 *R_PORT_PA_DATA = port_pa_data_shadow &= ~(1 << rs485_pa_bit);
4431 #endif
4432 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
4433 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4434 rs485_port_g_bit, 0);
4435 #endif
4436 #if defined(CONFIG_ETRAX_RS485_LTC1387)
4437 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4438 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 0);
4439 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4440 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 0);
4441 #endif
4443 #endif
4447 * rs_wait_until_sent() --- wait until the transmitter is empty
4449 static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
4451 unsigned long orig_jiffies;
4452 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
4453 unsigned long curr_time = jiffies;
4454 unsigned long curr_time_usec = GET_JIFFIES_USEC();
4455 long elapsed_usec =
4456 (curr_time - info->last_tx_active) * (1000000/HZ) +
4457 curr_time_usec - info->last_tx_active_usec;
4460 * Check R_DMA_CHx_STATUS bit 0-6=number of available bytes in FIFO
4461 * R_DMA_CHx_HWSW bit 31-16=nbr of bytes left in DMA buffer (0=64k)
4463 orig_jiffies = jiffies;
4464 while (info->xmit.head != info->xmit.tail || /* More in send queue */
4465 (*info->ostatusadr & 0x007f) || /* more in FIFO */
4466 (elapsed_usec < 2*info->char_time_usec)) {
4467 schedule_timeout_interruptible(1);
4468 if (signal_pending(current))
4469 break;
4470 if (timeout && time_after(jiffies, orig_jiffies + timeout))
4471 break;
4472 curr_time = jiffies;
4473 curr_time_usec = GET_JIFFIES_USEC();
4474 elapsed_usec =
4475 (curr_time - info->last_tx_active) * (1000000/HZ) +
4476 curr_time_usec - info->last_tx_active_usec;
4478 set_current_state(TASK_RUNNING);
4482 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
4484 void
4485 rs_hangup(struct tty_struct *tty)
4487 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4489 rs_flush_buffer(tty);
4490 shutdown(info);
4491 info->event = 0;
4492 info->count = 0;
4493 info->flags &= ~ASYNC_NORMAL_ACTIVE;
4494 info->tty = 0;
4495 wake_up_interruptible(&info->open_wait);
4499 * ------------------------------------------------------------
4500 * rs_open() and friends
4501 * ------------------------------------------------------------
4503 static int
4504 block_til_ready(struct tty_struct *tty, struct file * filp,
4505 struct e100_serial *info)
4507 DECLARE_WAITQUEUE(wait, current);
4508 unsigned long flags;
4509 int retval;
4510 int do_clocal = 0, extra_count = 0;
4513 * If the device is in the middle of being closed, then block
4514 * until it's done, and then try again.
4516 if (tty_hung_up_p(filp) ||
4517 (info->flags & ASYNC_CLOSING)) {
4518 if (info->flags & ASYNC_CLOSING)
4519 interruptible_sleep_on(&info->close_wait);
4520 #ifdef SERIAL_DO_RESTART
4521 if (info->flags & ASYNC_HUP_NOTIFY)
4522 return -EAGAIN;
4523 else
4524 return -ERESTARTSYS;
4525 #else
4526 return -EAGAIN;
4527 #endif
4531 * If non-blocking mode is set, or the port is not enabled,
4532 * then make the check up front and then exit.
4534 if ((filp->f_flags & O_NONBLOCK) ||
4535 (tty->flags & (1 << TTY_IO_ERROR))) {
4536 info->flags |= ASYNC_NORMAL_ACTIVE;
4537 return 0;
4540 if (tty->termios->c_cflag & CLOCAL) {
4541 do_clocal = 1;
4545 * Block waiting for the carrier detect and the line to become
4546 * free (i.e., not in use by the callout). While we are in
4547 * this loop, info->count is dropped by one, so that
4548 * rs_close() knows when to free things. We restore it upon
4549 * exit, either normal or abnormal.
4551 retval = 0;
4552 add_wait_queue(&info->open_wait, &wait);
4553 #ifdef SERIAL_DEBUG_OPEN
4554 printk("block_til_ready before block: ttyS%d, count = %d\n",
4555 info->line, info->count);
4556 #endif
4557 save_flags(flags);
4558 cli();
4559 if (!tty_hung_up_p(filp)) {
4560 extra_count++;
4561 info->count--;
4563 restore_flags(flags);
4564 info->blocked_open++;
4565 while (1) {
4566 save_flags(flags);
4567 cli();
4568 /* assert RTS and DTR */
4569 e100_rts(info, 1);
4570 e100_dtr(info, 1);
4571 restore_flags(flags);
4572 set_current_state(TASK_INTERRUPTIBLE);
4573 if (tty_hung_up_p(filp) ||
4574 !(info->flags & ASYNC_INITIALIZED)) {
4575 #ifdef SERIAL_DO_RESTART
4576 if (info->flags & ASYNC_HUP_NOTIFY)
4577 retval = -EAGAIN;
4578 else
4579 retval = -ERESTARTSYS;
4580 #else
4581 retval = -EAGAIN;
4582 #endif
4583 break;
4585 if (!(info->flags & ASYNC_CLOSING) && do_clocal)
4586 /* && (do_clocal || DCD_IS_ASSERTED) */
4587 break;
4588 if (signal_pending(current)) {
4589 retval = -ERESTARTSYS;
4590 break;
4592 #ifdef SERIAL_DEBUG_OPEN
4593 printk("block_til_ready blocking: ttyS%d, count = %d\n",
4594 info->line, info->count);
4595 #endif
4596 schedule();
4598 set_current_state(TASK_RUNNING);
4599 remove_wait_queue(&info->open_wait, &wait);
4600 if (extra_count)
4601 info->count++;
4602 info->blocked_open--;
4603 #ifdef SERIAL_DEBUG_OPEN
4604 printk("block_til_ready after blocking: ttyS%d, count = %d\n",
4605 info->line, info->count);
4606 #endif
4607 if (retval)
4608 return retval;
4609 info->flags |= ASYNC_NORMAL_ACTIVE;
4610 return 0;
4614 * This routine is called whenever a serial port is opened.
4615 * It performs the serial-specific initialization for the tty structure.
4617 static int
4618 rs_open(struct tty_struct *tty, struct file * filp)
4620 struct e100_serial *info;
4621 int retval, line;
4622 unsigned long page;
4624 /* find which port we want to open */
4626 line = tty->index;
4628 if (line < 0 || line >= NR_PORTS)
4629 return -ENODEV;
4631 /* find the corresponding e100_serial struct in the table */
4632 info = rs_table + line;
4634 /* don't allow the opening of ports that are not enabled in the HW config */
4635 if (!info->enabled)
4636 return -ENODEV;
4638 #ifdef SERIAL_DEBUG_OPEN
4639 printk("[%d] rs_open %s, count = %d\n", current->pid, tty->name,
4640 info->count);
4641 #endif
4643 info->count++;
4644 tty->driver_data = info;
4645 info->tty = tty;
4647 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
4649 if (!tmp_buf) {
4650 page = get_zeroed_page(GFP_KERNEL);
4651 if (!page) {
4652 return -ENOMEM;
4654 if (tmp_buf)
4655 free_page(page);
4656 else
4657 tmp_buf = (unsigned char *) page;
4661 * If the port is in the middle of closing, bail out now
4663 if (tty_hung_up_p(filp) ||
4664 (info->flags & ASYNC_CLOSING)) {
4665 if (info->flags & ASYNC_CLOSING)
4666 interruptible_sleep_on(&info->close_wait);
4667 #ifdef SERIAL_DO_RESTART
4668 return ((info->flags & ASYNC_HUP_NOTIFY) ?
4669 -EAGAIN : -ERESTARTSYS);
4670 #else
4671 return -EAGAIN;
4672 #endif
4676 * Start up the serial port
4679 retval = startup(info);
4680 if (retval)
4681 return retval;
4683 retval = block_til_ready(tty, filp, info);
4684 if (retval) {
4685 #ifdef SERIAL_DEBUG_OPEN
4686 printk("rs_open returning after block_til_ready with %d\n",
4687 retval);
4688 #endif
4689 return retval;
4692 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
4693 *tty->termios = info->normal_termios;
4694 change_speed(info);
4697 #ifdef SERIAL_DEBUG_OPEN
4698 printk("rs_open ttyS%d successful...\n", info->line);
4699 #endif
4700 DLOG_INT_TRIG( log_int_pos = 0);
4702 DFLIP( if (info->line == SERIAL_DEBUG_LINE) {
4703 info->icount.rx = 0;
4704 } );
4706 return 0;
4710 * /proc fs routines....
4713 extern _INLINE_ int line_info(char *buf, struct e100_serial *info)
4715 char stat_buf[30];
4716 int ret;
4717 unsigned long tmp;
4719 ret = sprintf(buf, "%d: uart:E100 port:%lX irq:%d",
4720 info->line, (unsigned long)info->port, info->irq);
4722 if (!info->port || (info->type == PORT_UNKNOWN)) {
4723 ret += sprintf(buf+ret, "\n");
4724 return ret;
4727 stat_buf[0] = 0;
4728 stat_buf[1] = 0;
4729 if (!E100_RTS_GET(info))
4730 strcat(stat_buf, "|RTS");
4731 if (!E100_CTS_GET(info))
4732 strcat(stat_buf, "|CTS");
4733 if (!E100_DTR_GET(info))
4734 strcat(stat_buf, "|DTR");
4735 if (!E100_DSR_GET(info))
4736 strcat(stat_buf, "|DSR");
4737 if (!E100_CD_GET(info))
4738 strcat(stat_buf, "|CD");
4739 if (!E100_RI_GET(info))
4740 strcat(stat_buf, "|RI");
4742 ret += sprintf(buf+ret, " baud:%d", info->baud);
4744 ret += sprintf(buf+ret, " tx:%lu rx:%lu",
4745 (unsigned long)info->icount.tx,
4746 (unsigned long)info->icount.rx);
4747 tmp = CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
4748 if (tmp) {
4749 ret += sprintf(buf+ret, " tx_pend:%lu/%lu",
4750 (unsigned long)tmp,
4751 (unsigned long)SERIAL_XMIT_SIZE);
4754 ret += sprintf(buf+ret, " rx_pend:%lu/%lu",
4755 (unsigned long)info->recv_cnt,
4756 (unsigned long)info->max_recv_cnt);
4758 #if 1
4759 if (info->tty) {
4761 if (info->tty->stopped)
4762 ret += sprintf(buf+ret, " stopped:%i",
4763 (int)info->tty->stopped);
4764 if (info->tty->hw_stopped)
4765 ret += sprintf(buf+ret, " hw_stopped:%i",
4766 (int)info->tty->hw_stopped);
4770 unsigned char rstat = info->port[REG_STATUS];
4771 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) )
4772 ret += sprintf(buf+ret, " xoff_detect:1");
4775 #endif
4780 if (info->icount.frame)
4781 ret += sprintf(buf+ret, " fe:%lu",
4782 (unsigned long)info->icount.frame);
4784 if (info->icount.parity)
4785 ret += sprintf(buf+ret, " pe:%lu",
4786 (unsigned long)info->icount.parity);
4788 if (info->icount.brk)
4789 ret += sprintf(buf+ret, " brk:%lu",
4790 (unsigned long)info->icount.brk);
4792 if (info->icount.overrun)
4793 ret += sprintf(buf+ret, " oe:%lu",
4794 (unsigned long)info->icount.overrun);
4797 * Last thing is the RS-232 status lines
4799 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
4800 return ret;
4803 int rs_read_proc(char *page, char **start, off_t off, int count,
4804 int *eof, void *data)
4806 int i, len = 0, l;
4807 off_t begin = 0;
4809 len += sprintf(page, "serinfo:1.0 driver:%s\n",
4810 serial_version);
4811 for (i = 0; i < NR_PORTS && len < 4000; i++) {
4812 if (!rs_table[i].enabled)
4813 continue;
4814 l = line_info(page + len, &rs_table[i]);
4815 len += l;
4816 if (len+begin > off+count)
4817 goto done;
4818 if (len+begin < off) {
4819 begin += len;
4820 len = 0;
4823 #ifdef DEBUG_LOG_INCLUDED
4824 for (i = 0; i < debug_log_pos; i++) {
4825 len += sprintf(page + len, "%-4i %lu.%lu ", i, debug_log[i].time, timer_data_to_ns(debug_log[i].timer_data));
4826 len += sprintf(page + len, debug_log[i].string, debug_log[i].value);
4827 if (len+begin > off+count)
4828 goto done;
4829 if (len+begin < off) {
4830 begin += len;
4831 len = 0;
4834 len += sprintf(page + len, "debug_log %i/%i %li bytes\n",
4835 i, DEBUG_LOG_SIZE, begin+len);
4836 debug_log_pos = 0;
4837 #endif
4839 *eof = 1;
4840 done:
4841 if (off >= len+begin)
4842 return 0;
4843 *start = page + (off-begin);
4844 return ((count < begin+len-off) ? count : begin+len-off);
4847 /* Finally, routines used to initialize the serial driver. */
4849 static void
4850 show_serial_version(void)
4852 printk(KERN_INFO
4853 "ETRAX 100LX serial-driver %s, (c) 2000-2004 Axis Communications AB\r\n",
4854 &serial_version[11]); /* "$Revision: x.yy" */
4857 /* rs_init inits the driver at boot (using the module_init chain) */
4859 static struct tty_operations rs_ops = {
4860 .open = rs_open,
4861 .close = rs_close,
4862 .write = rs_write,
4863 .flush_chars = rs_flush_chars,
4864 .write_room = rs_write_room,
4865 .chars_in_buffer = rs_chars_in_buffer,
4866 .flush_buffer = rs_flush_buffer,
4867 .ioctl = rs_ioctl,
4868 .throttle = rs_throttle,
4869 .unthrottle = rs_unthrottle,
4870 .set_termios = rs_set_termios,
4871 .stop = rs_stop,
4872 .start = rs_start,
4873 .hangup = rs_hangup,
4874 .break_ctl = rs_break,
4875 .send_xchar = rs_send_xchar,
4876 .wait_until_sent = rs_wait_until_sent,
4877 .read_proc = rs_read_proc,
4880 static int __init
4881 rs_init(void)
4883 int i;
4884 struct e100_serial *info;
4885 struct tty_driver *driver = alloc_tty_driver(NR_PORTS);
4887 if (!driver)
4888 return -ENOMEM;
4890 show_serial_version();
4892 /* Setup the timed flush handler system */
4894 #if !defined(CONFIG_ETRAX_SERIAL_FAST_TIMER)
4895 init_timer(&flush_timer);
4896 flush_timer.function = timed_flush_handler;
4897 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
4898 #endif
4900 /* Initialize the tty_driver structure */
4902 driver->driver_name = "serial";
4903 driver->name = "ttyS";
4904 driver->major = TTY_MAJOR;
4905 driver->minor_start = 64;
4906 driver->type = TTY_DRIVER_TYPE_SERIAL;
4907 driver->subtype = SERIAL_TYPE_NORMAL;
4908 driver->init_termios = tty_std_termios;
4909 driver->init_termios.c_cflag =
4910 B115200 | CS8 | CREAD | HUPCL | CLOCAL; /* is normally B9600 default... */
4911 driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_NO_DEVFS;
4912 driver->termios = serial_termios;
4913 driver->termios_locked = serial_termios_locked;
4915 tty_set_operations(driver, &rs_ops);
4916 serial_driver = driver;
4917 if (tty_register_driver(driver))
4918 panic("Couldn't register serial driver\n");
4919 /* do some initializing for the separate ports */
4921 for (i = 0, info = rs_table; i < NR_PORTS; i++,info++) {
4922 info->uses_dma_in = 0;
4923 info->uses_dma_out = 0;
4924 info->line = i;
4925 info->tty = 0;
4926 info->type = PORT_ETRAX;
4927 info->tr_running = 0;
4928 info->forced_eop = 0;
4929 info->baud_base = DEF_BAUD_BASE;
4930 info->custom_divisor = 0;
4931 info->flags = 0;
4932 info->close_delay = 5*HZ/10;
4933 info->closing_wait = 30*HZ;
4934 info->x_char = 0;
4935 info->event = 0;
4936 info->count = 0;
4937 info->blocked_open = 0;
4938 info->normal_termios = driver->init_termios;
4939 init_waitqueue_head(&info->open_wait);
4940 init_waitqueue_head(&info->close_wait);
4941 info->xmit.buf = NULL;
4942 info->xmit.tail = info->xmit.head = 0;
4943 info->first_recv_buffer = info->last_recv_buffer = NULL;
4944 info->recv_cnt = info->max_recv_cnt = 0;
4945 info->last_tx_active_usec = 0;
4946 info->last_tx_active = 0;
4948 #if defined(CONFIG_ETRAX_RS485)
4949 /* Set sane defaults */
4950 info->rs485.rts_on_send = 0;
4951 info->rs485.rts_after_sent = 1;
4952 info->rs485.delay_rts_before_send = 0;
4953 info->rs485.enabled = 0;
4954 #endif
4955 INIT_WORK(&info->work, do_softint, info);
4957 if (info->enabled) {
4958 printk(KERN_INFO "%s%d at 0x%x is a builtin UART with DMA\n",
4959 serial_driver->name, info->line, (unsigned int)info->port);
4962 #ifdef CONFIG_ETRAX_FAST_TIMER
4963 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
4964 memset(fast_timers, 0, sizeof(fast_timers));
4965 #endif
4966 #ifdef CONFIG_ETRAX_RS485
4967 memset(fast_timers_rs485, 0, sizeof(fast_timers_rs485));
4968 #endif
4969 fast_timer_init();
4970 #endif
4972 #ifndef CONFIG_SVINTO_SIM
4973 /* Not needed in simulator. May only complicate stuff. */
4974 /* hook the irq's for DMA channel 6 and 7, serial output and input, and some more... */
4976 if (request_irq(SERIAL_IRQ_NBR, ser_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial ", NULL))
4977 panic("irq8");
4979 #ifdef CONFIG_ETRAX_SERIAL_PORT0
4980 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
4981 if (request_irq(SER0_DMA_TX_IRQ_NBR, tr_interrupt, SA_INTERRUPT, "serial 0 dma tr", NULL))
4982 panic("irq22");
4983 #endif
4984 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
4985 if (request_irq(SER0_DMA_RX_IRQ_NBR, rec_interrupt, SA_INTERRUPT, "serial 0 dma rec", NULL))
4986 panic("irq23");
4987 #endif
4988 #endif
4990 #ifdef CONFIG_ETRAX_SERIAL_PORT1
4991 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
4992 if (request_irq(SER1_DMA_TX_IRQ_NBR, tr_interrupt, SA_INTERRUPT, "serial 1 dma tr", NULL))
4993 panic("irq24");
4994 #endif
4995 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
4996 if (request_irq(SER1_DMA_RX_IRQ_NBR, rec_interrupt, SA_INTERRUPT, "serial 1 dma rec", NULL))
4997 panic("irq25");
4998 #endif
4999 #endif
5000 #ifdef CONFIG_ETRAX_SERIAL_PORT2
5001 /* DMA Shared with par0 (and SCSI0 and ATA) */
5002 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
5003 if (request_irq(SER2_DMA_TX_IRQ_NBR, tr_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 2 dma tr", NULL))
5004 panic("irq18");
5005 #endif
5006 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
5007 if (request_irq(SER2_DMA_RX_IRQ_NBR, rec_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 2 dma rec", NULL))
5008 panic("irq19");
5009 #endif
5010 #endif
5011 #ifdef CONFIG_ETRAX_SERIAL_PORT3
5012 /* DMA Shared with par1 (and SCSI1 and Extern DMA 0) */
5013 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
5014 if (request_irq(SER3_DMA_TX_IRQ_NBR, tr_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 3 dma tr", NULL))
5015 panic("irq20");
5016 #endif
5017 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
5018 if (request_irq(SER3_DMA_RX_IRQ_NBR, rec_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 3 dma rec", NULL))
5019 panic("irq21");
5020 #endif
5021 #endif
5023 #ifdef CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
5024 if (request_irq(TIMER1_IRQ_NBR, timeout_interrupt, SA_SHIRQ | SA_INTERRUPT,
5025 "fast serial dma timeout", NULL)) {
5026 printk(KERN_CRIT "err: timer1 irq\n");
5028 #endif
5029 #endif /* CONFIG_SVINTO_SIM */
5030 debug_write_function = rs_debug_write_function;
5031 return 0;
5034 /* this makes sure that rs_init is called during kernel boot */
5036 module_init(rs_init);