arch/ia64/kernel/irq_ia64.c

   1 /*
   2  * linux/arch/ia64/kernel/irq_ia64.c
   3  *
   4  * Copyright (C) 1998-2001 Hewlett-Packard Co
   5  *      Stephane Eranian <eranian@hpl.hp.com>
   6  *      David Mosberger-Tang <davidm@hpl.hp.com>
   7  *
   8  *  6/10/99: Updated to bring in sync with x86 version to facilitate
   9  *           support for SMP and different interrupt controllers.
  10  *
  11  * 09/15/00 Goutham Rao <goutham.rao@intel.com> Implemented pci_irq_to_vector
  12  *                      PCI to vector allocation routine.
  13  * 04/14/2004 Ashok Raj <ashok.raj@intel.com>
  14  *                                              Added CPU Hotplug handling for IPF.
  15  */
  16
  17 #include <linux/module.h>
  18
  19 #include <linux/jiffies.h>
  20 #include <linux/errno.h>
  21 #include <linux/init.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/ioport.h>
  24 #include <linux/kernel_stat.h>
  25 #include <linux/slab.h>
  26 #include <linux/ptrace.h>
  27 #include <linux/random.h>       /* for rand_initialize_irq() */
  28 #include <linux/signal.h>
  29 #include <linux/smp.h>
  30 #include <linux/threads.h>
  31 #include <linux/bitops.h>
  32 #include <linux/irq.h>
  33
  34 #include <asm/delay.h>
  35 #include <asm/intrinsics.h>
  36 #include <asm/io.h>
  37 #include <asm/hw_irq.h>
  38 #include <asm/machvec.h>
  39 #include <asm/pgtable.h>
  40 #include <asm/system.h>
  41 #include <asm/tlbflush.h>
  42
  43 #ifdef CONFIG_PERFMON
  44 # include <asm/perfmon.h>
  45 #endif
  46
  47 #define IRQ_DEBUG       0
  48
  49 #define IRQ_VECTOR_UNASSIGNED   (0)
  50
  51 #define IRQ_UNUSED              (0)
  52 #define IRQ_USED                (1)
  53 #define IRQ_RSVD                (2)
  54
  55 /* These can be overridden in platform_irq_init */
  56 int ia64_first_device_vector = IA64_DEF_FIRST_DEVICE_VECTOR;
  57 int ia64_last_device_vector = IA64_DEF_LAST_DEVICE_VECTOR;
  58
  59 /* default base addr of IPI table */
  60 void __iomem *ipi_base_addr = ((void __iomem *)
  61                                (__IA64_UNCACHED_OFFSET | IA64_IPI_DEFAULT_BASE_ADDR));
  62
  63 static cpumask_t vector_allocation_domain(int cpu);
  64
  65 /*
  66  * Legacy IRQ to IA-64 vector translation table.
  67  */
  68 __u8 isa_irq_to_vector_map[16] = {
  69         /* 8259 IRQ translation, first 16 entries */
  70         0x2f, 0x20, 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29,
  71         0x28, 0x27, 0x26, 0x25, 0x24, 0x23, 0x22, 0x21
  72 };
  73 EXPORT_SYMBOL(isa_irq_to_vector_map);
  74
  75 DEFINE_SPINLOCK(vector_lock);
  76
  77 struct irq_cfg irq_cfg[NR_IRQS] __read_mostly = {
  78         [0 ... NR_IRQS - 1] = {
  79                 .vector = IRQ_VECTOR_UNASSIGNED,
  80                 .domain = CPU_MASK_NONE
  81         }
  82 };
  83
  84 DEFINE_PER_CPU(int[IA64_NUM_VECTORS], vector_irq) = {
  85         [0 ... IA64_NUM_VECTORS - 1] = IA64_SPURIOUS_INT_VECTOR
  86 };
  87
  88 static cpumask_t vector_table[IA64_NUM_VECTORS] = {
  89         [0 ... IA64_NUM_VECTORS - 1] = CPU_MASK_NONE
  90 };
  91
  92 static int irq_status[NR_IRQS] = {
  93         [0 ... NR_IRQS -1] = IRQ_UNUSED
  94 };
  95
  96 int check_irq_used(int irq)
  97 {
  98         if (irq_status[irq] == IRQ_USED)
  99                 return 1;
 100
 101         return -1;
 102 }
 103
 104 static void reserve_irq(unsigned int irq)
 105 {
 106         unsigned long flags;
 107
 108         spin_lock_irqsave(&vector_lock, flags);
 109         irq_status[irq] = IRQ_RSVD;
 110         spin_unlock_irqrestore(&vector_lock, flags);
 111 }
 112
 113 static inline int find_unassigned_irq(void)
 114 {
 115         int irq;
 116
 117         for (irq = IA64_FIRST_DEVICE_VECTOR; irq < NR_IRQS; irq++)
 118                 if (irq_status[irq] == IRQ_UNUSED)
 119                         return irq;
 120         return -ENOSPC;
 121 }
 122
 123 static inline int find_unassigned_vector(cpumask_t domain)
 124 {
 125         cpumask_t mask;
 126         int pos, vector;
 127
 128         cpus_and(mask, domain, cpu_online_map);
 129         if (cpus_empty(mask))
 130                 return -EINVAL;
 131
 132         for (pos = 0; pos < IA64_NUM_DEVICE_VECTORS; pos++) {
 133                 vector = IA64_FIRST_DEVICE_VECTOR + pos;
 134                 cpus_and(mask, domain, vector_table[vector]);
 135                 if (!cpus_empty(mask))
 136                         continue;
 137                 return vector;
 138         }
 139         return -ENOSPC;
 140 }
 141
 142 static int __bind_irq_vector(int irq, int vector, cpumask_t domain)
 143 {
 144         cpumask_t mask;
 145         int cpu;
 146         struct irq_cfg *cfg = &irq_cfg[irq];
 147
 148         BUG_ON((unsigned)irq >= NR_IRQS);
 149         BUG_ON((unsigned)vector >= IA64_NUM_VECTORS);
 150
 151         cpus_and(mask, domain, cpu_online_map);
 152         if (cpus_empty(mask))
 153                 return -EINVAL;
 154         if ((cfg->vector == vector) && cpus_equal(cfg->domain, domain))
 155                 return 0;
 156         if (cfg->vector != IRQ_VECTOR_UNASSIGNED)
 157                 return -EBUSY;
 158         for_each_cpu_mask(cpu, mask)
 159                 per_cpu(vector_irq, cpu)[vector] = irq;
 160         cfg->vector = vector;
 161         cfg->domain = domain;
 162         irq_status[irq] = IRQ_USED;
 163         cpus_or(vector_table[vector], vector_table[vector], domain);
 164         return 0;
 165 }
 166
 167 int bind_irq_vector(int irq, int vector, cpumask_t domain)
 168 {
 169         unsigned long flags;
 170         int ret;
 171
 172         spin_lock_irqsave(&vector_lock, flags);
 173         ret = __bind_irq_vector(irq, vector, domain);
 174         spin_unlock_irqrestore(&vector_lock, flags);
 175         return ret;
 176 }
 177
 178 static void __clear_irq_vector(int irq)
 179 {
 180         int vector, cpu;
 181         cpumask_t mask;
 182         cpumask_t domain;
 183         struct irq_cfg *cfg = &irq_cfg[irq];
 184
 185         BUG_ON((unsigned)irq >= NR_IRQS);
 186         BUG_ON(cfg->vector == IRQ_VECTOR_UNASSIGNED);
 187         vector = cfg->vector;
 188         domain = cfg->domain;
 189         cpus_and(mask, cfg->domain, cpu_online_map);
 190         for_each_cpu_mask(cpu, mask)
 191                 per_cpu(vector_irq, cpu)[vector] = IA64_SPURIOUS_INT_VECTOR;
 192         cfg->vector = IRQ_VECTOR_UNASSIGNED;
 193         cfg->domain = CPU_MASK_NONE;
 194         irq_status[irq] = IRQ_UNUSED;
 195         cpus_andnot(vector_table[vector], vector_table[vector], domain);
 196 }
 197
 198 static void clear_irq_vector(int irq)
 199 {
 200         unsigned long flags;
 201
 202         spin_lock_irqsave(&vector_lock, flags);
 203         __clear_irq_vector(irq);
 204         spin_unlock_irqrestore(&vector_lock, flags);
 205 }
 206
 207 int
 208 assign_irq_vector (int irq)
 209 {
 210         unsigned long flags;
 211         int vector, cpu;
 212         cpumask_t domain;
 213
 214         vector = -ENOSPC;
 215
 216         spin_lock_irqsave(&vector_lock, flags);
 217         for_each_online_cpu(cpu) {
 218                 domain = vector_allocation_domain(cpu);
 219                 vector = find_unassigned_vector(domain);
 220                 if (vector >= 0)
 221                         break;
 222         }
 223         if (vector < 0)
 224                 goto out;
 225         if (irq == AUTO_ASSIGN)
 226                 irq = vector;
 227         BUG_ON(__bind_irq_vector(irq, vector, domain));
 228  out:
 229         spin_unlock_irqrestore(&vector_lock, flags);
 230         return vector;
 231 }
 232
 233 void
 234 free_irq_vector (int vector)
 235 {
 236         if (vector < IA64_FIRST_DEVICE_VECTOR ||
 237             vector > IA64_LAST_DEVICE_VECTOR)
 238                 return;
 239         clear_irq_vector(vector);
 240 }
 241
 242 int
 243 reserve_irq_vector (int vector)
 244 {
 245         if (vector < IA64_FIRST_DEVICE_VECTOR ||
 246             vector > IA64_LAST_DEVICE_VECTOR)
 247                 return -EINVAL;
 248         return !!bind_irq_vector(vector, vector, CPU_MASK_ALL);
 249 }
 250
 251 /*
 252  * Initialize vector_irq on a new cpu. This function must be called
 253  * with vector_lock held.
 254  */
 255 void __setup_vector_irq(int cpu)
 256 {
 257         int irq, vector;
 258
 259         /* Clear vector_irq */
 260         for (vector = 0; vector < IA64_NUM_VECTORS; ++vector)
 261                 per_cpu(vector_irq, cpu)[vector] = IA64_SPURIOUS_INT_VECTOR;
 262         /* Mark the inuse vectors */
 263         for (irq = 0; irq < NR_IRQS; ++irq) {
 264                 if (!cpu_isset(cpu, irq_cfg[irq].domain))
 265                         continue;
 266                 vector = irq_to_vector(irq);
 267                 per_cpu(vector_irq, cpu)[vector] = irq;
 268         }
 269 }
 270
 271 #if defined(CONFIG_SMP) && (defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_DIG))
 272 static enum vector_domain_type {
 273         VECTOR_DOMAIN_NONE,
 274         VECTOR_DOMAIN_PERCPU
 275 } vector_domain_type = VECTOR_DOMAIN_NONE;
 276
 277 static cpumask_t vector_allocation_domain(int cpu)
 278 {
 279         if (vector_domain_type == VECTOR_DOMAIN_PERCPU)
 280                 return cpumask_of_cpu(cpu);
 281         return CPU_MASK_ALL;
 282 }
 283
 284 static int __init parse_vector_domain(char *arg)
 285 {
 286         if (!arg)
 287                 return -EINVAL;
 288         if (!strcmp(arg, "percpu")) {
 289                 vector_domain_type = VECTOR_DOMAIN_PERCPU;
 290                 no_int_routing = 1;
 291         }
 292         return 1;
 293 }
 294 early_param("vector", parse_vector_domain);
 295 #else
 296 static cpumask_t vector_allocation_domain(int cpu)
 297 {
 298         return CPU_MASK_ALL;
 299 }
 300 #endif
 301
 302
 303 void destroy_and_reserve_irq(unsigned int irq)
 304 {
 305         dynamic_irq_cleanup(irq);
 306
 307         clear_irq_vector(irq);
 308         reserve_irq(irq);
 309 }
 310
 311 static int __reassign_irq_vector(int irq, int cpu)
 312 {
 313         struct irq_cfg *cfg = &irq_cfg[irq];
 314         int vector;
 315         cpumask_t domain;
 316
 317         if (cfg->vector == IRQ_VECTOR_UNASSIGNED || !cpu_online(cpu))
 318                 return -EINVAL;
 319         if (cpu_isset(cpu, cfg->domain))
 320                 return 0;
 321         domain = vector_allocation_domain(cpu);
 322         vector = find_unassigned_vector(domain);
 323         if (vector < 0)
 324                 return -ENOSPC;
 325         __clear_irq_vector(irq);
 326         BUG_ON(__bind_irq_vector(irq, vector, domain));
 327         return 0;
 328 }
 329
 330 int reassign_irq_vector(int irq, int cpu)
 331 {
 332         unsigned long flags;
 333         int ret;
 334
 335         spin_lock_irqsave(&vector_lock, flags);
 336         ret = __reassign_irq_vector(irq, cpu);
 337         spin_unlock_irqrestore(&vector_lock, flags);
 338         return ret;
 339 }
 340
 341 /*
 342  * Dynamic irq allocate and deallocation for MSI
 343  */
 344 int create_irq(void)
 345 {
 346         unsigned long flags;
 347         int irq, vector, cpu;
 348         cpumask_t domain;
 349
 350         irq = vector = -ENOSPC;
 351         spin_lock_irqsave(&vector_lock, flags);
 352         for_each_online_cpu(cpu) {
 353                 domain = vector_allocation_domain(cpu);
 354                 vector = find_unassigned_vector(domain);
 355                 if (vector >= 0)
 356                         break;
 357         }
 358         if (vector < 0)
 359                 goto out;
 360         irq = find_unassigned_irq();
 361         if (irq < 0)
 362                 goto out;
 363         BUG_ON(__bind_irq_vector(irq, vector, domain));
 364  out:
 365         spin_unlock_irqrestore(&vector_lock, flags);
 366         if (irq >= 0)
 367                 dynamic_irq_init(irq);
 368         return irq;
 369 }
 370
 371 void destroy_irq(unsigned int irq)
 372 {
 373         dynamic_irq_cleanup(irq);
 374         clear_irq_vector(irq);
 375 }
 376
 377 #ifdef CONFIG_SMP
 378 #       define IS_RESCHEDULE(vec)       (vec == IA64_IPI_RESCHEDULE)
 379 #       define IS_LOCAL_TLB_FLUSH(vec)  (vec == IA64_IPI_LOCAL_TLB_FLUSH)
 380 #else
 381 #       define IS_RESCHEDULE(vec)       (0)
 382 #       define IS_LOCAL_TLB_FLUSH(vec)  (0)
 383 #endif
 384 /*
 385  * That's where the IVT branches when we get an external
 386  * interrupt. This branches to the correct hardware IRQ handler via
 387  * function ptr.
 388  */
 389 void
 390 ia64_handle_irq (ia64_vector vector, struct pt_regs *regs)
 391 {
 392         struct pt_regs *old_regs = set_irq_regs(regs);
 393         unsigned long saved_tpr;
 394
 395 #if IRQ_DEBUG
 396         {
 397                 unsigned long bsp, sp;
 398
 399                 /*
 400                  * Note: if the interrupt happened while executing in
 401                  * the context switch routine (ia64_switch_to), we may
 402                  * get a spurious stack overflow here.  This is
 403                  * because the register and the memory stack are not
 404                  * switched atomically.
 405                  */
 406                 bsp = ia64_getreg(_IA64_REG_AR_BSP);
 407                 sp = ia64_getreg(_IA64_REG_SP);
 408
 409                 if ((sp - bsp) < 1024) {
 410                         static unsigned char count;
 411                         static long last_time;
 412
 413                         if (jiffies - last_time > 5*HZ)
 414                                 count = 0;
 415                         if (++count < 5) {
 416                                 last_time = jiffies;
 417                                 printk("ia64_handle_irq: DANGER: less than "
 418                                        "1KB of free stack space!!\n"
 419                                        "(bsp=0x%lx, sp=%lx)\n", bsp, sp);
 420                         }
 421                 }
 422         }
 423 #endif /* IRQ_DEBUG */
 424
 425         /*
 426          * Always set TPR to limit maximum interrupt nesting depth to
 427          * 16 (without this, it would be ~240, which could easily lead
 428          * to kernel stack overflows).
 429          */
 430         irq_enter();
 431         saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
 432         ia64_srlz_d();
 433         while (vector != IA64_SPURIOUS_INT_VECTOR) {
 434                 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
 435                         smp_local_flush_tlb();
 436                         kstat_this_cpu.irqs[vector]++;
 437                 } else if (unlikely(IS_RESCHEDULE(vector)))
 438                         kstat_this_cpu.irqs[vector]++;
 439                 else {
 440                         ia64_setreg(_IA64_REG_CR_TPR, vector);
 441                         ia64_srlz_d();
 442
 443                         generic_handle_irq(local_vector_to_irq(vector));
 444
 445                         /*
 446                          * Disable interrupts and send EOI:
 447                          */
 448                         local_irq_disable();
 449                         ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
 450                 }
 451                 ia64_eoi();
 452                 vector = ia64_get_ivr();
 453         }
 454         /*
 455          * This must be done *after* the ia64_eoi().  For example, the keyboard softirq
 456          * handler needs to be able to wait for further keyboard interrupts, which can't
 457          * come through until ia64_eoi() has been done.
 458          */
 459         irq_exit();
 460         set_irq_regs(old_regs);
 461 }
 462
 463 #ifdef CONFIG_HOTPLUG_CPU
 464 /*
 465  * This function emulates a interrupt processing when a cpu is about to be
 466  * brought down.
 467  */
 468 void ia64_process_pending_intr(void)
 469 {
 470         ia64_vector vector;
 471         unsigned long saved_tpr;
 472         extern unsigned int vectors_in_migration[NR_IRQS];
 473
 474         vector = ia64_get_ivr();
 475
 476          irq_enter();
 477          saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
 478          ia64_srlz_d();
 479
 480          /*
 481           * Perform normal interrupt style processing
 482           */
 483         while (vector != IA64_SPURIOUS_INT_VECTOR) {
 484                 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
 485                         smp_local_flush_tlb();
 486                         kstat_this_cpu.irqs[vector]++;
 487                 } else if (unlikely(IS_RESCHEDULE(vector)))
 488                         kstat_this_cpu.irqs[vector]++;
 489                 else {
 490                         struct pt_regs *old_regs = set_irq_regs(NULL);
 491
 492                         ia64_setreg(_IA64_REG_CR_TPR, vector);
 493                         ia64_srlz_d();
 494
 495                         /*
 496                          * Now try calling normal ia64_handle_irq as it would have got called
 497                          * from a real intr handler. Try passing null for pt_regs, hopefully
 498                          * it will work. I hope it works!.
 499                          * Probably could shared code.
 500                          */
 501                         vectors_in_migration[local_vector_to_irq(vector)]=0;
 502                         generic_handle_irq(local_vector_to_irq(vector));
 503                         set_irq_regs(old_regs);
 504
 505                         /*
 506                          * Disable interrupts and send EOI
 507                          */
 508                         local_irq_disable();
 509                         ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
 510                 }
 511                 ia64_eoi();
 512                 vector = ia64_get_ivr();
 513         }
 514         irq_exit();
 515 }
 516 #endif
 517
 518
 519 #ifdef CONFIG_SMP
 520
 521 static irqreturn_t dummy_handler (int irq, void *dev_id)
 522 {
 523         BUG();
 524 }
 525 extern irqreturn_t handle_IPI (int irq, void *dev_id);
 526
 527 static struct irqaction ipi_irqaction = {
 528         .handler =      handle_IPI,
 529         .flags =        IRQF_DISABLED,
 530         .name =         "IPI"
 531 };
 532
 533 static struct irqaction resched_irqaction = {
 534         .handler =      dummy_handler,
 535         .flags =        IRQF_DISABLED,
 536         .name =         "resched"
 537 };
 538
 539 static struct irqaction tlb_irqaction = {
 540         .handler =      dummy_handler,
 541         .flags =        IRQF_DISABLED,
 542         .name =         "tlb_flush"
 543 };
 544
 545 #endif
 546
 547 void
 548 register_percpu_irq (ia64_vector vec, struct irqaction *action)
 549 {
 550         irq_desc_t *desc;
 551         unsigned int irq;
 552
 553         irq = vec;
 554         BUG_ON(bind_irq_vector(irq, vec, CPU_MASK_ALL));
 555         desc = irq_desc + irq;
 556         desc->status |= IRQ_PER_CPU;
 557         desc->chip = &irq_type_ia64_lsapic;
 558         if (action)
 559                 setup_irq(irq, action);
 560 }
 561
 562 void __init
 563 init_IRQ (void)
 564 {
 565         register_percpu_irq(IA64_SPURIOUS_INT_VECTOR, NULL);
 566 #ifdef CONFIG_SMP
 567         register_percpu_irq(IA64_IPI_VECTOR, &ipi_irqaction);
 568         register_percpu_irq(IA64_IPI_RESCHEDULE, &resched_irqaction);
 569         register_percpu_irq(IA64_IPI_LOCAL_TLB_FLUSH, &tlb_irqaction);
 570 #endif
 571 #ifdef CONFIG_PERFMON
 572         pfm_init_percpu();
 573 #endif
 574         platform_irq_init();
 575 }
 576
 577 void
 578 ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect)
 579 {
 580         void __iomem *ipi_addr;
 581         unsigned long ipi_data;
 582         unsigned long phys_cpu_id;
 583
 584 #ifdef CONFIG_SMP
 585         phys_cpu_id = cpu_physical_id(cpu);
 586 #else
 587         phys_cpu_id = (ia64_getreg(_IA64_REG_CR_LID) >> 16) & 0xffff;
 588 #endif
 589
 590         /*
 591          * cpu number is in 8bit ID and 8bit EID
 592          */
 593
 594         ipi_data = (delivery_mode << 8) | (vector & 0xff);
 595         ipi_addr = ipi_base_addr + ((phys_cpu_id << 4) | ((redirect & 1) << 3));
 596
 597         writeq(ipi_data, ipi_addr);
 598 }