1 #ifndef _ASM_X86_APIC_H
2 #define _ASM_X86_APIC_H
5 #include <linux/delay.h>
7 #include <asm/alternative.h>
8 #include <asm/fixmap.h>
9 #include <asm/apicdef.h>
10 #include <asm/processor.h>
11 #include <asm/system.h>
12 #include <asm/cpufeature.h>
15 #define ARCH_APICTIMER_STOPS_ON_C3 1
21 #define APIC_VERBOSE 1
25 * Define the default level of output to be very little
26 * This can be turned up by using apic=verbose for more
27 * information and apic=debug for _lots_ of information.
28 * apic_verbosity is defined in apic.c
30 #define apic_printk(v, s, a...) do { \
31 if ((v) <= apic_verbosity) \
36 extern void generic_apic_probe(void);
38 #ifdef CONFIG_X86_LOCAL_APIC
40 extern unsigned int apic_verbosity
;
41 extern int local_apic_timer_c2_ok
;
43 extern int disable_apic
;
46 extern void __inquire_remote_apic(int apicid
);
47 #else /* CONFIG_SMP */
48 static inline void __inquire_remote_apic(int apicid
)
51 #endif /* CONFIG_SMP */
53 static inline void default_inquire_remote_apic(int apicid
)
55 if (apic_verbosity
>= APIC_DEBUG
)
56 __inquire_remote_apic(apicid
);
60 * Basic functions accessing APICs.
62 #ifdef CONFIG_PARAVIRT
63 #include <asm/paravirt.h>
65 #define setup_boot_clock setup_boot_APIC_clock
66 #define setup_secondary_clock setup_secondary_APIC_clock
69 extern int is_vsmp_box(void);
70 extern void xapic_wait_icr_idle(void);
71 extern u32
safe_xapic_wait_icr_idle(void);
72 extern void xapic_icr_write(u32
, u32
);
73 extern int setup_profiling_timer(unsigned int);
75 static inline void native_apic_mem_write(u32 reg
, u32 v
)
77 volatile u32
*addr
= (volatile u32
*)(APIC_BASE
+ reg
);
79 alternative_io("movl %0, %1", "xchgl %0, %1", X86_FEATURE_11AP
,
80 ASM_OUTPUT2("=r" (v
), "=m" (*addr
)),
81 ASM_OUTPUT2("0" (v
), "m" (*addr
)));
84 static inline u32
native_apic_mem_read(u32 reg
)
86 return *((volatile u32
*)(APIC_BASE
+ reg
));
89 static inline void native_apic_msr_write(u32 reg
, u32 v
)
91 if (reg
== APIC_DFR
|| reg
== APIC_ID
|| reg
== APIC_LDR
||
95 wrmsr(APIC_BASE_MSR
+ (reg
>> 4), v
, 0);
98 static inline u32
native_apic_msr_read(u32 reg
)
105 rdmsr(APIC_BASE_MSR
+ (reg
>> 4), low
, high
);
109 #ifndef CONFIG_X86_32
111 extern void check_x2apic(void);
112 extern void enable_x2apic(void);
113 extern void enable_IR_x2apic(void);
114 extern void x2apic_icr_write(u32 low
, u32 id
);
115 static inline int x2apic_enabled(void)
122 rdmsr(MSR_IA32_APICBASE
, msr
, msr2
);
123 if (msr
& X2APIC_ENABLE
)
128 #define x2apic_enabled() 0
132 u32 (*read
)(u32 reg
);
133 void (*write
)(u32 reg
, u32 v
);
134 u64 (*icr_read
)(void);
135 void (*icr_write
)(u32 low
, u32 high
);
136 void (*wait_icr_idle
)(void);
137 u32 (*safe_wait_icr_idle
)(void);
140 extern struct apic_ops
*apic_ops
;
142 #define apic_read (apic_ops->read)
143 #define apic_write (apic_ops->write)
144 #define apic_icr_read (apic_ops->icr_read)
145 #define apic_icr_write (apic_ops->icr_write)
146 #define apic_wait_icr_idle (apic_ops->wait_icr_idle)
147 #define safe_apic_wait_icr_idle (apic_ops->safe_wait_icr_idle)
149 extern int get_physical_broadcast(void);
152 static inline void ack_x2APIC_irq(void)
154 /* Docs say use 0 for future compatibility */
155 native_apic_msr_write(APIC_EOI
, 0);
160 static inline void ack_APIC_irq(void)
163 * ack_APIC_irq() actually gets compiled as a single instruction
167 /* Docs say use 0 for future compatibility */
168 apic_write(APIC_EOI
, 0);
171 extern int lapic_get_maxlvt(void);
172 extern void clear_local_APIC(void);
173 extern void connect_bsp_APIC(void);
174 extern void disconnect_bsp_APIC(int virt_wire_setup
);
175 extern void disable_local_APIC(void);
176 extern void lapic_shutdown(void);
177 extern int verify_local_APIC(void);
178 extern void cache_APIC_registers(void);
179 extern void sync_Arb_IDs(void);
180 extern void init_bsp_APIC(void);
181 extern void setup_local_APIC(void);
182 extern void end_local_APIC_setup(void);
183 extern void init_apic_mappings(void);
184 extern void setup_boot_APIC_clock(void);
185 extern void setup_secondary_APIC_clock(void);
186 extern int APIC_init_uniprocessor(void);
187 extern void enable_NMI_through_LVT0(void);
190 * On 32bit this is mach-xxx local
193 extern void early_init_lapic_mapping(void);
194 extern int apic_is_clustered_box(void);
196 static inline int apic_is_clustered_box(void)
202 extern u8
setup_APIC_eilvt_mce(u8 vector
, u8 msg_type
, u8 mask
);
203 extern u8
setup_APIC_eilvt_ibs(u8 vector
, u8 msg_type
, u8 mask
);
206 #else /* !CONFIG_X86_LOCAL_APIC */
207 static inline void lapic_shutdown(void) { }
208 #define local_apic_timer_c2_ok 1
209 static inline void init_apic_mappings(void) { }
210 static inline void disable_local_APIC(void) { }
212 #endif /* !CONFIG_X86_LOCAL_APIC */
215 #define SET_APIC_ID(x) (apic->set_apic_id(x))
218 #ifdef CONFIG_X86_LOCAL_APIC
219 static inline unsigned default_get_apic_id(unsigned long x
)
221 unsigned int ver
= GET_APIC_VERSION(apic_read(APIC_LVR
));
224 return (x
>> 24) & 0xFF;
226 return (x
>> 24) & 0x0F;
232 #endif /* _ASM_X86_APIC_H */