4 typedef unsigned char intc_enum
;
11 #define INTC_VECT(enum_id, vect) { enum_id, vect }
12 #define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
16 intc_enum enum_ids
[32];
19 #define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
21 struct intc_mask_reg
{
22 unsigned long set_reg
, clr_reg
, reg_width
;
23 intc_enum enum_ids
[32];
29 struct intc_prio_reg
{
30 unsigned long set_reg
, clr_reg
, reg_width
, field_width
;
31 intc_enum enum_ids
[16];
37 struct intc_sense_reg
{
38 unsigned long reg
, reg_width
, field_width
;
39 intc_enum enum_ids
[16];
43 #define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8)
45 #define INTC_SMP(stride, nr)
49 struct intc_vect
*vectors
;
50 unsigned int nr_vectors
;
51 struct intc_group
*groups
;
52 unsigned int nr_groups
;
53 struct intc_mask_reg
*mask_regs
;
54 unsigned int nr_mask_regs
;
55 struct intc_prio_reg
*prio_regs
;
56 unsigned int nr_prio_regs
;
57 struct intc_sense_reg
*sense_regs
;
58 unsigned int nr_sense_regs
;
60 #if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
61 struct intc_mask_reg
*ack_regs
;
62 unsigned int nr_ack_regs
;
66 #define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
67 #define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
68 mask_regs, prio_regs, sense_regs) \
69 struct intc_desc symbol __initdata = { \
70 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
71 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
72 _INTC_ARRAY(sense_regs), \
76 #if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
77 #define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \
78 mask_regs, prio_regs, sense_regs, ack_regs) \
79 struct intc_desc symbol __initdata = { \
80 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
81 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
82 _INTC_ARRAY(sense_regs), \
84 _INTC_ARRAY(ack_regs), \
88 void __init
register_intc_controller(struct intc_desc
*desc
);
89 int intc_set_priority(unsigned int irq
, unsigned int prio
);
91 #endif /* __SH_INTC_H */