Ath5k: fix bintval setup
[linux-2.6/mini2440.git] / include / asm-parisc / io.h
blob55ddb1842107b8542735a4b1032d0c49dddf81e1
1 #ifndef _ASM_IO_H
2 #define _ASM_IO_H
4 #include <linux/types.h>
5 #include <asm/pgtable.h>
7 extern unsigned long parisc_vmerge_boundary;
8 extern unsigned long parisc_vmerge_max_size;
10 #define BIO_VMERGE_BOUNDARY parisc_vmerge_boundary
11 #define BIO_VMERGE_MAX_SIZE parisc_vmerge_max_size
13 #define virt_to_phys(a) ((unsigned long)__pa(a))
14 #define phys_to_virt(a) __va(a)
15 #define virt_to_bus virt_to_phys
16 #define bus_to_virt phys_to_virt
18 static inline unsigned long isa_bus_to_virt(unsigned long addr) {
19 BUG();
20 return 0;
23 static inline unsigned long isa_virt_to_bus(void *addr) {
24 BUG();
25 return 0;
29 * Memory mapped I/O
31 * readX()/writeX() do byteswapping and take an ioremapped address
32 * __raw_readX()/__raw_writeX() don't byteswap and take an ioremapped address.
33 * gsc_*() don't byteswap and operate on physical addresses;
34 * eg dev->hpa or 0xfee00000.
37 static inline unsigned char gsc_readb(unsigned long addr)
39 long flags;
40 unsigned char ret;
42 __asm__ __volatile__(
43 " rsm 2,%0\n"
44 " ldbx 0(%2),%1\n"
45 " mtsm %0\n"
46 : "=&r" (flags), "=r" (ret) : "r" (addr) );
48 return ret;
51 static inline unsigned short gsc_readw(unsigned long addr)
53 long flags;
54 unsigned short ret;
56 __asm__ __volatile__(
57 " rsm 2,%0\n"
58 " ldhx 0(%2),%1\n"
59 " mtsm %0\n"
60 : "=&r" (flags), "=r" (ret) : "r" (addr) );
62 return ret;
65 static inline unsigned int gsc_readl(unsigned long addr)
67 u32 ret;
69 __asm__ __volatile__(
70 " ldwax 0(%1),%0\n"
71 : "=r" (ret) : "r" (addr) );
73 return ret;
76 static inline unsigned long long gsc_readq(unsigned long addr)
78 unsigned long long ret;
80 #ifdef CONFIG_64BIT
81 __asm__ __volatile__(
82 " ldda 0(%1),%0\n"
83 : "=r" (ret) : "r" (addr) );
84 #else
85 /* two reads may have side effects.. */
86 ret = ((u64) gsc_readl(addr)) << 32;
87 ret |= gsc_readl(addr+4);
88 #endif
89 return ret;
92 static inline void gsc_writeb(unsigned char val, unsigned long addr)
94 long flags;
95 __asm__ __volatile__(
96 " rsm 2,%0\n"
97 " stbs %1,0(%2)\n"
98 " mtsm %0\n"
99 : "=&r" (flags) : "r" (val), "r" (addr) );
102 static inline void gsc_writew(unsigned short val, unsigned long addr)
104 long flags;
105 __asm__ __volatile__(
106 " rsm 2,%0\n"
107 " sths %1,0(%2)\n"
108 " mtsm %0\n"
109 : "=&r" (flags) : "r" (val), "r" (addr) );
112 static inline void gsc_writel(unsigned int val, unsigned long addr)
114 __asm__ __volatile__(
115 " stwas %0,0(%1)\n"
116 : : "r" (val), "r" (addr) );
119 static inline void gsc_writeq(unsigned long long val, unsigned long addr)
121 #ifdef CONFIG_64BIT
122 __asm__ __volatile__(
123 " stda %0,0(%1)\n"
124 : : "r" (val), "r" (addr) );
125 #else
126 /* two writes may have side effects.. */
127 gsc_writel(val >> 32, addr);
128 gsc_writel(val, addr+4);
129 #endif
133 * The standard PCI ioremap interfaces
136 extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
138 /* Most machines react poorly to I/O-space being cacheable... Instead let's
139 * define ioremap() in terms of ioremap_nocache().
141 static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
143 return __ioremap(offset, size, _PAGE_NO_CACHE);
145 #define ioremap_nocache(off, sz) ioremap((off), (sz))
147 extern void iounmap(const volatile void __iomem *addr);
149 static inline unsigned char __raw_readb(const volatile void __iomem *addr)
151 return (*(volatile unsigned char __force *) (addr));
153 static inline unsigned short __raw_readw(const volatile void __iomem *addr)
155 return *(volatile unsigned short __force *) addr;
157 static inline unsigned int __raw_readl(const volatile void __iomem *addr)
159 return *(volatile unsigned int __force *) addr;
161 static inline unsigned long long __raw_readq(const volatile void __iomem *addr)
163 return *(volatile unsigned long long __force *) addr;
166 static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr)
168 *(volatile unsigned char __force *) addr = b;
170 static inline void __raw_writew(unsigned short b, volatile void __iomem *addr)
172 *(volatile unsigned short __force *) addr = b;
174 static inline void __raw_writel(unsigned int b, volatile void __iomem *addr)
176 *(volatile unsigned int __force *) addr = b;
178 static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr)
180 *(volatile unsigned long long __force *) addr = b;
183 /* readb can never be const, so use __fswab instead of le*_to_cpu */
184 #define readb(addr) __raw_readb(addr)
185 #define readw(addr) __fswab16(__raw_readw(addr))
186 #define readl(addr) __fswab32(__raw_readl(addr))
187 #define readq(addr) __fswab64(__raw_readq(addr))
188 #define writeb(b, addr) __raw_writeb(b, addr)
189 #define writew(b, addr) __raw_writew(cpu_to_le16(b), addr)
190 #define writel(b, addr) __raw_writel(cpu_to_le32(b), addr)
191 #define writeq(b, addr) __raw_writeq(cpu_to_le64(b), addr)
193 #define readb_relaxed(addr) readb(addr)
194 #define readw_relaxed(addr) readw(addr)
195 #define readl_relaxed(addr) readl(addr)
196 #define readq_relaxed(addr) readq(addr)
198 #define mmiowb() do { } while (0)
200 void memset_io(volatile void __iomem *addr, unsigned char val, int count);
201 void memcpy_fromio(void *dst, const volatile void __iomem *src, int count);
202 void memcpy_toio(volatile void __iomem *dst, const void *src, int count);
204 /* Port-space IO */
206 #define inb_p inb
207 #define inw_p inw
208 #define inl_p inl
209 #define outb_p outb
210 #define outw_p outw
211 #define outl_p outl
213 extern unsigned char eisa_in8(unsigned short port);
214 extern unsigned short eisa_in16(unsigned short port);
215 extern unsigned int eisa_in32(unsigned short port);
216 extern void eisa_out8(unsigned char data, unsigned short port);
217 extern void eisa_out16(unsigned short data, unsigned short port);
218 extern void eisa_out32(unsigned int data, unsigned short port);
220 #if defined(CONFIG_PCI)
221 extern unsigned char inb(int addr);
222 extern unsigned short inw(int addr);
223 extern unsigned int inl(int addr);
225 extern void outb(unsigned char b, int addr);
226 extern void outw(unsigned short b, int addr);
227 extern void outl(unsigned int b, int addr);
228 #elif defined(CONFIG_EISA)
229 #define inb eisa_in8
230 #define inw eisa_in16
231 #define inl eisa_in32
232 #define outb eisa_out8
233 #define outw eisa_out16
234 #define outl eisa_out32
235 #else
236 static inline char inb(unsigned long addr)
238 BUG();
239 return -1;
242 static inline short inw(unsigned long addr)
244 BUG();
245 return -1;
248 static inline int inl(unsigned long addr)
250 BUG();
251 return -1;
254 #define outb(x, y) BUG()
255 #define outw(x, y) BUG()
256 #define outl(x, y) BUG()
257 #endif
260 * String versions of in/out ops:
262 extern void insb (unsigned long port, void *dst, unsigned long count);
263 extern void insw (unsigned long port, void *dst, unsigned long count);
264 extern void insl (unsigned long port, void *dst, unsigned long count);
265 extern void outsb (unsigned long port, const void *src, unsigned long count);
266 extern void outsw (unsigned long port, const void *src, unsigned long count);
267 extern void outsl (unsigned long port, const void *src, unsigned long count);
270 /* IO Port space is : BBiiii where BB is HBA number. */
271 #define IO_SPACE_LIMIT 0x00ffffff
273 /* PA machines have an MM I/O space from 0xf0000000-0xffffffff in 32
274 * bit mode and from 0xfffffffff0000000-0xfffffffffffffff in 64 bit
275 * mode (essentially just sign extending. This macro takes in a 32
276 * bit I/O address (still with the leading f) and outputs the correct
277 * value for either 32 or 64 bit mode */
278 #define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL)))
280 #include <asm-generic/iomap.h>
283 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
284 * access
286 #define xlate_dev_mem_ptr(p) __va(p)
289 * Convert a virtual cached pointer to an uncached pointer
291 #define xlate_dev_kmem_ptr(p) p
293 #endif