include/asm-sparc64/ptrace.h

   1 /* $Id: ptrace.h,v 1.14 2002/02/09 19:49:32 davem Exp $ */
   2 #ifndef _SPARC64_PTRACE_H
   3 #define _SPARC64_PTRACE_H
   4
   5 #include <asm/pstate.h>
   6
   7 /* This struct defines the way the registers are stored on the
   8  * stack during a system call and basically all traps.
   9  */
  10
  11 #define PT_REGS_MAGIC 0x57ac6c00
  12
  13 #ifndef __ASSEMBLY__
  14
  15 struct pt_regs {
  16         unsigned long u_regs[16]; /* globals and ins */
  17         unsigned long tstate;
  18         unsigned long tpc;
  19         unsigned long tnpc;
  20         unsigned int y;
  21
  22         /* We encode a magic number, PT_REGS_MAGIC, along
  23          * with the %tt (trap type) register value at trap
  24          * entry time.  The magic number allows us to identify
  25          * accurately a trap stack frame in the stack
  26          * unwinder, and the %tt value allows us to test
  27          * things like "in a system call" etc. for an arbitray
  28          * process.
  29          *
  30          * The PT_REGS_MAGIC is choosen such that it can be
  31          * loaded completely using just a sethi instruction.
  32          */
  33         unsigned int magic;
  34 };
  35
  36 struct pt_regs32 {
  37         unsigned int psr;
  38         unsigned int pc;
  39         unsigned int npc;
  40         unsigned int y;
  41         unsigned int u_regs[16]; /* globals and ins */
  42 };
  43
  44 #define UREG_G0        0
  45 #define UREG_G1        1
  46 #define UREG_G2        2
  47 #define UREG_G3        3
  48 #define UREG_G4        4
  49 #define UREG_G5        5
  50 #define UREG_G6        6
  51 #define UREG_G7        7
  52 #define UREG_I0        8
  53 #define UREG_I1        9
  54 #define UREG_I2        10
  55 #define UREG_I3        11
  56 #define UREG_I4        12
  57 #define UREG_I5        13
  58 #define UREG_I6        14
  59 #define UREG_I7        15
  60 #define UREG_FP        UREG_I6
  61 #define UREG_RETPC     UREG_I7
  62
  63 /* A V9 register window */
  64 struct reg_window {
  65         unsigned long locals[8];
  66         unsigned long ins[8];
  67 };
  68
  69 /* A 32-bit register window. */
  70 struct reg_window32 {
  71         unsigned int locals[8];
  72         unsigned int ins[8];
  73 };
  74
  75 /* A V9 Sparc stack frame */
  76 struct sparc_stackf {
  77         unsigned long locals[8];
  78         unsigned long ins[6];
  79         struct sparc_stackf *fp;
  80         unsigned long callers_pc;
  81         char *structptr;
  82         unsigned long xargs[6];
  83         unsigned long xxargs[1];
  84 };
  85
  86 /* A 32-bit Sparc stack frame */
  87 struct sparc_stackf32 {
  88         unsigned int locals[8];
  89         unsigned int ins[6];
  90         unsigned int fp;
  91         unsigned int callers_pc;
  92         unsigned int structptr;
  93         unsigned int xargs[6];
  94         unsigned int xxargs[1];
  95 };
  96
  97 struct sparc_trapf {
  98         unsigned long locals[8];
  99         unsigned long ins[8];
 100         unsigned long _unused;
 101         struct pt_regs *regs;
 102 };
 103
 104 #define TRACEREG_SZ     sizeof(struct pt_regs)
 105 #define STACKFRAME_SZ   sizeof(struct sparc_stackf)
 106
 107 #define TRACEREG32_SZ   sizeof(struct pt_regs32)
 108 #define STACKFRAME32_SZ sizeof(struct sparc_stackf32)
 109
 110 #ifdef __KERNEL__
 111
 112 #define __ARCH_WANT_COMPAT_SYS_PTRACE
 113
 114 #define force_successful_syscall_return()           \
 115 do {    current_thread_info()->syscall_noerror = 1; \
 116 } while (0)
 117 #define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV))
 118 #define instruction_pointer(regs) ((regs)->tpc)
 119 #define regs_return_value(regs) ((regs)->u_regs[UREG_I0])
 120 #ifdef CONFIG_SMP
 121 extern unsigned long profile_pc(struct pt_regs *);
 122 #else
 123 #define profile_pc(regs) instruction_pointer(regs)
 124 #endif
 125 extern void show_regs(struct pt_regs *);
 126 extern void __show_regs(struct pt_regs *);
 127 #endif
 128
 129 #else /* __ASSEMBLY__ */
 130 /* For assembly code. */
 131 #define TRACEREG_SZ             0xa0
 132 #define STACKFRAME_SZ           0xc0
 133
 134 #define TRACEREG32_SZ           0x50
 135 #define STACKFRAME32_SZ         0x60
 136 #endif
 137
 138 #ifdef __KERNEL__
 139 #define STACK_BIAS              2047
 140 #endif
 141
 142 /* These are for pt_regs. */
 143 #define PT_V9_G0     0x00
 144 #define PT_V9_G1     0x08
 145 #define PT_V9_G2     0x10
 146 #define PT_V9_G3     0x18
 147 #define PT_V9_G4     0x20
 148 #define PT_V9_G5     0x28
 149 #define PT_V9_G6     0x30
 150 #define PT_V9_G7     0x38
 151 #define PT_V9_I0     0x40
 152 #define PT_V9_I1     0x48
 153 #define PT_V9_I2     0x50
 154 #define PT_V9_I3     0x58
 155 #define PT_V9_I4     0x60
 156 #define PT_V9_I5     0x68
 157 #define PT_V9_I6     0x70
 158 #define PT_V9_FP     PT_V9_I6
 159 #define PT_V9_I7     0x78
 160 #define PT_V9_TSTATE 0x80
 161 #define PT_V9_TPC    0x88
 162 #define PT_V9_TNPC   0x90
 163 #define PT_V9_Y      0x98
 164 #define PT_V9_MAGIC  0x9c
 165 #define PT_TSTATE       PT_V9_TSTATE
 166 #define PT_TPC          PT_V9_TPC
 167 #define PT_TNPC         PT_V9_TNPC
 168
 169 /* These for pt_regs32. */
 170 #define PT_PSR    0x0
 171 #define PT_PC     0x4
 172 #define PT_NPC    0x8
 173 #define PT_Y      0xc
 174 #define PT_G0     0x10
 175 #define PT_WIM    PT_G0
 176 #define PT_G1     0x14
 177 #define PT_G2     0x18
 178 #define PT_G3     0x1c
 179 #define PT_G4     0x20
 180 #define PT_G5     0x24
 181 #define PT_G6     0x28
 182 #define PT_G7     0x2c
 183 #define PT_I0     0x30
 184 #define PT_I1     0x34
 185 #define PT_I2     0x38
 186 #define PT_I3     0x3c
 187 #define PT_I4     0x40
 188 #define PT_I5     0x44
 189 #define PT_I6     0x48
 190 #define PT_FP     PT_I6
 191 #define PT_I7     0x4c
 192
 193 /* Reg_window offsets */
 194 #define RW_V9_L0     0x00
 195 #define RW_V9_L1     0x08
 196 #define RW_V9_L2     0x10
 197 #define RW_V9_L3     0x18
 198 #define RW_V9_L4     0x20
 199 #define RW_V9_L5     0x28
 200 #define RW_V9_L6     0x30
 201 #define RW_V9_L7     0x38
 202 #define RW_V9_I0     0x40
 203 #define RW_V9_I1     0x48
 204 #define RW_V9_I2     0x50
 205 #define RW_V9_I3     0x58
 206 #define RW_V9_I4     0x60
 207 #define RW_V9_I5     0x68
 208 #define RW_V9_I6     0x70
 209 #define RW_V9_I7     0x78
 210
 211 #define RW_L0     0x00
 212 #define RW_L1     0x04
 213 #define RW_L2     0x08
 214 #define RW_L3     0x0c
 215 #define RW_L4     0x10
 216 #define RW_L5     0x14
 217 #define RW_L6     0x18
 218 #define RW_L7     0x1c
 219 #define RW_I0     0x20
 220 #define RW_I1     0x24
 221 #define RW_I2     0x28
 222 #define RW_I3     0x2c
 223 #define RW_I4     0x30
 224 #define RW_I5     0x34
 225 #define RW_I6     0x38
 226 #define RW_I7     0x3c
 227
 228 /* Stack_frame offsets */
 229 #define SF_V9_L0     0x00
 230 #define SF_V9_L1     0x08
 231 #define SF_V9_L2     0x10
 232 #define SF_V9_L3     0x18
 233 #define SF_V9_L4     0x20
 234 #define SF_V9_L5     0x28
 235 #define SF_V9_L6     0x30
 236 #define SF_V9_L7     0x38
 237 #define SF_V9_I0     0x40
 238 #define SF_V9_I1     0x48
 239 #define SF_V9_I2     0x50
 240 #define SF_V9_I3     0x58
 241 #define SF_V9_I4     0x60
 242 #define SF_V9_I5     0x68
 243 #define SF_V9_FP     0x70
 244 #define SF_V9_PC     0x78
 245 #define SF_V9_RETP   0x80
 246 #define SF_V9_XARG0  0x88
 247 #define SF_V9_XARG1  0x90
 248 #define SF_V9_XARG2  0x98
 249 #define SF_V9_XARG3  0xa0
 250 #define SF_V9_XARG4  0xa8
 251 #define SF_V9_XARG5  0xb0
 252 #define SF_V9_XXARG  0xb8
 253
 254 #define SF_L0     0x00
 255 #define SF_L1     0x04
 256 #define SF_L2     0x08
 257 #define SF_L3     0x0c
 258 #define SF_L4     0x10
 259 #define SF_L5     0x14
 260 #define SF_L6     0x18
 261 #define SF_L7     0x1c
 262 #define SF_I0     0x20
 263 #define SF_I1     0x24
 264 #define SF_I2     0x28
 265 #define SF_I3     0x2c
 266 #define SF_I4     0x30
 267 #define SF_I5     0x34
 268 #define SF_FP     0x38
 269 #define SF_PC     0x3c
 270 #define SF_RETP   0x40
 271 #define SF_XARG0  0x44
 272 #define SF_XARG1  0x48
 273 #define SF_XARG2  0x4c
 274 #define SF_XARG3  0x50
 275 #define SF_XARG4  0x54
 276 #define SF_XARG5  0x58
 277 #define SF_XXARG  0x5c
 278
 279 /* Stuff for the ptrace system call */
 280 #define PTRACE_GETREGS            12
 281 #define PTRACE_SETREGS            13
 282 #define PTRACE_GETFPREGS          14
 283 #define PTRACE_SETFPREGS          15
 284 #define PTRACE_READDATA           16
 285 #define PTRACE_WRITEDATA          17
 286 #define PTRACE_READTEXT           18
 287 #define PTRACE_WRITETEXT          19
 288 #define PTRACE_GETFPAREGS         20
 289 #define PTRACE_SETFPAREGS         21
 290
 291 /* There are for debugging 64-bit processes, either from a 32 or 64 bit
 292  * parent.  Thus their complements are for debugging 32-bit processes only.
 293  */
 294
 295 #define PTRACE_GETREGS64          22
 296 #define PTRACE_SETREGS64          23
 297 /* PTRACE_SYSCALL is 24 */
 298 #define PTRACE_GETFPREGS64        25
 299 #define PTRACE_SETFPREGS64        26
 300
 301 #endif /* !(_SPARC64_PTRACE_H) */