pata_efar: fix PIO2 underclocking
[linux-2.6/mini2440.git] / arch / x86 / kernel / i8253.c
blobc2e0bb0890d4a17d652f1710a4df8ab948dec7a5
1 /*
2 * 8253/PIT functions
4 */
5 #include <linux/clockchips.h>
6 #include <linux/interrupt.h>
7 #include <linux/spinlock.h>
8 #include <linux/jiffies.h>
9 #include <linux/module.h>
10 #include <linux/delay.h>
11 #include <linux/init.h>
12 #include <linux/io.h>
14 #include <asm/i8253.h>
15 #include <asm/hpet.h>
16 #include <asm/smp.h>
18 DEFINE_SPINLOCK(i8253_lock);
19 EXPORT_SYMBOL(i8253_lock);
21 #ifdef CONFIG_X86_32
22 static void pit_disable_clocksource(void);
23 #else
24 static inline void pit_disable_clocksource(void) { }
25 #endif
28 * HPET replaces the PIT, when enabled. So we need to know, which of
29 * the two timers is used
31 struct clock_event_device *global_clock_event;
34 * Initialize the PIT timer.
36 * This is also called after resume to bring the PIT into operation again.
38 static void init_pit_timer(enum clock_event_mode mode,
39 struct clock_event_device *evt)
41 spin_lock(&i8253_lock);
43 switch (mode) {
44 case CLOCK_EVT_MODE_PERIODIC:
45 /* binary, mode 2, LSB/MSB, ch 0 */
46 outb_pit(0x34, PIT_MODE);
47 outb_pit(LATCH & 0xff , PIT_CH0); /* LSB */
48 outb_pit(LATCH >> 8 , PIT_CH0); /* MSB */
49 break;
51 case CLOCK_EVT_MODE_SHUTDOWN:
52 case CLOCK_EVT_MODE_UNUSED:
53 if (evt->mode == CLOCK_EVT_MODE_PERIODIC ||
54 evt->mode == CLOCK_EVT_MODE_ONESHOT) {
55 outb_pit(0x30, PIT_MODE);
56 outb_pit(0, PIT_CH0);
57 outb_pit(0, PIT_CH0);
59 pit_disable_clocksource();
60 break;
62 case CLOCK_EVT_MODE_ONESHOT:
63 /* One shot setup */
64 pit_disable_clocksource();
65 outb_pit(0x38, PIT_MODE);
66 break;
68 case CLOCK_EVT_MODE_RESUME:
69 /* Nothing to do here */
70 break;
72 spin_unlock(&i8253_lock);
76 * Program the next event in oneshot mode
78 * Delta is given in PIT ticks
80 static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
82 spin_lock(&i8253_lock);
83 outb_pit(delta & 0xff , PIT_CH0); /* LSB */
84 outb_pit(delta >> 8 , PIT_CH0); /* MSB */
85 spin_unlock(&i8253_lock);
87 return 0;
91 * On UP the PIT can serve all of the possible timer functions. On SMP systems
92 * it can be solely used for the global tick.
94 * The profiling and update capabilities are switched off once the local apic is
95 * registered. This mechanism replaces the previous #ifdef LOCAL_APIC -
96 * !using_apic_timer decisions in do_timer_interrupt_hook()
98 static struct clock_event_device pit_ce = {
99 .name = "pit",
100 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
101 .set_mode = init_pit_timer,
102 .set_next_event = pit_next_event,
103 .shift = 32,
104 .irq = 0,
108 * Initialize the conversion factor and the min/max deltas of the clock event
109 * structure and register the clock event source with the framework.
111 void __init setup_pit_timer(void)
114 * Start pit with the boot cpu mask and make it global after the
115 * IO_APIC has been initialized.
117 pit_ce.cpumask = cpumask_of(smp_processor_id());
118 pit_ce.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, pit_ce.shift);
119 pit_ce.max_delta_ns = clockevent_delta2ns(0x7FFF, &pit_ce);
120 pit_ce.min_delta_ns = clockevent_delta2ns(0xF, &pit_ce);
122 clockevents_register_device(&pit_ce);
123 global_clock_event = &pit_ce;
126 #ifndef CONFIG_X86_64
128 * Since the PIT overflows every tick, its not very useful
129 * to just read by itself. So use jiffies to emulate a free
130 * running counter:
132 static cycle_t pit_read(struct clocksource *cs)
134 static int old_count;
135 static u32 old_jifs;
136 unsigned long flags;
137 int count;
138 u32 jifs;
140 spin_lock_irqsave(&i8253_lock, flags);
142 * Although our caller may have the read side of xtime_lock,
143 * this is now a seqlock, and we are cheating in this routine
144 * by having side effects on state that we cannot undo if
145 * there is a collision on the seqlock and our caller has to
146 * retry. (Namely, old_jifs and old_count.) So we must treat
147 * jiffies as volatile despite the lock. We read jiffies
148 * before latching the timer count to guarantee that although
149 * the jiffies value might be older than the count (that is,
150 * the counter may underflow between the last point where
151 * jiffies was incremented and the point where we latch the
152 * count), it cannot be newer.
154 jifs = jiffies;
155 outb_pit(0x00, PIT_MODE); /* latch the count ASAP */
156 count = inb_pit(PIT_CH0); /* read the latched count */
157 count |= inb_pit(PIT_CH0) << 8;
159 /* VIA686a test code... reset the latch if count > max + 1 */
160 if (count > LATCH) {
161 outb_pit(0x34, PIT_MODE);
162 outb_pit(LATCH & 0xff, PIT_CH0);
163 outb_pit(LATCH >> 8, PIT_CH0);
164 count = LATCH - 1;
168 * It's possible for count to appear to go the wrong way for a
169 * couple of reasons:
171 * 1. The timer counter underflows, but we haven't handled the
172 * resulting interrupt and incremented jiffies yet.
173 * 2. Hardware problem with the timer, not giving us continuous time,
174 * the counter does small "jumps" upwards on some Pentium systems,
175 * (see c't 95/10 page 335 for Neptun bug.)
177 * Previous attempts to handle these cases intelligently were
178 * buggy, so we just do the simple thing now.
180 if (count > old_count && jifs == old_jifs)
181 count = old_count;
183 old_count = count;
184 old_jifs = jifs;
186 spin_unlock_irqrestore(&i8253_lock, flags);
188 count = (LATCH - 1) - count;
190 return (cycle_t)(jifs * LATCH) + count;
193 static struct clocksource pit_cs = {
194 .name = "pit",
195 .rating = 110,
196 .read = pit_read,
197 .mask = CLOCKSOURCE_MASK(32),
198 .mult = 0,
199 .shift = 20,
202 static void pit_disable_clocksource(void)
205 * Use mult to check whether it is registered or not
207 if (pit_cs.mult) {
208 clocksource_unregister(&pit_cs);
209 pit_cs.mult = 0;
213 static int __init init_pit_clocksource(void)
216 * Several reasons not to register PIT as a clocksource:
218 * - On SMP PIT does not scale due to i8253_lock
219 * - when HPET is enabled
220 * - when local APIC timer is active (PIT is switched off)
222 if (num_possible_cpus() > 1 || is_hpet_enabled() ||
223 pit_ce.mode != CLOCK_EVT_MODE_PERIODIC)
224 return 0;
226 pit_cs.mult = clocksource_hz2mult(CLOCK_TICK_RATE, pit_cs.shift);
228 return clocksource_register(&pit_cs);
230 arch_initcall(init_pit_clocksource);
232 #endif /* !CONFIG_X86_64 */