2 * Atmel PIO2 Port Multiplexer support
4 * Copyright (C) 2004-2006 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/clk.h>
12 #include <linux/debugfs.h>
14 #include <linux/platform_device.h>
15 #include <linux/irq.h>
20 #include <asm/arch/portmux.h>
24 #define MAX_NR_PIO_DEVICES 8
27 struct gpio_chip chip
;
29 const struct platform_device
*pdev
;
35 static struct pio_device pio_dev
[MAX_NR_PIO_DEVICES
];
37 static struct pio_device
*gpio_to_pio(unsigned int gpio
)
39 struct pio_device
*pio
;
43 if (index
>= MAX_NR_PIO_DEVICES
)
45 pio
= &pio_dev
[index
];
52 /* Pin multiplexing API */
54 void __init
at32_select_periph(unsigned int pin
, unsigned int periph
,
57 struct pio_device
*pio
;
58 unsigned int pin_index
= pin
& 0x1f;
59 u32 mask
= 1 << pin_index
;
61 pio
= gpio_to_pio(pin
);
63 printk("pio: invalid pin %u\n", pin
);
67 if (unlikely(test_and_set_bit(pin_index
, &pio
->pinmux_mask
)
68 || gpiochip_is_requested(&pio
->chip
, pin_index
))) {
69 printk("%s: pin %u is busy\n", pio
->name
, pin_index
);
73 pio_writel(pio
, PUER
, mask
);
75 pio_writel(pio
, BSR
, mask
);
77 pio_writel(pio
, ASR
, mask
);
79 pio_writel(pio
, PDR
, mask
);
80 if (!(flags
& AT32_GPIOF_PULLUP
))
81 pio_writel(pio
, PUDR
, mask
);
89 void __init
at32_select_gpio(unsigned int pin
, unsigned long flags
)
91 struct pio_device
*pio
;
92 unsigned int pin_index
= pin
& 0x1f;
93 u32 mask
= 1 << pin_index
;
95 pio
= gpio_to_pio(pin
);
97 printk("pio: invalid pin %u\n", pin
);
101 if (unlikely(test_and_set_bit(pin_index
, &pio
->pinmux_mask
))) {
102 printk("%s: pin %u is busy\n", pio
->name
, pin_index
);
106 if (flags
& AT32_GPIOF_OUTPUT
) {
107 if (flags
& AT32_GPIOF_HIGH
)
108 pio_writel(pio
, SODR
, mask
);
110 pio_writel(pio
, CODR
, mask
);
111 if (flags
& AT32_GPIOF_MULTIDRV
)
112 pio_writel(pio
, MDER
, mask
);
114 pio_writel(pio
, MDDR
, mask
);
115 pio_writel(pio
, PUDR
, mask
);
116 pio_writel(pio
, OER
, mask
);
118 if (flags
& AT32_GPIOF_PULLUP
)
119 pio_writel(pio
, PUER
, mask
);
121 pio_writel(pio
, PUDR
, mask
);
122 if (flags
& AT32_GPIOF_DEGLITCH
)
123 pio_writel(pio
, IFER
, mask
);
125 pio_writel(pio
, IFDR
, mask
);
126 pio_writel(pio
, ODR
, mask
);
129 pio_writel(pio
, PER
, mask
);
137 /* Reserve a pin, preventing anyone else from changing its configuration. */
138 void __init
at32_reserve_pin(unsigned int pin
)
140 struct pio_device
*pio
;
141 unsigned int pin_index
= pin
& 0x1f;
143 pio
= gpio_to_pio(pin
);
144 if (unlikely(!pio
)) {
145 printk("pio: invalid pin %u\n", pin
);
149 if (unlikely(test_and_set_bit(pin_index
, &pio
->pinmux_mask
))) {
150 printk("%s: pin %u is busy\n", pio
->name
, pin_index
);
160 /*--------------------------------------------------------------------------*/
164 static int direction_input(struct gpio_chip
*chip
, unsigned offset
)
166 struct pio_device
*pio
= container_of(chip
, struct pio_device
, chip
);
167 u32 mask
= 1 << offset
;
169 if (!(pio_readl(pio
, PSR
) & mask
))
172 pio_writel(pio
, ODR
, mask
);
176 static int gpio_get(struct gpio_chip
*chip
, unsigned offset
)
178 struct pio_device
*pio
= container_of(chip
, struct pio_device
, chip
);
180 return (pio_readl(pio
, PDSR
) >> offset
) & 1;
183 static void gpio_set(struct gpio_chip
*chip
, unsigned offset
, int value
);
185 static int direction_output(struct gpio_chip
*chip
, unsigned offset
, int value
)
187 struct pio_device
*pio
= container_of(chip
, struct pio_device
, chip
);
188 u32 mask
= 1 << offset
;
190 if (!(pio_readl(pio
, PSR
) & mask
))
193 gpio_set(chip
, offset
, value
);
194 pio_writel(pio
, OER
, mask
);
198 static void gpio_set(struct gpio_chip
*chip
, unsigned offset
, int value
)
200 struct pio_device
*pio
= container_of(chip
, struct pio_device
, chip
);
201 u32 mask
= 1 << offset
;
204 pio_writel(pio
, SODR
, mask
);
206 pio_writel(pio
, CODR
, mask
);
209 /*--------------------------------------------------------------------------*/
211 /* GPIO IRQ support */
213 static void gpio_irq_mask(unsigned irq
)
215 unsigned gpio
= irq_to_gpio(irq
);
216 struct pio_device
*pio
= &pio_dev
[gpio
>> 5];
218 pio_writel(pio
, IDR
, 1 << (gpio
& 0x1f));
221 static void gpio_irq_unmask(unsigned irq
)
223 unsigned gpio
= irq_to_gpio(irq
);
224 struct pio_device
*pio
= &pio_dev
[gpio
>> 5];
226 pio_writel(pio
, IER
, 1 << (gpio
& 0x1f));
229 static int gpio_irq_type(unsigned irq
, unsigned type
)
231 if (type
!= IRQ_TYPE_EDGE_BOTH
&& type
!= IRQ_TYPE_NONE
)
237 static struct irq_chip gpio_irqchip
= {
239 .mask
= gpio_irq_mask
,
240 .unmask
= gpio_irq_unmask
,
241 .set_type
= gpio_irq_type
,
244 static void gpio_irq_handler(unsigned irq
, struct irq_desc
*desc
)
246 struct pio_device
*pio
= get_irq_chip_data(irq
);
249 gpio_irq
= (unsigned) get_irq_data(irq
);
254 /* ack pending GPIO interrupts */
255 isr
= pio_readl(pio
, ISR
) & pio_readl(pio
, IMR
);
273 gpio_irq_setup(struct pio_device
*pio
, int irq
, int gpio_irq
)
277 set_irq_chip_data(irq
, pio
);
278 set_irq_data(irq
, (void *) gpio_irq
);
280 for (i
= 0; i
< 32; i
++, gpio_irq
++) {
281 set_irq_chip_data(gpio_irq
, pio
);
282 set_irq_chip_and_handler(gpio_irq
, &gpio_irqchip
,
286 set_irq_chained_handler(irq
, gpio_irq_handler
);
289 /*--------------------------------------------------------------------------*/
291 #ifdef CONFIG_DEBUG_FS
293 #include <linux/seq_file.h>
296 * This shows more info than the generic gpio dump code:
297 * pullups, deglitching, open drain drive.
299 static void pio_bank_show(struct seq_file
*s
, struct gpio_chip
*chip
)
301 struct pio_device
*pio
= container_of(chip
, struct pio_device
, chip
);
302 u32 psr
, osr
, imr
, pdsr
, pusr
, ifsr
, mdsr
;
307 psr
= pio_readl(pio
, PSR
);
308 osr
= pio_readl(pio
, OSR
);
309 imr
= pio_readl(pio
, IMR
);
310 pdsr
= pio_readl(pio
, PDSR
);
311 pusr
= pio_readl(pio
, PUSR
);
312 ifsr
= pio_readl(pio
, IFSR
);
313 mdsr
= pio_readl(pio
, MDSR
);
315 bank
= 'A' + pio
->pdev
->id
;
317 for (i
= 0, mask
= 1; i
< 32; i
++, mask
<<= 1) {
320 label
= gpiochip_is_requested(chip
, i
);
321 if (!label
&& (imr
& mask
))
326 seq_printf(s
, " gpio-%-3d P%c%-2d (%-12s) %s %s %s",
327 chip
->base
+ i
, bank
, i
,
329 (osr
& mask
) ? "out" : "in ",
330 (mask
& pdsr
) ? "hi" : "lo",
331 (mask
& pusr
) ? " " : "up");
333 seq_printf(s
, " deglitch");
334 if ((osr
& mdsr
) & mask
)
335 seq_printf(s
, " open-drain");
337 seq_printf(s
, " irq-%d edge-both",
338 gpio_to_irq(chip
->base
+ i
));
344 #define pio_bank_show NULL
348 /*--------------------------------------------------------------------------*/
350 static int __init
pio_probe(struct platform_device
*pdev
)
352 struct pio_device
*pio
= NULL
;
353 int irq
= platform_get_irq(pdev
, 0);
354 int gpio_irq_base
= GPIO_IRQ_BASE
+ pdev
->id
* 32;
356 BUG_ON(pdev
->id
>= MAX_NR_PIO_DEVICES
);
357 pio
= &pio_dev
[pdev
->id
];
360 pio
->chip
.label
= pio
->name
;
361 pio
->chip
.base
= pdev
->id
* 32;
362 pio
->chip
.ngpio
= 32;
364 pio
->chip
.direction_input
= direction_input
;
365 pio
->chip
.get
= gpio_get
;
366 pio
->chip
.direction_output
= direction_output
;
367 pio
->chip
.set
= gpio_set
;
368 pio
->chip
.dbg_show
= pio_bank_show
;
370 gpiochip_add(&pio
->chip
);
372 gpio_irq_setup(pio
, irq
, gpio_irq_base
);
374 platform_set_drvdata(pdev
, pio
);
376 printk(KERN_DEBUG
"%s: base 0x%p, irq %d chains %d..%d\n",
377 pio
->name
, pio
->regs
, irq
, gpio_irq_base
, gpio_irq_base
+ 31);
382 static struct platform_driver pio_driver
= {
389 static int __init
pio_init(void)
391 return platform_driver_register(&pio_driver
);
393 postcore_initcall(pio_init
);
395 void __init
at32_init_pio(struct platform_device
*pdev
)
397 struct resource
*regs
;
398 struct pio_device
*pio
;
400 if (pdev
->id
> MAX_NR_PIO_DEVICES
) {
401 dev_err(&pdev
->dev
, "only %d PIO devices supported\n",
406 pio
= &pio_dev
[pdev
->id
];
407 snprintf(pio
->name
, sizeof(pio
->name
), "pio%d", pdev
->id
);
409 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
411 dev_err(&pdev
->dev
, "no mmio resource defined\n");
415 pio
->clk
= clk_get(&pdev
->dev
, "mck");
416 if (IS_ERR(pio
->clk
))
418 * This is a fatal error, but if we continue we might
419 * be so lucky that we manage to initialize the
420 * console and display this message...
422 dev_err(&pdev
->dev
, "no mck clock defined\n");
424 clk_enable(pio
->clk
);
427 pio
->regs
= ioremap(regs
->start
, regs
->end
- regs
->start
+ 1);
429 /* start with irqs disabled and acked */
430 pio_writel(pio
, IDR
, ~0UL);
431 (void) pio_readl(pio
, ISR
);