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x86, mce: use a call vector to call the 64bit mce handler
[linux-2.6/mini2440.git] / drivers / pcmcia / vrc4171_card.c
blob659421d0ca46aeab37fac76aefdee41cc6a5562d
1 /*
2 * vrc4171_card.c, NEC VRC4171 Card Controller driver for Socket Services.
3 *
4 * Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20 #include <linux/init.h>
21 #include <linux/ioport.h>
22 #include <linux/interrupt.h>
23 #include <linux/module.h>
24 #include <linux/spinlock.h>
25 #include <linux/types.h>
26 #include <linux/platform_device.h>
27
28 #include <asm/io.h>
29
30 #include <pcmcia/ss.h>
31
32 #include "i82365.h"
33
34 MODULE_DESCRIPTION("NEC VRC4171 Card Controllers driver for Socket Services");
35 MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>");
36 MODULE_LICENSE("GPL");
37
38 #define CARD_MAX_SLOTS 2
39 #define CARD_SLOTA 0
40 #define CARD_SLOTB 1
41 #define CARD_SLOTB_OFFSET 0x40
42
43 #define CARD_MEM_START 0x10000000
44 #define CARD_MEM_END 0x13ffffff
45 #define CARD_MAX_MEM_OFFSET 0x3ffffff
46 #define CARD_MAX_MEM_SPEED 1000
47
48 #define CARD_CONTROLLER_INDEX 0x03e0
49 #define CARD_CONTROLLER_DATA 0x03e1
50 /* Power register */
51 #define VPP_GET_VCC 0x01
52 #define POWER_ENABLE 0x10
53 #define CARD_VOLTAGE_SENSE 0x1f
54 #define VCC_3VORXV_CAPABLE 0x00
55 #define VCC_XV_ONLY 0x01
56 #define VCC_3V_CAPABLE 0x02
57 #define VCC_5V_ONLY 0x03
58 #define CARD_VOLTAGE_SELECT 0x2f
59 #define VCC_3V 0x01
60 #define VCC_5V 0x00
61 #define VCC_XV 0x02
62 #define VCC_STATUS_3V 0x02
63 #define VCC_STATUS_5V 0x01
64 #define VCC_STATUS_XV 0x03
65 #define GLOBAL_CONTROL 0x1e
66 #define EXWRBK 0x04
67 #define IRQPM_EN 0x08
68 #define CLRPMIRQ 0x10
69
70 #define INTERRUPT_STATUS 0x05fa
71 #define IRQ_A 0x02
72 #define IRQ_B 0x04
73
74 #define CONFIGURATION1 0x05fe
75 #define SLOTB_CONFIG 0xc000
76 #define SLOTB_NONE 0x0000
77 #define SLOTB_PCCARD 0x4000
78 #define SLOTB_CF 0x8000
79 #define SLOTB_FLASHROM 0xc000
80
81 #define CARD_CONTROLLER_START CARD_CONTROLLER_INDEX
82 #define CARD_CONTROLLER_END CARD_CONTROLLER_DATA
83
84 #define IO_MAX_MAPS 2
85 #define MEM_MAX_MAPS 5
86
87 typedef enum {
88 SLOT_PROBE = 0,
89 SLOT_NOPROBE_IO,
90 SLOT_NOPROBE_MEM,
91 SLOT_NOPROBE_ALL,
92 SLOT_INITIALIZED,
93 } vrc4171_slot_t;
94
95 typedef enum {
96 SLOTB_IS_NONE,
97 SLOTB_IS_PCCARD,
98 SLOTB_IS_CF,
99 SLOTB_IS_FLASHROM,
100 } vrc4171_slotb_t;
101
102 typedef struct vrc4171_socket {
103 vrc4171_slot_t slot;
104 struct pcmcia_socket pcmcia_socket;
105 char name[24];
106 int csc_irq;
107 int io_irq;
108 } vrc4171_socket_t;
109
110 static vrc4171_socket_t vrc4171_sockets[CARD_MAX_SLOTS];
111 static vrc4171_slotb_t vrc4171_slotb = SLOTB_IS_NONE;
112 static char vrc4171_card_name[] = "NEC VRC4171 Card Controller";
113 static unsigned int vrc4171_irq;
114 static uint16_t vrc4171_irq_mask = 0xdeb8;
115
116 static struct resource vrc4171_card_resource[3] = {
117 { .name = vrc4171_card_name,
118 .start = CARD_CONTROLLER_START,
119 .end = CARD_CONTROLLER_END,
120 .flags = IORESOURCE_IO, },
121 { .name = vrc4171_card_name,
122 .start = INTERRUPT_STATUS,
123 .end = INTERRUPT_STATUS,
124 .flags = IORESOURCE_IO, },
125 { .name = vrc4171_card_name,
126 .start = CONFIGURATION1,
127 .end = CONFIGURATION1,
128 .flags = IORESOURCE_IO, },
129 };
130
131 static struct platform_device vrc4171_card_device = {
132 .name = vrc4171_card_name,
133 .id = 0,
134 .num_resources = 3,
135 .resource = vrc4171_card_resource,
136 };
137
138 static inline uint16_t vrc4171_get_irq_status(void)
139 {
140 return inw(INTERRUPT_STATUS);
141 }
142
143 static inline void vrc4171_set_multifunction_pin(vrc4171_slotb_t config)
144 {
145 uint16_t config1;
146
147 config1 = inw(CONFIGURATION1);
148 config1 &= ~SLOTB_CONFIG;
149
150 switch (config) {
151 case SLOTB_IS_NONE:
152 config1 |= SLOTB_NONE;
153 break;
154 case SLOTB_IS_PCCARD:
155 config1 |= SLOTB_PCCARD;
156 break;
157 case SLOTB_IS_CF:
158 config1 |= SLOTB_CF;
159 break;
160 case SLOTB_IS_FLASHROM:
161 config1 |= SLOTB_FLASHROM;
162 break;
163 default:
164 break;
165 }
166
167 outw(config1, CONFIGURATION1);
168 }
169
170 static inline uint8_t exca_read_byte(int slot, uint8_t index)
171 {
172 if (slot == CARD_SLOTB)
173 index += CARD_SLOTB_OFFSET;
174
175 outb(index, CARD_CONTROLLER_INDEX);
176 return inb(CARD_CONTROLLER_DATA);
177 }
178
179 static inline uint16_t exca_read_word(int slot, uint8_t index)
180 {
181 uint16_t data;
182
183 if (slot == CARD_SLOTB)
184 index += CARD_SLOTB_OFFSET;
185
186 outb(index++, CARD_CONTROLLER_INDEX);
187 data = inb(CARD_CONTROLLER_DATA);
188
189 outb(index, CARD_CONTROLLER_INDEX);
190 data |= ((uint16_t)inb(CARD_CONTROLLER_DATA)) << 8;
191
192 return data;
193 }
194
195 static inline uint8_t exca_write_byte(int slot, uint8_t index, uint8_t data)
196 {
197 if (slot == CARD_SLOTB)
198 index += CARD_SLOTB_OFFSET;
199
200 outb(index, CARD_CONTROLLER_INDEX);
201 outb(data, CARD_CONTROLLER_DATA);
202
203 return data;
204 }
205
206 static inline uint16_t exca_write_word(int slot, uint8_t index, uint16_t data)
207 {
208 if (slot == CARD_SLOTB)
209 index += CARD_SLOTB_OFFSET;
210
211 outb(index++, CARD_CONTROLLER_INDEX);
212 outb(data, CARD_CONTROLLER_DATA);
213
214 outb(index, CARD_CONTROLLER_INDEX);
215 outb((uint8_t)(data >> 8), CARD_CONTROLLER_DATA);
216
217 return data;
218 }
219
220 static inline int search_nonuse_irq(void)
221 {
222 int i;
223
224 for (i = 0; i < 16; i++) {
225 if (vrc4171_irq_mask & (1 << i)) {
226 vrc4171_irq_mask &= ~(1 << i);
227 return i;
228 }
229 }
230
231 return -1;
232 }
233
234 static int pccard_init(struct pcmcia_socket *sock)
235 {
236 vrc4171_socket_t *socket;
237 unsigned int slot;
238
239 sock->features |= SS_CAP_PCCARD | SS_CAP_PAGE_REGS;
240 sock->irq_mask = 0;
241 sock->map_size = 0x1000;
242 sock->pci_irq = vrc4171_irq;
243
244 slot = sock->sock;
245 socket = &vrc4171_sockets[slot];
246 socket->csc_irq = search_nonuse_irq();
247 socket->io_irq = search_nonuse_irq();
248
249 return 0;
250 }
251
252 static int pccard_get_status(struct pcmcia_socket *sock, u_int *value)
253 {
254 unsigned int slot;
255 uint8_t status, sense;
256 u_int val = 0;
257
258 if (sock == NULL || sock->sock >= CARD_MAX_SLOTS || value == NULL)
259 return -EINVAL;
260
261 slot = sock->sock;
262
263 status = exca_read_byte(slot, I365_STATUS);
264 if (exca_read_byte(slot, I365_INTCTL) & I365_PC_IOCARD) {
265 if (status & I365_CS_STSCHG)
266 val |= SS_STSCHG;
267 } else {
268 if (!(status & I365_CS_BVD1))
269 val |= SS_BATDEAD;
270 else if ((status & (I365_CS_BVD1 | I365_CS_BVD2)) == I365_CS_BVD1)
271 val |= SS_BATWARN;
272 }
273 if ((status & I365_CS_DETECT) == I365_CS_DETECT)
274 val |= SS_DETECT;
275 if (status & I365_CS_WRPROT)
276 val |= SS_WRPROT;
277 if (status & I365_CS_READY)
278 val |= SS_READY;
279 if (status & I365_CS_POWERON)
280 val |= SS_POWERON;
281
282 sense = exca_read_byte(slot, CARD_VOLTAGE_SENSE);
283 switch (sense) {
284 case VCC_3VORXV_CAPABLE:
285 val |= SS_3VCARD | SS_XVCARD;
286 break;
287 case VCC_XV_ONLY:
288 val |= SS_XVCARD;
289 break;
290 case VCC_3V_CAPABLE:
291 val |= SS_3VCARD;
292 break;
293 default:
294 /* 5V only */
295 break;
296 }
297
298 *value = val;
299
300 return 0;
301 }
302
303 static inline uint8_t set_Vcc_value(u_char Vcc)
304 {
305 switch (Vcc) {
306 case 33:
307 return VCC_3V;
308 case 50:
309 return VCC_5V;
310 }
311
312 /* Small voltage is chosen for safety. */
313 return VCC_3V;
314 }
315
316 static int pccard_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
317 {
318 vrc4171_socket_t *socket;
319 unsigned int slot;
320 uint8_t voltage, power, control, cscint;
321
322 if (sock == NULL || sock->sock >= CARD_MAX_SLOTS ||
323 (state->Vpp != state->Vcc && state->Vpp != 0) ||
324 (state->Vcc != 50 && state->Vcc != 33 && state->Vcc != 0))
325 return -EINVAL;
326
327 slot = sock->sock;
328 socket = &vrc4171_sockets[slot];
329
330 spin_lock_irq(&sock->lock);
331
332 voltage = set_Vcc_value(state->Vcc);
333 exca_write_byte(slot, CARD_VOLTAGE_SELECT, voltage);
334
335 power = POWER_ENABLE;
336 if (state->Vpp == state->Vcc)
337 power |= VPP_GET_VCC;
338 if (state->flags & SS_OUTPUT_ENA)
339 power |= I365_PWR_OUT;
340 exca_write_byte(slot, I365_POWER, power);
341
342 control = 0;
343 if (state->io_irq != 0)
344 control |= socket->io_irq;
345 if (state->flags & SS_IOCARD)
346 control |= I365_PC_IOCARD;
347 if (state->flags & SS_RESET)
348 control &= ~I365_PC_RESET;
349 else
350 control |= I365_PC_RESET;
351 exca_write_byte(slot, I365_INTCTL, control);
352
353 cscint = 0;
354 exca_write_byte(slot, I365_CSCINT, cscint);
355 exca_read_byte(slot, I365_CSC); /* clear CardStatus change */
356 if (state->csc_mask != 0)
357 cscint |= socket->csc_irq << 8;
358 if (state->flags & SS_IOCARD) {
359 if (state->csc_mask & SS_STSCHG)
360 cscint |= I365_CSC_STSCHG;
361 } else {
362 if (state->csc_mask & SS_BATDEAD)
363 cscint |= I365_CSC_BVD1;
364 if (state->csc_mask & SS_BATWARN)
365 cscint |= I365_CSC_BVD2;
366 }
367 if (state->csc_mask & SS_READY)
368 cscint |= I365_CSC_READY;
369 if (state->csc_mask & SS_DETECT)
370 cscint |= I365_CSC_DETECT;
371 exca_write_byte(slot, I365_CSCINT, cscint);
372
373 spin_unlock_irq(&sock->lock);
374
375 return 0;
376 }
377
378 static int pccard_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
379 {
380 unsigned int slot;
381 uint8_t ioctl, addrwin;
382 u_char map;
383
384 if (sock == NULL || sock->sock >= CARD_MAX_SLOTS ||
385 io == NULL || io->map >= IO_MAX_MAPS ||
386 io->start > 0xffff || io->stop > 0xffff || io->start > io->stop)
387 return -EINVAL;
388
389 slot = sock->sock;
390 map = io->map;
391
392 addrwin = exca_read_byte(slot, I365_ADDRWIN);
393 if (addrwin & I365_ENA_IO(map)) {
394 addrwin &= ~I365_ENA_IO(map);
395 exca_write_byte(slot, I365_ADDRWIN, addrwin);
396 }
397
398 exca_write_word(slot, I365_IO(map)+I365_W_START, io->start);
399 exca_write_word(slot, I365_IO(map)+I365_W_STOP, io->stop);
400
401 ioctl = 0;
402 if (io->speed > 0)
403 ioctl |= I365_IOCTL_WAIT(map);
404 if (io->flags & MAP_16BIT)
405 ioctl |= I365_IOCTL_16BIT(map);
406 if (io->flags & MAP_AUTOSZ)
407 ioctl |= I365_IOCTL_IOCS16(map);
408 if (io->flags & MAP_0WS)
409 ioctl |= I365_IOCTL_0WS(map);
410 exca_write_byte(slot, I365_IOCTL, ioctl);
411
412 if (io->flags & MAP_ACTIVE) {
413 addrwin |= I365_ENA_IO(map);
414 exca_write_byte(slot, I365_ADDRWIN, addrwin);
415 }
416
417 return 0;
418 }
419
420 static int pccard_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
421 {
422 unsigned int slot;
423 uint16_t start, stop, offset;
424 uint8_t addrwin;
425 u_char map;
426
427 if (sock == NULL || sock->sock >= CARD_MAX_SLOTS ||
428 mem == NULL || mem->map >= MEM_MAX_MAPS ||
429 mem->res->start < CARD_MEM_START || mem->res->start > CARD_MEM_END ||
430 mem->res->end < CARD_MEM_START || mem->res->end > CARD_MEM_END ||
431 mem->res->start > mem->res->end ||
432 mem->card_start > CARD_MAX_MEM_OFFSET ||
433 mem->speed > CARD_MAX_MEM_SPEED)
434 return -EINVAL;
435
436 slot = sock->sock;
437 map = mem->map;
438
439 addrwin = exca_read_byte(slot, I365_ADDRWIN);
440 if (addrwin & I365_ENA_MEM(map)) {
441 addrwin &= ~I365_ENA_MEM(map);
442 exca_write_byte(slot, I365_ADDRWIN, addrwin);
443 }
444
445 start = (mem->res->start >> 12) & 0x3fff;
446 if (mem->flags & MAP_16BIT)
447 start |= I365_MEM_16BIT;
448 exca_write_word(slot, I365_MEM(map)+I365_W_START, start);
449
450 stop = (mem->res->end >> 12) & 0x3fff;
451 switch (mem->speed) {
452 case 0:
453 break;
454 case 1:
455 stop |= I365_MEM_WS0;
456 break;
457 case 2:
458 stop |= I365_MEM_WS1;
459 break;
460 default:
461 stop |= I365_MEM_WS0 | I365_MEM_WS1;
462 break;
463 }
464 exca_write_word(slot, I365_MEM(map)+I365_W_STOP, stop);
465
466 offset = (mem->card_start >> 12) & 0x3fff;
467 if (mem->flags & MAP_ATTRIB)
468 offset |= I365_MEM_REG;
469 if (mem->flags & MAP_WRPROT)
470 offset |= I365_MEM_WRPROT;
471 exca_write_word(slot, I365_MEM(map)+I365_W_OFF, offset);
472
473 if (mem->flags & MAP_ACTIVE) {
474 addrwin |= I365_ENA_MEM(map);
475 exca_write_byte(slot, I365_ADDRWIN, addrwin);
476 }
477
478 return 0;
479 }
480
481 static struct pccard_operations vrc4171_pccard_operations = {
482 .init = pccard_init,
483 .get_status = pccard_get_status,
484 .set_socket = pccard_set_socket,
485 .set_io_map = pccard_set_io_map,
486 .set_mem_map = pccard_set_mem_map,
487 };
488
489 static inline unsigned int get_events(int slot)
490 {
491 unsigned int events = 0;
492 uint8_t status, csc;
493
494 status = exca_read_byte(slot, I365_STATUS);
495 csc = exca_read_byte(slot, I365_CSC);
496
497 if (exca_read_byte(slot, I365_INTCTL) & I365_PC_IOCARD) {
498 if ((csc & I365_CSC_STSCHG) && (status & I365_CS_STSCHG))
499 events |= SS_STSCHG;
500 } else {
501 if (csc & (I365_CSC_BVD1 | I365_CSC_BVD2)) {
502 if (!(status & I365_CS_BVD1))
503 events |= SS_BATDEAD;
504 else if ((status & (I365_CS_BVD1 | I365_CS_BVD2)) == I365_CS_BVD1)
505 events |= SS_BATWARN;
506 }
507 }
508 if ((csc & I365_CSC_READY) && (status & I365_CS_READY))
509 events |= SS_READY;
510 if ((csc & I365_CSC_DETECT) && ((status & I365_CS_DETECT) == I365_CS_DETECT))
511 events |= SS_DETECT;
512
513 return events;
514 }
515
516 static irqreturn_t pccard_interrupt(int irq, void *dev_id)
517 {
518 vrc4171_socket_t *socket;
519 unsigned int events;
520 irqreturn_t retval = IRQ_NONE;
521 uint16_t status;
522
523 status = vrc4171_get_irq_status();
524 if (status & IRQ_A) {
525 socket = &vrc4171_sockets[CARD_SLOTA];
526 if (socket->slot == SLOT_INITIALIZED) {
527 if (status & (1 << socket->csc_irq)) {
528 events = get_events(CARD_SLOTA);
529 if (events != 0) {
530 pcmcia_parse_events(&socket->pcmcia_socket, events);
531 retval = IRQ_HANDLED;
532 }
533 }
534 }
535 }
536
537 if (status & IRQ_B) {
538 socket = &vrc4171_sockets[CARD_SLOTB];
539 if (socket->slot == SLOT_INITIALIZED) {
540 if (status & (1 << socket->csc_irq)) {
541 events = get_events(CARD_SLOTB);
542 if (events != 0) {
543 pcmcia_parse_events(&socket->pcmcia_socket, events);
544 retval = IRQ_HANDLED;
545 }
546 }
547 }
548 }
549
550 return retval;
551 }
552
553 static inline void reserve_using_irq(int slot)
554 {
555 unsigned int irq;
556
557 irq = exca_read_byte(slot, I365_INTCTL);
558 irq &= 0x0f;
559 vrc4171_irq_mask &= ~(1 << irq);
560
561 irq = exca_read_byte(slot, I365_CSCINT);
562 irq = (irq & 0xf0) >> 4;
563 vrc4171_irq_mask &= ~(1 << irq);
564 }
565
566 static int __devinit vrc4171_add_sockets(void)
567 {
568 vrc4171_socket_t *socket;
569 int slot, retval;
570
571 for (slot = 0; slot < CARD_MAX_SLOTS; slot++) {
572 if (slot == CARD_SLOTB && vrc4171_slotb == SLOTB_IS_NONE)
573 continue;
574
575 socket = &vrc4171_sockets[slot];
576 if (socket->slot != SLOT_PROBE) {
577 uint8_t addrwin;
578
579 switch (socket->slot) {
580 case SLOT_NOPROBE_MEM:
581 addrwin = exca_read_byte(slot, I365_ADDRWIN);
582 addrwin &= 0x1f;
583 exca_write_byte(slot, I365_ADDRWIN, addrwin);
584 break;
585 case SLOT_NOPROBE_IO:
586 addrwin = exca_read_byte(slot, I365_ADDRWIN);
587 addrwin &= 0xc0;
588 exca_write_byte(slot, I365_ADDRWIN, addrwin);
589 break;
590 default:
591 break;
592 }
593
594 reserve_using_irq(slot);
595 continue;
596 }
597
598 sprintf(socket->name, "NEC VRC4171 Card Slot %1c", 'A' + slot);
599 socket->pcmcia_socket.dev.parent = &vrc4171_card_device.dev;
600 socket->pcmcia_socket.ops = &vrc4171_pccard_operations;
601 socket->pcmcia_socket.owner = THIS_MODULE;
602
603 retval = pcmcia_register_socket(&socket->pcmcia_socket);
604 if (retval < 0)
605 return retval;
606
607 exca_write_byte(slot, I365_ADDRWIN, 0);
608 exca_write_byte(slot, GLOBAL_CONTROL, 0);
609
610 socket->slot = SLOT_INITIALIZED;
611 }
612
613 return 0;
614 }
615
616 static void vrc4171_remove_sockets(void)
617 {
618 vrc4171_socket_t *socket;
619 int slot;
620
621 for (slot = 0; slot < CARD_MAX_SLOTS; slot++) {
622 if (slot == CARD_SLOTB && vrc4171_slotb == SLOTB_IS_NONE)
623 continue;
624
625 socket = &vrc4171_sockets[slot];
626 if (socket->slot == SLOT_INITIALIZED)
627 pcmcia_unregister_socket(&socket->pcmcia_socket);
628
629 socket->slot = SLOT_PROBE;
630 }
631 }
632
633 static int __devinit vrc4171_card_setup(char *options)
634 {
635 if (options == NULL || *options == '\0')
636 return 1;
637
638 if (strncmp(options, "irq:", 4) == 0) {
639 int irq;
640 options += 4;
641 irq = simple_strtoul(options, &options, 0);
642 if (irq >= 0 && irq < nr_irqs)
643 vrc4171_irq = irq;
644
645 if (*options != ',')
646 return 1;
647 options++;
648 }
649
650 if (strncmp(options, "slota:", 6) == 0) {
651 options += 6;
652 if (*options != '\0') {
653 if (strncmp(options, "memnoprobe", 10) == 0) {
654 vrc4171_sockets[CARD_SLOTA].slot = SLOT_NOPROBE_MEM;
655 options += 10;
656 } else if (strncmp(options, "ionoprobe", 9) == 0) {
657 vrc4171_sockets[CARD_SLOTA].slot = SLOT_NOPROBE_IO;
658 options += 9;
659 } else if ( strncmp(options, "noprobe", 7) == 0) {
660 vrc4171_sockets[CARD_SLOTA].slot = SLOT_NOPROBE_ALL;
661 options += 7;
662 }
663
664 if (*options != ',')
665 return 1;
666 options++;
667 } else
668 return 1;
669
670 }
671
672 if (strncmp(options, "slotb:", 6) == 0) {
673 options += 6;
674 if (*options != '\0') {
675 if (strncmp(options, "pccard", 6) == 0) {
676 vrc4171_slotb = SLOTB_IS_PCCARD;
677 options += 6;
678 } else if (strncmp(options, "cf", 2) == 0) {
679 vrc4171_slotb = SLOTB_IS_CF;
680 options += 2;
681 } else if (strncmp(options, "flashrom", 8) == 0) {
682 vrc4171_slotb = SLOTB_IS_FLASHROM;
683 options += 8;
684 } else if (strncmp(options, "none", 4) == 0) {
685 vrc4171_slotb = SLOTB_IS_NONE;
686 options += 4;
687 }
688
689 if (*options != ',')
690 return 1;
691 options++;
692
693 if (strncmp(options, "memnoprobe", 10) == 0)
694 vrc4171_sockets[CARD_SLOTB].slot = SLOT_NOPROBE_MEM;
695 if (strncmp(options, "ionoprobe", 9) == 0)
696 vrc4171_sockets[CARD_SLOTB].slot = SLOT_NOPROBE_IO;
697 if (strncmp(options, "noprobe", 7) == 0)
698 vrc4171_sockets[CARD_SLOTB].slot = SLOT_NOPROBE_ALL;
699 }
700 }
701
702 return 1;
703 }
704
705 __setup("vrc4171_card=", vrc4171_card_setup);
706
707 static int vrc4171_card_suspend(struct platform_device *dev,
708 pm_message_t state)
709 {
710 return pcmcia_socket_dev_suspend(&dev->dev, state);
711 }
712
713 static int vrc4171_card_resume(struct platform_device *dev)
714 {
715 return pcmcia_socket_dev_resume(&dev->dev);
716 }
717
718 static struct platform_driver vrc4171_card_driver = {
719 .driver = {
720 .name = vrc4171_card_name,
721 .owner = THIS_MODULE,
722 },
723 .suspend = vrc4171_card_suspend,
724 .resume = vrc4171_card_resume,
725 };
726
727 static int __devinit vrc4171_card_init(void)
728 {
729 int retval;
730
731 retval = platform_driver_register(&vrc4171_card_driver);
732 if (retval < 0)
733 return retval;
734
735 retval = platform_device_register(&vrc4171_card_device);
736 if (retval < 0) {
737 platform_driver_unregister(&vrc4171_card_driver);
738 return retval;
739 }
740
741 vrc4171_set_multifunction_pin(vrc4171_slotb);
742
743 retval = vrc4171_add_sockets();
744 if (retval == 0)
745 retval = request_irq(vrc4171_irq, pccard_interrupt, IRQF_SHARED,
746 vrc4171_card_name, vrc4171_sockets);
747
748 if (retval < 0) {
749 vrc4171_remove_sockets();
750 platform_device_unregister(&vrc4171_card_device);
751 platform_driver_unregister(&vrc4171_card_driver);
752 return retval;
753 }
754
755 printk(KERN_INFO "%s, connected to IRQ %d\n",
756 vrc4171_card_driver.driver.name, vrc4171_irq);
757
758 return 0;
759 }
760
761 static void __devexit vrc4171_card_exit(void)
762 {
763 free_irq(vrc4171_irq, vrc4171_sockets);
764 vrc4171_remove_sockets();
765 platform_device_unregister(&vrc4171_card_device);
766 platform_driver_unregister(&vrc4171_card_driver);
767 }
768
769 module_init(vrc4171_card_init);
770 module_exit(vrc4171_card_exit);
Support for the Chinese Samsung S3C2440 based development boards