[PATCH] Have x86_64 use add_active_range() and free_area_init_nodes
[linux-2.6/mini2440.git] / drivers / i2c / busses / i2c-powermac.c
bloba508cb962d244e89b4addc108f2c159212639364
1 /*
2 i2c Support for Apple SMU Controller
4 Copyright (c) 2005 Benjamin Herrenschmidt, IBM Corp.
5 <benh@kernel.crashing.org>
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/module.h>
24 #include <linux/kernel.h>
25 #include <linux/types.h>
26 #include <linux/i2c.h>
27 #include <linux/init.h>
28 #include <linux/completion.h>
29 #include <linux/device.h>
30 #include <linux/platform_device.h>
31 #include <asm/prom.h>
32 #include <asm/pmac_low_i2c.h>
34 MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
35 MODULE_DESCRIPTION("I2C driver for Apple PowerMac");
36 MODULE_LICENSE("GPL");
39 * SMBUS-type transfer entrypoint
41 static s32 i2c_powermac_smbus_xfer( struct i2c_adapter* adap,
42 u16 addr,
43 unsigned short flags,
44 char read_write,
45 u8 command,
46 int size,
47 union i2c_smbus_data* data)
49 struct pmac_i2c_bus *bus = i2c_get_adapdata(adap);
50 int rc = 0;
51 int read = (read_write == I2C_SMBUS_READ);
52 int addrdir = (addr << 1) | read;
53 u8 local[2];
55 rc = pmac_i2c_open(bus, 0);
56 if (rc)
57 return rc;
59 switch (size) {
60 case I2C_SMBUS_QUICK:
61 rc = pmac_i2c_setmode(bus, pmac_i2c_mode_std);
62 if (rc)
63 goto bail;
64 rc = pmac_i2c_xfer(bus, addrdir, 0, 0, NULL, 0);
65 break;
66 case I2C_SMBUS_BYTE:
67 rc = pmac_i2c_setmode(bus, pmac_i2c_mode_std);
68 if (rc)
69 goto bail;
70 rc = pmac_i2c_xfer(bus, addrdir, 0, 0, &data->byte, 1);
71 break;
72 case I2C_SMBUS_BYTE_DATA:
73 rc = pmac_i2c_setmode(bus, read ?
74 pmac_i2c_mode_combined :
75 pmac_i2c_mode_stdsub);
76 if (rc)
77 goto bail;
78 rc = pmac_i2c_xfer(bus, addrdir, 1, command, &data->byte, 1);
79 break;
80 case I2C_SMBUS_WORD_DATA:
81 rc = pmac_i2c_setmode(bus, read ?
82 pmac_i2c_mode_combined :
83 pmac_i2c_mode_stdsub);
84 if (rc)
85 goto bail;
86 if (!read) {
87 local[0] = data->word & 0xff;
88 local[1] = (data->word >> 8) & 0xff;
90 rc = pmac_i2c_xfer(bus, addrdir, 1, command, local, 2);
91 if (rc == 0 && read) {
92 data->word = ((u16)local[1]) << 8;
93 data->word |= local[0];
95 break;
97 /* Note that these are broken vs. the expected smbus API where
98 * on reads, the lenght is actually returned from the function,
99 * but I think the current API makes no sense and I don't want
100 * any driver that I haven't verified for correctness to go
101 * anywhere near a pmac i2c bus anyway ...
103 * I'm also not completely sure what kind of phases to do between
104 * the actual command and the data (what I am _supposed_ to do that
105 * is). For now, I assume writes are a single stream and reads have
106 * a repeat start/addr phase (but not stop in between)
108 case I2C_SMBUS_BLOCK_DATA:
109 rc = pmac_i2c_setmode(bus, read ?
110 pmac_i2c_mode_combined :
111 pmac_i2c_mode_stdsub);
112 if (rc)
113 goto bail;
114 rc = pmac_i2c_xfer(bus, addrdir, 1, command, data->block,
115 data->block[0] + 1);
117 break;
118 case I2C_SMBUS_I2C_BLOCK_DATA:
119 rc = pmac_i2c_setmode(bus, read ?
120 pmac_i2c_mode_combined :
121 pmac_i2c_mode_stdsub);
122 if (rc)
123 goto bail;
124 rc = pmac_i2c_xfer(bus, addrdir, 1, command,
125 read ? data->block : &data->block[1],
126 data->block[0]);
127 break;
129 default:
130 rc = -EINVAL;
132 bail:
133 pmac_i2c_close(bus);
134 return rc;
138 * Generic i2c master transfer entrypoint. This driver only support single
139 * messages (for "lame i2c" transfers). Anything else should use the smbus
140 * entry point
142 static int i2c_powermac_master_xfer( struct i2c_adapter *adap,
143 struct i2c_msg *msgs,
144 int num)
146 struct pmac_i2c_bus *bus = i2c_get_adapdata(adap);
147 int rc = 0;
148 int read;
149 int addrdir;
151 if (msgs->flags & I2C_M_TEN)
152 return -EINVAL;
153 read = (msgs->flags & I2C_M_RD) != 0;
154 addrdir = (msgs->addr << 1) | read;
155 if (msgs->flags & I2C_M_REV_DIR_ADDR)
156 addrdir ^= 1;
158 rc = pmac_i2c_open(bus, 0);
159 if (rc)
160 return rc;
161 rc = pmac_i2c_setmode(bus, pmac_i2c_mode_std);
162 if (rc)
163 goto bail;
164 rc = pmac_i2c_xfer(bus, addrdir, 0, 0, msgs->buf, msgs->len);
165 bail:
166 pmac_i2c_close(bus);
167 return rc < 0 ? rc : 1;
170 static u32 i2c_powermac_func(struct i2c_adapter * adapter)
172 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
173 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
174 I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_I2C;
177 /* For now, we only handle smbus */
178 static const struct i2c_algorithm i2c_powermac_algorithm = {
179 .smbus_xfer = i2c_powermac_smbus_xfer,
180 .master_xfer = i2c_powermac_master_xfer,
181 .functionality = i2c_powermac_func,
185 static int i2c_powermac_remove(struct device *dev)
187 struct i2c_adapter *adapter = dev_get_drvdata(dev);
188 struct pmac_i2c_bus *bus = i2c_get_adapdata(adapter);
189 int rc;
191 rc = i2c_del_adapter(adapter);
192 pmac_i2c_detach_adapter(bus, adapter);
193 i2c_set_adapdata(adapter, NULL);
194 /* We aren't that prepared to deal with this... */
195 if (rc)
196 printk("i2c-powermac.c: Failed to remove bus %s !\n",
197 adapter->name);
198 dev_set_drvdata(dev, NULL);
199 kfree(adapter);
201 return 0;
205 static int i2c_powermac_probe(struct device *dev)
207 struct pmac_i2c_bus *bus = dev->platform_data;
208 struct device_node *parent = NULL;
209 struct i2c_adapter *adapter;
210 char name[32];
211 const char *basename;
212 int rc;
214 if (bus == NULL)
215 return -EINVAL;
217 /* Ok, now we need to make up a name for the interface that will
218 * match what we used to do in the past, that is basically the
219 * controller's parent device node for keywest. PMU didn't have a
220 * naming convention and SMU has a different one
222 switch(pmac_i2c_get_type(bus)) {
223 case pmac_i2c_bus_keywest:
224 parent = of_get_parent(pmac_i2c_get_controller(bus));
225 if (parent == NULL)
226 return -EINVAL;
227 basename = parent->name;
228 break;
229 case pmac_i2c_bus_pmu:
230 basename = "pmu";
231 break;
232 case pmac_i2c_bus_smu:
233 /* This is not what we used to do but I'm fixing drivers at
234 * the same time as this change
236 basename = "smu";
237 break;
238 default:
239 return -EINVAL;
241 snprintf(name, 32, "%s %d", basename, pmac_i2c_get_channel(bus));
242 of_node_put(parent);
244 adapter = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL);
245 if (adapter == NULL) {
246 printk(KERN_ERR "i2c-powermac: can't allocate inteface !\n");
247 return -ENOMEM;
249 dev_set_drvdata(dev, adapter);
250 strcpy(adapter->name, name);
251 adapter->algo = &i2c_powermac_algorithm;
252 i2c_set_adapdata(adapter, bus);
253 adapter->dev.parent = dev;
254 pmac_i2c_attach_adapter(bus, adapter);
255 rc = i2c_add_adapter(adapter);
256 if (rc) {
257 printk(KERN_ERR "i2c-powermac: Adapter %s registration "
258 "failed\n", name);
259 i2c_set_adapdata(adapter, NULL);
260 pmac_i2c_detach_adapter(bus, adapter);
263 printk(KERN_INFO "PowerMac i2c bus %s registered\n", name);
264 return rc;
268 static struct device_driver i2c_powermac_driver = {
269 .name = "i2c-powermac",
270 .bus = &platform_bus_type,
271 .probe = i2c_powermac_probe,
272 .remove = i2c_powermac_remove,
275 static int __init i2c_powermac_init(void)
277 driver_register(&i2c_powermac_driver);
278 return 0;
282 static void __exit i2c_powermac_cleanup(void)
284 driver_unregister(&i2c_powermac_driver);
287 module_init(i2c_powermac_init);
288 module_exit(i2c_powermac_cleanup);