drivers/i2c/busses/i2c-ocores.c

   1 /*
   2  * i2c-ocores.c: I2C bus driver for OpenCores I2C controller
   3  * (http://www.opencores.org/projects.cgi/web/i2c/overview).
   4  *
   5  * Peter Korsgaard <jacmet@sunsite.dk>
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2.  This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 #include <linux/config.h>
  13 #include <linux/kernel.h>
  14 #include <linux/module.h>
  15 #include <linux/sched.h>
  16 #include <linux/init.h>
  17 #include <linux/errno.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/i2c.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/wait.h>
  22 #include <linux/i2c-ocores.h>
  23 #include <asm/io.h>
  24
  25 struct ocores_i2c {
  26         void __iomem *base;
  27         int regstep;
  28         wait_queue_head_t wait;
  29         struct i2c_adapter adap;
  30         struct i2c_msg *msg;
  31         int pos;
  32         int nmsgs;
  33         int state; /* see STATE_ */
  34 };
  35
  36 /* registers */
  37 #define OCI2C_PRELOW            0
  38 #define OCI2C_PREHIGH           1
  39 #define OCI2C_CONTROL           2
  40 #define OCI2C_DATA              3
  41 #define OCI2C_CMD               4 /* write only */
  42 #define OCI2C_STATUS            4 /* read only, same address as OCI2C_CMD */
  43
  44 #define OCI2C_CTRL_IEN          0x40
  45 #define OCI2C_CTRL_EN           0x80
  46
  47 #define OCI2C_CMD_START         0x91
  48 #define OCI2C_CMD_STOP          0x41
  49 #define OCI2C_CMD_READ          0x21
  50 #define OCI2C_CMD_WRITE         0x11
  51 #define OCI2C_CMD_READ_ACK      0x21
  52 #define OCI2C_CMD_READ_NACK     0x29
  53 #define OCI2C_CMD_IACK          0x01
  54
  55 #define OCI2C_STAT_IF           0x01
  56 #define OCI2C_STAT_TIP          0x02
  57 #define OCI2C_STAT_ARBLOST      0x20
  58 #define OCI2C_STAT_BUSY         0x40
  59 #define OCI2C_STAT_NACK         0x80
  60
  61 #define STATE_DONE              0
  62 #define STATE_START             1
  63 #define STATE_WRITE             2
  64 #define STATE_READ              3
  65 #define STATE_ERROR             4
  66
  67 static inline void oc_setreg(struct ocores_i2c *i2c, int reg, u8 value)
  68 {
  69         iowrite8(value, i2c->base + reg * i2c->regstep);
  70 }
  71
  72 static inline u8 oc_getreg(struct ocores_i2c *i2c, int reg)
  73 {
  74         return ioread8(i2c->base + reg * i2c->regstep);
  75 }
  76
  77 static void ocores_process(struct ocores_i2c *i2c)
  78 {
  79         struct i2c_msg *msg = i2c->msg;
  80         u8 stat = oc_getreg(i2c, OCI2C_STATUS);
  81
  82         if ((i2c->state == STATE_DONE) || (i2c->state == STATE_ERROR)) {
  83                 /* stop has been sent */
  84                 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK);
  85                 wake_up(&i2c->wait);
  86                 return;
  87         }
  88
  89         /* error? */
  90         if (stat & OCI2C_STAT_ARBLOST) {
  91                 i2c->state = STATE_ERROR;
  92                 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
  93                 return;
  94         }
  95
  96         if ((i2c->state == STATE_START) || (i2c->state == STATE_WRITE)) {
  97                 i2c->state =
  98                         (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE;
  99
 100                 if (stat & OCI2C_STAT_NACK) {
 101                         i2c->state = STATE_ERROR;
 102                         oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
 103                         return;
 104                 }
 105         } else
 106                 msg->buf[i2c->pos++] = oc_getreg(i2c, OCI2C_DATA);
 107
 108         /* end of msg? */
 109         if (i2c->pos == msg->len) {
 110                 i2c->nmsgs--;
 111                 i2c->msg++;
 112                 i2c->pos = 0;
 113                 msg = i2c->msg;
 114
 115                 if (i2c->nmsgs) {       /* end? */
 116                         /* send start? */
 117                         if (!(msg->flags & I2C_M_NOSTART)) {
 118                                 u8 addr = (msg->addr << 1);
 119
 120                                 if (msg->flags & I2C_M_RD)
 121                                         addr |= 1;
 122
 123                                 i2c->state = STATE_START;
 124
 125                                 oc_setreg(i2c, OCI2C_DATA, addr);
 126                                 oc_setreg(i2c, OCI2C_CMD,  OCI2C_CMD_START);
 127                                 return;
 128                         } else
 129                                 i2c->state = (msg->flags & I2C_M_RD)
 130                                         ? STATE_READ : STATE_WRITE;
 131                 } else {
 132                         i2c->state = STATE_DONE;
 133                         oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
 134                         return;
 135                 }
 136         }
 137
 138         if (i2c->state == STATE_READ) {
 139                 oc_setreg(i2c, OCI2C_CMD, i2c->pos == (msg->len-1) ?
 140                           OCI2C_CMD_READ_NACK : OCI2C_CMD_READ_ACK);
 141         } else {
 142                 oc_setreg(i2c, OCI2C_DATA, msg->buf[i2c->pos++]);
 143                 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_WRITE);
 144         }
 145 }
 146
 147 static irqreturn_t ocores_isr(int irq, void *dev_id, struct pt_regs *regs)
 148 {
 149         struct ocores_i2c *i2c = dev_id;
 150
 151         ocores_process(i2c);
 152
 153         return IRQ_HANDLED;
 154 }
 155
 156 static int ocores_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
 157 {
 158         struct ocores_i2c *i2c = i2c_get_adapdata(adap);
 159
 160         i2c->msg = msgs;
 161         i2c->pos = 0;
 162         i2c->nmsgs = num;
 163         i2c->state = STATE_START;
 164
 165         oc_setreg(i2c, OCI2C_DATA,
 166                         (i2c->msg->addr << 1) |
 167                         ((i2c->msg->flags & I2C_M_RD) ? 1:0));
 168
 169         oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START);
 170
 171         if (wait_event_timeout(i2c->wait, (i2c->state == STATE_ERROR) ||
 172                                (i2c->state == STATE_DONE), HZ))
 173                 return (i2c->state == STATE_DONE) ? num : -EIO;
 174         else
 175                 return -ETIMEDOUT;
 176 }
 177
 178 static void ocores_init(struct ocores_i2c *i2c,
 179                         struct ocores_i2c_platform_data *pdata)
 180 {
 181         int prescale;
 182         u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL);
 183
 184         /* make sure the device is disabled */
 185         oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN));
 186
 187         prescale = (pdata->clock_khz / (5*100)) - 1;
 188         oc_setreg(i2c, OCI2C_PRELOW, prescale & 0xff);
 189         oc_setreg(i2c, OCI2C_PREHIGH, prescale >> 8);
 190
 191         /* Init the device */
 192         oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK);
 193         oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_IEN | OCI2C_CTRL_EN);
 194 }
 195
 196
 197 static u32 ocores_func(struct i2c_adapter *adap)
 198 {
 199         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 200 }
 201
 202 static const struct i2c_algorithm ocores_algorithm = {
 203         .master_xfer    = ocores_xfer,
 204         .functionality  = ocores_func,
 205 };
 206
 207 static struct i2c_adapter ocores_adapter = {
 208         .owner          = THIS_MODULE,
 209         .name           = "i2c-ocores",
 210         .class          = I2C_CLASS_HWMON,
 211         .algo           = &ocores_algorithm,
 212 };
 213
 214
 215 static int __devinit ocores_i2c_probe(struct platform_device *pdev)
 216 {
 217         struct ocores_i2c *i2c;
 218         struct ocores_i2c_platform_data *pdata;
 219         struct resource *res, *res2;
 220         int ret;
 221
 222         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 223         if (!res)
 224                 return -ENODEV;
 225
 226         res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 227         if (!res2)
 228                 return -ENODEV;
 229
 230         pdata = (struct ocores_i2c_platform_data*) pdev->dev.platform_data;
 231         if (!pdata)
 232                 return -ENODEV;
 233
 234         i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);
 235         if (!i2c)
 236                 return -ENOMEM;
 237
 238         if (!request_mem_region(res->start, res->end - res->start + 1,
 239                                 pdev->name)) {
 240                 dev_err(&pdev->dev, "Memory region busy\n");
 241                 ret = -EBUSY;
 242                 goto request_mem_failed;
 243         }
 244
 245         i2c->base = ioremap(res->start, res->end - res->start + 1);
 246         if (!i2c->base) {
 247                 dev_err(&pdev->dev, "Unable to map registers\n");
 248                 ret = -EIO;
 249                 goto map_failed;
 250         }
 251
 252         i2c->regstep = pdata->regstep;
 253         ocores_init(i2c, pdata);
 254
 255         init_waitqueue_head(&i2c->wait);
 256         ret = request_irq(res2->start, ocores_isr, 0, pdev->name, i2c);
 257         if (ret) {
 258                 dev_err(&pdev->dev, "Cannot claim IRQ\n");
 259                 goto request_irq_failed;
 260         }
 261
 262         /* hook up driver to tree */
 263         platform_set_drvdata(pdev, i2c);
 264         i2c->adap = ocores_adapter;
 265         i2c_set_adapdata(&i2c->adap, i2c);
 266         i2c->adap.dev.parent = &pdev->dev;
 267
 268         /* add i2c adapter to i2c tree */
 269         ret = i2c_add_adapter(&i2c->adap);
 270         if (ret) {
 271                 dev_err(&pdev->dev, "Failed to add adapter\n");
 272                 goto add_adapter_failed;
 273         }
 274
 275         return 0;
 276
 277 add_adapter_failed:
 278         free_irq(res2->start, i2c);
 279 request_irq_failed:
 280         iounmap(i2c->base);
 281 map_failed:
 282         release_mem_region(res->start, res->end - res->start + 1);
 283 request_mem_failed:
 284         kfree(i2c);
 285
 286         return ret;
 287 }
 288
 289 static int __devexit ocores_i2c_remove(struct platform_device* pdev)
 290 {
 291         struct ocores_i2c *i2c = platform_get_drvdata(pdev);
 292         struct resource *res;
 293
 294         /* disable i2c logic */
 295         oc_setreg(i2c, OCI2C_CONTROL, oc_getreg(i2c, OCI2C_CONTROL)
 296                   & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN));
 297
 298         /* remove adapter & data */
 299         i2c_del_adapter(&i2c->adap);
 300         platform_set_drvdata(pdev, NULL);
 301
 302         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 303         if (res)
 304                 free_irq(res->start, i2c);
 305
 306         iounmap(i2c->base);
 307
 308         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 309         if (res)
 310                 release_mem_region(res->start, res->end - res->start + 1);
 311
 312         kfree(i2c);
 313
 314         return 0;
 315 }
 316
 317 static struct platform_driver ocores_i2c_driver = {
 318         .probe  = ocores_i2c_probe,
 319         .remove = __devexit_p(ocores_i2c_remove),
 320         .driver = {
 321                 .owner = THIS_MODULE,
 322                 .name = "ocores-i2c",
 323         },
 324 };
 325
 326 static int __init ocores_i2c_init(void)
 327 {
 328         return platform_driver_register(&ocores_i2c_driver);
 329 }
 330
 331 static void __exit ocores_i2c_exit(void)
 332 {
 333         platform_driver_unregister(&ocores_i2c_driver);
 334 }
 335
 336 module_init(ocores_i2c_init);
 337 module_exit(ocores_i2c_exit);
 338
 339 MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
 340 MODULE_DESCRIPTION("OpenCores I2C bus driver");
 341 MODULE_LICENSE("GPL");