2 * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework
4 * Largely derived from at91_dataflash.c:
5 * Copyright (C) 2003-2005 SAN People (Pty) Ltd
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
12 #include <linux/module.h>
13 #include <linux/init.h>
14 #include <linux/slab.h>
15 #include <linux/delay.h>
16 #include <linux/device.h>
17 #include <linux/mutex.h>
18 #include <linux/err.h>
19 #include <linux/math64.h>
21 #include <linux/spi/spi.h>
22 #include <linux/spi/flash.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/partitions.h>
29 * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in
30 * each chip, which may be used for double buffered I/O; but this driver
31 * doesn't (yet) use these for any kind of i/o overlap or prefetching.
33 * Sometimes DataFlash is packaged in MMC-format cards, although the
34 * MMC stack can't (yet?) distinguish between MMC and DataFlash
35 * protocols during enumeration.
38 /* reads can bypass the buffers */
39 #define OP_READ_CONTINUOUS 0xE8
40 #define OP_READ_PAGE 0xD2
42 /* group B requests can run even while status reports "busy" */
43 #define OP_READ_STATUS 0xD7 /* group B */
45 /* move data between host and buffer */
46 #define OP_READ_BUFFER1 0xD4 /* group B */
47 #define OP_READ_BUFFER2 0xD6 /* group B */
48 #define OP_WRITE_BUFFER1 0x84 /* group B */
49 #define OP_WRITE_BUFFER2 0x87 /* group B */
52 #define OP_ERASE_PAGE 0x81
53 #define OP_ERASE_BLOCK 0x50
55 /* move data between buffer and flash */
56 #define OP_TRANSFER_BUF1 0x53
57 #define OP_TRANSFER_BUF2 0x55
58 #define OP_MREAD_BUFFER1 0xD4
59 #define OP_MREAD_BUFFER2 0xD6
60 #define OP_MWERASE_BUFFER1 0x83
61 #define OP_MWERASE_BUFFER2 0x86
62 #define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */
63 #define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */
65 /* write to buffer, then write-erase to flash */
66 #define OP_PROGRAM_VIA_BUF1 0x82
67 #define OP_PROGRAM_VIA_BUF2 0x85
69 /* compare buffer to flash */
70 #define OP_COMPARE_BUF1 0x60
71 #define OP_COMPARE_BUF2 0x61
73 /* read flash to buffer, then write-erase to flash */
74 #define OP_REWRITE_VIA_BUF1 0x58
75 #define OP_REWRITE_VIA_BUF2 0x59
77 /* newer chips report JEDEC manufacturer and device IDs; chip
78 * serial number and OTP bits; and per-sector writeprotect.
80 #define OP_READ_ID 0x9F
81 #define OP_READ_SECURITY 0x77
82 #define OP_WRITE_SECURITY_REVC 0x9A
83 #define OP_WRITE_SECURITY 0x9B /* revision D */
90 unsigned partitioned
:1;
92 unsigned short page_offset
; /* offset in flash address */
93 unsigned int page_size
; /* of bytes per page */
96 struct spi_device
*spi
;
101 #ifdef CONFIG_MTD_PARTITIONS
102 #define mtd_has_partitions() (1)
104 #define mtd_has_partitions() (0)
107 /* ......................................................................... */
110 * Return the status of the DataFlash device.
112 static inline int dataflash_status(struct spi_device
*spi
)
114 /* NOTE: at45db321c over 25 MHz wants to write
115 * a dummy byte after the opcode...
117 return spi_w8r8(spi
, OP_READ_STATUS
);
121 * Poll the DataFlash device until it is READY.
122 * This usually takes 5-20 msec or so; more for sector erase.
124 static int dataflash_waitready(struct spi_device
*spi
)
129 status
= dataflash_status(spi
);
131 DEBUG(MTD_DEBUG_LEVEL1
, "%s: status %d?\n",
132 spi
->dev
.bus_id
, status
);
136 if (status
& (1 << 7)) /* RDY/nBSY */
143 /* ......................................................................... */
146 * Erase pages of flash.
148 static int dataflash_erase(struct mtd_info
*mtd
, struct erase_info
*instr
)
150 struct dataflash
*priv
= (struct dataflash
*)mtd
->priv
;
151 struct spi_device
*spi
= priv
->spi
;
152 struct spi_transfer x
= { .tx_dma
= 0, };
153 struct spi_message msg
;
154 unsigned blocksize
= priv
->page_size
<< 3;
158 DEBUG(MTD_DEBUG_LEVEL2
, "%s: erase addr=0x%llx len 0x%llx\n",
159 spi
->dev
.bus_id
, (long long)instr
->addr
,
160 (long long)instr
->len
);
163 if (instr
->addr
+ instr
->len
> mtd
->size
)
165 div_u64_rem(instr
->len
, priv
->page_size
, &rem
);
168 div_u64_rem(instr
->addr
, priv
->page_size
, &rem
);
172 spi_message_init(&msg
);
174 x
.tx_buf
= command
= priv
->command
;
176 spi_message_add_tail(&x
, &msg
);
178 mutex_lock(&priv
->lock
);
179 while (instr
->len
> 0) {
180 unsigned int pageaddr
;
184 /* Calculate flash page address; use block erase (for speed) if
185 * we're at a block boundary and need to erase the whole block.
187 pageaddr
= div_u64(instr
->len
, priv
->page_size
);
188 do_block
= (pageaddr
& 0x7) == 0 && instr
->len
>= blocksize
;
189 pageaddr
= pageaddr
<< priv
->page_offset
;
191 command
[0] = do_block
? OP_ERASE_BLOCK
: OP_ERASE_PAGE
;
192 command
[1] = (uint8_t)(pageaddr
>> 16);
193 command
[2] = (uint8_t)(pageaddr
>> 8);
196 DEBUG(MTD_DEBUG_LEVEL3
, "ERASE %s: (%x) %x %x %x [%i]\n",
197 do_block
? "block" : "page",
198 command
[0], command
[1], command
[2], command
[3],
201 status
= spi_sync(spi
, &msg
);
202 (void) dataflash_waitready(spi
);
205 printk(KERN_ERR
"%s: erase %x, err %d\n",
206 spi
->dev
.bus_id
, pageaddr
, status
);
207 /* REVISIT: can retry instr->retries times; or
208 * giveup and instr->fail_addr = instr->addr;
214 instr
->addr
+= blocksize
;
215 instr
->len
-= blocksize
;
217 instr
->addr
+= priv
->page_size
;
218 instr
->len
-= priv
->page_size
;
221 mutex_unlock(&priv
->lock
);
223 /* Inform MTD subsystem that erase is complete */
224 instr
->state
= MTD_ERASE_DONE
;
225 mtd_erase_callback(instr
);
231 * Read from the DataFlash device.
232 * from : Start offset in flash device
233 * len : Amount to read
234 * retlen : About of data actually read
235 * buf : Buffer containing the data
237 static int dataflash_read(struct mtd_info
*mtd
, loff_t from
, size_t len
,
238 size_t *retlen
, u_char
*buf
)
240 struct dataflash
*priv
= (struct dataflash
*)mtd
->priv
;
241 struct spi_transfer x
[2] = { { .tx_dma
= 0, }, };
242 struct spi_message msg
;
247 DEBUG(MTD_DEBUG_LEVEL2
, "%s: read 0x%x..0x%x\n",
248 priv
->spi
->dev
.bus_id
, (unsigned)from
, (unsigned)(from
+ len
));
255 if (from
+ len
> mtd
->size
)
258 /* Calculate flash page/byte address */
259 addr
= (((unsigned)from
/ priv
->page_size
) << priv
->page_offset
)
260 + ((unsigned)from
% priv
->page_size
);
262 command
= priv
->command
;
264 DEBUG(MTD_DEBUG_LEVEL3
, "READ: (%x) %x %x %x\n",
265 command
[0], command
[1], command
[2], command
[3]);
267 spi_message_init(&msg
);
269 x
[0].tx_buf
= command
;
271 spi_message_add_tail(&x
[0], &msg
);
275 spi_message_add_tail(&x
[1], &msg
);
277 mutex_lock(&priv
->lock
);
279 /* Continuous read, max clock = f(car) which may be less than
280 * the peak rate available. Some chips support commands with
281 * fewer "don't care" bytes. Both buffers stay unchanged.
283 command
[0] = OP_READ_CONTINUOUS
;
284 command
[1] = (uint8_t)(addr
>> 16);
285 command
[2] = (uint8_t)(addr
>> 8);
286 command
[3] = (uint8_t)(addr
>> 0);
287 /* plus 4 "don't care" bytes */
289 status
= spi_sync(priv
->spi
, &msg
);
290 mutex_unlock(&priv
->lock
);
293 *retlen
= msg
.actual_length
- 8;
296 DEBUG(MTD_DEBUG_LEVEL1
, "%s: read %x..%x --> %d\n",
297 priv
->spi
->dev
.bus_id
,
298 (unsigned)from
, (unsigned)(from
+ len
),
304 * Write to the DataFlash device.
305 * to : Start offset in flash device
306 * len : Amount to write
307 * retlen : Amount of data actually written
308 * buf : Buffer containing the data
310 static int dataflash_write(struct mtd_info
*mtd
, loff_t to
, size_t len
,
311 size_t * retlen
, const u_char
* buf
)
313 struct dataflash
*priv
= (struct dataflash
*)mtd
->priv
;
314 struct spi_device
*spi
= priv
->spi
;
315 struct spi_transfer x
[2] = { { .tx_dma
= 0, }, };
316 struct spi_message msg
;
317 unsigned int pageaddr
, addr
, offset
, writelen
;
318 size_t remaining
= len
;
319 u_char
*writebuf
= (u_char
*) buf
;
320 int status
= -EINVAL
;
323 DEBUG(MTD_DEBUG_LEVEL2
, "%s: write 0x%x..0x%x\n",
324 spi
->dev
.bus_id
, (unsigned)to
, (unsigned)(to
+ len
));
331 if ((to
+ len
) > mtd
->size
)
334 spi_message_init(&msg
);
336 x
[0].tx_buf
= command
= priv
->command
;
338 spi_message_add_tail(&x
[0], &msg
);
340 pageaddr
= ((unsigned)to
/ priv
->page_size
);
341 offset
= ((unsigned)to
% priv
->page_size
);
342 if (offset
+ len
> priv
->page_size
)
343 writelen
= priv
->page_size
- offset
;
347 mutex_lock(&priv
->lock
);
348 while (remaining
> 0) {
349 DEBUG(MTD_DEBUG_LEVEL3
, "write @ %i:%i len=%i\n",
350 pageaddr
, offset
, writelen
);
353 * (a) each page in a sector must be rewritten at least
354 * once every 10K sibling erase/program operations.
355 * (b) for pages that are already erased, we could
356 * use WRITE+MWRITE not PROGRAM for ~30% speedup.
357 * (c) WRITE to buffer could be done while waiting for
358 * a previous MWRITE/MWERASE to complete ...
359 * (d) error handling here seems to be mostly missing.
361 * Two persistent bits per page, plus a per-sector counter,
362 * could support (a) and (b) ... we might consider using
363 * the second half of sector zero, which is just one block,
364 * to track that state. (On AT91, that sector should also
365 * support boot-from-DataFlash.)
368 addr
= pageaddr
<< priv
->page_offset
;
370 /* (1) Maybe transfer partial page to Buffer1 */
371 if (writelen
!= priv
->page_size
) {
372 command
[0] = OP_TRANSFER_BUF1
;
373 command
[1] = (addr
& 0x00FF0000) >> 16;
374 command
[2] = (addr
& 0x0000FF00) >> 8;
377 DEBUG(MTD_DEBUG_LEVEL3
, "TRANSFER: (%x) %x %x %x\n",
378 command
[0], command
[1], command
[2], command
[3]);
380 status
= spi_sync(spi
, &msg
);
382 DEBUG(MTD_DEBUG_LEVEL1
, "%s: xfer %u -> %d \n",
383 spi
->dev
.bus_id
, addr
, status
);
385 (void) dataflash_waitready(priv
->spi
);
388 /* (2) Program full page via Buffer1 */
390 command
[0] = OP_PROGRAM_VIA_BUF1
;
391 command
[1] = (addr
& 0x00FF0000) >> 16;
392 command
[2] = (addr
& 0x0000FF00) >> 8;
393 command
[3] = (addr
& 0x000000FF);
395 DEBUG(MTD_DEBUG_LEVEL3
, "PROGRAM: (%x) %x %x %x\n",
396 command
[0], command
[1], command
[2], command
[3]);
398 x
[1].tx_buf
= writebuf
;
400 spi_message_add_tail(x
+ 1, &msg
);
401 status
= spi_sync(spi
, &msg
);
402 spi_transfer_del(x
+ 1);
404 DEBUG(MTD_DEBUG_LEVEL1
, "%s: pgm %u/%u -> %d \n",
405 spi
->dev
.bus_id
, addr
, writelen
, status
);
407 (void) dataflash_waitready(priv
->spi
);
410 #ifdef CONFIG_MTD_DATAFLASH_VERIFY_WRITE
412 /* (3) Compare to Buffer1 */
413 addr
= pageaddr
<< priv
->page_offset
;
414 command
[0] = OP_COMPARE_BUF1
;
415 command
[1] = (addr
& 0x00FF0000) >> 16;
416 command
[2] = (addr
& 0x0000FF00) >> 8;
419 DEBUG(MTD_DEBUG_LEVEL3
, "COMPARE: (%x) %x %x %x\n",
420 command
[0], command
[1], command
[2], command
[3]);
422 status
= spi_sync(spi
, &msg
);
424 DEBUG(MTD_DEBUG_LEVEL1
, "%s: compare %u -> %d \n",
425 spi
->dev
.bus_id
, addr
, status
);
427 status
= dataflash_waitready(priv
->spi
);
429 /* Check result of the compare operation */
430 if (status
& (1 << 6)) {
431 printk(KERN_ERR
"%s: compare page %u, err %d\n",
432 spi
->dev
.bus_id
, pageaddr
, status
);
439 #endif /* CONFIG_MTD_DATAFLASH_VERIFY_WRITE */
441 remaining
= remaining
- writelen
;
444 writebuf
+= writelen
;
447 if (remaining
> priv
->page_size
)
448 writelen
= priv
->page_size
;
450 writelen
= remaining
;
452 mutex_unlock(&priv
->lock
);
457 /* ......................................................................... */
459 #ifdef CONFIG_MTD_DATAFLASH_OTP
461 static int dataflash_get_otp_info(struct mtd_info
*mtd
,
462 struct otp_info
*info
, size_t len
)
464 /* Report both blocks as identical: bytes 0..64, locked.
465 * Unless the user block changed from all-ones, we can't
466 * tell whether it's still writable; so we assume it isn't.
471 return sizeof(*info
);
474 static ssize_t
otp_read(struct spi_device
*spi
, unsigned base
,
475 uint8_t *buf
, loff_t off
, size_t len
)
477 struct spi_message m
;
480 struct spi_transfer t
;
486 if ((off
+ len
) > 64)
491 spi_message_init(&m
);
493 l
= 4 + base
+ off
+ len
;
494 scratch
= kzalloc(l
, GFP_KERNEL
);
498 /* OUT: OP_READ_SECURITY, 3 don't-care bytes, zeroes
499 * IN: ignore 4 bytes, data bytes 0..N (max 127)
501 scratch
[0] = OP_READ_SECURITY
;
503 memset(&t
, 0, sizeof t
);
507 spi_message_add_tail(&t
, &m
);
509 dataflash_waitready(spi
);
511 status
= spi_sync(spi
, &m
);
513 memcpy(buf
, scratch
+ 4 + base
+ off
, len
);
521 static int dataflash_read_fact_otp(struct mtd_info
*mtd
,
522 loff_t from
, size_t len
, size_t *retlen
, u_char
*buf
)
524 struct dataflash
*priv
= (struct dataflash
*)mtd
->priv
;
527 /* 64 bytes, from 0..63 ... start at 64 on-chip */
528 mutex_lock(&priv
->lock
);
529 status
= otp_read(priv
->spi
, 64, buf
, from
, len
);
530 mutex_unlock(&priv
->lock
);
538 static int dataflash_read_user_otp(struct mtd_info
*mtd
,
539 loff_t from
, size_t len
, size_t *retlen
, u_char
*buf
)
541 struct dataflash
*priv
= (struct dataflash
*)mtd
->priv
;
544 /* 64 bytes, from 0..63 ... start at 0 on-chip */
545 mutex_lock(&priv
->lock
);
546 status
= otp_read(priv
->spi
, 0, buf
, from
, len
);
547 mutex_unlock(&priv
->lock
);
555 static int dataflash_write_user_otp(struct mtd_info
*mtd
,
556 loff_t from
, size_t len
, size_t *retlen
, u_char
*buf
)
558 struct spi_message m
;
559 const size_t l
= 4 + 64;
561 struct spi_transfer t
;
562 struct dataflash
*priv
= (struct dataflash
*)mtd
->priv
;
568 /* Strictly speaking, we *could* truncate the write ... but
569 * let's not do that for the only write that's ever possible.
571 if ((from
+ len
) > 64)
574 /* OUT: OP_WRITE_SECURITY, 3 zeroes, 64 data-or-zero bytes
577 scratch
= kzalloc(l
, GFP_KERNEL
);
580 scratch
[0] = OP_WRITE_SECURITY
;
581 memcpy(scratch
+ 4 + from
, buf
, len
);
583 spi_message_init(&m
);
585 memset(&t
, 0, sizeof t
);
588 spi_message_add_tail(&t
, &m
);
590 /* Write the OTP bits, if they've not yet been written.
591 * This modifies SRAM buffer1.
593 mutex_lock(&priv
->lock
);
594 dataflash_waitready(priv
->spi
);
595 status
= spi_sync(priv
->spi
, &m
);
596 mutex_unlock(&priv
->lock
);
607 static char *otp_setup(struct mtd_info
*device
, char revision
)
609 device
->get_fact_prot_info
= dataflash_get_otp_info
;
610 device
->read_fact_prot_reg
= dataflash_read_fact_otp
;
611 device
->get_user_prot_info
= dataflash_get_otp_info
;
612 device
->read_user_prot_reg
= dataflash_read_user_otp
;
614 /* rev c parts (at45db321c and at45db1281 only!) use a
615 * different write procedure; not (yet?) implemented.
618 device
->write_user_prot_reg
= dataflash_write_user_otp
;
625 static char *otp_setup(struct mtd_info
*device
, char revision
)
632 /* ......................................................................... */
635 * Register DataFlash device with MTD subsystem.
638 add_dataflash_otp(struct spi_device
*spi
, char *name
,
639 int nr_pages
, int pagesize
, int pageoffset
, char revision
)
641 struct dataflash
*priv
;
642 struct mtd_info
*device
;
643 struct flash_platform_data
*pdata
= spi
->dev
.platform_data
;
646 priv
= kzalloc(sizeof *priv
, GFP_KERNEL
);
650 mutex_init(&priv
->lock
);
652 priv
->page_size
= pagesize
;
653 priv
->page_offset
= pageoffset
;
655 /* name must be usable with cmdlinepart */
656 sprintf(priv
->name
, "spi%d.%d-%s",
657 spi
->master
->bus_num
, spi
->chip_select
,
661 device
->name
= (pdata
&& pdata
->name
) ? pdata
->name
: priv
->name
;
662 device
->size
= nr_pages
* pagesize
;
663 device
->erasesize
= pagesize
;
664 device
->writesize
= pagesize
;
665 device
->owner
= THIS_MODULE
;
666 device
->type
= MTD_DATAFLASH
;
667 device
->flags
= MTD_WRITEABLE
;
668 device
->erase
= dataflash_erase
;
669 device
->read
= dataflash_read
;
670 device
->write
= dataflash_write
;
674 otp_tag
= otp_setup(device
, revision
);
676 dev_info(&spi
->dev
, "%s (%lld KBytes) pagesize %d bytes%s\n",
677 name
, (long long)((device
->size
+ 1023) >> 10),
679 dev_set_drvdata(&spi
->dev
, priv
);
681 if (mtd_has_partitions()) {
682 struct mtd_partition
*parts
;
685 #ifdef CONFIG_MTD_CMDLINE_PARTS
686 static const char *part_probes
[] = { "cmdlinepart", NULL
, };
688 nr_parts
= parse_mtd_partitions(device
, part_probes
, &parts
, 0);
691 if (nr_parts
<= 0 && pdata
&& pdata
->parts
) {
692 parts
= pdata
->parts
;
693 nr_parts
= pdata
->nr_parts
;
697 priv
->partitioned
= 1;
698 return add_mtd_partitions(device
, parts
, nr_parts
);
700 } else if (pdata
&& pdata
->nr_parts
)
701 dev_warn(&spi
->dev
, "ignoring %d default partitions on %s\n",
702 pdata
->nr_parts
, device
->name
);
704 return add_mtd_device(device
) == 1 ? -ENODEV
: 0;
707 static inline int __devinit
708 add_dataflash(struct spi_device
*spi
, char *name
,
709 int nr_pages
, int pagesize
, int pageoffset
)
711 return add_dataflash_otp(spi
, name
, nr_pages
, pagesize
,
718 /* JEDEC id has a high byte of zero plus three data bytes:
719 * the manufacturer id, then a two byte device id.
723 /* The size listed here is what works with OP_ERASE_PAGE. */
729 #define SUP_POW2PS 0x0002 /* supports 2^N byte pages */
730 #define IS_POW2PS 0x0001 /* uses 2^N byte pages */
733 static struct flash_info __devinitdata dataflash_data
[] = {
736 * NOTE: chips with SUP_POW2PS (rev D and up) need two entries,
737 * one with IS_POW2PS and the other without. The entry with the
738 * non-2^N byte page size can't name exact chip revisions without
739 * losing backwards compatibility for cmdlinepart.
741 * These newer chips also support 128-byte security registers (with
742 * 64 bytes one-time-programmable) and software write-protection.
744 { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS
},
745 { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS
| IS_POW2PS
},
747 { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS
},
748 { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS
| IS_POW2PS
},
750 { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS
},
751 { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS
| IS_POW2PS
},
753 { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS
},
754 { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS
| IS_POW2PS
},
756 { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS
},
757 { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS
| IS_POW2PS
},
759 { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */
761 { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS
},
762 { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS
| IS_POW2PS
},
764 { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS
},
765 { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS
| IS_POW2PS
},
768 static struct flash_info
*__devinit
jedec_probe(struct spi_device
*spi
)
771 uint8_t code
= OP_READ_ID
;
774 struct flash_info
*info
;
777 /* JEDEC also defines an optional "extended device information"
778 * string for after vendor-specific data, after the three bytes
779 * we use here. Supporting some chips might require using it.
781 * If the vendor ID isn't Atmel's (0x1f), assume this call failed.
782 * That's not an error; only rev C and newer chips handle it, and
783 * only Atmel sells these chips.
785 tmp
= spi_write_then_read(spi
, &code
, 1, id
, 3);
787 DEBUG(MTD_DEBUG_LEVEL0
, "%s: error %d reading JEDEC ID\n",
788 spi
->dev
.bus_id
, tmp
);
800 for (tmp
= 0, info
= dataflash_data
;
801 tmp
< ARRAY_SIZE(dataflash_data
);
803 if (info
->jedec_id
== jedec
) {
804 DEBUG(MTD_DEBUG_LEVEL1
, "%s: OTP, sector protect%s\n",
806 (info
->flags
& SUP_POW2PS
)
807 ? ", binary pagesize" : ""
809 if (info
->flags
& SUP_POW2PS
) {
810 status
= dataflash_status(spi
);
812 DEBUG(MTD_DEBUG_LEVEL1
,
813 "%s: status error %d\n",
814 dev_name(&spi
->dev
), status
);
815 return ERR_PTR(status
);
818 if (info
->flags
& IS_POW2PS
)
821 if (!(info
->flags
& IS_POW2PS
))
829 * Treat other chips as errors ... we won't know the right page
830 * size (it might be binary) even when we can tell which density
831 * class is involved (legacy chip id scheme).
833 dev_warn(&spi
->dev
, "JEDEC id %06x not handled\n", jedec
);
834 return ERR_PTR(-ENODEV
);
838 * Detect and initialize DataFlash device, using JEDEC IDs on newer chips
839 * or else the ID code embedded in the status bits:
841 * Device Density ID code #Pages PageSize Offset
842 * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9
843 * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9
844 * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9
845 * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9
846 * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10
847 * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
848 * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
849 * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
851 static int __devinit
dataflash_probe(struct spi_device
*spi
)
854 struct flash_info
*info
;
857 * Try to detect dataflash by JEDEC ID.
858 * If it succeeds we know we have either a C or D part.
859 * D will support power of 2 pagesize option.
860 * Both support the security register, though with different
863 info
= jedec_probe(spi
);
865 return PTR_ERR(info
);
867 return add_dataflash_otp(spi
, info
->name
, info
->nr_pages
,
868 info
->pagesize
, info
->pageoffset
,
869 (info
->flags
& SUP_POW2PS
) ? 'd' : 'c');
872 * Older chips support only legacy commands, identifing
873 * capacity using bits in the status byte.
875 status
= dataflash_status(spi
);
876 if (status
<= 0 || status
== 0xff) {
877 DEBUG(MTD_DEBUG_LEVEL1
, "%s: status error %d\n",
878 spi
->dev
.bus_id
, status
);
879 if (status
== 0 || status
== 0xff)
884 /* if there's a device there, assume it's dataflash.
885 * board setup should have set spi->max_speed_max to
886 * match f(car) for continuous reads, mode 0 or 3.
888 switch (status
& 0x3c) {
889 case 0x0c: /* 0 0 1 1 x x */
890 status
= add_dataflash(spi
, "AT45DB011B", 512, 264, 9);
892 case 0x14: /* 0 1 0 1 x x */
893 status
= add_dataflash(spi
, "AT45DB021B", 1024, 264, 9);
895 case 0x1c: /* 0 1 1 1 x x */
896 status
= add_dataflash(spi
, "AT45DB041x", 2048, 264, 9);
898 case 0x24: /* 1 0 0 1 x x */
899 status
= add_dataflash(spi
, "AT45DB081B", 4096, 264, 9);
901 case 0x2c: /* 1 0 1 1 x x */
902 status
= add_dataflash(spi
, "AT45DB161x", 4096, 528, 10);
904 case 0x34: /* 1 1 0 1 x x */
905 status
= add_dataflash(spi
, "AT45DB321x", 8192, 528, 10);
907 case 0x38: /* 1 1 1 x x x */
909 status
= add_dataflash(spi
, "AT45DB642x", 8192, 1056, 11);
911 /* obsolete AT45DB1282 not (yet?) supported */
913 DEBUG(MTD_DEBUG_LEVEL1
, "%s: unsupported device (%x)\n",
914 spi
->dev
.bus_id
, status
& 0x3c);
919 DEBUG(MTD_DEBUG_LEVEL1
, "%s: add_dataflash --> %d\n",
920 spi
->dev
.bus_id
, status
);
925 static int __devexit
dataflash_remove(struct spi_device
*spi
)
927 struct dataflash
*flash
= dev_get_drvdata(&spi
->dev
);
930 DEBUG(MTD_DEBUG_LEVEL1
, "%s: remove\n", spi
->dev
.bus_id
);
932 if (mtd_has_partitions() && flash
->partitioned
)
933 status
= del_mtd_partitions(&flash
->mtd
);
935 status
= del_mtd_device(&flash
->mtd
);
941 static struct spi_driver dataflash_driver
= {
943 .name
= "mtd_dataflash",
944 .bus
= &spi_bus_type
,
945 .owner
= THIS_MODULE
,
948 .probe
= dataflash_probe
,
949 .remove
= __devexit_p(dataflash_remove
),
951 /* FIXME: investigate suspend and resume... */
954 static int __init
dataflash_init(void)
956 return spi_register_driver(&dataflash_driver
);
958 module_init(dataflash_init
);
960 static void __exit
dataflash_exit(void)
962 spi_unregister_driver(&dataflash_driver
);
964 module_exit(dataflash_exit
);
967 MODULE_LICENSE("GPL");
968 MODULE_AUTHOR("Andrew Victor, David Brownell");
969 MODULE_DESCRIPTION("MTD DataFlash driver");