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Documentation/IPMI typos
[linux-2.6/mini2440.git] / drivers / serial / serial_txx9.c
bloba901a7e446f3ca91c696989fd35426a5151401e2
1 /*
2 * drivers/serial/serial_txx9.c
3 *
4 * Derived from many drivers using generic_serial interface,
5 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
6 * (was in Linux/VR tree) by Jim Pick.
7 *
8 * Copyright (C) 1999 Harald Koerfgen
9 * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
10 * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
11 * Copyright (C) 2000-2002 Toshiba Corporation
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
18 *
19 * Revision History:
20 * 0.30 Initial revision. (Renamed from serial_txx927.c)
21 * 0.31 Use save_flags instead of local_irq_save.
22 * 0.32 Support SCLK.
23 * 0.33 Switch TXX9_TTY_NAME by CONFIG_SERIAL_TXX9_STDSERIAL.
24 * Support TIOCSERGETLSR.
25 * 0.34 Support slow baudrate.
26 * 0.40 Merge codes from mainstream kernel (2.4.22).
27 * 0.41 Fix console checking in rs_shutdown_port().
28 * Disable flow-control in serial_console_write().
29 * 0.42 Fix minor compiler warning.
30 * 1.00 Kernel 2.6. Converted to new serial core (based on 8250.c).
31 * 1.01 Set fifosize to make tx_empry called properly.
32 * Use standard uart_get_divisor.
33 * 1.02 Cleanup. (import 8250.c changes)
34 * 1.03 Fix low-latency mode. (import 8250.c changes)
35 * 1.04 Remove usage of deprecated functions, cleanup.
36 * 1.05 More strict check in verify_port. Cleanup.
37 * 1.06 Do not insert a char caused previous overrun.
38 * Fix some spin_locks.
39 * Do not call uart_add_one_port for absent ports.
40 */
41 #include <linux/config.h>
42
43 #if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
44 #define SUPPORT_SYSRQ
45 #endif
46
47 #include <linux/module.h>
48 #include <linux/ioport.h>
49 #include <linux/init.h>
50 #include <linux/console.h>
51 #include <linux/sysrq.h>
52 #include <linux/delay.h>
53 #include <linux/device.h>
54 #include <linux/pci.h>
55 #include <linux/tty.h>
56 #include <linux/tty_flip.h>
57 #include <linux/serial_core.h>
58 #include <linux/serial.h>
59 #include <linux/mutex.h>
60
61 #include <asm/io.h>
62 #include <asm/irq.h>
63
64 static char *serial_version = "1.06";
65 static char *serial_name = "TX39/49 Serial driver";
66
67 #define PASS_LIMIT 256
68
69 #if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
70 /* "ttyS" is used for standard serial driver */
71 #define TXX9_TTY_NAME "ttyTX"
72 #define TXX9_TTY_MINOR_START (64 + 64) /* ttyTX0(128), ttyTX1(129) */
73 #else
74 /* acts like standard serial driver */
75 #define TXX9_TTY_NAME "ttyS"
76 #define TXX9_TTY_MINOR_START 64
77 #endif
78 #define TXX9_TTY_MAJOR TTY_MAJOR
79
80 /* flag aliases */
81 #define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
82 #define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
83
84 #ifdef CONFIG_PCI
85 /* support for Toshiba TC86C001 SIO */
86 #define ENABLE_SERIAL_TXX9_PCI
87 #endif
88
89 /*
90 * Number of serial ports
91 */
92 #ifdef ENABLE_SERIAL_TXX9_PCI
93 #define NR_PCI_BOARDS 4
94 #define UART_NR (4 + NR_PCI_BOARDS)
95 #else
96 #define UART_NR 4
97 #endif
98
99 #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
100
101 struct uart_txx9_port {
102 struct uart_port port;
103
104 /*
105 * We provide a per-port pm hook.
106 */
107 void (*pm)(struct uart_port *port,
108 unsigned int state, unsigned int old);
109 };
110
111 #define TXX9_REGION_SIZE 0x24
112
113 /* TXX9 Serial Registers */
114 #define TXX9_SILCR 0x00
115 #define TXX9_SIDICR 0x04
116 #define TXX9_SIDISR 0x08
117 #define TXX9_SICISR 0x0c
118 #define TXX9_SIFCR 0x10
119 #define TXX9_SIFLCR 0x14
120 #define TXX9_SIBGR 0x18
121 #define TXX9_SITFIFO 0x1c
122 #define TXX9_SIRFIFO 0x20
123
124 /* SILCR : Line Control */
125 #define TXX9_SILCR_SCS_MASK 0x00000060
126 #define TXX9_SILCR_SCS_IMCLK 0x00000000
127 #define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
128 #define TXX9_SILCR_SCS_SCLK 0x00000040
129 #define TXX9_SILCR_SCS_SCLK_BG 0x00000060
130 #define TXX9_SILCR_UEPS 0x00000010
131 #define TXX9_SILCR_UPEN 0x00000008
132 #define TXX9_SILCR_USBL_MASK 0x00000004
133 #define TXX9_SILCR_USBL_1BIT 0x00000000
134 #define TXX9_SILCR_USBL_2BIT 0x00000004
135 #define TXX9_SILCR_UMODE_MASK 0x00000003
136 #define TXX9_SILCR_UMODE_8BIT 0x00000000
137 #define TXX9_SILCR_UMODE_7BIT 0x00000001
138
139 /* SIDICR : DMA/Int. Control */
140 #define TXX9_SIDICR_TDE 0x00008000
141 #define TXX9_SIDICR_RDE 0x00004000
142 #define TXX9_SIDICR_TIE 0x00002000
143 #define TXX9_SIDICR_RIE 0x00001000
144 #define TXX9_SIDICR_SPIE 0x00000800
145 #define TXX9_SIDICR_CTSAC 0x00000600
146 #define TXX9_SIDICR_STIE_MASK 0x0000003f
147 #define TXX9_SIDICR_STIE_OERS 0x00000020
148 #define TXX9_SIDICR_STIE_CTSS 0x00000010
149 #define TXX9_SIDICR_STIE_RBRKD 0x00000008
150 #define TXX9_SIDICR_STIE_TRDY 0x00000004
151 #define TXX9_SIDICR_STIE_TXALS 0x00000002
152 #define TXX9_SIDICR_STIE_UBRKD 0x00000001
153
154 /* SIDISR : DMA/Int. Status */
155 #define TXX9_SIDISR_UBRK 0x00008000
156 #define TXX9_SIDISR_UVALID 0x00004000
157 #define TXX9_SIDISR_UFER 0x00002000
158 #define TXX9_SIDISR_UPER 0x00001000
159 #define TXX9_SIDISR_UOER 0x00000800
160 #define TXX9_SIDISR_ERI 0x00000400
161 #define TXX9_SIDISR_TOUT 0x00000200
162 #define TXX9_SIDISR_TDIS 0x00000100
163 #define TXX9_SIDISR_RDIS 0x00000080
164 #define TXX9_SIDISR_STIS 0x00000040
165 #define TXX9_SIDISR_RFDN_MASK 0x0000001f
166
167 /* SICISR : Change Int. Status */
168 #define TXX9_SICISR_OERS 0x00000020
169 #define TXX9_SICISR_CTSS 0x00000010
170 #define TXX9_SICISR_RBRKD 0x00000008
171 #define TXX9_SICISR_TRDY 0x00000004
172 #define TXX9_SICISR_TXALS 0x00000002
173 #define TXX9_SICISR_UBRKD 0x00000001
174
175 /* SIFCR : FIFO Control */
176 #define TXX9_SIFCR_SWRST 0x00008000
177 #define TXX9_SIFCR_RDIL_MASK 0x00000180
178 #define TXX9_SIFCR_RDIL_1 0x00000000
179 #define TXX9_SIFCR_RDIL_4 0x00000080
180 #define TXX9_SIFCR_RDIL_8 0x00000100
181 #define TXX9_SIFCR_RDIL_12 0x00000180
182 #define TXX9_SIFCR_RDIL_MAX 0x00000180
183 #define TXX9_SIFCR_TDIL_MASK 0x00000018
184 #define TXX9_SIFCR_TDIL_MASK 0x00000018
185 #define TXX9_SIFCR_TDIL_1 0x00000000
186 #define TXX9_SIFCR_TDIL_4 0x00000001
187 #define TXX9_SIFCR_TDIL_8 0x00000010
188 #define TXX9_SIFCR_TDIL_MAX 0x00000010
189 #define TXX9_SIFCR_TFRST 0x00000004
190 #define TXX9_SIFCR_RFRST 0x00000002
191 #define TXX9_SIFCR_FRSTE 0x00000001
192 #define TXX9_SIO_TX_FIFO 8
193 #define TXX9_SIO_RX_FIFO 16
194
195 /* SIFLCR : Flow Control */
196 #define TXX9_SIFLCR_RCS 0x00001000
197 #define TXX9_SIFLCR_TES 0x00000800
198 #define TXX9_SIFLCR_RTSSC 0x00000200
199 #define TXX9_SIFLCR_RSDE 0x00000100
200 #define TXX9_SIFLCR_TSDE 0x00000080
201 #define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
202 #define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
203 #define TXX9_SIFLCR_TBRK 0x00000001
204
205 /* SIBGR : Baudrate Control */
206 #define TXX9_SIBGR_BCLK_MASK 0x00000300
207 #define TXX9_SIBGR_BCLK_T0 0x00000000
208 #define TXX9_SIBGR_BCLK_T2 0x00000100
209 #define TXX9_SIBGR_BCLK_T4 0x00000200
210 #define TXX9_SIBGR_BCLK_T6 0x00000300
211 #define TXX9_SIBGR_BRD_MASK 0x000000ff
212
213 static inline unsigned int sio_in(struct uart_txx9_port *up, int offset)
214 {
215 switch (up->port.iotype) {
216 default:
217 return __raw_readl(up->port.membase + offset);
218 case UPIO_PORT:
219 return inl(up->port.iobase + offset);
220 }
221 }
222
223 static inline void
224 sio_out(struct uart_txx9_port *up, int offset, int value)
225 {
226 switch (up->port.iotype) {
227 default:
228 __raw_writel(value, up->port.membase + offset);
229 break;
230 case UPIO_PORT:
231 outl(value, up->port.iobase + offset);
232 break;
233 }
234 }
235
236 static inline void
237 sio_mask(struct uart_txx9_port *up, int offset, unsigned int value)
238 {
239 sio_out(up, offset, sio_in(up, offset) & ~value);
240 }
241 static inline void
242 sio_set(struct uart_txx9_port *up, int offset, unsigned int value)
243 {
244 sio_out(up, offset, sio_in(up, offset) | value);
245 }
246
247 static inline void
248 sio_quot_set(struct uart_txx9_port *up, int quot)
249 {
250 quot >>= 1;
251 if (quot < 256)
252 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
253 else if (quot < (256 << 2))
254 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
255 else if (quot < (256 << 4))
256 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
257 else if (quot < (256 << 6))
258 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
259 else
260 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
261 }
262
263 static void serial_txx9_stop_tx(struct uart_port *port)
264 {
265 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
266 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
267 }
268
269 static void serial_txx9_start_tx(struct uart_port *port)
270 {
271 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
272 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
273 }
274
275 static void serial_txx9_stop_rx(struct uart_port *port)
276 {
277 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
278 up->port.read_status_mask &= ~TXX9_SIDISR_RDIS;
279 }
280
281 static void serial_txx9_enable_ms(struct uart_port *port)
282 {
283 /* TXX9-SIO can not control DTR... */
284 }
285
286 static inline void
287 receive_chars(struct uart_txx9_port *up, unsigned int *status, struct pt_regs *regs)
288 {
289 struct tty_struct *tty = up->port.info->tty;
290 unsigned char ch;
291 unsigned int disr = *status;
292 int max_count = 256;
293 char flag;
294 unsigned int next_ignore_status_mask;
295
296 do {
297 ch = sio_in(up, TXX9_SIRFIFO);
298 flag = TTY_NORMAL;
299 up->port.icount.rx++;
300
301 /* mask out RFDN_MASK bit added by previous overrun */
302 next_ignore_status_mask =
303 up->port.ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
304 if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
305 TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
306 /*
307 * For statistics only
308 */
309 if (disr & TXX9_SIDISR_UBRK) {
310 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
311 up->port.icount.brk++;
312 /*
313 * We do the SysRQ and SAK checking
314 * here because otherwise the break
315 * may get masked by ignore_status_mask
316 * or read_status_mask.
317 */
318 if (uart_handle_break(&up->port))
319 goto ignore_char;
320 } else if (disr & TXX9_SIDISR_UPER)
321 up->port.icount.parity++;
322 else if (disr & TXX9_SIDISR_UFER)
323 up->port.icount.frame++;
324 if (disr & TXX9_SIDISR_UOER) {
325 up->port.icount.overrun++;
326 /*
327 * The receiver read buffer still hold
328 * a char which caused overrun.
329 * Ignore next char by adding RFDN_MASK
330 * to ignore_status_mask temporarily.
331 */
332 next_ignore_status_mask |=
333 TXX9_SIDISR_RFDN_MASK;
334 }
335
336 /*
337 * Mask off conditions which should be ingored.
338 */
339 disr &= up->port.read_status_mask;
340
341 if (disr & TXX9_SIDISR_UBRK) {
342 flag = TTY_BREAK;
343 } else if (disr & TXX9_SIDISR_UPER)
344 flag = TTY_PARITY;
345 else if (disr & TXX9_SIDISR_UFER)
346 flag = TTY_FRAME;
347 }
348 if (uart_handle_sysrq_char(&up->port, ch, regs))
349 goto ignore_char;
350
351 uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag);
352
353 ignore_char:
354 up->port.ignore_status_mask = next_ignore_status_mask;
355 disr = sio_in(up, TXX9_SIDISR);
356 } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
357 spin_unlock(&up->port.lock);
358 tty_flip_buffer_push(tty);
359 spin_lock(&up->port.lock);
360 *status = disr;
361 }
362
363 static inline void transmit_chars(struct uart_txx9_port *up)
364 {
365 struct circ_buf *xmit = &up->port.info->xmit;
366 int count;
367
368 if (up->port.x_char) {
369 sio_out(up, TXX9_SITFIFO, up->port.x_char);
370 up->port.icount.tx++;
371 up->port.x_char = 0;
372 return;
373 }
374 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
375 serial_txx9_stop_tx(&up->port);
376 return;
377 }
378
379 count = TXX9_SIO_TX_FIFO;
380 do {
381 sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]);
382 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
383 up->port.icount.tx++;
384 if (uart_circ_empty(xmit))
385 break;
386 } while (--count > 0);
387
388 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
389 uart_write_wakeup(&up->port);
390
391 if (uart_circ_empty(xmit))
392 serial_txx9_stop_tx(&up->port);
393 }
394
395 static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id, struct pt_regs *regs)
396 {
397 int pass_counter = 0;
398 struct uart_txx9_port *up = dev_id;
399 unsigned int status;
400
401 while (1) {
402 spin_lock(&up->port.lock);
403 status = sio_in(up, TXX9_SIDISR);
404 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
405 status &= ~TXX9_SIDISR_TDIS;
406 if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
407 TXX9_SIDISR_TOUT))) {
408 spin_unlock(&up->port.lock);
409 break;
410 }
411
412 if (status & TXX9_SIDISR_RDIS)
413 receive_chars(up, &status, regs);
414 if (status & TXX9_SIDISR_TDIS)
415 transmit_chars(up);
416 /* Clear TX/RX Int. Status */
417 sio_mask(up, TXX9_SIDISR,
418 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
419 TXX9_SIDISR_TOUT);
420 spin_unlock(&up->port.lock);
421
422 if (pass_counter++ > PASS_LIMIT)
423 break;
424 }
425
426 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
427 }
428
429 static unsigned int serial_txx9_tx_empty(struct uart_port *port)
430 {
431 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
432 unsigned long flags;
433 unsigned int ret;
434
435 spin_lock_irqsave(&up->port.lock, flags);
436 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
437 spin_unlock_irqrestore(&up->port.lock, flags);
438
439 return ret;
440 }
441
442 static unsigned int serial_txx9_get_mctrl(struct uart_port *port)
443 {
444 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
445 unsigned int ret;
446
447 ret = ((sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS)
448 | ((sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS);
449
450 return ret;
451 }
452
453 static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl)
454 {
455 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
456
457 if (mctrl & TIOCM_RTS)
458 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
459 else
460 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
461 }
462
463 static void serial_txx9_break_ctl(struct uart_port *port, int break_state)
464 {
465 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
466 unsigned long flags;
467
468 spin_lock_irqsave(&up->port.lock, flags);
469 if (break_state == -1)
470 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
471 else
472 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
473 spin_unlock_irqrestore(&up->port.lock, flags);
474 }
475
476 static int serial_txx9_startup(struct uart_port *port)
477 {
478 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
479 unsigned long flags;
480 int retval;
481
482 /*
483 * Clear the FIFO buffers and disable them.
484 * (they will be reenabled in set_termios())
485 */
486 sio_set(up, TXX9_SIFCR,
487 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
488 /* clear reset */
489 sio_mask(up, TXX9_SIFCR,
490 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
491 sio_out(up, TXX9_SIDICR, 0);
492
493 /*
494 * Clear the interrupt registers.
495 */
496 sio_out(up, TXX9_SIDISR, 0);
497
498 retval = request_irq(up->port.irq, serial_txx9_interrupt,
499 SA_SHIRQ, "serial_txx9", up);
500 if (retval)
501 return retval;
502
503 /*
504 * Now, initialize the UART
505 */
506 spin_lock_irqsave(&up->port.lock, flags);
507 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
508 spin_unlock_irqrestore(&up->port.lock, flags);
509
510 /* Enable RX/TX */
511 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
512
513 /*
514 * Finally, enable interrupts.
515 */
516 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
517
518 return 0;
519 }
520
521 static void serial_txx9_shutdown(struct uart_port *port)
522 {
523 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
524 unsigned long flags;
525
526 /*
527 * Disable interrupts from this port
528 */
529 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
530
531 spin_lock_irqsave(&up->port.lock, flags);
532 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
533 spin_unlock_irqrestore(&up->port.lock, flags);
534
535 /*
536 * Disable break condition
537 */
538 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
539
540 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
541 if (up->port.cons && up->port.line == up->port.cons->index) {
542 free_irq(up->port.irq, up);
543 return;
544 }
545 #endif
546 /* reset FIFOs */
547 sio_set(up, TXX9_SIFCR,
548 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
549 /* clear reset */
550 sio_mask(up, TXX9_SIFCR,
551 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
552
553 /* Disable RX/TX */
554 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
555
556 free_irq(up->port.irq, up);
557 }
558
559 static void
560 serial_txx9_set_termios(struct uart_port *port, struct termios *termios,
561 struct termios *old)
562 {
563 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
564 unsigned int cval, fcr = 0;
565 unsigned long flags;
566 unsigned int baud, quot;
567
568 cval = sio_in(up, TXX9_SILCR);
569 /* byte size and parity */
570 cval &= ~TXX9_SILCR_UMODE_MASK;
571 switch (termios->c_cflag & CSIZE) {
572 case CS7:
573 cval |= TXX9_SILCR_UMODE_7BIT;
574 break;
575 default:
576 case CS5: /* not supported */
577 case CS6: /* not supported */
578 case CS8:
579 cval |= TXX9_SILCR_UMODE_8BIT;
580 break;
581 }
582
583 cval &= ~TXX9_SILCR_USBL_MASK;
584 if (termios->c_cflag & CSTOPB)
585 cval |= TXX9_SILCR_USBL_2BIT;
586 else
587 cval |= TXX9_SILCR_USBL_1BIT;
588 cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
589 if (termios->c_cflag & PARENB)
590 cval |= TXX9_SILCR_UPEN;
591 if (!(termios->c_cflag & PARODD))
592 cval |= TXX9_SILCR_UEPS;
593
594 /*
595 * Ask the core to calculate the divisor for us.
596 */
597 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2);
598 quot = uart_get_divisor(port, baud);
599
600 /* Set up FIFOs */
601 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
602 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
603
604 /*
605 * Ok, we're now changing the port state. Do it with
606 * interrupts disabled.
607 */
608 spin_lock_irqsave(&up->port.lock, flags);
609
610 /*
611 * Update the per-port timeout.
612 */
613 uart_update_timeout(port, termios->c_cflag, baud);
614
615 up->port.read_status_mask = TXX9_SIDISR_UOER |
616 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
617 if (termios->c_iflag & INPCK)
618 up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
619 if (termios->c_iflag & (BRKINT | PARMRK))
620 up->port.read_status_mask |= TXX9_SIDISR_UBRK;
621
622 /*
623 * Characteres to ignore
624 */
625 up->port.ignore_status_mask = 0;
626 if (termios->c_iflag & IGNPAR)
627 up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
628 if (termios->c_iflag & IGNBRK) {
629 up->port.ignore_status_mask |= TXX9_SIDISR_UBRK;
630 /*
631 * If we're ignoring parity and break indicators,
632 * ignore overruns too (for real raw support).
633 */
634 if (termios->c_iflag & IGNPAR)
635 up->port.ignore_status_mask |= TXX9_SIDISR_UOER;
636 }
637
638 /*
639 * ignore all characters if CREAD is not set
640 */
641 if ((termios->c_cflag & CREAD) == 0)
642 up->port.ignore_status_mask |= TXX9_SIDISR_RDIS;
643
644 /* CTS flow control flag */
645 if ((termios->c_cflag & CRTSCTS) &&
646 (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) {
647 sio_set(up, TXX9_SIFLCR,
648 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
649 } else {
650 sio_mask(up, TXX9_SIFLCR,
651 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
652 }
653
654 sio_out(up, TXX9_SILCR, cval);
655 sio_quot_set(up, quot);
656 sio_out(up, TXX9_SIFCR, fcr);
657
658 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
659 spin_unlock_irqrestore(&up->port.lock, flags);
660 }
661
662 static void
663 serial_txx9_pm(struct uart_port *port, unsigned int state,
664 unsigned int oldstate)
665 {
666 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
667 if (up->pm)
668 up->pm(port, state, oldstate);
669 }
670
671 static int serial_txx9_request_resource(struct uart_txx9_port *up)
672 {
673 unsigned int size = TXX9_REGION_SIZE;
674 int ret = 0;
675
676 switch (up->port.iotype) {
677 default:
678 if (!up->port.mapbase)
679 break;
680
681 if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) {
682 ret = -EBUSY;
683 break;
684 }
685
686 if (up->port.flags & UPF_IOREMAP) {
687 up->port.membase = ioremap(up->port.mapbase, size);
688 if (!up->port.membase) {
689 release_mem_region(up->port.mapbase, size);
690 ret = -ENOMEM;
691 }
692 }
693 break;
694
695 case UPIO_PORT:
696 if (!request_region(up->port.iobase, size, "serial_txx9"))
697 ret = -EBUSY;
698 break;
699 }
700 return ret;
701 }
702
703 static void serial_txx9_release_resource(struct uart_txx9_port *up)
704 {
705 unsigned int size = TXX9_REGION_SIZE;
706
707 switch (up->port.iotype) {
708 default:
709 if (!up->port.mapbase)
710 break;
711
712 if (up->port.flags & UPF_IOREMAP) {
713 iounmap(up->port.membase);
714 up->port.membase = NULL;
715 }
716
717 release_mem_region(up->port.mapbase, size);
718 break;
719
720 case UPIO_PORT:
721 release_region(up->port.iobase, size);
722 break;
723 }
724 }
725
726 static void serial_txx9_release_port(struct uart_port *port)
727 {
728 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
729 serial_txx9_release_resource(up);
730 }
731
732 static int serial_txx9_request_port(struct uart_port *port)
733 {
734 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
735 return serial_txx9_request_resource(up);
736 }
737
738 static void serial_txx9_config_port(struct uart_port *port, int uflags)
739 {
740 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
741 unsigned long flags;
742 int ret;
743
744 /*
745 * Find the region that we can probe for. This in turn
746 * tells us whether we can probe for the type of port.
747 */
748 ret = serial_txx9_request_resource(up);
749 if (ret < 0)
750 return;
751 port->type = PORT_TXX9;
752 up->port.fifosize = TXX9_SIO_TX_FIFO;
753
754 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
755 if (up->port.line == up->port.cons->index)
756 return;
757 #endif
758 spin_lock_irqsave(&up->port.lock, flags);
759 /*
760 * Reset the UART.
761 */
762 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
763 #ifdef CONFIG_CPU_TX49XX
764 /* TX4925 BUG WORKAROUND. Accessing SIOC register
765 * immediately after soft reset causes bus error. */
766 iob();
767 udelay(1);
768 #endif
769 while (sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST)
770 ;
771 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
772 sio_set(up, TXX9_SIFCR,
773 TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
774 /* initial settings */
775 sio_out(up, TXX9_SILCR,
776 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
777 ((up->port.flags & UPF_TXX9_USE_SCLK) ?
778 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
779 sio_quot_set(up, uart_get_divisor(port, 9600));
780 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
781 spin_unlock_irqrestore(&up->port.lock, flags);
782 }
783
784 static int
785 serial_txx9_verify_port(struct uart_port *port, struct serial_struct *ser)
786 {
787 unsigned long new_port = ser->port;
788 if (HIGH_BITS_OFFSET)
789 new_port += (unsigned long)ser->port_high << HIGH_BITS_OFFSET;
790 if (ser->type != port->type ||
791 ser->irq != port->irq ||
792 ser->io_type != port->iotype ||
793 new_port != port->iobase ||
794 (unsigned long)ser->iomem_base != port->mapbase)
795 return -EINVAL;
796 return 0;
797 }
798
799 static const char *
800 serial_txx9_type(struct uart_port *port)
801 {
802 return "txx9";
803 }
804
805 static struct uart_ops serial_txx9_pops = {
806 .tx_empty = serial_txx9_tx_empty,
807 .set_mctrl = serial_txx9_set_mctrl,
808 .get_mctrl = serial_txx9_get_mctrl,
809 .stop_tx = serial_txx9_stop_tx,
810 .start_tx = serial_txx9_start_tx,
811 .stop_rx = serial_txx9_stop_rx,
812 .enable_ms = serial_txx9_enable_ms,
813 .break_ctl = serial_txx9_break_ctl,
814 .startup = serial_txx9_startup,
815 .shutdown = serial_txx9_shutdown,
816 .set_termios = serial_txx9_set_termios,
817 .pm = serial_txx9_pm,
818 .type = serial_txx9_type,
819 .release_port = serial_txx9_release_port,
820 .request_port = serial_txx9_request_port,
821 .config_port = serial_txx9_config_port,
822 .verify_port = serial_txx9_verify_port,
823 };
824
825 static struct uart_txx9_port serial_txx9_ports[UART_NR];
826
827 static void __init serial_txx9_register_ports(struct uart_driver *drv)
828 {
829 int i;
830
831 for (i = 0; i < UART_NR; i++) {
832 struct uart_txx9_port *up = &serial_txx9_ports[i];
833
834 up->port.line = i;
835 up->port.ops = &serial_txx9_pops;
836 if (up->port.iobase || up->port.mapbase)
837 uart_add_one_port(drv, &up->port);
838 }
839 }
840
841 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
842
843 /*
844 * Wait for transmitter & holding register to empty
845 */
846 static inline void wait_for_xmitr(struct uart_txx9_port *up)
847 {
848 unsigned int tmout = 10000;
849
850 /* Wait up to 10ms for the character(s) to be sent. */
851 while (--tmout &&
852 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
853 udelay(1);
854
855 /* Wait up to 1s for flow control if necessary */
856 if (up->port.flags & UPF_CONS_FLOW) {
857 tmout = 1000000;
858 while (--tmout &&
859 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
860 udelay(1);
861 }
862 }
863
864 static void serial_txx9_console_putchar(struct uart_port *port, int ch)
865 {
866 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
867
868 wait_for_xmitr(up);
869 sio_out(up, TXX9_SITFIFO, ch);
870 }
871
872 /*
873 * Print a string to the serial port trying not to disturb
874 * any possible real use of the port...
875 *
876 * The console_lock must be held when we get here.
877 */
878 static void
879 serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
880 {
881 struct uart_txx9_port *up = &serial_txx9_ports[co->index];
882 unsigned int ier, flcr;
883
884 /*
885 * First save the UER then disable the interrupts
886 */
887 ier = sio_in(up, TXX9_SIDICR);
888 sio_out(up, TXX9_SIDICR, 0);
889 /*
890 * Disable flow-control if enabled (and unnecessary)
891 */
892 flcr = sio_in(up, TXX9_SIFLCR);
893 if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
894 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
895
896 uart_console_write(&up->port, s, count, serial_txx9_console_putchar);
897
898 /*
899 * Finally, wait for transmitter to become empty
900 * and restore the IER
901 */
902 wait_for_xmitr(up);
903 sio_out(up, TXX9_SIFLCR, flcr);
904 sio_out(up, TXX9_SIDICR, ier);
905 }
906
907 static int serial_txx9_console_setup(struct console *co, char *options)
908 {
909 struct uart_port *port;
910 struct uart_txx9_port *up;
911 int baud = 9600;
912 int bits = 8;
913 int parity = 'n';
914 int flow = 'n';
915
916 /*
917 * Check whether an invalid uart number has been specified, and
918 * if so, search for the first available port that does have
919 * console support.
920 */
921 if (co->index >= UART_NR)
922 co->index = 0;
923 up = &serial_txx9_ports[co->index];
924 port = &up->port;
925 if (!port->ops)
926 return -ENODEV;
927
928 /*
929 * Disable UART interrupts, set DTR and RTS high
930 * and set speed.
931 */
932 sio_out(up, TXX9_SIDICR, 0);
933 /* initial settings */
934 sio_out(up, TXX9_SILCR,
935 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
936 ((port->flags & UPF_TXX9_USE_SCLK) ?
937 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
938 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
939
940 if (options)
941 uart_parse_options(options, &baud, &parity, &bits, &flow);
942
943 return uart_set_options(port, co, baud, parity, bits, flow);
944 }
945
946 static struct uart_driver serial_txx9_reg;
947 static struct console serial_txx9_console = {
948 .name = TXX9_TTY_NAME,
949 .write = serial_txx9_console_write,
950 .device = uart_console_device,
951 .setup = serial_txx9_console_setup,
952 .flags = CON_PRINTBUFFER,
953 .index = -1,
954 .data = &serial_txx9_reg,
955 };
956
957 static int __init serial_txx9_console_init(void)
958 {
959 register_console(&serial_txx9_console);
960 return 0;
961 }
962 console_initcall(serial_txx9_console_init);
963
964 #define SERIAL_TXX9_CONSOLE &serial_txx9_console
965 #else
966 #define SERIAL_TXX9_CONSOLE NULL
967 #endif
968
969 static struct uart_driver serial_txx9_reg = {
970 .owner = THIS_MODULE,
971 .driver_name = "serial_txx9",
972 .dev_name = TXX9_TTY_NAME,
973 .major = TXX9_TTY_MAJOR,
974 .minor = TXX9_TTY_MINOR_START,
975 .nr = UART_NR,
976 .cons = SERIAL_TXX9_CONSOLE,
977 };
978
979 int __init early_serial_txx9_setup(struct uart_port *port)
980 {
981 if (port->line >= ARRAY_SIZE(serial_txx9_ports))
982 return -ENODEV;
983
984 serial_txx9_ports[port->line].port = *port;
985 serial_txx9_ports[port->line].port.ops = &serial_txx9_pops;
986 serial_txx9_ports[port->line].port.flags |= UPF_BOOT_AUTOCONF;
987 return 0;
988 }
989
990 #ifdef ENABLE_SERIAL_TXX9_PCI
991 /**
992 * serial_txx9_suspend_port - suspend one serial port
993 * @line: serial line number
994 * @level: the level of port suspension, as per uart_suspend_port
995 *
996 * Suspend one serial port.
997 */
998 static void serial_txx9_suspend_port(int line)
999 {
1000 uart_suspend_port(&serial_txx9_reg, &serial_txx9_ports[line].port);
1001 }
1002
1003 /**
1004 * serial_txx9_resume_port - resume one serial port
1005 * @line: serial line number
1006 * @level: the level of port resumption, as per uart_resume_port
1007 *
1008 * Resume one serial port.
1009 */
1010 static void serial_txx9_resume_port(int line)
1011 {
1012 uart_resume_port(&serial_txx9_reg, &serial_txx9_ports[line].port);
1013 }
1014
1015 static DEFINE_MUTEX(serial_txx9_mutex);
1016
1017 /**
1018 * serial_txx9_register_port - register a serial port
1019 * @port: serial port template
1020 *
1021 * Configure the serial port specified by the request.
1022 *
1023 * The port is then probed and if necessary the IRQ is autodetected
1024 * If this fails an error is returned.
1025 *
1026 * On success the port is ready to use and the line number is returned.
1027 */
1028 static int __devinit serial_txx9_register_port(struct uart_port *port)
1029 {
1030 int i;
1031 struct uart_txx9_port *uart;
1032 int ret = -ENOSPC;
1033
1034 mutex_lock(&serial_txx9_mutex);
1035 for (i = 0; i < UART_NR; i++) {
1036 uart = &serial_txx9_ports[i];
1037 if (!(uart->port.iobase || uart->port.mapbase))
1038 break;
1039 }
1040 if (i < UART_NR) {
1041 uart->port.iobase = port->iobase;
1042 uart->port.membase = port->membase;
1043 uart->port.irq = port->irq;
1044 uart->port.uartclk = port->uartclk;
1045 uart->port.iotype = port->iotype;
1046 uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;
1047 uart->port.mapbase = port->mapbase;
1048 if (port->dev)
1049 uart->port.dev = port->dev;
1050 ret = uart_add_one_port(&serial_txx9_reg, &uart->port);
1051 if (ret == 0)
1052 ret = uart->port.line;
1053 }
1054 mutex_unlock(&serial_txx9_mutex);
1055 return ret;
1056 }
1057
1058 /**
1059 * serial_txx9_unregister_port - remove a txx9 serial port at runtime
1060 * @line: serial line number
1061 *
1062 * Remove one serial port. This may not be called from interrupt
1063 * context. We hand the port back to the our control.
1064 */
1065 static void __devexit serial_txx9_unregister_port(int line)
1066 {
1067 struct uart_txx9_port *uart = &serial_txx9_ports[line];
1068
1069 mutex_lock(&serial_txx9_mutex);
1070 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1071 uart->port.flags = 0;
1072 uart->port.type = PORT_UNKNOWN;
1073 uart->port.iobase = 0;
1074 uart->port.mapbase = 0;
1075 uart->port.membase = NULL;
1076 uart->port.dev = NULL;
1077 mutex_unlock(&serial_txx9_mutex);
1078 }
1079
1080 /*
1081 * Probe one serial board. Unfortunately, there is no rhyme nor reason
1082 * to the arrangement of serial ports on a PCI card.
1083 */
1084 static int __devinit
1085 pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
1086 {
1087 struct uart_port port;
1088 int line;
1089 int rc;
1090
1091 rc = pci_enable_device(dev);
1092 if (rc)
1093 return rc;
1094
1095 memset(&port, 0, sizeof(port));
1096 port.ops = &serial_txx9_pops;
1097 port.flags |= UPF_TXX9_HAVE_CTS_LINE;
1098 port.uartclk = 66670000;
1099 port.irq = dev->irq;
1100 port.iotype = UPIO_PORT;
1101 port.iobase = pci_resource_start(dev, 1);
1102 port.dev = &dev->dev;
1103 line = serial_txx9_register_port(&port);
1104 if (line < 0) {
1105 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
1106 }
1107 pci_set_drvdata(dev, (void *)(long)line);
1108
1109 return 0;
1110 }
1111
1112 static void __devexit pciserial_txx9_remove_one(struct pci_dev *dev)
1113 {
1114 int line = (int)(long)pci_get_drvdata(dev);
1115
1116 pci_set_drvdata(dev, NULL);
1117
1118 if (line) {
1119 serial_txx9_unregister_port(line);
1120 pci_disable_device(dev);
1121 }
1122 }
1123
1124 static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
1125 {
1126 int line = (int)(long)pci_get_drvdata(dev);
1127
1128 if (line)
1129 serial_txx9_suspend_port(line);
1130 pci_save_state(dev);
1131 pci_set_power_state(dev, pci_choose_state(dev, state));
1132 return 0;
1133 }
1134
1135 static int pciserial_txx9_resume_one(struct pci_dev *dev)
1136 {
1137 int line = (int)(long)pci_get_drvdata(dev);
1138
1139 pci_set_power_state(dev, PCI_D0);
1140 pci_restore_state(dev);
1141
1142 if (line) {
1143 pci_enable_device(dev);
1144 serial_txx9_resume_port(line);
1145 }
1146 return 0;
1147 }
1148
1149 static struct pci_device_id serial_txx9_pci_tbl[] = {
1150 { PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC,
1151 PCI_ANY_ID, PCI_ANY_ID,
1152 0, 0, 0 },
1153 { 0, }
1154 };
1155
1156 static struct pci_driver serial_txx9_pci_driver = {
1157 .name = "serial_txx9",
1158 .probe = pciserial_txx9_init_one,
1159 .remove = __devexit_p(pciserial_txx9_remove_one),
1160 .suspend = pciserial_txx9_suspend_one,
1161 .resume = pciserial_txx9_resume_one,
1162 .id_table = serial_txx9_pci_tbl,
1163 };
1164
1165 MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
1166 #endif /* ENABLE_SERIAL_TXX9_PCI */
1167
1168 static int __init serial_txx9_init(void)
1169 {
1170 int ret;
1171
1172 printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
1173
1174 ret = uart_register_driver(&serial_txx9_reg);
1175 if (ret >= 0) {
1176 serial_txx9_register_ports(&serial_txx9_reg);
1177
1178 #ifdef ENABLE_SERIAL_TXX9_PCI
1179 ret = pci_register_driver(&serial_txx9_pci_driver);
1180 #endif
1181 }
1182 return ret;
1183 }
1184
1185 static void __exit serial_txx9_exit(void)
1186 {
1187 int i;
1188
1189 #ifdef ENABLE_SERIAL_TXX9_PCI
1190 pci_unregister_driver(&serial_txx9_pci_driver);
1191 #endif
1192 for (i = 0; i < UART_NR; i++) {
1193 struct uart_txx9_port *up = &serial_txx9_ports[i];
1194 if (up->port.iobase || up->port.mapbase)
1195 uart_remove_one_port(&serial_txx9_reg, &up->port);
1196 }
1197
1198 uart_unregister_driver(&serial_txx9_reg);
1199 }
1200
1201 module_init(serial_txx9_init);
1202 module_exit(serial_txx9_exit);
1203
1204 MODULE_LICENSE("GPL");
1205 MODULE_DESCRIPTION("TX39/49 serial driver");
1206
1207 MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);
Support for the Chinese Samsung S3C2440 based development boards