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Documentation/IPMI typos
[linux-2.6/mini2440.git] / drivers / serial / imx.c
blobda85bafa09423fab636cc784d3dd1c98eb5de9e9
1 /*
2 * linux/drivers/serial/imx.c
3 *
4 * Driver for Motorola IMX serial ports
5 *
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 *
8 * Author: Sascha Hauer <sascha@saschahauer.de>
9 * Copyright (C) 2004 Pengutronix
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 * [29-Mar-2005] Mike Lee
26 * Added hardware handshake
27 */
28 #include <linux/config.h>
29
30 #if defined(CONFIG_SERIAL_IMX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
31 #define SUPPORT_SYSRQ
32 #endif
33
34 #include <linux/module.h>
35 #include <linux/ioport.h>
36 #include <linux/init.h>
37 #include <linux/console.h>
38 #include <linux/sysrq.h>
39 #include <linux/platform_device.h>
40 #include <linux/tty.h>
41 #include <linux/tty_flip.h>
42 #include <linux/serial_core.h>
43 #include <linux/serial.h>
44
45 #include <asm/io.h>
46 #include <asm/irq.h>
47 #include <asm/hardware.h>
48 #include <asm/arch/imx-uart.h>
49
50 /* We've been assigned a range on the "Low-density serial ports" major */
51 #define SERIAL_IMX_MAJOR 204
52 #define MINOR_START 41
53
54 #define NR_PORTS 2
55
56 #define IMX_ISR_PASS_LIMIT 256
57
58 /*
59 * This is the size of our serial port register set.
60 */
61 #define UART_PORT_SIZE 0x100
62
63 /*
64 * This determines how often we check the modem status signals
65 * for any change. They generally aren't connected to an IRQ
66 * so we have to poll them. We also check immediately before
67 * filling the TX fifo incase CTS has been dropped.
68 */
69 #define MCTRL_TIMEOUT (250*HZ/1000)
70
71 #define DRIVER_NAME "IMX-uart"
72
73 struct imx_port {
74 struct uart_port port;
75 struct timer_list timer;
76 unsigned int old_status;
77 int txirq,rxirq,rtsirq;
78 int have_rtscts:1;
79 };
80
81 /*
82 * Handle any change of modem status signal since we were last called.
83 */
84 static void imx_mctrl_check(struct imx_port *sport)
85 {
86 unsigned int status, changed;
87
88 status = sport->port.ops->get_mctrl(&sport->port);
89 changed = status ^ sport->old_status;
90
91 if (changed == 0)
92 return;
93
94 sport->old_status = status;
95
96 if (changed & TIOCM_RI)
97 sport->port.icount.rng++;
98 if (changed & TIOCM_DSR)
99 sport->port.icount.dsr++;
100 if (changed & TIOCM_CAR)
101 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
102 if (changed & TIOCM_CTS)
103 uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
104
105 wake_up_interruptible(&sport->port.info->delta_msr_wait);
106 }
107
108 /*
109 * This is our per-port timeout handler, for checking the
110 * modem status signals.
111 */
112 static void imx_timeout(unsigned long data)
113 {
114 struct imx_port *sport = (struct imx_port *)data;
115 unsigned long flags;
116
117 if (sport->port.info) {
118 spin_lock_irqsave(&sport->port.lock, flags);
119 imx_mctrl_check(sport);
120 spin_unlock_irqrestore(&sport->port.lock, flags);
121
122 mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
123 }
124 }
125
126 /*
127 * interrupts disabled on entry
128 */
129 static void imx_stop_tx(struct uart_port *port)
130 {
131 struct imx_port *sport = (struct imx_port *)port;
132 UCR1((u32)sport->port.membase) &= ~UCR1_TXMPTYEN;
133 }
134
135 /*
136 * interrupts disabled on entry
137 */
138 static void imx_stop_rx(struct uart_port *port)
139 {
140 struct imx_port *sport = (struct imx_port *)port;
141 UCR2((u32)sport->port.membase) &= ~UCR2_RXEN;
142 }
143
144 /*
145 * Set the modem control timer to fire immediately.
146 */
147 static void imx_enable_ms(struct uart_port *port)
148 {
149 struct imx_port *sport = (struct imx_port *)port;
150
151 mod_timer(&sport->timer, jiffies);
152 }
153
154 static inline void imx_transmit_buffer(struct imx_port *sport)
155 {
156 struct circ_buf *xmit = &sport->port.info->xmit;
157
158 do {
159 /* send xmit->buf[xmit->tail]
160 * out the port here */
161 URTX0((u32)sport->port.membase) = xmit->buf[xmit->tail];
162 xmit->tail = (xmit->tail + 1) &
163 (UART_XMIT_SIZE - 1);
164 sport->port.icount.tx++;
165 if (uart_circ_empty(xmit))
166 break;
167 } while (!(UTS((u32)sport->port.membase) & UTS_TXFULL));
168
169 if (uart_circ_empty(xmit))
170 imx_stop_tx(&sport->port);
171 }
172
173 /*
174 * interrupts disabled on entry
175 */
176 static void imx_start_tx(struct uart_port *port)
177 {
178 struct imx_port *sport = (struct imx_port *)port;
179
180 UCR1((u32)sport->port.membase) |= UCR1_TXMPTYEN;
181
182 if(UTS((u32)sport->port.membase) & UTS_TXEMPTY)
183 imx_transmit_buffer(sport);
184 }
185
186 static irqreturn_t imx_rtsint(int irq, void *dev_id, struct pt_regs *regs)
187 {
188 struct imx_port *sport = (struct imx_port *)dev_id;
189 unsigned int val = USR1((u32)sport->port.membase)&USR1_RTSS;
190 unsigned long flags;
191
192 spin_lock_irqsave(&sport->port.lock, flags);
193
194 USR1((u32)sport->port.membase) = USR1_RTSD;
195 uart_handle_cts_change(&sport->port, !!val);
196 wake_up_interruptible(&sport->port.info->delta_msr_wait);
197
198 spin_unlock_irqrestore(&sport->port.lock, flags);
199 return IRQ_HANDLED;
200 }
201
202 static irqreturn_t imx_txint(int irq, void *dev_id, struct pt_regs *regs)
203 {
204 struct imx_port *sport = (struct imx_port *)dev_id;
205 struct circ_buf *xmit = &sport->port.info->xmit;
206 unsigned long flags;
207
208 spin_lock_irqsave(&sport->port.lock,flags);
209 if (sport->port.x_char)
210 {
211 /* Send next char */
212 URTX0((u32)sport->port.membase) = sport->port.x_char;
213 goto out;
214 }
215
216 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
217 imx_stop_tx(&sport->port);
218 goto out;
219 }
220
221 imx_transmit_buffer(sport);
222
223 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
224 uart_write_wakeup(&sport->port);
225
226 out:
227 spin_unlock_irqrestore(&sport->port.lock,flags);
228 return IRQ_HANDLED;
229 }
230
231 static irqreturn_t imx_rxint(int irq, void *dev_id, struct pt_regs *regs)
232 {
233 struct imx_port *sport = dev_id;
234 unsigned int rx,flg,ignored = 0;
235 struct tty_struct *tty = sport->port.info->tty;
236 unsigned long flags;
237
238 rx = URXD0((u32)sport->port.membase);
239 spin_lock_irqsave(&sport->port.lock,flags);
240
241 do {
242 flg = TTY_NORMAL;
243 sport->port.icount.rx++;
244
245 if( USR2((u32)sport->port.membase) & USR2_BRCD ) {
246 USR2((u32)sport->port.membase) |= USR2_BRCD;
247 if(uart_handle_break(&sport->port))
248 goto ignore_char;
249 }
250
251 if (uart_handle_sysrq_char
252 (&sport->port, (unsigned char)rx, regs))
253 goto ignore_char;
254
255 if( rx & (URXD_PRERR | URXD_OVRRUN | URXD_FRMERR) )
256 goto handle_error;
257
258 error_return:
259 tty_insert_flip_char(tty, rx, flg);
260
261 ignore_char:
262 rx = URXD0((u32)sport->port.membase);
263 } while(rx & URXD_CHARRDY);
264
265 out:
266 spin_unlock_irqrestore(&sport->port.lock,flags);
267 tty_flip_buffer_push(tty);
268 return IRQ_HANDLED;
269
270 handle_error:
271 if (rx & URXD_PRERR)
272 sport->port.icount.parity++;
273 else if (rx & URXD_FRMERR)
274 sport->port.icount.frame++;
275 if (rx & URXD_OVRRUN)
276 sport->port.icount.overrun++;
277
278 if (rx & sport->port.ignore_status_mask) {
279 if (++ignored > 100)
280 goto out;
281 goto ignore_char;
282 }
283
284 rx &= sport->port.read_status_mask;
285
286 if (rx & URXD_PRERR)
287 flg = TTY_PARITY;
288 else if (rx & URXD_FRMERR)
289 flg = TTY_FRAME;
290 if (rx & URXD_OVRRUN)
291 flg = TTY_OVERRUN;
292
293 #ifdef SUPPORT_SYSRQ
294 sport->port.sysrq = 0;
295 #endif
296 goto error_return;
297 }
298
299 /*
300 * Return TIOCSER_TEMT when transmitter is not busy.
301 */
302 static unsigned int imx_tx_empty(struct uart_port *port)
303 {
304 struct imx_port *sport = (struct imx_port *)port;
305
306 return USR2((u32)sport->port.membase) & USR2_TXDC ? TIOCSER_TEMT : 0;
307 }
308
309 /*
310 * We have a modem side uart, so the meanings of RTS and CTS are inverted.
311 */
312 static unsigned int imx_get_mctrl(struct uart_port *port)
313 {
314 struct imx_port *sport = (struct imx_port *)port;
315 unsigned int tmp = TIOCM_DSR | TIOCM_CAR;
316
317 if (USR1((u32)sport->port.membase) & USR1_RTSS)
318 tmp |= TIOCM_CTS;
319
320 if (UCR2((u32)sport->port.membase) & UCR2_CTS)
321 tmp |= TIOCM_RTS;
322
323 return tmp;
324 }
325
326 static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl)
327 {
328 struct imx_port *sport = (struct imx_port *)port;
329
330 if (mctrl & TIOCM_RTS)
331 UCR2((u32)sport->port.membase) |= UCR2_CTS;
332 else
333 UCR2((u32)sport->port.membase) &= ~UCR2_CTS;
334 }
335
336 /*
337 * Interrupts always disabled.
338 */
339 static void imx_break_ctl(struct uart_port *port, int break_state)
340 {
341 struct imx_port *sport = (struct imx_port *)port;
342 unsigned long flags;
343
344 spin_lock_irqsave(&sport->port.lock, flags);
345
346 if ( break_state != 0 )
347 UCR1((u32)sport->port.membase) |= UCR1_SNDBRK;
348 else
349 UCR1((u32)sport->port.membase) &= ~UCR1_SNDBRK;
350
351 spin_unlock_irqrestore(&sport->port.lock, flags);
352 }
353
354 #define TXTL 2 /* reset default */
355 #define RXTL 1 /* reset default */
356
357 static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode)
358 {
359 unsigned int val;
360 unsigned int ufcr_rfdiv;
361
362 /* set receiver / transmitter trigger level.
363 * RFDIV is set such way to satisfy requested uartclk value
364 */
365 val = TXTL<<10 | RXTL;
366 ufcr_rfdiv = (imx_get_perclk1() + sport->port.uartclk / 2) / sport->port.uartclk;
367
368 if(!ufcr_rfdiv)
369 ufcr_rfdiv = 1;
370
371 if(ufcr_rfdiv >= 7)
372 ufcr_rfdiv = 6;
373 else
374 ufcr_rfdiv = 6 - ufcr_rfdiv;
375
376 val |= UFCR_RFDIV & (ufcr_rfdiv << 7);
377
378 UFCR((u32)sport->port.membase) = val;
379
380 return 0;
381 }
382
383 static int imx_startup(struct uart_port *port)
384 {
385 struct imx_port *sport = (struct imx_port *)port;
386 int retval;
387 unsigned long flags;
388
389 imx_setup_ufcr(sport, 0);
390
391 /* disable the DREN bit (Data Ready interrupt enable) before
392 * requesting IRQs
393 */
394 UCR4((u32)sport->port.membase) &= ~UCR4_DREN;
395
396 /*
397 * Allocate the IRQ
398 */
399 retval = request_irq(sport->rxirq, imx_rxint, 0,
400 DRIVER_NAME, sport);
401 if (retval) goto error_out1;
402
403 retval = request_irq(sport->txirq, imx_txint, 0,
404 DRIVER_NAME, sport);
405 if (retval) goto error_out2;
406
407 retval = request_irq(sport->rtsirq, imx_rtsint,
408 SA_TRIGGER_FALLING | SA_TRIGGER_RISING,
409 DRIVER_NAME, sport);
410 if (retval) goto error_out3;
411
412 /*
413 * Finally, clear and enable interrupts
414 */
415
416 USR1((u32)sport->port.membase) = USR1_RTSD;
417 UCR1((u32)sport->port.membase) |=
418 (UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN);
419
420 UCR2((u32)sport->port.membase) |= (UCR2_RXEN | UCR2_TXEN);
421 /*
422 * Enable modem status interrupts
423 */
424 spin_lock_irqsave(&sport->port.lock,flags);
425 imx_enable_ms(&sport->port);
426 spin_unlock_irqrestore(&sport->port.lock,flags);
427
428 return 0;
429
430 error_out3:
431 free_irq(sport->txirq, sport);
432 error_out2:
433 free_irq(sport->rxirq, sport);
434 error_out1:
435 return retval;
436 }
437
438 static void imx_shutdown(struct uart_port *port)
439 {
440 struct imx_port *sport = (struct imx_port *)port;
441
442 /*
443 * Stop our timer.
444 */
445 del_timer_sync(&sport->timer);
446
447 /*
448 * Free the interrupts
449 */
450 free_irq(sport->rtsirq, sport);
451 free_irq(sport->txirq, sport);
452 free_irq(sport->rxirq, sport);
453
454 /*
455 * Disable all interrupts, port and break condition.
456 */
457
458 UCR1((u32)sport->port.membase) &=
459 ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN);
460 }
461
462 static void
463 imx_set_termios(struct uart_port *port, struct termios *termios,
464 struct termios *old)
465 {
466 struct imx_port *sport = (struct imx_port *)port;
467 unsigned long flags;
468 unsigned int ucr2, old_ucr1, old_txrxen, baud, quot;
469 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
470
471 /*
472 * If we don't support modem control lines, don't allow
473 * these to be set.
474 */
475 if (0) {
476 termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);
477 termios->c_cflag |= CLOCAL;
478 }
479
480 /*
481 * We only support CS7 and CS8.
482 */
483 while ((termios->c_cflag & CSIZE) != CS7 &&
484 (termios->c_cflag & CSIZE) != CS8) {
485 termios->c_cflag &= ~CSIZE;
486 termios->c_cflag |= old_csize;
487 old_csize = CS8;
488 }
489
490 if ((termios->c_cflag & CSIZE) == CS8)
491 ucr2 = UCR2_WS | UCR2_SRST | UCR2_IRTS;
492 else
493 ucr2 = UCR2_SRST | UCR2_IRTS;
494
495 if (termios->c_cflag & CRTSCTS) {
496 if( sport->have_rtscts ) {
497 ucr2 &= ~UCR2_IRTS;
498 ucr2 |= UCR2_CTSC;
499 } else {
500 termios->c_cflag &= ~CRTSCTS;
501 }
502 }
503
504 if (termios->c_cflag & CSTOPB)
505 ucr2 |= UCR2_STPB;
506 if (termios->c_cflag & PARENB) {
507 ucr2 |= UCR2_PREN;
508 if (termios->c_cflag & PARODD)
509 ucr2 |= UCR2_PROE;
510 }
511
512 /*
513 * Ask the core to calculate the divisor for us.
514 */
515 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
516 quot = uart_get_divisor(port, baud);
517
518 spin_lock_irqsave(&sport->port.lock, flags);
519
520 sport->port.read_status_mask = 0;
521 if (termios->c_iflag & INPCK)
522 sport->port.read_status_mask |= (URXD_FRMERR | URXD_PRERR);
523 if (termios->c_iflag & (BRKINT | PARMRK))
524 sport->port.read_status_mask |= URXD_BRK;
525
526 /*
527 * Characters to ignore
528 */
529 sport->port.ignore_status_mask = 0;
530 if (termios->c_iflag & IGNPAR)
531 sport->port.ignore_status_mask |= URXD_PRERR;
532 if (termios->c_iflag & IGNBRK) {
533 sport->port.ignore_status_mask |= URXD_BRK;
534 /*
535 * If we're ignoring parity and break indicators,
536 * ignore overruns too (for real raw support).
537 */
538 if (termios->c_iflag & IGNPAR)
539 sport->port.ignore_status_mask |= URXD_OVRRUN;
540 }
541
542 del_timer_sync(&sport->timer);
543
544 /*
545 * Update the per-port timeout.
546 */
547 uart_update_timeout(port, termios->c_cflag, baud);
548
549 /*
550 * disable interrupts and drain transmitter
551 */
552 old_ucr1 = UCR1((u32)sport->port.membase);
553 UCR1((u32)sport->port.membase) &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN);
554
555 while ( !(USR2((u32)sport->port.membase) & USR2_TXDC))
556 barrier();
557
558 /* then, disable everything */
559 old_txrxen = UCR2((u32)sport->port.membase) & ( UCR2_TXEN | UCR2_RXEN );
560 UCR2((u32)sport->port.membase) &= ~( UCR2_TXEN | UCR2_RXEN);
561
562 /* set the parity, stop bits and data size */
563 UCR2((u32)sport->port.membase) = ucr2;
564
565 /* set the baud rate. We assume uartclk = 16 MHz
566 *
567 * baud * 16 UBIR - 1
568 * --------- = --------
569 * uartclk UBMR - 1
570 */
571 UBIR((u32)sport->port.membase) = (baud / 100) - 1;
572 UBMR((u32)sport->port.membase) = 10000 - 1;
573
574 UCR1((u32)sport->port.membase) = old_ucr1;
575 UCR2((u32)sport->port.membase) |= old_txrxen;
576
577 if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
578 imx_enable_ms(&sport->port);
579
580 spin_unlock_irqrestore(&sport->port.lock, flags);
581 }
582
583 static const char *imx_type(struct uart_port *port)
584 {
585 struct imx_port *sport = (struct imx_port *)port;
586
587 return sport->port.type == PORT_IMX ? "IMX" : NULL;
588 }
589
590 /*
591 * Release the memory region(s) being used by 'port'.
592 */
593 static void imx_release_port(struct uart_port *port)
594 {
595 struct imx_port *sport = (struct imx_port *)port;
596
597 release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
598 }
599
600 /*
601 * Request the memory region(s) being used by 'port'.
602 */
603 static int imx_request_port(struct uart_port *port)
604 {
605 struct imx_port *sport = (struct imx_port *)port;
606
607 return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
608 "imx-uart") != NULL ? 0 : -EBUSY;
609 }
610
611 /*
612 * Configure/autoconfigure the port.
613 */
614 static void imx_config_port(struct uart_port *port, int flags)
615 {
616 struct imx_port *sport = (struct imx_port *)port;
617
618 if (flags & UART_CONFIG_TYPE &&
619 imx_request_port(&sport->port) == 0)
620 sport->port.type = PORT_IMX;
621 }
622
623 /*
624 * Verify the new serial_struct (for TIOCSSERIAL).
625 * The only change we allow are to the flags and type, and
626 * even then only between PORT_IMX and PORT_UNKNOWN
627 */
628 static int
629 imx_verify_port(struct uart_port *port, struct serial_struct *ser)
630 {
631 struct imx_port *sport = (struct imx_port *)port;
632 int ret = 0;
633
634 if (ser->type != PORT_UNKNOWN && ser->type != PORT_IMX)
635 ret = -EINVAL;
636 if (sport->port.irq != ser->irq)
637 ret = -EINVAL;
638 if (ser->io_type != UPIO_MEM)
639 ret = -EINVAL;
640 if (sport->port.uartclk / 16 != ser->baud_base)
641 ret = -EINVAL;
642 if ((void *)sport->port.mapbase != ser->iomem_base)
643 ret = -EINVAL;
644 if (sport->port.iobase != ser->port)
645 ret = -EINVAL;
646 if (ser->hub6 != 0)
647 ret = -EINVAL;
648 return ret;
649 }
650
651 static struct uart_ops imx_pops = {
652 .tx_empty = imx_tx_empty,
653 .set_mctrl = imx_set_mctrl,
654 .get_mctrl = imx_get_mctrl,
655 .stop_tx = imx_stop_tx,
656 .start_tx = imx_start_tx,
657 .stop_rx = imx_stop_rx,
658 .enable_ms = imx_enable_ms,
659 .break_ctl = imx_break_ctl,
660 .startup = imx_startup,
661 .shutdown = imx_shutdown,
662 .set_termios = imx_set_termios,
663 .type = imx_type,
664 .release_port = imx_release_port,
665 .request_port = imx_request_port,
666 .config_port = imx_config_port,
667 .verify_port = imx_verify_port,
668 };
669
670 static struct imx_port imx_ports[] = {
671 {
672 .txirq = UART1_MINT_TX,
673 .rxirq = UART1_MINT_RX,
674 .rtsirq = UART1_MINT_RTS,
675 .port = {
676 .type = PORT_IMX,
677 .iotype = UPIO_MEM,
678 .membase = (void *)IMX_UART1_BASE,
679 .mapbase = IMX_UART1_BASE, /* FIXME */
680 .irq = UART1_MINT_RX,
681 .uartclk = 16000000,
682 .fifosize = 8,
683 .flags = UPF_BOOT_AUTOCONF,
684 .ops = &imx_pops,
685 .line = 0,
686 },
687 }, {
688 .txirq = UART2_MINT_TX,
689 .rxirq = UART2_MINT_RX,
690 .rtsirq = UART2_MINT_RTS,
691 .port = {
692 .type = PORT_IMX,
693 .iotype = UPIO_MEM,
694 .membase = (void *)IMX_UART2_BASE,
695 .mapbase = IMX_UART2_BASE, /* FIXME */
696 .irq = UART2_MINT_RX,
697 .uartclk = 16000000,
698 .fifosize = 8,
699 .flags = UPF_BOOT_AUTOCONF,
700 .ops = &imx_pops,
701 .line = 1,
702 },
703 }
704 };
705
706 /*
707 * Setup the IMX serial ports.
708 * Note also that we support "console=ttySMXx" where "x" is either 0 or 1.
709 * Which serial port this ends up being depends on the machine you're
710 * running this kernel on. I'm not convinced that this is a good idea,
711 * but that's the way it traditionally works.
712 *
713 */
714 static void __init imx_init_ports(void)
715 {
716 static int first = 1;
717 int i;
718
719 if (!first)
720 return;
721 first = 0;
722
723 for (i = 0; i < ARRAY_SIZE(imx_ports); i++) {
724 init_timer(&imx_ports[i].timer);
725 imx_ports[i].timer.function = imx_timeout;
726 imx_ports[i].timer.data = (unsigned long)&imx_ports[i];
727 }
728 }
729
730 #ifdef CONFIG_SERIAL_IMX_CONSOLE
731 static void imx_console_putchar(struct uart_port *port, int ch)
732 {
733 struct imx_port *sport = (struct imx_port *)port;
734 while ((UTS((u32)sport->port.membase) & UTS_TXFULL))
735 barrier();
736 URTX0((u32)sport->port.membase) = ch;
737 }
738
739 /*
740 * Interrupts are disabled on entering
741 */
742 static void
743 imx_console_write(struct console *co, const char *s, unsigned int count)
744 {
745 struct imx_port *sport = &imx_ports[co->index];
746 unsigned int old_ucr1, old_ucr2;
747
748 /*
749 * First, save UCR1/2 and then disable interrupts
750 */
751 old_ucr1 = UCR1((u32)sport->port.membase);
752 old_ucr2 = UCR2((u32)sport->port.membase);
753
754 UCR1((u32)sport->port.membase) =
755 (old_ucr1 | UCR1_UARTCLKEN | UCR1_UARTEN)
756 & ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN);
757 UCR2((u32)sport->port.membase) = old_ucr2 | UCR2_TXEN;
758
759 uart_console_write(&sport->port, s, count, imx_console_putchar);
760
761 /*
762 * Finally, wait for transmitter to become empty
763 * and restore UCR1/2
764 */
765 while (!(USR2((u32)sport->port.membase) & USR2_TXDC));
766
767 UCR1((u32)sport->port.membase) = old_ucr1;
768 UCR2((u32)sport->port.membase) = old_ucr2;
769 }
770
771 /*
772 * If the port was already initialised (eg, by a boot loader),
773 * try to determine the current setup.
774 */
775 static void __init
776 imx_console_get_options(struct imx_port *sport, int *baud,
777 int *parity, int *bits)
778 {
779
780 if ( UCR1((u32)sport->port.membase) | UCR1_UARTEN ) {
781 /* ok, the port was enabled */
782 unsigned int ucr2, ubir,ubmr, uartclk;
783 unsigned int baud_raw;
784 unsigned int ucfr_rfdiv;
785
786 ucr2 = UCR2((u32)sport->port.membase);
787
788 *parity = 'n';
789 if (ucr2 & UCR2_PREN) {
790 if (ucr2 & UCR2_PROE)
791 *parity = 'o';
792 else
793 *parity = 'e';
794 }
795
796 if (ucr2 & UCR2_WS)
797 *bits = 8;
798 else
799 *bits = 7;
800
801 ubir = UBIR((u32)sport->port.membase) & 0xffff;
802 ubmr = UBMR((u32)sport->port.membase) & 0xffff;
803
804
805 ucfr_rfdiv = (UFCR((u32)sport->port.membase) & UFCR_RFDIV) >> 7;
806 if (ucfr_rfdiv == 6)
807 ucfr_rfdiv = 7;
808 else
809 ucfr_rfdiv = 6 - ucfr_rfdiv;
810
811 uartclk = imx_get_perclk1();
812 uartclk /= ucfr_rfdiv;
813
814 { /*
815 * The next code provides exact computation of
816 * baud_raw = round(((uartclk/16) * (ubir + 1)) / (ubmr + 1))
817 * without need of float support or long long division,
818 * which would be required to prevent 32bit arithmetic overflow
819 */
820 unsigned int mul = ubir + 1;
821 unsigned int div = 16 * (ubmr + 1);
822 unsigned int rem = uartclk % div;
823
824 baud_raw = (uartclk / div) * mul;
825 baud_raw += (rem * mul + div / 2) / div;
826 *baud = (baud_raw + 50) / 100 * 100;
827 }
828
829 if(*baud != baud_raw)
830 printk(KERN_INFO "Serial: Console IMX rounded baud rate from %d to %d\n",
831 baud_raw, *baud);
832 }
833 }
834
835 static int __init
836 imx_console_setup(struct console *co, char *options)
837 {
838 struct imx_port *sport;
839 int baud = 9600;
840 int bits = 8;
841 int parity = 'n';
842 int flow = 'n';
843
844 /*
845 * Check whether an invalid uart number has been specified, and
846 * if so, search for the first available port that does have
847 * console support.
848 */
849 if (co->index == -1 || co->index >= ARRAY_SIZE(imx_ports))
850 co->index = 0;
851 sport = &imx_ports[co->index];
852
853 if (options)
854 uart_parse_options(options, &baud, &parity, &bits, &flow);
855 else
856 imx_console_get_options(sport, &baud, &parity, &bits);
857
858 imx_setup_ufcr(sport, 0);
859
860 return uart_set_options(&sport->port, co, baud, parity, bits, flow);
861 }
862
863 static struct uart_driver imx_reg;
864 static struct console imx_console = {
865 .name = "ttySMX",
866 .write = imx_console_write,
867 .device = uart_console_device,
868 .setup = imx_console_setup,
869 .flags = CON_PRINTBUFFER,
870 .index = -1,
871 .data = &imx_reg,
872 };
873
874 static int __init imx_rs_console_init(void)
875 {
876 imx_init_ports();
877 register_console(&imx_console);
878 return 0;
879 }
880 console_initcall(imx_rs_console_init);
881
882 #define IMX_CONSOLE &imx_console
883 #else
884 #define IMX_CONSOLE NULL
885 #endif
886
887 static struct uart_driver imx_reg = {
888 .owner = THIS_MODULE,
889 .driver_name = DRIVER_NAME,
890 .dev_name = "ttySMX",
891 .major = SERIAL_IMX_MAJOR,
892 .minor = MINOR_START,
893 .nr = ARRAY_SIZE(imx_ports),
894 .cons = IMX_CONSOLE,
895 };
896
897 static int serial_imx_suspend(struct platform_device *dev, pm_message_t state)
898 {
899 struct imx_port *sport = platform_get_drvdata(dev);
900
901 if (sport)
902 uart_suspend_port(&imx_reg, &sport->port);
903
904 return 0;
905 }
906
907 static int serial_imx_resume(struct platform_device *dev)
908 {
909 struct imx_port *sport = platform_get_drvdata(dev);
910
911 if (sport)
912 uart_resume_port(&imx_reg, &sport->port);
913
914 return 0;
915 }
916
917 static int serial_imx_probe(struct platform_device *dev)
918 {
919 struct imxuart_platform_data *pdata;
920
921 imx_ports[dev->id].port.dev = &dev->dev;
922
923 pdata = (struct imxuart_platform_data *)dev->dev.platform_data;
924 if(pdata && (pdata->flags & IMXUART_HAVE_RTSCTS))
925 imx_ports[dev->id].have_rtscts = 1;
926
927 uart_add_one_port(&imx_reg, &imx_ports[dev->id].port);
928 platform_set_drvdata(dev, &imx_ports[dev->id]);
929 return 0;
930 }
931
932 static int serial_imx_remove(struct platform_device *dev)
933 {
934 struct imx_port *sport = platform_get_drvdata(dev);
935
936 platform_set_drvdata(dev, NULL);
937
938 if (sport)
939 uart_remove_one_port(&imx_reg, &sport->port);
940
941 return 0;
942 }
943
944 static struct platform_driver serial_imx_driver = {
945 .probe = serial_imx_probe,
946 .remove = serial_imx_remove,
947
948 .suspend = serial_imx_suspend,
949 .resume = serial_imx_resume,
950 .driver = {
951 .name = "imx-uart",
952 },
953 };
954
955 static int __init imx_serial_init(void)
956 {
957 int ret;
958
959 printk(KERN_INFO "Serial: IMX driver\n");
960
961 imx_init_ports();
962
963 ret = uart_register_driver(&imx_reg);
964 if (ret)
965 return ret;
966
967 ret = platform_driver_register(&serial_imx_driver);
968 if (ret != 0)
969 uart_unregister_driver(&imx_reg);
970
971 return 0;
972 }
973
974 static void __exit imx_serial_exit(void)
975 {
976 uart_unregister_driver(&imx_reg);
977 platform_driver_unregister(&serial_imx_driver);
978 }
979
980 module_init(imx_serial_init);
981 module_exit(imx_serial_exit);
982
983 MODULE_AUTHOR("Sascha Hauer");
984 MODULE_DESCRIPTION("IMX generic serial port driver");
985 MODULE_LICENSE("GPL");
Support for the Chinese Samsung S3C2440 based development boards