arch/arm/mach-s3c2410/gpio.c

   1 /* linux/arch/arm/mach-s3c2410/gpio.c
   2  *
   3  * Copyright (c) 2004-2005 Simtec Electronics
   4  *      Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * S3C2410 GPIO support
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  21  *
  22  * Changelog
  23  *      13-Sep-2004  BJD  Implemented change of MISCCR
  24  *      14-Sep-2004  BJD  Added getpin call
  25  *      14-Sep-2004  BJD  Fixed bug in setpin() call
  26  *      30-Sep-2004  BJD  Fixed cfgpin() mask bug
  27  *      01-Oct-2004  BJD  Added getcfg() to get pin configuration
  28  *      01-Oct-2004  BJD  Fixed mask bug in pullup() call
  29  *      01-Oct-2004  BJD  Added getirq() to turn pin into irqno
  30  *      04-Oct-2004  BJD  Added irq filter controls for GPIO
  31  *      05-Nov-2004  BJD  EXPORT_SYMBOL() added for all code
  32  *      13-Mar-2005  BJD  Updates for __iomem
  33  *      26-Oct-2005  BJD  Added generic configuration types
  34  *      15-Jan-2006  LCVR Added support for the S3C2400
  35  */
  36
  37
  38 #include <linux/kernel.h>
  39 #include <linux/init.h>
  40 #include <linux/module.h>
  41 #include <linux/interrupt.h>
  42 #include <linux/ioport.h>
  43
  44 #include <asm/hardware.h>
  45 #include <asm/irq.h>
  46 #include <asm/io.h>
  47
  48 #include <asm/arch/regs-gpio.h>
  49
  50 void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function)
  51 {
  52         void __iomem *base = S3C24XX_GPIO_BASE(pin);
  53         unsigned long mask;
  54         unsigned long con;
  55         unsigned long flags;
  56
  57         if (pin < S3C2410_GPIO_BANKB) {
  58                 mask = 1 << S3C2410_GPIO_OFFSET(pin);
  59         } else {
  60                 mask = 3 << S3C2410_GPIO_OFFSET(pin)*2;
  61         }
  62
  63         switch (function) {
  64         case S3C2410_GPIO_LEAVE:
  65                 mask = 0;
  66                 function = 0;
  67                 break;
  68
  69         case S3C2410_GPIO_INPUT:
  70         case S3C2410_GPIO_OUTPUT:
  71         case S3C2410_GPIO_SFN2:
  72         case S3C2410_GPIO_SFN3:
  73                 if (pin < S3C2410_GPIO_BANKB) {
  74                         function &= 1;
  75                         function <<= S3C2410_GPIO_OFFSET(pin);
  76                 } else {
  77                         function &= 3;
  78                         function <<= S3C2410_GPIO_OFFSET(pin)*2;
  79                 }
  80         }
  81
  82         /* modify the specified register wwith IRQs off */
  83
  84         local_irq_save(flags);
  85
  86         con  = __raw_readl(base + 0x00);
  87         con &= ~mask;
  88         con |= function;
  89
  90         __raw_writel(con, base + 0x00);
  91
  92         local_irq_restore(flags);
  93 }
  94
  95 EXPORT_SYMBOL(s3c2410_gpio_cfgpin);
  96
  97 unsigned int s3c2410_gpio_getcfg(unsigned int pin)
  98 {
  99         void __iomem *base = S3C24XX_GPIO_BASE(pin);
 100         unsigned long mask;
 101
 102         if (pin < S3C2410_GPIO_BANKB) {
 103                 mask = 1 << S3C2410_GPIO_OFFSET(pin);
 104         } else {
 105                 mask = 3 << S3C2410_GPIO_OFFSET(pin)*2;
 106         }
 107
 108         return __raw_readl(base) & mask;
 109 }
 110
 111 EXPORT_SYMBOL(s3c2410_gpio_getcfg);
 112
 113 void s3c2410_gpio_pullup(unsigned int pin, unsigned int to)
 114 {
 115         void __iomem *base = S3C24XX_GPIO_BASE(pin);
 116         unsigned long offs = S3C2410_GPIO_OFFSET(pin);
 117         unsigned long flags;
 118         unsigned long up;
 119
 120         if (pin < S3C2410_GPIO_BANKB)
 121                 return;
 122
 123         local_irq_save(flags);
 124
 125         up = __raw_readl(base + 0x08);
 126         up &= ~(1L << offs);
 127         up |= to << offs;
 128         __raw_writel(up, base + 0x08);
 129
 130         local_irq_restore(flags);
 131 }
 132
 133 EXPORT_SYMBOL(s3c2410_gpio_pullup);
 134
 135 void s3c2410_gpio_setpin(unsigned int pin, unsigned int to)
 136 {
 137         void __iomem *base = S3C24XX_GPIO_BASE(pin);
 138         unsigned long offs = S3C2410_GPIO_OFFSET(pin);
 139         unsigned long flags;
 140         unsigned long dat;
 141
 142         local_irq_save(flags);
 143
 144         dat = __raw_readl(base + 0x04);
 145         dat &= ~(1 << offs);
 146         dat |= to << offs;
 147         __raw_writel(dat, base + 0x04);
 148
 149         local_irq_restore(flags);
 150 }
 151
 152 EXPORT_SYMBOL(s3c2410_gpio_setpin);
 153
 154 unsigned int s3c2410_gpio_getpin(unsigned int pin)
 155 {
 156         void __iomem *base = S3C24XX_GPIO_BASE(pin);
 157         unsigned long offs = S3C2410_GPIO_OFFSET(pin);
 158
 159         return __raw_readl(base + 0x04) & (1<< offs);
 160 }
 161
 162 EXPORT_SYMBOL(s3c2410_gpio_getpin);
 163
 164 unsigned int s3c2410_modify_misccr(unsigned int clear, unsigned int change)
 165 {
 166         unsigned long flags;
 167         unsigned long misccr;
 168
 169         local_irq_save(flags);
 170         misccr = __raw_readl(S3C24XX_MISCCR);
 171         misccr &= ~clear;
 172         misccr ^= change;
 173         __raw_writel(misccr, S3C24XX_MISCCR);
 174         local_irq_restore(flags);
 175
 176         return misccr;
 177 }
 178
 179 EXPORT_SYMBOL(s3c2410_modify_misccr);