iwl3945: Use iwl_txq_update_write_ptr
[linux-2.6/mini2440.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
blob66b7e22d7e846c4450bc8bf1590fc0796b029d6c
1 /******************************************************************************
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
43 #include <net/ieee80211_radiotap.h>
44 #include <net/lib80211.h>
45 #include <net/mac80211.h>
47 #include <asm/div64.h>
49 #define DRV_NAME "iwl3945"
51 #include "iwl-fh.h"
52 #include "iwl-3945-fh.h"
53 #include "iwl-commands.h"
54 #include "iwl-3945.h"
55 #include "iwl-helpers.h"
56 #include "iwl-core.h"
57 #include "iwl-dev.h"
60 * module name, copyright, version, etc.
63 #define DRV_DESCRIPTION \
64 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
66 #ifdef CONFIG_IWL3945_DEBUG
67 #define VD "d"
68 #else
69 #define VD
70 #endif
72 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
73 #define VS "s"
74 #else
75 #define VS
76 #endif
78 #define IWL39_VERSION "1.2.26k" VD VS
79 #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
80 #define DRV_AUTHOR "<ilw@linux.intel.com>"
81 #define DRV_VERSION IWL39_VERSION
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
89 /* module parameters */
90 struct iwl_mod_params iwl3945_mod_params = {
91 .num_of_queues = IWL39_MAX_NUM_QUEUES,
92 .sw_crypto = 1,
93 /* the rest are 0 by default */
96 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
97 * DMA services
99 * Theory of operation
101 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
102 * of buffer descriptors, each of which points to one or more data buffers for
103 * the device to read from or fill. Driver and device exchange status of each
104 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
105 * entries in each circular buffer, to protect against confusing empty and full
106 * queue states.
108 * The device reads or writes the data in the queues via the device's several
109 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
111 * For Tx queue, there are low mark and high mark limits. If, after queuing
112 * the packet for Tx, free space become < low mark, Tx queue stopped. When
113 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
114 * Tx queue resumed.
116 * The 3945 operates with six queues: One receive queue, one transmit queue
117 * (#4) for sending commands to the device firmware, and four transmit queues
118 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
119 ***************************************************/
122 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
124 static int iwl3945_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
125 int count, int slots_num, u32 id)
127 q->n_bd = count;
128 q->n_window = slots_num;
129 q->id = id;
131 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
132 * and iwl_queue_dec_wrap are broken. */
133 BUG_ON(!is_power_of_2(count));
135 /* slots_num must be power-of-two size, otherwise
136 * get_cmd_index is broken. */
137 BUG_ON(!is_power_of_2(slots_num));
139 q->low_mark = q->n_window / 4;
140 if (q->low_mark < 4)
141 q->low_mark = 4;
143 q->high_mark = q->n_window / 8;
144 if (q->high_mark < 2)
145 q->high_mark = 2;
147 q->write_ptr = q->read_ptr = 0;
149 return 0;
153 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
155 static int iwl3945_tx_queue_alloc(struct iwl_priv *priv,
156 struct iwl_tx_queue *txq, u32 id)
158 struct pci_dev *dev = priv->pci_dev;
160 /* Driver private data, only for Tx (not command) queues,
161 * not shared with device. */
162 if (id != IWL_CMD_QUEUE_NUM) {
163 txq->txb = kmalloc(sizeof(txq->txb[0]) *
164 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
165 if (!txq->txb) {
166 IWL_ERR(priv, "kmalloc for auxiliary BD "
167 "structures failed\n");
168 goto error;
170 } else
171 txq->txb = NULL;
173 /* Circular buffer of transmit frame descriptors (TFDs),
174 * shared with device */
175 txq->tfds39 = pci_alloc_consistent(dev,
176 sizeof(txq->tfds39[0]) * TFD_QUEUE_SIZE_MAX,
177 &txq->q.dma_addr);
179 if (!txq->tfds39) {
180 IWL_ERR(priv, "pci_alloc_consistent(%zd) failed\n",
181 sizeof(txq->tfds39[0]) * TFD_QUEUE_SIZE_MAX);
182 goto error;
184 txq->q.id = id;
186 return 0;
188 error:
189 kfree(txq->txb);
190 txq->txb = NULL;
192 return -ENOMEM;
196 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
198 int iwl3945_tx_queue_init(struct iwl_priv *priv,
199 struct iwl_tx_queue *txq, int slots_num, u32 txq_id)
201 int len, i;
202 int rc = 0;
205 * Alloc buffer array for commands (Tx or other types of commands).
206 * For the command queue (#4), allocate command space + one big
207 * command for scan, since scan command is very huge; the system will
208 * not have two scans at the same time, so only one is needed.
209 * For data Tx queues (all other queues), no super-size command
210 * space is needed.
212 len = sizeof(struct iwl_cmd);
213 for (i = 0; i <= slots_num; i++) {
214 if (i == slots_num) {
215 if (txq_id == IWL_CMD_QUEUE_NUM)
216 len += IWL_MAX_SCAN_SIZE;
217 else
218 continue;
221 txq->cmd[i] = kmalloc(len, GFP_KERNEL);
222 if (!txq->cmd[i])
223 goto err;
226 /* Alloc driver data array and TFD circular buffer */
227 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
228 if (rc)
229 goto err;
231 txq->need_update = 0;
233 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
234 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
235 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
237 /* Initialize queue high/low-water, head/tail indexes */
238 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
240 /* Tell device where to find queue, enable DMA channel. */
241 iwl3945_hw_tx_queue_init(priv, txq);
243 return 0;
244 err:
245 for (i = 0; i < slots_num; i++) {
246 kfree(txq->cmd[i]);
247 txq->cmd[i] = NULL;
250 if (txq_id == IWL_CMD_QUEUE_NUM) {
251 kfree(txq->cmd[slots_num]);
252 txq->cmd[slots_num] = NULL;
254 return -ENOMEM;
258 * iwl3945_tx_queue_free - Deallocate DMA queue.
259 * @txq: Transmit queue to deallocate.
261 * Empty queue by removing and destroying all BD's.
262 * Free all buffers.
263 * 0-fill, but do not free "txq" descriptor structure.
265 void iwl3945_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq)
267 struct iwl_queue *q = &txq->q;
268 struct pci_dev *dev = priv->pci_dev;
269 int len, i;
271 if (q->n_bd == 0)
272 return;
274 /* first, empty all BD's */
275 for (; q->write_ptr != q->read_ptr;
276 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
277 iwl3945_hw_txq_free_tfd(priv, txq);
279 len = sizeof(struct iwl_cmd) * q->n_window;
280 if (q->id == IWL_CMD_QUEUE_NUM)
281 len += IWL_MAX_SCAN_SIZE;
283 /* De-alloc array of command/tx buffers */
284 for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
285 kfree(txq->cmd[i]);
287 /* De-alloc circular buffer of TFDs */
288 if (txq->q.n_bd)
289 pci_free_consistent(dev, sizeof(struct iwl3945_tfd) *
290 txq->q.n_bd, txq->tfds39, txq->q.dma_addr);
292 /* De-alloc array of per-TFD driver data */
293 kfree(txq->txb);
294 txq->txb = NULL;
296 /* 0-fill queue descriptor structure */
297 memset(txq, 0, sizeof(*txq));
300 /*************** STATION TABLE MANAGEMENT ****
301 * mac80211 should be examined to determine if sta_info is duplicating
302 * the functionality provided here
305 /**************************************************************/
306 #if 0 /* temporary disable till we add real remove station */
308 * iwl3945_remove_station - Remove driver's knowledge of station.
310 * NOTE: This does not remove station from device's station table.
312 static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
314 int index = IWL_INVALID_STATION;
315 int i;
316 unsigned long flags;
318 spin_lock_irqsave(&priv->sta_lock, flags);
320 if (is_ap)
321 index = IWL_AP_ID;
322 else if (is_broadcast_ether_addr(addr))
323 index = priv->hw_params.bcast_sta_id;
324 else
325 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
326 if (priv->stations_39[i].used &&
327 !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
328 addr)) {
329 index = i;
330 break;
333 if (unlikely(index == IWL_INVALID_STATION))
334 goto out;
336 if (priv->stations_39[index].used) {
337 priv->stations_39[index].used = 0;
338 priv->num_stations--;
341 BUG_ON(priv->num_stations < 0);
343 out:
344 spin_unlock_irqrestore(&priv->sta_lock, flags);
345 return 0;
347 #endif
350 * iwl3945_clear_stations_table - Clear the driver's station table
352 * NOTE: This does not clear or otherwise alter the device's station table.
354 static void iwl3945_clear_stations_table(struct iwl_priv *priv)
356 unsigned long flags;
358 spin_lock_irqsave(&priv->sta_lock, flags);
360 priv->num_stations = 0;
361 memset(priv->stations_39, 0, sizeof(priv->stations_39));
363 spin_unlock_irqrestore(&priv->sta_lock, flags);
367 * iwl3945_add_station - Add station to station tables in driver and device
369 u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
371 int i;
372 int index = IWL_INVALID_STATION;
373 struct iwl3945_station_entry *station;
374 unsigned long flags_spin;
375 u8 rate;
377 spin_lock_irqsave(&priv->sta_lock, flags_spin);
378 if (is_ap)
379 index = IWL_AP_ID;
380 else if (is_broadcast_ether_addr(addr))
381 index = priv->hw_params.bcast_sta_id;
382 else
383 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
384 if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
385 addr)) {
386 index = i;
387 break;
390 if (!priv->stations_39[i].used &&
391 index == IWL_INVALID_STATION)
392 index = i;
395 /* These two conditions has the same outcome but keep them separate
396 since they have different meaning */
397 if (unlikely(index == IWL_INVALID_STATION)) {
398 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
399 return index;
402 if (priv->stations_39[index].used &&
403 !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
404 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
405 return index;
408 IWL_DEBUG_ASSOC("Add STA ID %d: %pM\n", index, addr);
409 station = &priv->stations_39[index];
410 station->used = 1;
411 priv->num_stations++;
413 /* Set up the REPLY_ADD_STA command to send to device */
414 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
415 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
416 station->sta.mode = 0;
417 station->sta.sta.sta_id = index;
418 station->sta.station_flags = 0;
420 if (priv->band == IEEE80211_BAND_5GHZ)
421 rate = IWL_RATE_6M_PLCP;
422 else
423 rate = IWL_RATE_1M_PLCP;
425 /* Turn on both antennas for the station... */
426 station->sta.rate_n_flags =
427 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
429 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
431 /* Add station to device's station table */
432 iwl3945_send_add_station(priv, &station->sta, flags);
433 return index;
438 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
440 #define IWL_CMD(x) case x: return #x
441 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
444 * iwl3945_enqueue_hcmd - enqueue a uCode command
445 * @priv: device private data point
446 * @cmd: a point to the ucode command structure
448 * The function returns < 0 values to indicate the operation is
449 * failed. On success, it turns the index (> 0) of command in the
450 * command queue.
452 static int iwl3945_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
454 struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
455 struct iwl_queue *q = &txq->q;
456 struct iwl3945_tfd *tfd;
457 struct iwl_cmd *out_cmd;
458 u32 idx;
459 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
460 dma_addr_t phys_addr;
461 int pad;
462 int ret, len;
463 unsigned long flags;
465 /* If any of the command structures end up being larger than
466 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
467 * we will need to increase the size of the TFD entries */
468 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
469 !(cmd->meta.flags & CMD_SIZE_HUGE));
472 if (iwl_is_rfkill(priv)) {
473 IWL_DEBUG_INFO("Not sending command - RF KILL");
474 return -EIO;
477 if (iwl_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
478 IWL_ERR(priv, "No space for Tx\n");
479 return -ENOSPC;
482 spin_lock_irqsave(&priv->hcmd_lock, flags);
484 tfd = &txq->tfds39[q->write_ptr];
485 memset(tfd, 0, sizeof(*tfd));
487 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
488 out_cmd = txq->cmd[idx];
490 out_cmd->hdr.cmd = cmd->id;
491 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
492 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
494 /* At this point, the out_cmd now has all of the incoming cmd
495 * information */
497 out_cmd->hdr.flags = 0;
498 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
499 INDEX_TO_SEQ(q->write_ptr));
500 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
501 out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
503 len = (idx == TFD_CMD_SLOTS) ?
504 IWL_MAX_SCAN_SIZE : sizeof(struct iwl_cmd);
506 phys_addr = pci_map_single(priv->pci_dev, out_cmd,
507 len, PCI_DMA_TODEVICE);
508 pci_unmap_addr_set(&out_cmd->meta, mapping, phys_addr);
509 pci_unmap_len_set(&out_cmd->meta, len, len);
510 phys_addr += offsetof(struct iwl_cmd, hdr);
512 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
514 pad = U32_PAD(cmd->len);
515 tfd->control_flags |= cpu_to_le32(TFD_CTL_PAD_SET(pad));
517 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
518 "%d bytes at %d[%d]:%d\n",
519 get_cmd_string(out_cmd->hdr.cmd),
520 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
521 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
523 txq->need_update = 1;
525 /* Increment and update queue's write index */
526 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
527 ret = iwl_txq_update_write_ptr(priv, txq);
529 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
530 return ret ? ret : idx;
533 static int iwl3945_send_cmd_async(struct iwl_priv *priv,
534 struct iwl_host_cmd *cmd)
536 int ret;
538 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
540 /* An asynchronous command can not expect an SKB to be set. */
541 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
543 /* An asynchronous command MUST have a callback. */
544 BUG_ON(!cmd->meta.u.callback);
546 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
547 return -EBUSY;
549 ret = iwl3945_enqueue_hcmd(priv, cmd);
550 if (ret < 0) {
551 IWL_ERR(priv,
552 "Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
553 get_cmd_string(cmd->id), ret);
554 return ret;
556 return 0;
559 static int iwl3945_send_cmd_sync(struct iwl_priv *priv,
560 struct iwl_host_cmd *cmd)
562 int cmd_idx;
563 int ret;
565 BUG_ON(cmd->meta.flags & CMD_ASYNC);
567 /* A synchronous command can not have a callback set. */
568 BUG_ON(cmd->meta.u.callback != NULL);
570 if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) {
571 IWL_ERR(priv,
572 "Error sending %s: Already sending a host command\n",
573 get_cmd_string(cmd->id));
574 ret = -EBUSY;
575 goto out;
578 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
580 if (cmd->meta.flags & CMD_WANT_SKB)
581 cmd->meta.source = &cmd->meta;
583 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
584 if (cmd_idx < 0) {
585 ret = cmd_idx;
586 IWL_ERR(priv,
587 "Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
588 get_cmd_string(cmd->id), ret);
589 goto out;
592 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
593 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
594 HOST_COMPLETE_TIMEOUT);
595 if (!ret) {
596 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
597 IWL_ERR(priv, "Error sending %s: time out after %dms\n",
598 get_cmd_string(cmd->id),
599 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
601 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
602 ret = -ETIMEDOUT;
603 goto cancel;
607 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
608 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
609 get_cmd_string(cmd->id));
610 ret = -ECANCELED;
611 goto fail;
613 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
614 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
615 get_cmd_string(cmd->id));
616 ret = -EIO;
617 goto fail;
619 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
620 IWL_ERR(priv, "Error: Response NULL in '%s'\n",
621 get_cmd_string(cmd->id));
622 ret = -EIO;
623 goto cancel;
626 ret = 0;
627 goto out;
629 cancel:
630 if (cmd->meta.flags & CMD_WANT_SKB) {
631 struct iwl_cmd *qcmd;
633 /* Cancel the CMD_WANT_SKB flag for the cmd in the
634 * TX cmd queue. Otherwise in case the cmd comes
635 * in later, it will possibly set an invalid
636 * address (cmd->meta.source). */
637 qcmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
638 qcmd->meta.flags &= ~CMD_WANT_SKB;
640 fail:
641 if (cmd->meta.u.skb) {
642 dev_kfree_skb_any(cmd->meta.u.skb);
643 cmd->meta.u.skb = NULL;
645 out:
646 clear_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status);
647 return ret;
650 int iwl3945_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
652 if (cmd->meta.flags & CMD_ASYNC)
653 return iwl3945_send_cmd_async(priv, cmd);
655 return iwl3945_send_cmd_sync(priv, cmd);
658 int iwl3945_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
660 struct iwl_host_cmd cmd = {
661 .id = id,
662 .len = len,
663 .data = data,
666 return iwl3945_send_cmd_sync(priv, &cmd);
669 static int __must_check iwl3945_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
671 struct iwl_host_cmd cmd = {
672 .id = id,
673 .len = sizeof(val),
674 .data = &val,
677 return iwl3945_send_cmd_sync(priv, &cmd);
680 int iwl3945_send_statistics_request(struct iwl_priv *priv)
682 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
686 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
687 * @band: 2.4 or 5 GHz band
688 * @channel: Any channel valid for the requested band
690 * In addition to setting the staging RXON, priv->band is also set.
692 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
693 * in the staging RXON flag structure based on the band
695 static int iwl3945_set_rxon_channel(struct iwl_priv *priv,
696 enum ieee80211_band band,
697 u16 channel)
699 if (!iwl3945_get_channel_info(priv, band, channel)) {
700 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
701 channel, band);
702 return -EINVAL;
705 if ((le16_to_cpu(priv->staging39_rxon.channel) == channel) &&
706 (priv->band == band))
707 return 0;
709 priv->staging39_rxon.channel = cpu_to_le16(channel);
710 if (band == IEEE80211_BAND_5GHZ)
711 priv->staging39_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
712 else
713 priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
715 priv->band = band;
717 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
719 return 0;
723 * iwl3945_check_rxon_cmd - validate RXON structure is valid
725 * NOTE: This is really only useful during development and can eventually
726 * be #ifdef'd out once the driver is stable and folks aren't actively
727 * making changes
729 static int iwl3945_check_rxon_cmd(struct iwl_priv *priv)
731 int error = 0;
732 int counter = 1;
733 struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
735 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
736 error |= le32_to_cpu(rxon->flags &
737 (RXON_FLG_TGJ_NARROW_BAND_MSK |
738 RXON_FLG_RADAR_DETECT_MSK));
739 if (error)
740 IWL_WARN(priv, "check 24G fields %d | %d\n",
741 counter++, error);
742 } else {
743 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
744 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
745 if (error)
746 IWL_WARN(priv, "check 52 fields %d | %d\n",
747 counter++, error);
748 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
749 if (error)
750 IWL_WARN(priv, "check 52 CCK %d | %d\n",
751 counter++, error);
753 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
754 if (error)
755 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
757 /* make sure basic rates 6Mbps and 1Mbps are supported */
758 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
759 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
760 if (error)
761 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
763 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
764 if (error)
765 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
767 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
768 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
769 if (error)
770 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
771 counter++, error);
773 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
774 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
775 if (error)
776 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
777 counter++, error);
779 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
780 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
781 if (error)
782 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
783 counter++, error);
785 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
786 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
787 RXON_FLG_ANT_A_MSK)) == 0);
788 if (error)
789 IWL_WARN(priv, "check antenna %d %d\n", counter++, error);
791 if (error)
792 IWL_WARN(priv, "Tuning to channel %d\n",
793 le16_to_cpu(rxon->channel));
795 if (error) {
796 IWL_ERR(priv, "Not a valid rxon_assoc_cmd field values\n");
797 return -1;
799 return 0;
803 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
804 * @priv: staging_rxon is compared to active_rxon
806 * If the RXON structure is changing enough to require a new tune,
807 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
808 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
810 static int iwl3945_full_rxon_required(struct iwl_priv *priv)
813 /* These items are only settable from the full RXON command */
814 if (!(iwl3945_is_associated(priv)) ||
815 compare_ether_addr(priv->staging39_rxon.bssid_addr,
816 priv->active39_rxon.bssid_addr) ||
817 compare_ether_addr(priv->staging39_rxon.node_addr,
818 priv->active39_rxon.node_addr) ||
819 compare_ether_addr(priv->staging39_rxon.wlap_bssid_addr,
820 priv->active39_rxon.wlap_bssid_addr) ||
821 (priv->staging39_rxon.dev_type != priv->active39_rxon.dev_type) ||
822 (priv->staging39_rxon.channel != priv->active39_rxon.channel) ||
823 (priv->staging39_rxon.air_propagation !=
824 priv->active39_rxon.air_propagation) ||
825 (priv->staging39_rxon.assoc_id != priv->active39_rxon.assoc_id))
826 return 1;
828 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
829 * be updated with the RXON_ASSOC command -- however only some
830 * flag transitions are allowed using RXON_ASSOC */
832 /* Check if we are not switching bands */
833 if ((priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
834 (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK))
835 return 1;
837 /* Check if we are switching association toggle */
838 if ((priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
839 (priv->active39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
840 return 1;
842 return 0;
845 static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
847 int rc = 0;
848 struct iwl_rx_packet *res = NULL;
849 struct iwl3945_rxon_assoc_cmd rxon_assoc;
850 struct iwl_host_cmd cmd = {
851 .id = REPLY_RXON_ASSOC,
852 .len = sizeof(rxon_assoc),
853 .meta.flags = CMD_WANT_SKB,
854 .data = &rxon_assoc,
856 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging39_rxon;
857 const struct iwl3945_rxon_cmd *rxon2 = &priv->active39_rxon;
859 if ((rxon1->flags == rxon2->flags) &&
860 (rxon1->filter_flags == rxon2->filter_flags) &&
861 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
862 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
863 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
864 return 0;
867 rxon_assoc.flags = priv->staging39_rxon.flags;
868 rxon_assoc.filter_flags = priv->staging39_rxon.filter_flags;
869 rxon_assoc.ofdm_basic_rates = priv->staging39_rxon.ofdm_basic_rates;
870 rxon_assoc.cck_basic_rates = priv->staging39_rxon.cck_basic_rates;
871 rxon_assoc.reserved = 0;
873 rc = iwl3945_send_cmd_sync(priv, &cmd);
874 if (rc)
875 return rc;
877 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
878 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
879 IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
880 rc = -EIO;
883 priv->alloc_rxb_skb--;
884 dev_kfree_skb_any(cmd.meta.u.skb);
886 return rc;
890 * iwl3945_commit_rxon - commit staging_rxon to hardware
892 * The RXON command in staging_rxon is committed to the hardware and
893 * the active_rxon structure is updated with the new data. This
894 * function correctly transitions out of the RXON_ASSOC_MSK state if
895 * a HW tune is required based on the RXON structure changes.
897 static int iwl3945_commit_rxon(struct iwl_priv *priv)
899 /* cast away the const for active_rxon in this function */
900 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active39_rxon;
901 int rc = 0;
903 if (!iwl_is_alive(priv))
904 return -1;
906 /* always get timestamp with Rx frame */
907 priv->staging39_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
909 /* select antenna */
910 priv->staging39_rxon.flags &=
911 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
912 priv->staging39_rxon.flags |= iwl3945_get_antenna_flags(priv);
914 rc = iwl3945_check_rxon_cmd(priv);
915 if (rc) {
916 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
917 return -EINVAL;
920 /* If we don't need to send a full RXON, we can use
921 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
922 * and other flags for the current radio configuration. */
923 if (!iwl3945_full_rxon_required(priv)) {
924 rc = iwl3945_send_rxon_assoc(priv);
925 if (rc) {
926 IWL_ERR(priv, "Error setting RXON_ASSOC "
927 "configuration (%d).\n", rc);
928 return rc;
931 memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
933 return 0;
936 /* If we are currently associated and the new config requires
937 * an RXON_ASSOC and the new config wants the associated mask enabled,
938 * we must clear the associated from the active configuration
939 * before we apply the new config */
940 if (iwl3945_is_associated(priv) &&
941 (priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
942 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
943 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
945 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
946 sizeof(struct iwl3945_rxon_cmd),
947 &priv->active39_rxon);
949 /* If the mask clearing failed then we set
950 * active_rxon back to what it was previously */
951 if (rc) {
952 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
953 IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
954 "configuration (%d).\n", rc);
955 return rc;
959 IWL_DEBUG_INFO("Sending RXON\n"
960 "* with%s RXON_FILTER_ASSOC_MSK\n"
961 "* channel = %d\n"
962 "* bssid = %pM\n",
963 ((priv->staging39_rxon.filter_flags &
964 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
965 le16_to_cpu(priv->staging39_rxon.channel),
966 priv->staging_rxon.bssid_addr);
968 /* Apply the new configuration */
969 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
970 sizeof(struct iwl3945_rxon_cmd), &priv->staging39_rxon);
971 if (rc) {
972 IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
973 return rc;
976 memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
978 iwl3945_clear_stations_table(priv);
980 /* If we issue a new RXON command which required a tune then we must
981 * send a new TXPOWER command or we won't be able to Tx any frames */
982 rc = iwl3945_hw_reg_send_txpower(priv);
983 if (rc) {
984 IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
985 return rc;
988 /* Add the broadcast address so we can send broadcast frames */
989 if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) ==
990 IWL_INVALID_STATION) {
991 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
992 return -EIO;
995 /* If we have set the ASSOC_MSK and we are in BSS mode then
996 * add the IWL_AP_ID to the station rate table */
997 if (iwl3945_is_associated(priv) &&
998 (priv->iw_mode == NL80211_IFTYPE_STATION))
999 if (iwl3945_add_station(priv, priv->active39_rxon.bssid_addr, 1, 0)
1000 == IWL_INVALID_STATION) {
1001 IWL_ERR(priv, "Error adding AP address for transmit\n");
1002 return -EIO;
1005 /* Init the hardware's rate fallback order based on the band */
1006 rc = iwl3945_init_hw_rate_table(priv);
1007 if (rc) {
1008 IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
1009 return -EIO;
1012 return 0;
1015 static int iwl3945_send_bt_config(struct iwl_priv *priv)
1017 struct iwl_bt_cmd bt_cmd = {
1018 .flags = 3,
1019 .lead_time = 0xAA,
1020 .max_kill = 1,
1021 .kill_ack_mask = 0,
1022 .kill_cts_mask = 0,
1025 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1026 sizeof(bt_cmd), &bt_cmd);
1029 static int iwl3945_send_scan_abort(struct iwl_priv *priv)
1031 int rc = 0;
1032 struct iwl_rx_packet *res;
1033 struct iwl_host_cmd cmd = {
1034 .id = REPLY_SCAN_ABORT_CMD,
1035 .meta.flags = CMD_WANT_SKB,
1038 /* If there isn't a scan actively going on in the hardware
1039 * then we are in between scan bands and not actually
1040 * actively scanning, so don't send the abort command */
1041 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1042 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1043 return 0;
1046 rc = iwl3945_send_cmd_sync(priv, &cmd);
1047 if (rc) {
1048 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1049 return rc;
1052 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1053 if (res->u.status != CAN_ABORT_STATUS) {
1054 /* The scan abort will return 1 for success or
1055 * 2 for "failure". A failure condition can be
1056 * due to simply not being in an active scan which
1057 * can occur if we send the scan abort before we
1058 * the microcode has notified us that a scan is
1059 * completed. */
1060 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1061 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1062 clear_bit(STATUS_SCAN_HW, &priv->status);
1065 dev_kfree_skb_any(cmd.meta.u.skb);
1067 return rc;
1070 static int iwl3945_add_sta_sync_callback(struct iwl_priv *priv,
1071 struct iwl_cmd *cmd, struct sk_buff *skb)
1073 struct iwl_rx_packet *res = NULL;
1075 if (!skb) {
1076 IWL_ERR(priv, "Error: Response NULL in REPLY_ADD_STA.\n");
1077 return 1;
1080 res = (struct iwl_rx_packet *)skb->data;
1081 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1082 IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
1083 res->hdr.flags);
1084 return 1;
1087 switch (res->u.add_sta.status) {
1088 case ADD_STA_SUCCESS_MSK:
1089 break;
1090 default:
1091 break;
1094 /* We didn't cache the SKB; let the caller free it */
1095 return 1;
1098 int iwl3945_send_add_station(struct iwl_priv *priv,
1099 struct iwl3945_addsta_cmd *sta, u8 flags)
1101 struct iwl_rx_packet *res = NULL;
1102 int rc = 0;
1103 struct iwl_host_cmd cmd = {
1104 .id = REPLY_ADD_STA,
1105 .len = sizeof(struct iwl3945_addsta_cmd),
1106 .meta.flags = flags,
1107 .data = sta,
1110 if (flags & CMD_ASYNC)
1111 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
1112 else
1113 cmd.meta.flags |= CMD_WANT_SKB;
1115 rc = iwl3945_send_cmd(priv, &cmd);
1117 if (rc || (flags & CMD_ASYNC))
1118 return rc;
1120 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1121 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1122 IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
1123 res->hdr.flags);
1124 rc = -EIO;
1127 if (rc == 0) {
1128 switch (res->u.add_sta.status) {
1129 case ADD_STA_SUCCESS_MSK:
1130 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1131 break;
1132 default:
1133 rc = -EIO;
1134 IWL_WARN(priv, "REPLY_ADD_STA failed\n");
1135 break;
1139 priv->alloc_rxb_skb--;
1140 dev_kfree_skb_any(cmd.meta.u.skb);
1142 return rc;
1145 static int iwl3945_update_sta_key_info(struct iwl_priv *priv,
1146 struct ieee80211_key_conf *keyconf,
1147 u8 sta_id)
1149 unsigned long flags;
1150 __le16 key_flags = 0;
1152 switch (keyconf->alg) {
1153 case ALG_CCMP:
1154 key_flags |= STA_KEY_FLG_CCMP;
1155 key_flags |= cpu_to_le16(
1156 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1157 key_flags &= ~STA_KEY_FLG_INVALID;
1158 break;
1159 case ALG_TKIP:
1160 case ALG_WEP:
1161 default:
1162 return -EINVAL;
1164 spin_lock_irqsave(&priv->sta_lock, flags);
1165 priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
1166 priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
1167 memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
1168 keyconf->keylen);
1170 memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
1171 keyconf->keylen);
1172 priv->stations_39[sta_id].sta.key.key_flags = key_flags;
1173 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1174 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1176 spin_unlock_irqrestore(&priv->sta_lock, flags);
1178 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1179 iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
1180 return 0;
1183 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
1185 unsigned long flags;
1187 spin_lock_irqsave(&priv->sta_lock, flags);
1188 memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1189 memset(&priv->stations_39[sta_id].sta.key, 0,
1190 sizeof(struct iwl4965_keyinfo));
1191 priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1192 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1193 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1194 spin_unlock_irqrestore(&priv->sta_lock, flags);
1196 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1197 iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
1198 return 0;
1201 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
1203 struct list_head *element;
1205 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1206 priv->frames_count);
1208 while (!list_empty(&priv->free_frames)) {
1209 element = priv->free_frames.next;
1210 list_del(element);
1211 kfree(list_entry(element, struct iwl3945_frame, list));
1212 priv->frames_count--;
1215 if (priv->frames_count) {
1216 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
1217 priv->frames_count);
1218 priv->frames_count = 0;
1222 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
1224 struct iwl3945_frame *frame;
1225 struct list_head *element;
1226 if (list_empty(&priv->free_frames)) {
1227 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1228 if (!frame) {
1229 IWL_ERR(priv, "Could not allocate frame!\n");
1230 return NULL;
1233 priv->frames_count++;
1234 return frame;
1237 element = priv->free_frames.next;
1238 list_del(element);
1239 return list_entry(element, struct iwl3945_frame, list);
1242 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
1244 memset(frame, 0, sizeof(*frame));
1245 list_add(&frame->list, &priv->free_frames);
1248 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
1249 struct ieee80211_hdr *hdr,
1250 int left)
1253 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
1254 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
1255 (priv->iw_mode != NL80211_IFTYPE_AP)))
1256 return 0;
1258 if (priv->ibss_beacon->len > left)
1259 return 0;
1261 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1263 return priv->ibss_beacon->len;
1266 static u8 iwl3945_rate_get_lowest_plcp(struct iwl_priv *priv)
1268 u8 i;
1269 int rate_mask;
1271 /* Set rate mask*/
1272 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
1273 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
1274 else
1275 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
1277 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1278 i = iwl3945_rates[i].next_ieee) {
1279 if (rate_mask & (1 << i))
1280 return iwl3945_rates[i].plcp;
1283 /* No valid rate was found. Assign the lowest one */
1284 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
1285 return IWL_RATE_1M_PLCP;
1286 else
1287 return IWL_RATE_6M_PLCP;
1290 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
1292 struct iwl3945_frame *frame;
1293 unsigned int frame_size;
1294 int rc;
1295 u8 rate;
1297 frame = iwl3945_get_free_frame(priv);
1299 if (!frame) {
1300 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
1301 "command.\n");
1302 return -ENOMEM;
1305 rate = iwl3945_rate_get_lowest_plcp(priv);
1307 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
1309 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1310 &frame->u.cmd[0]);
1312 iwl3945_free_frame(priv, frame);
1314 return rc;
1317 /******************************************************************************
1319 * EEPROM related functions
1321 ******************************************************************************/
1323 static void get_eeprom_mac(struct iwl_priv *priv, u8 *mac)
1325 memcpy(mac, priv->eeprom39.mac_address, 6);
1329 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1330 * embedded controller) as EEPROM reader; each read is a series of pulses
1331 * to/from the EEPROM chip, not a single event, so even reads could conflict
1332 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1333 * simply claims ownership, which should be safe when this function is called
1334 * (i.e. before loading uCode!).
1336 static inline int iwl3945_eeprom_acquire_semaphore(struct iwl_priv *priv)
1338 _iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1339 return 0;
1343 * iwl3945_eeprom_init - read EEPROM contents
1345 * Load the EEPROM contents from adapter into priv->eeprom39
1347 * NOTE: This routine uses the non-debug IO access functions.
1349 int iwl3945_eeprom_init(struct iwl_priv *priv)
1351 u16 *e = (u16 *)&priv->eeprom39;
1352 u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
1353 int sz = sizeof(priv->eeprom39);
1354 int ret;
1355 u16 addr;
1357 /* The EEPROM structure has several padding buffers within it
1358 * and when adding new EEPROM maps is subject to programmer errors
1359 * which may be very difficult to identify without explicitly
1360 * checking the resulting size of the eeprom map. */
1361 BUILD_BUG_ON(sizeof(priv->eeprom39) != IWL_EEPROM_IMAGE_SIZE);
1363 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1364 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
1365 return -ENOENT;
1368 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1369 ret = iwl3945_eeprom_acquire_semaphore(priv);
1370 if (ret < 0) {
1371 IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
1372 return -ENOENT;
1375 /* eeprom is an array of 16bit values */
1376 for (addr = 0; addr < sz; addr += sizeof(u16)) {
1377 u32 r;
1379 _iwl_write32(priv, CSR_EEPROM_REG,
1380 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
1381 _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1382 ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
1383 CSR_EEPROM_REG_READ_VALID_MSK,
1384 IWL_EEPROM_ACCESS_TIMEOUT);
1385 if (ret < 0) {
1386 IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
1387 return ret;
1390 r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
1391 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
1394 return 0;
1397 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
1399 if (priv->shared_virt)
1400 pci_free_consistent(priv->pci_dev,
1401 sizeof(struct iwl3945_shared),
1402 priv->shared_virt,
1403 priv->shared_phys);
1407 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
1409 * return : set the bit for each supported rate insert in ie
1411 static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1412 u16 basic_rate, int *left)
1414 u16 ret_rates = 0, bit;
1415 int i;
1416 u8 *cnt = ie;
1417 u8 *rates = ie + 1;
1419 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1420 if (bit & supported_rate) {
1421 ret_rates |= bit;
1422 rates[*cnt] = iwl3945_rates[i].ieee |
1423 ((bit & basic_rate) ? 0x80 : 0x00);
1424 (*cnt)++;
1425 (*left)--;
1426 if ((*left <= 0) ||
1427 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1428 break;
1432 return ret_rates;
1436 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
1438 static u16 iwl3945_fill_probe_req(struct iwl_priv *priv,
1439 struct ieee80211_mgmt *frame,
1440 int left)
1442 int len = 0;
1443 u8 *pos = NULL;
1444 u16 active_rates, ret_rates, cck_rates;
1446 /* Make sure there is enough space for the probe request,
1447 * two mandatory IEs and the data */
1448 left -= 24;
1449 if (left < 0)
1450 return 0;
1451 len += 24;
1453 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1454 memcpy(frame->da, iwl_bcast_addr, ETH_ALEN);
1455 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1456 memcpy(frame->bssid, iwl_bcast_addr, ETH_ALEN);
1457 frame->seq_ctrl = 0;
1459 /* fill in our indirect SSID IE */
1460 /* ...next IE... */
1462 left -= 2;
1463 if (left < 0)
1464 return 0;
1465 len += 2;
1466 pos = &(frame->u.probe_req.variable[0]);
1467 *pos++ = WLAN_EID_SSID;
1468 *pos++ = 0;
1470 /* fill in supported rate */
1471 /* ...next IE... */
1472 left -= 2;
1473 if (left < 0)
1474 return 0;
1476 /* ... fill it in... */
1477 *pos++ = WLAN_EID_SUPP_RATES;
1478 *pos = 0;
1480 priv->active_rate = priv->rates_mask;
1481 active_rates = priv->active_rate;
1482 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1484 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1485 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
1486 priv->active_rate_basic, &left);
1487 active_rates &= ~ret_rates;
1489 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
1490 priv->active_rate_basic, &left);
1491 active_rates &= ~ret_rates;
1493 len += 2 + *pos;
1494 pos += (*pos) + 1;
1495 if (active_rates == 0)
1496 goto fill_end;
1498 /* fill in supported extended rate */
1499 /* ...next IE... */
1500 left -= 2;
1501 if (left < 0)
1502 return 0;
1503 /* ... fill it in... */
1504 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1505 *pos = 0;
1506 iwl3945_supported_rate_to_ie(pos, active_rates,
1507 priv->active_rate_basic, &left);
1508 if (*pos > 0)
1509 len += 2 + *pos;
1511 fill_end:
1512 return (u16)len;
1516 * QoS support
1518 static int iwl3945_send_qos_params_command(struct iwl_priv *priv,
1519 struct iwl_qosparam_cmd *qos)
1522 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1523 sizeof(struct iwl_qosparam_cmd), qos);
1526 static void iwl3945_activate_qos(struct iwl_priv *priv, u8 force)
1528 unsigned long flags;
1530 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1531 return;
1533 spin_lock_irqsave(&priv->lock, flags);
1534 priv->qos_data.def_qos_parm.qos_flags = 0;
1536 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1537 !priv->qos_data.qos_cap.q_AP.txop_request)
1538 priv->qos_data.def_qos_parm.qos_flags |=
1539 QOS_PARAM_FLG_TXOP_TYPE_MSK;
1541 if (priv->qos_data.qos_active)
1542 priv->qos_data.def_qos_parm.qos_flags |=
1543 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1545 spin_unlock_irqrestore(&priv->lock, flags);
1547 if (force || iwl3945_is_associated(priv)) {
1548 IWL_DEBUG_QOS("send QoS cmd with QoS active %d \n",
1549 priv->qos_data.qos_active);
1551 iwl3945_send_qos_params_command(priv,
1552 &(priv->qos_data.def_qos_parm));
1557 * Power management (not Tx power!) functions
1559 #define MSEC_TO_USEC 1024
1562 #define NOSLP __constant_cpu_to_le16(0), 0, 0
1563 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
1564 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1565 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1566 __constant_cpu_to_le32(X1), \
1567 __constant_cpu_to_le32(X2), \
1568 __constant_cpu_to_le32(X3), \
1569 __constant_cpu_to_le32(X4)}
1571 /* default power management (not Tx power) table values */
1572 /* for TIM 0-10 */
1573 static struct iwl_power_vec_entry range_0[IWL39_POWER_AC] = {
1574 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1575 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1576 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1577 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1578 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1579 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1582 /* for TIM > 10 */
1583 static struct iwl_power_vec_entry range_1[IWL39_POWER_AC] = {
1584 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1585 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1586 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1587 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1588 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1589 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1590 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1591 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1592 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1593 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1596 int iwl3945_power_init_handle(struct iwl_priv *priv)
1598 int rc = 0, i;
1599 struct iwl3945_power_mgr *pow_data;
1600 int size = sizeof(struct iwl_power_vec_entry) * IWL39_POWER_AC;
1601 u16 pci_pm;
1603 IWL_DEBUG_POWER("Initialize power \n");
1605 pow_data = &(priv->power_data_39);
1607 memset(pow_data, 0, sizeof(*pow_data));
1609 pow_data->active_index = IWL_POWER_RANGE_0;
1610 pow_data->dtim_val = 0xffff;
1612 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1613 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1615 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1616 if (rc != 0)
1617 return 0;
1618 else {
1619 struct iwl_powertable_cmd *cmd;
1621 IWL_DEBUG_POWER("adjust power command flags\n");
1623 for (i = 0; i < IWL39_POWER_AC; i++) {
1624 cmd = &pow_data->pwr_range_0[i].cmd;
1626 if (pci_pm & 0x1)
1627 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1628 else
1629 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1632 return rc;
1635 static int iwl3945_update_power_cmd(struct iwl_priv *priv,
1636 struct iwl_powertable_cmd *cmd, u32 mode)
1638 int rc = 0, i;
1639 u8 skip;
1640 u32 max_sleep = 0;
1641 struct iwl_power_vec_entry *range;
1642 u8 period = 0;
1643 struct iwl3945_power_mgr *pow_data;
1645 if (mode > IWL_POWER_INDEX_5) {
1646 IWL_DEBUG_POWER("Error invalid power mode \n");
1647 return -1;
1649 pow_data = &(priv->power_data_39);
1651 if (pow_data->active_index == IWL_POWER_RANGE_0)
1652 range = &pow_data->pwr_range_0[0];
1653 else
1654 range = &pow_data->pwr_range_1[1];
1656 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
1658 #ifdef IWL_MAC80211_DISABLE
1659 if (priv->assoc_network != NULL) {
1660 unsigned long flags;
1662 period = priv->assoc_network->tim.tim_period;
1664 #endif /*IWL_MAC80211_DISABLE */
1665 skip = range[mode].no_dtim;
1667 if (period == 0) {
1668 period = 1;
1669 skip = 0;
1672 if (skip == 0) {
1673 max_sleep = period;
1674 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1675 } else {
1676 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1677 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1678 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1681 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1682 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1683 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1686 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1687 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1688 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1689 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1690 le32_to_cpu(cmd->sleep_interval[0]),
1691 le32_to_cpu(cmd->sleep_interval[1]),
1692 le32_to_cpu(cmd->sleep_interval[2]),
1693 le32_to_cpu(cmd->sleep_interval[3]),
1694 le32_to_cpu(cmd->sleep_interval[4]));
1696 return rc;
1699 static int iwl3945_send_power_mode(struct iwl_priv *priv, u32 mode)
1701 u32 uninitialized_var(final_mode);
1702 int rc;
1703 struct iwl_powertable_cmd cmd;
1705 /* If on battery, set to 3,
1706 * if plugged into AC power, set to CAM ("continuously aware mode"),
1707 * else user level */
1708 switch (mode) {
1709 case IWL39_POWER_BATTERY:
1710 final_mode = IWL_POWER_INDEX_3;
1711 break;
1712 case IWL39_POWER_AC:
1713 final_mode = IWL_POWER_MODE_CAM;
1714 break;
1715 default:
1716 final_mode = mode;
1717 break;
1720 iwl3945_update_power_cmd(priv, &cmd, final_mode);
1722 /* FIXME use get_hcmd_size 3945 command is 4 bytes shorter */
1723 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD,
1724 sizeof(struct iwl3945_powertable_cmd), &cmd);
1726 if (final_mode == IWL_POWER_MODE_CAM)
1727 clear_bit(STATUS_POWER_PMI, &priv->status);
1728 else
1729 set_bit(STATUS_POWER_PMI, &priv->status);
1731 return rc;
1734 #define MAX_UCODE_BEACON_INTERVAL 1024
1735 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
1737 static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
1739 u16 new_val = 0;
1740 u16 beacon_factor = 0;
1742 beacon_factor =
1743 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
1744 / MAX_UCODE_BEACON_INTERVAL;
1745 new_val = beacon_val / beacon_factor;
1747 return cpu_to_le16(new_val);
1750 static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
1752 u64 interval_tm_unit;
1753 u64 tsf, result;
1754 unsigned long flags;
1755 struct ieee80211_conf *conf = NULL;
1756 u16 beacon_int = 0;
1758 conf = ieee80211_get_hw_conf(priv->hw);
1760 spin_lock_irqsave(&priv->lock, flags);
1761 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
1762 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
1764 tsf = priv->timestamp;
1766 beacon_int = priv->beacon_int;
1767 spin_unlock_irqrestore(&priv->lock, flags);
1769 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
1770 if (beacon_int == 0) {
1771 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
1772 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
1773 } else {
1774 priv->rxon_timing.beacon_interval =
1775 cpu_to_le16(beacon_int);
1776 priv->rxon_timing.beacon_interval =
1777 iwl3945_adjust_beacon_interval(
1778 le16_to_cpu(priv->rxon_timing.beacon_interval));
1781 priv->rxon_timing.atim_window = 0;
1782 } else {
1783 priv->rxon_timing.beacon_interval =
1784 iwl3945_adjust_beacon_interval(conf->beacon_int);
1785 /* TODO: we need to get atim_window from upper stack
1786 * for now we set to 0 */
1787 priv->rxon_timing.atim_window = 0;
1790 interval_tm_unit =
1791 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
1792 result = do_div(tsf, interval_tm_unit);
1793 priv->rxon_timing.beacon_init_val =
1794 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
1796 IWL_DEBUG_ASSOC
1797 ("beacon interval %d beacon timer %d beacon tim %d\n",
1798 le16_to_cpu(priv->rxon_timing.beacon_interval),
1799 le32_to_cpu(priv->rxon_timing.beacon_init_val),
1800 le16_to_cpu(priv->rxon_timing.atim_window));
1803 static int iwl3945_scan_initiate(struct iwl_priv *priv)
1805 if (!iwl_is_ready_rf(priv)) {
1806 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
1807 return -EIO;
1810 if (test_bit(STATUS_SCANNING, &priv->status)) {
1811 IWL_DEBUG_SCAN("Scan already in progress.\n");
1812 return -EAGAIN;
1815 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1816 IWL_DEBUG_SCAN("Scan request while abort pending. "
1817 "Queuing.\n");
1818 return -EAGAIN;
1821 IWL_DEBUG_INFO("Starting scan...\n");
1822 if (priv->cfg->sku & IWL_SKU_G)
1823 priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
1824 if (priv->cfg->sku & IWL_SKU_A)
1825 priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
1826 set_bit(STATUS_SCANNING, &priv->status);
1827 priv->scan_start = jiffies;
1828 priv->scan_pass_start = priv->scan_start;
1830 queue_work(priv->workqueue, &priv->request_scan);
1832 return 0;
1835 static int iwl3945_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
1837 struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
1839 if (hw_decrypt)
1840 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
1841 else
1842 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
1844 return 0;
1847 static void iwl3945_set_flags_for_phymode(struct iwl_priv *priv,
1848 enum ieee80211_band band)
1850 if (band == IEEE80211_BAND_5GHZ) {
1851 priv->staging39_rxon.flags &=
1852 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1853 | RXON_FLG_CCK_MSK);
1854 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1855 } else {
1856 /* Copied from iwl3945_bg_post_associate() */
1857 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1858 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1859 else
1860 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1862 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1863 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1865 priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1866 priv->staging39_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1867 priv->staging39_rxon.flags &= ~RXON_FLG_CCK_MSK;
1872 * initialize rxon structure with default values from eeprom
1874 static void iwl3945_connection_init_rx_config(struct iwl_priv *priv,
1875 int mode)
1877 const struct iwl_channel_info *ch_info;
1879 memset(&priv->staging39_rxon, 0, sizeof(priv->staging39_rxon));
1881 switch (mode) {
1882 case NL80211_IFTYPE_AP:
1883 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_AP;
1884 break;
1886 case NL80211_IFTYPE_STATION:
1887 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_ESS;
1888 priv->staging39_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1889 break;
1891 case NL80211_IFTYPE_ADHOC:
1892 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1893 priv->staging39_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1894 priv->staging39_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1895 RXON_FILTER_ACCEPT_GRP_MSK;
1896 break;
1898 case NL80211_IFTYPE_MONITOR:
1899 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
1900 priv->staging39_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
1901 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
1902 break;
1903 default:
1904 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1905 break;
1908 #if 0
1909 /* TODO: Figure out when short_preamble would be set and cache from
1910 * that */
1911 if (!hw_to_local(priv->hw)->short_preamble)
1912 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1913 else
1914 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1915 #endif
1917 ch_info = iwl3945_get_channel_info(priv, priv->band,
1918 le16_to_cpu(priv->active39_rxon.channel));
1920 if (!ch_info)
1921 ch_info = &priv->channel_info[0];
1924 * in some case A channels are all non IBSS
1925 * in this case force B/G channel
1927 if ((mode == NL80211_IFTYPE_ADHOC) && !(is_channel_ibss(ch_info)))
1928 ch_info = &priv->channel_info[0];
1930 priv->staging39_rxon.channel = cpu_to_le16(ch_info->channel);
1931 if (is_channel_a_band(ch_info))
1932 priv->band = IEEE80211_BAND_5GHZ;
1933 else
1934 priv->band = IEEE80211_BAND_2GHZ;
1936 iwl3945_set_flags_for_phymode(priv, priv->band);
1938 priv->staging39_rxon.ofdm_basic_rates =
1939 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1940 priv->staging39_rxon.cck_basic_rates =
1941 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1944 static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
1946 if (mode == NL80211_IFTYPE_ADHOC) {
1947 const struct iwl_channel_info *ch_info;
1949 ch_info = iwl3945_get_channel_info(priv,
1950 priv->band,
1951 le16_to_cpu(priv->staging39_rxon.channel));
1953 if (!ch_info || !is_channel_ibss(ch_info)) {
1954 IWL_ERR(priv, "channel %d not IBSS channel\n",
1955 le16_to_cpu(priv->staging39_rxon.channel));
1956 return -EINVAL;
1960 iwl3945_connection_init_rx_config(priv, mode);
1961 memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1963 iwl3945_clear_stations_table(priv);
1965 /* don't commit rxon if rf-kill is on*/
1966 if (!iwl_is_ready_rf(priv))
1967 return -EAGAIN;
1969 cancel_delayed_work(&priv->scan_check);
1970 if (iwl_scan_cancel_timeout(priv, 100)) {
1971 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
1972 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
1973 return -EAGAIN;
1976 iwl3945_commit_rxon(priv);
1978 return 0;
1981 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
1982 struct ieee80211_tx_info *info,
1983 struct iwl_cmd *cmd,
1984 struct sk_buff *skb_frag,
1985 int last_frag)
1987 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
1988 struct iwl3945_hw_key *keyinfo =
1989 &priv->stations_39[info->control.hw_key->hw_key_idx].keyinfo;
1991 switch (keyinfo->alg) {
1992 case ALG_CCMP:
1993 tx->sec_ctl = TX_CMD_SEC_CCM;
1994 memcpy(tx->key, keyinfo->key, keyinfo->keylen);
1995 IWL_DEBUG_TX("tx_cmd with AES hwcrypto\n");
1996 break;
1998 case ALG_TKIP:
1999 #if 0
2000 tx->sec_ctl = TX_CMD_SEC_TKIP;
2002 if (last_frag)
2003 memcpy(tx->tkip_mic.byte, skb_frag->tail - 8,
2005 else
2006 memset(tx->tkip_mic.byte, 0, 8);
2007 #endif
2008 break;
2010 case ALG_WEP:
2011 tx->sec_ctl = TX_CMD_SEC_WEP |
2012 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2014 if (keyinfo->keylen == 13)
2015 tx->sec_ctl |= TX_CMD_SEC_KEY128;
2017 memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
2019 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2020 "with key %d\n", info->control.hw_key->hw_key_idx);
2021 break;
2023 default:
2024 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
2025 break;
2030 * handle build REPLY_TX command notification.
2032 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
2033 struct iwl_cmd *cmd,
2034 struct ieee80211_tx_info *info,
2035 struct ieee80211_hdr *hdr, u8 std_id)
2037 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
2038 __le32 tx_flags = tx->tx_flags;
2039 __le16 fc = hdr->frame_control;
2040 u8 rc_flags = info->control.rates[0].flags;
2042 tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2043 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
2044 tx_flags |= TX_CMD_FLG_ACK_MSK;
2045 if (ieee80211_is_mgmt(fc))
2046 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2047 if (ieee80211_is_probe_resp(fc) &&
2048 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2049 tx_flags |= TX_CMD_FLG_TSF_MSK;
2050 } else {
2051 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2052 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2055 tx->sta_id = std_id;
2056 if (ieee80211_has_morefrags(fc))
2057 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2059 if (ieee80211_is_data_qos(fc)) {
2060 u8 *qc = ieee80211_get_qos_ctl(hdr);
2061 tx->tid_tspec = qc[0] & 0xf;
2062 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2063 } else {
2064 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2067 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
2068 tx_flags |= TX_CMD_FLG_RTS_MSK;
2069 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2070 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
2071 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2072 tx_flags |= TX_CMD_FLG_CTS_MSK;
2075 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2076 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2078 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2079 if (ieee80211_is_mgmt(fc)) {
2080 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
2081 tx->timeout.pm_frame_timeout = cpu_to_le16(3);
2082 else
2083 tx->timeout.pm_frame_timeout = cpu_to_le16(2);
2084 } else {
2085 tx->timeout.pm_frame_timeout = 0;
2086 #ifdef CONFIG_IWL3945_LEDS
2087 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
2088 #endif
2091 tx->driver_txop = 0;
2092 tx->tx_flags = tx_flags;
2093 tx->next_frame_len = 0;
2097 * iwl3945_get_sta_id - Find station's index within station table
2099 static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
2101 int sta_id;
2102 u16 fc = le16_to_cpu(hdr->frame_control);
2104 /* If this frame is broadcast or management, use broadcast station id */
2105 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2106 is_multicast_ether_addr(hdr->addr1))
2107 return priv->hw_params.bcast_sta_id;
2109 switch (priv->iw_mode) {
2111 /* If we are a client station in a BSS network, use the special
2112 * AP station entry (that's the only station we communicate with) */
2113 case NL80211_IFTYPE_STATION:
2114 return IWL_AP_ID;
2116 /* If we are an AP, then find the station, or use BCAST */
2117 case NL80211_IFTYPE_AP:
2118 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2119 if (sta_id != IWL_INVALID_STATION)
2120 return sta_id;
2121 return priv->hw_params.bcast_sta_id;
2123 /* If this frame is going out to an IBSS network, find the station,
2124 * or create a new station table entry */
2125 case NL80211_IFTYPE_ADHOC: {
2126 /* Create new station table entry */
2127 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2128 if (sta_id != IWL_INVALID_STATION)
2129 return sta_id;
2131 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
2133 if (sta_id != IWL_INVALID_STATION)
2134 return sta_id;
2136 IWL_DEBUG_DROP("Station %pM not in station map. "
2137 "Defaulting to broadcast...\n",
2138 hdr->addr1);
2139 iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2140 return priv->hw_params.bcast_sta_id;
2142 /* If we are in monitor mode, use BCAST. This is required for
2143 * packet injection. */
2144 case NL80211_IFTYPE_MONITOR:
2145 return priv->hw_params.bcast_sta_id;
2147 default:
2148 IWL_WARN(priv, "Unknown mode of operation: %d\n",
2149 priv->iw_mode);
2150 return priv->hw_params.bcast_sta_id;
2155 * start REPLY_TX command process
2157 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
2159 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2160 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
2161 struct iwl3945_tfd *tfd;
2162 struct iwl3945_tx_cmd *tx;
2163 struct iwl_tx_queue *txq = NULL;
2164 struct iwl_queue *q = NULL;
2165 struct iwl_cmd *out_cmd = NULL;
2166 dma_addr_t phys_addr;
2167 dma_addr_t txcmd_phys;
2168 int txq_id = skb_get_queue_mapping(skb);
2169 u16 len, idx, len_org, hdr_len;
2170 u8 id;
2171 u8 unicast;
2172 u8 sta_id;
2173 u8 tid = 0;
2174 u16 seq_number = 0;
2175 __le16 fc;
2176 u8 wait_write_ptr = 0;
2177 u8 *qc = NULL;
2178 unsigned long flags;
2179 int rc;
2181 spin_lock_irqsave(&priv->lock, flags);
2182 if (iwl_is_rfkill(priv)) {
2183 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2184 goto drop_unlock;
2187 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
2188 IWL_ERR(priv, "ERROR: No TX rate available.\n");
2189 goto drop_unlock;
2192 unicast = !is_multicast_ether_addr(hdr->addr1);
2193 id = 0;
2195 fc = hdr->frame_control;
2197 #ifdef CONFIG_IWL3945_DEBUG
2198 if (ieee80211_is_auth(fc))
2199 IWL_DEBUG_TX("Sending AUTH frame\n");
2200 else if (ieee80211_is_assoc_req(fc))
2201 IWL_DEBUG_TX("Sending ASSOC frame\n");
2202 else if (ieee80211_is_reassoc_req(fc))
2203 IWL_DEBUG_TX("Sending REASSOC frame\n");
2204 #endif
2206 /* drop all data frame if we are not associated */
2207 if (ieee80211_is_data(fc) &&
2208 (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
2209 (!iwl3945_is_associated(priv) ||
2210 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
2211 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
2212 goto drop_unlock;
2215 spin_unlock_irqrestore(&priv->lock, flags);
2217 hdr_len = ieee80211_hdrlen(fc);
2219 /* Find (or create) index into station table for destination station */
2220 sta_id = iwl3945_get_sta_id(priv, hdr);
2221 if (sta_id == IWL_INVALID_STATION) {
2222 IWL_DEBUG_DROP("Dropping - INVALID STATION: %pM\n",
2223 hdr->addr1);
2224 goto drop;
2227 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2229 if (ieee80211_is_data_qos(fc)) {
2230 qc = ieee80211_get_qos_ctl(hdr);
2231 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
2232 seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
2233 IEEE80211_SCTL_SEQ;
2234 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2235 (hdr->seq_ctrl &
2236 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2237 seq_number += 0x10;
2240 /* Descriptor for chosen Tx queue */
2241 txq = &priv->txq[txq_id];
2242 q = &txq->q;
2244 spin_lock_irqsave(&priv->lock, flags);
2246 /* Set up first empty TFD within this queue's circular TFD buffer */
2247 tfd = &txq->tfds39[q->write_ptr];
2248 memset(tfd, 0, sizeof(*tfd));
2249 idx = get_cmd_index(q, q->write_ptr, 0);
2251 /* Set up driver data for this TFD */
2252 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
2253 txq->txb[q->write_ptr].skb[0] = skb;
2255 /* Init first empty entry in queue's array of Tx/cmd buffers */
2256 out_cmd = txq->cmd[idx];
2257 tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
2258 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2259 memset(tx, 0, sizeof(*tx));
2262 * Set up the Tx-command (not MAC!) header.
2263 * Store the chosen Tx queue and TFD index within the sequence field;
2264 * after Tx, uCode's Tx response will return this value so driver can
2265 * locate the frame within the tx queue and do post-tx processing.
2267 out_cmd->hdr.cmd = REPLY_TX;
2268 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2269 INDEX_TO_SEQ(q->write_ptr)));
2271 /* Copy MAC header from skb into command buffer */
2272 memcpy(tx->hdr, hdr, hdr_len);
2275 * Use the first empty entry in this queue's command buffer array
2276 * to contain the Tx command and MAC header concatenated together
2277 * (payload data will be in another buffer).
2278 * Size of this varies, due to varying MAC header length.
2279 * If end is not dword aligned, we'll have 2 extra bytes at the end
2280 * of the MAC header (device reads on dword boundaries).
2281 * We'll tell device about this padding later.
2283 len = sizeof(struct iwl3945_tx_cmd) +
2284 sizeof(struct iwl_cmd_header) + hdr_len;
2286 len_org = len;
2287 len = (len + 3) & ~3;
2289 if (len_org != len)
2290 len_org = 1;
2291 else
2292 len_org = 0;
2294 /* Physical address of this Tx command's header (not MAC header!),
2295 * within command buffer array. */
2296 txcmd_phys = pci_map_single(priv->pci_dev,
2297 out_cmd, sizeof(struct iwl_cmd),
2298 PCI_DMA_TODEVICE);
2299 pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
2300 pci_unmap_len_set(&out_cmd->meta, len, sizeof(struct iwl_cmd));
2301 /* Add buffer containing Tx command and MAC(!) header to TFD's
2302 * first entry */
2303 txcmd_phys += offsetof(struct iwl_cmd, hdr);
2305 /* Add buffer containing Tx command and MAC(!) header to TFD's
2306 * first entry */
2307 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
2309 if (info->control.hw_key)
2310 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
2312 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2313 * if any (802.11 null frames have no payload). */
2314 len = skb->len - hdr_len;
2315 if (len) {
2316 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2317 len, PCI_DMA_TODEVICE);
2318 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
2321 if (!len)
2322 /* If there is no payload, then we use only one Tx buffer */
2323 tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(1));
2324 else
2325 /* Else use 2 buffers.
2326 * Tell 3945 about any padding after MAC header */
2327 tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(2) |
2328 TFD_CTL_PAD_SET(U32_PAD(len)));
2330 /* Total # bytes to be transmitted */
2331 len = (u16)skb->len;
2332 tx->len = cpu_to_le16(len);
2334 /* TODO need this for burst mode later on */
2335 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
2337 /* set is_hcca to 0; it probably will never be implemented */
2338 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
2340 tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2341 tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2343 if (!ieee80211_has_morefrags(hdr->frame_control)) {
2344 txq->need_update = 1;
2345 if (qc)
2346 priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
2347 } else {
2348 wait_write_ptr = 1;
2349 txq->need_update = 0;
2352 iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
2354 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
2355 ieee80211_hdrlen(fc));
2357 /* Tell device the write index *just past* this latest filled TFD */
2358 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
2359 rc = iwl_txq_update_write_ptr(priv, txq);
2360 spin_unlock_irqrestore(&priv->lock, flags);
2362 if (rc)
2363 return rc;
2365 if ((iwl_queue_space(q) < q->high_mark)
2366 && priv->mac80211_registered) {
2367 if (wait_write_ptr) {
2368 spin_lock_irqsave(&priv->lock, flags);
2369 txq->need_update = 1;
2370 iwl_txq_update_write_ptr(priv, txq);
2371 spin_unlock_irqrestore(&priv->lock, flags);
2374 ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
2377 return 0;
2379 drop_unlock:
2380 spin_unlock_irqrestore(&priv->lock, flags);
2381 drop:
2382 return -1;
2385 static void iwl3945_set_rate(struct iwl_priv *priv)
2387 const struct ieee80211_supported_band *sband = NULL;
2388 struct ieee80211_rate *rate;
2389 int i;
2391 sband = iwl_get_hw_mode(priv, priv->band);
2392 if (!sband) {
2393 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
2394 return;
2397 priv->active_rate = 0;
2398 priv->active_rate_basic = 0;
2400 IWL_DEBUG_RATE("Setting rates for %s GHz\n",
2401 sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
2403 for (i = 0; i < sband->n_bitrates; i++) {
2404 rate = &sband->bitrates[i];
2405 if ((rate->hw_value < IWL_RATE_COUNT) &&
2406 !(rate->flags & IEEE80211_CHAN_DISABLED)) {
2407 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
2408 rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
2409 priv->active_rate |= (1 << rate->hw_value);
2413 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2414 priv->active_rate, priv->active_rate_basic);
2417 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2418 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2419 * OFDM
2421 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2422 priv->staging39_rxon.cck_basic_rates =
2423 ((priv->active_rate_basic &
2424 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2425 else
2426 priv->staging39_rxon.cck_basic_rates =
2427 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2429 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2430 priv->staging39_rxon.ofdm_basic_rates =
2431 ((priv->active_rate_basic &
2432 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2433 IWL_FIRST_OFDM_RATE) & 0xFF;
2434 else
2435 priv->staging39_rxon.ofdm_basic_rates =
2436 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2439 static void iwl3945_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
2441 unsigned long flags;
2443 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2444 return;
2446 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2447 disable_radio ? "OFF" : "ON");
2449 if (disable_radio) {
2450 iwl_scan_cancel(priv);
2451 /* FIXME: This is a workaround for AP */
2452 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2453 spin_lock_irqsave(&priv->lock, flags);
2454 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
2455 CSR_UCODE_SW_BIT_RFKILL);
2456 spin_unlock_irqrestore(&priv->lock, flags);
2457 iwl_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
2458 set_bit(STATUS_RF_KILL_SW, &priv->status);
2460 return;
2463 spin_lock_irqsave(&priv->lock, flags);
2464 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2466 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2467 spin_unlock_irqrestore(&priv->lock, flags);
2469 /* wake up ucode */
2470 msleep(10);
2472 spin_lock_irqsave(&priv->lock, flags);
2473 iwl_read32(priv, CSR_UCODE_DRV_GP1);
2474 if (!iwl_grab_nic_access(priv))
2475 iwl_release_nic_access(priv);
2476 spin_unlock_irqrestore(&priv->lock, flags);
2478 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2479 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2480 "disabled by HW switch\n");
2481 return;
2484 if (priv->is_open)
2485 queue_work(priv->workqueue, &priv->restart);
2486 return;
2489 void iwl3945_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
2490 u32 decrypt_res, struct ieee80211_rx_status *stats)
2492 u16 fc =
2493 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2495 if (priv->active39_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2496 return;
2498 if (!(fc & IEEE80211_FCTL_PROTECTED))
2499 return;
2501 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2502 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2503 case RX_RES_STATUS_SEC_TYPE_TKIP:
2504 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2505 RX_RES_STATUS_BAD_ICV_MIC)
2506 stats->flag |= RX_FLAG_MMIC_ERROR;
2507 case RX_RES_STATUS_SEC_TYPE_WEP:
2508 case RX_RES_STATUS_SEC_TYPE_CCMP:
2509 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2510 RX_RES_STATUS_DECRYPT_OK) {
2511 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2512 stats->flag |= RX_FLAG_DECRYPTED;
2514 break;
2516 default:
2517 break;
2521 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2523 #include "iwl-spectrum.h"
2525 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
2526 #define BEACON_TIME_MASK_HIGH 0xFF000000
2527 #define TIME_UNIT 1024
2530 * extended beacon time format
2531 * time in usec will be changed into a 32-bit value in 8:24 format
2532 * the high 1 byte is the beacon counts
2533 * the lower 3 bytes is the time in usec within one beacon interval
2536 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
2538 u32 quot;
2539 u32 rem;
2540 u32 interval = beacon_interval * 1024;
2542 if (!interval || !usec)
2543 return 0;
2545 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
2546 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
2548 return (quot << 24) + rem;
2551 /* base is usually what we get from ucode with each received frame,
2552 * the same as HW timer counter counting down
2555 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
2557 u32 base_low = base & BEACON_TIME_MASK_LOW;
2558 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
2559 u32 interval = beacon_interval * TIME_UNIT;
2560 u32 res = (base & BEACON_TIME_MASK_HIGH) +
2561 (addon & BEACON_TIME_MASK_HIGH);
2563 if (base_low > addon_low)
2564 res += base_low - addon_low;
2565 else if (base_low < addon_low) {
2566 res += interval + base_low - addon_low;
2567 res += (1 << 24);
2568 } else
2569 res += (1 << 24);
2571 return cpu_to_le32(res);
2574 static int iwl3945_get_measurement(struct iwl_priv *priv,
2575 struct ieee80211_measurement_params *params,
2576 u8 type)
2578 struct iwl_spectrum_cmd spectrum;
2579 struct iwl_rx_packet *res;
2580 struct iwl_host_cmd cmd = {
2581 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
2582 .data = (void *)&spectrum,
2583 .meta.flags = CMD_WANT_SKB,
2585 u32 add_time = le64_to_cpu(params->start_time);
2586 int rc;
2587 int spectrum_resp_status;
2588 int duration = le16_to_cpu(params->duration);
2590 if (iwl3945_is_associated(priv))
2591 add_time =
2592 iwl3945_usecs_to_beacons(
2593 le64_to_cpu(params->start_time) - priv->last_tsf,
2594 le16_to_cpu(priv->rxon_timing.beacon_interval));
2596 memset(&spectrum, 0, sizeof(spectrum));
2598 spectrum.channel_count = cpu_to_le16(1);
2599 spectrum.flags =
2600 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
2601 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
2602 cmd.len = sizeof(spectrum);
2603 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
2605 if (iwl3945_is_associated(priv))
2606 spectrum.start_time =
2607 iwl3945_add_beacon_time(priv->last_beacon_time,
2608 add_time,
2609 le16_to_cpu(priv->rxon_timing.beacon_interval));
2610 else
2611 spectrum.start_time = 0;
2613 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
2614 spectrum.channels[0].channel = params->channel;
2615 spectrum.channels[0].type = type;
2616 if (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK)
2617 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
2618 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
2620 rc = iwl3945_send_cmd_sync(priv, &cmd);
2621 if (rc)
2622 return rc;
2624 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
2625 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
2626 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
2627 rc = -EIO;
2630 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
2631 switch (spectrum_resp_status) {
2632 case 0: /* Command will be handled */
2633 if (res->u.spectrum.id != 0xff) {
2634 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
2635 res->u.spectrum.id);
2636 priv->measurement_status &= ~MEASUREMENT_READY;
2638 priv->measurement_status |= MEASUREMENT_ACTIVE;
2639 rc = 0;
2640 break;
2642 case 1: /* Command will not be handled */
2643 rc = -EAGAIN;
2644 break;
2647 dev_kfree_skb_any(cmd.meta.u.skb);
2649 return rc;
2651 #endif
2653 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
2654 struct iwl_rx_mem_buffer *rxb)
2656 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2657 struct iwl_alive_resp *palive;
2658 struct delayed_work *pwork;
2660 palive = &pkt->u.alive_frame;
2662 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
2663 "0x%01X 0x%01X\n",
2664 palive->is_valid, palive->ver_type,
2665 palive->ver_subtype);
2667 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
2668 IWL_DEBUG_INFO("Initialization Alive received.\n");
2669 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
2670 sizeof(struct iwl_alive_resp));
2671 pwork = &priv->init_alive_start;
2672 } else {
2673 IWL_DEBUG_INFO("Runtime Alive received.\n");
2674 memcpy(&priv->card_alive, &pkt->u.alive_frame,
2675 sizeof(struct iwl_alive_resp));
2676 pwork = &priv->alive_start;
2677 iwl3945_disable_events(priv);
2680 /* We delay the ALIVE response by 5ms to
2681 * give the HW RF Kill time to activate... */
2682 if (palive->is_valid == UCODE_VALID_OK)
2683 queue_delayed_work(priv->workqueue, pwork,
2684 msecs_to_jiffies(5));
2685 else
2686 IWL_WARN(priv, "uCode did not respond OK.\n");
2689 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
2690 struct iwl_rx_mem_buffer *rxb)
2692 #ifdef CONFIG_IWLWIFI_DEBUG
2693 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2694 #endif
2696 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
2697 return;
2700 static void iwl3945_rx_reply_error(struct iwl_priv *priv,
2701 struct iwl_rx_mem_buffer *rxb)
2703 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2705 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2706 "seq 0x%04X ser 0x%08X\n",
2707 le32_to_cpu(pkt->u.err_resp.error_type),
2708 get_cmd_string(pkt->u.err_resp.cmd_id),
2709 pkt->u.err_resp.cmd_id,
2710 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2711 le32_to_cpu(pkt->u.err_resp.error_info));
2714 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2716 static void iwl3945_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
2718 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2719 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active39_rxon;
2720 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
2721 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
2722 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
2723 rxon->channel = csa->channel;
2724 priv->staging39_rxon.channel = csa->channel;
2727 static void iwl3945_rx_spectrum_measure_notif(struct iwl_priv *priv,
2728 struct iwl_rx_mem_buffer *rxb)
2730 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2731 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2732 struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
2734 if (!report->state) {
2735 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
2736 "Spectrum Measure Notification: Start\n");
2737 return;
2740 memcpy(&priv->measure_report, report, sizeof(*report));
2741 priv->measurement_status |= MEASUREMENT_READY;
2742 #endif
2745 static void iwl3945_rx_pm_sleep_notif(struct iwl_priv *priv,
2746 struct iwl_rx_mem_buffer *rxb)
2748 #ifdef CONFIG_IWL3945_DEBUG
2749 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2750 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2751 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
2752 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2753 #endif
2756 static void iwl3945_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2757 struct iwl_rx_mem_buffer *rxb)
2759 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2760 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
2761 "notification for %s:\n",
2762 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
2763 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw,
2764 le32_to_cpu(pkt->len));
2767 static void iwl3945_bg_beacon_update(struct work_struct *work)
2769 struct iwl_priv *priv =
2770 container_of(work, struct iwl_priv, beacon_update);
2771 struct sk_buff *beacon;
2773 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
2774 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
2776 if (!beacon) {
2777 IWL_ERR(priv, "update beacon failed\n");
2778 return;
2781 mutex_lock(&priv->mutex);
2782 /* new beacon skb is allocated every time; dispose previous.*/
2783 if (priv->ibss_beacon)
2784 dev_kfree_skb(priv->ibss_beacon);
2786 priv->ibss_beacon = beacon;
2787 mutex_unlock(&priv->mutex);
2789 iwl3945_send_beacon_cmd(priv);
2792 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
2793 struct iwl_rx_mem_buffer *rxb)
2795 #ifdef CONFIG_IWL3945_DEBUG
2796 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2797 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
2798 u8 rate = beacon->beacon_notify_hdr.rate;
2800 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
2801 "tsf %d %d rate %d\n",
2802 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
2803 beacon->beacon_notify_hdr.failure_frame,
2804 le32_to_cpu(beacon->ibss_mgr_status),
2805 le32_to_cpu(beacon->high_tsf),
2806 le32_to_cpu(beacon->low_tsf), rate);
2807 #endif
2809 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
2810 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
2811 queue_work(priv->workqueue, &priv->beacon_update);
2814 /* Service response to REPLY_SCAN_CMD (0x80) */
2815 static void iwl3945_rx_reply_scan(struct iwl_priv *priv,
2816 struct iwl_rx_mem_buffer *rxb)
2818 #ifdef CONFIG_IWL3945_DEBUG
2819 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2820 struct iwl_scanreq_notification *notif =
2821 (struct iwl_scanreq_notification *)pkt->u.raw;
2823 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
2824 #endif
2827 /* Service SCAN_START_NOTIFICATION (0x82) */
2828 static void iwl3945_rx_scan_start_notif(struct iwl_priv *priv,
2829 struct iwl_rx_mem_buffer *rxb)
2831 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2832 struct iwl_scanstart_notification *notif =
2833 (struct iwl_scanstart_notification *)pkt->u.raw;
2834 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
2835 IWL_DEBUG_SCAN("Scan start: "
2836 "%d [802.11%s] "
2837 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
2838 notif->channel,
2839 notif->band ? "bg" : "a",
2840 notif->tsf_high,
2841 notif->tsf_low, notif->status, notif->beacon_timer);
2844 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
2845 static void iwl3945_rx_scan_results_notif(struct iwl_priv *priv,
2846 struct iwl_rx_mem_buffer *rxb)
2848 #ifdef CONFIG_IWLWIFI_DEBUG
2849 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2850 struct iwl_scanresults_notification *notif =
2851 (struct iwl_scanresults_notification *)pkt->u.raw;
2852 #endif
2854 IWL_DEBUG_SCAN("Scan ch.res: "
2855 "%d [802.11%s] "
2856 "(TSF: 0x%08X:%08X) - %d "
2857 "elapsed=%lu usec (%dms since last)\n",
2858 notif->channel,
2859 notif->band ? "bg" : "a",
2860 le32_to_cpu(notif->tsf_high),
2861 le32_to_cpu(notif->tsf_low),
2862 le32_to_cpu(notif->statistics[0]),
2863 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
2864 jiffies_to_msecs(elapsed_jiffies
2865 (priv->last_scan_jiffies, jiffies)));
2867 priv->last_scan_jiffies = jiffies;
2868 priv->next_scan_jiffies = 0;
2871 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
2872 static void iwl3945_rx_scan_complete_notif(struct iwl_priv *priv,
2873 struct iwl_rx_mem_buffer *rxb)
2875 #ifdef CONFIG_IWLWIFI_DEBUG
2876 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2877 struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
2878 #endif
2880 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
2881 scan_notif->scanned_channels,
2882 scan_notif->tsf_low,
2883 scan_notif->tsf_high, scan_notif->status);
2885 /* The HW is no longer scanning */
2886 clear_bit(STATUS_SCAN_HW, &priv->status);
2888 /* The scan completion notification came in, so kill that timer... */
2889 cancel_delayed_work(&priv->scan_check);
2891 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
2892 (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
2893 "2.4" : "5.2",
2894 jiffies_to_msecs(elapsed_jiffies
2895 (priv->scan_pass_start, jiffies)));
2897 /* Remove this scanned band from the list of pending
2898 * bands to scan, band G precedes A in order of scanning
2899 * as seen in iwl3945_bg_request_scan */
2900 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
2901 priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
2902 else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
2903 priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
2905 /* If a request to abort was given, or the scan did not succeed
2906 * then we reset the scan state machine and terminate,
2907 * re-queuing another scan if one has been requested */
2908 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2909 IWL_DEBUG_INFO("Aborted scan completed.\n");
2910 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
2911 } else {
2912 /* If there are more bands on this scan pass reschedule */
2913 if (priv->scan_bands > 0)
2914 goto reschedule;
2917 priv->last_scan_jiffies = jiffies;
2918 priv->next_scan_jiffies = 0;
2919 IWL_DEBUG_INFO("Setting scan to off\n");
2921 clear_bit(STATUS_SCANNING, &priv->status);
2923 IWL_DEBUG_INFO("Scan took %dms\n",
2924 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
2926 queue_work(priv->workqueue, &priv->scan_completed);
2928 return;
2930 reschedule:
2931 priv->scan_pass_start = jiffies;
2932 queue_work(priv->workqueue, &priv->request_scan);
2935 /* Handle notification from uCode that card's power state is changing
2936 * due to software, hardware, or critical temperature RFKILL */
2937 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
2938 struct iwl_rx_mem_buffer *rxb)
2940 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2941 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
2942 unsigned long status = priv->status;
2944 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
2945 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
2946 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
2948 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
2949 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2951 if (flags & HW_CARD_DISABLED)
2952 set_bit(STATUS_RF_KILL_HW, &priv->status);
2953 else
2954 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2957 if (flags & SW_CARD_DISABLED)
2958 set_bit(STATUS_RF_KILL_SW, &priv->status);
2959 else
2960 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2962 iwl_scan_cancel(priv);
2964 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
2965 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
2966 (test_bit(STATUS_RF_KILL_SW, &status) !=
2967 test_bit(STATUS_RF_KILL_SW, &priv->status)))
2968 queue_work(priv->workqueue, &priv->rf_kill);
2969 else
2970 wake_up_interruptible(&priv->wait_command_queue);
2974 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
2976 * Setup the RX handlers for each of the reply types sent from the uCode
2977 * to the host.
2979 * This function chains into the hardware specific files for them to setup
2980 * any hardware specific handlers as well.
2982 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
2984 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
2985 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
2986 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
2987 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
2988 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
2989 iwl3945_rx_spectrum_measure_notif;
2990 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
2991 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
2992 iwl3945_rx_pm_debug_statistics_notif;
2993 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
2996 * The same handler is used for both the REPLY to a discrete
2997 * statistics request from the host as well as for the periodic
2998 * statistics notifications (after received beacons) from the uCode.
3000 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3001 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
3003 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3004 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
3005 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
3006 iwl3945_rx_scan_results_notif;
3007 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
3008 iwl3945_rx_scan_complete_notif;
3009 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3011 /* Set up hardware specific Rx handlers */
3012 iwl3945_hw_rx_handler_setup(priv);
3016 * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
3017 * When FW advances 'R' index, all entries between old and new 'R' index
3018 * need to be reclaimed.
3020 static void iwl3945_cmd_queue_reclaim(struct iwl_priv *priv,
3021 int txq_id, int index)
3023 struct iwl_tx_queue *txq = &priv->txq[txq_id];
3024 struct iwl_queue *q = &txq->q;
3025 int nfreed = 0;
3027 if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) {
3028 IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
3029 "is out of range [0-%d] %d %d.\n", txq_id,
3030 index, q->n_bd, q->write_ptr, q->read_ptr);
3031 return;
3034 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
3035 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3036 if (nfreed > 1) {
3037 IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", index,
3038 q->write_ptr, q->read_ptr);
3039 queue_work(priv->workqueue, &priv->restart);
3040 break;
3042 nfreed++;
3048 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3049 * @rxb: Rx buffer to reclaim
3051 * If an Rx buffer has an async callback associated with it the callback
3052 * will be executed. The attached skb (if present) will only be freed
3053 * if the callback returns 1
3055 static void iwl3945_tx_cmd_complete(struct iwl_priv *priv,
3056 struct iwl_rx_mem_buffer *rxb)
3058 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
3059 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3060 int txq_id = SEQ_TO_QUEUE(sequence);
3061 int index = SEQ_TO_INDEX(sequence);
3062 int huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
3063 int cmd_index;
3064 struct iwl_cmd *cmd;
3066 if (WARN(txq_id != IWL_CMD_QUEUE_NUM,
3067 "wrong command queue %d, sequence 0x%X readp=%d writep=%d\n",
3068 txq_id, sequence,
3069 priv->txq[IWL_CMD_QUEUE_NUM].q.read_ptr,
3070 priv->txq[IWL_CMD_QUEUE_NUM].q.write_ptr)) {
3071 iwl_print_hex_dump(priv, IWL_DL_INFO , rxb, 32);
3072 return;
3075 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3076 cmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3078 /* Input error checking is done when commands are added to queue. */
3079 if (cmd->meta.flags & CMD_WANT_SKB) {
3080 cmd->meta.source->u.skb = rxb->skb;
3081 rxb->skb = NULL;
3082 } else if (cmd->meta.u.callback &&
3083 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3084 rxb->skb = NULL;
3086 iwl3945_cmd_queue_reclaim(priv, txq_id, index);
3088 if (!(cmd->meta.flags & CMD_ASYNC)) {
3089 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3090 wake_up_interruptible(&priv->wait_command_queue);
3094 /************************** RX-FUNCTIONS ****************************/
3096 * Rx theory of operation
3098 * The host allocates 32 DMA target addresses and passes the host address
3099 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3100 * 0 to 31
3102 * Rx Queue Indexes
3103 * The host/firmware share two index registers for managing the Rx buffers.
3105 * The READ index maps to the first position that the firmware may be writing
3106 * to -- the driver can read up to (but not including) this position and get
3107 * good data.
3108 * The READ index is managed by the firmware once the card is enabled.
3110 * The WRITE index maps to the last position the driver has read from -- the
3111 * position preceding WRITE is the last slot the firmware can place a packet.
3113 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3114 * WRITE = READ.
3116 * During initialization, the host sets up the READ queue position to the first
3117 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3119 * When the firmware places a packet in a buffer, it will advance the READ index
3120 * and fire the RX interrupt. The driver can then query the READ index and
3121 * process as many packets as possible, moving the WRITE index forward as it
3122 * resets the Rx queue buffers with new memory.
3124 * The management in the driver is as follows:
3125 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3126 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
3127 * to replenish the iwl->rxq->rx_free.
3128 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
3129 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3130 * 'processed' and 'read' driver indexes as well)
3131 * + A received packet is processed and handed to the kernel network stack,
3132 * detached from the iwl->rxq. The driver 'processed' index is updated.
3133 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3134 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3135 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3136 * were enough free buffers and RX_STALLED is set it is cleared.
3139 * Driver sequence:
3141 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
3142 * iwl3945_rx_queue_restock
3143 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
3144 * queue, updates firmware pointers, and updates
3145 * the WRITE index. If insufficient rx_free buffers
3146 * are available, schedules iwl3945_rx_replenish
3148 * -- enable interrupts --
3149 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
3150 * READ INDEX, detaching the SKB from the pool.
3151 * Moves the packet buffer from queue to rx_used.
3152 * Calls iwl3945_rx_queue_restock to refill any empty
3153 * slots.
3154 * ...
3159 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
3161 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
3162 dma_addr_t dma_addr)
3164 return cpu_to_le32((u32)dma_addr);
3168 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
3170 * If there are slots in the RX queue that need to be restocked,
3171 * and we have free pre-allocated buffers, fill the ranks as much
3172 * as we can, pulling from rx_free.
3174 * This moves the 'write' index forward to catch up with 'processed', and
3175 * also updates the memory address in the firmware to reference the new
3176 * target buffer.
3178 static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
3180 struct iwl_rx_queue *rxq = &priv->rxq;
3181 struct list_head *element;
3182 struct iwl_rx_mem_buffer *rxb;
3183 unsigned long flags;
3184 int write, rc;
3186 spin_lock_irqsave(&rxq->lock, flags);
3187 write = rxq->write & ~0x7;
3188 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
3189 /* Get next free Rx buffer, remove from free list */
3190 element = rxq->rx_free.next;
3191 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
3192 list_del(element);
3194 /* Point to Rx buffer via next RBD in circular buffer */
3195 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
3196 rxq->queue[rxq->write] = rxb;
3197 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3198 rxq->free_count--;
3200 spin_unlock_irqrestore(&rxq->lock, flags);
3201 /* If the pre-allocated buffer pool is dropping low, schedule to
3202 * refill it */
3203 if (rxq->free_count <= RX_LOW_WATERMARK)
3204 queue_work(priv->workqueue, &priv->rx_replenish);
3207 /* If we've added more space for the firmware to place data, tell it.
3208 * Increment device's write pointer in multiples of 8. */
3209 if ((write != (rxq->write & ~0x7))
3210 || (abs(rxq->write - rxq->read) > 7)) {
3211 spin_lock_irqsave(&rxq->lock, flags);
3212 rxq->need_update = 1;
3213 spin_unlock_irqrestore(&rxq->lock, flags);
3214 rc = iwl_rx_queue_update_write_ptr(priv, rxq);
3215 if (rc)
3216 return rc;
3219 return 0;
3223 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
3225 * When moving to rx_free an SKB is allocated for the slot.
3227 * Also restock the Rx queue via iwl3945_rx_queue_restock.
3228 * This is called as a scheduled work item (except for during initialization)
3230 static void iwl3945_rx_allocate(struct iwl_priv *priv)
3232 struct iwl_rx_queue *rxq = &priv->rxq;
3233 struct list_head *element;
3234 struct iwl_rx_mem_buffer *rxb;
3235 unsigned long flags;
3236 spin_lock_irqsave(&rxq->lock, flags);
3237 while (!list_empty(&rxq->rx_used)) {
3238 element = rxq->rx_used.next;
3239 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
3241 /* Alloc a new receive buffer */
3242 rxb->skb =
3243 alloc_skb(priv->hw_params.rx_buf_size,
3244 __GFP_NOWARN | GFP_ATOMIC);
3245 if (!rxb->skb) {
3246 if (net_ratelimit())
3247 IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
3248 /* We don't reschedule replenish work here -- we will
3249 * call the restock method and if it still needs
3250 * more buffers it will schedule replenish */
3251 break;
3254 /* If radiotap head is required, reserve some headroom here.
3255 * The physical head count is a variable rx_stats->phy_count.
3256 * We reserve 4 bytes here. Plus these extra bytes, the
3257 * headroom of the physical head should be enough for the
3258 * radiotap head that iwl3945 supported. See iwl3945_rt.
3260 skb_reserve(rxb->skb, 4);
3262 priv->alloc_rxb_skb++;
3263 list_del(element);
3265 /* Get physical address of RB/SKB */
3266 rxb->real_dma_addr = pci_map_single(priv->pci_dev,
3267 rxb->skb->data,
3268 priv->hw_params.rx_buf_size,
3269 PCI_DMA_FROMDEVICE);
3270 list_add_tail(&rxb->list, &rxq->rx_free);
3271 rxq->free_count++;
3273 spin_unlock_irqrestore(&rxq->lock, flags);
3277 * this should be called while priv->lock is locked
3279 static void __iwl3945_rx_replenish(void *data)
3281 struct iwl_priv *priv = data;
3283 iwl3945_rx_allocate(priv);
3284 iwl3945_rx_queue_restock(priv);
3288 void iwl3945_rx_replenish(void *data)
3290 struct iwl_priv *priv = data;
3291 unsigned long flags;
3293 iwl3945_rx_allocate(priv);
3295 spin_lock_irqsave(&priv->lock, flags);
3296 iwl3945_rx_queue_restock(priv);
3297 spin_unlock_irqrestore(&priv->lock, flags);
3300 /* Convert linear signal-to-noise ratio into dB */
3301 static u8 ratio2dB[100] = {
3302 /* 0 1 2 3 4 5 6 7 8 9 */
3303 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3304 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3305 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3306 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3307 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3308 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3309 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3310 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3311 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3312 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3315 /* Calculates a relative dB value from a ratio of linear
3316 * (i.e. not dB) signal levels.
3317 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
3318 int iwl3945_calc_db_from_ratio(int sig_ratio)
3320 /* 1000:1 or higher just report as 60 dB */
3321 if (sig_ratio >= 1000)
3322 return 60;
3324 /* 100:1 or higher, divide by 10 and use table,
3325 * add 20 dB to make up for divide by 10 */
3326 if (sig_ratio >= 100)
3327 return 20 + (int)ratio2dB[sig_ratio/10];
3329 /* We shouldn't see this */
3330 if (sig_ratio < 1)
3331 return 0;
3333 /* Use table for ratios 1:1 - 99:1 */
3334 return (int)ratio2dB[sig_ratio];
3337 #define PERFECT_RSSI (-20) /* dBm */
3338 #define WORST_RSSI (-95) /* dBm */
3339 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3341 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
3342 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3343 * about formulas used below. */
3344 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
3346 int sig_qual;
3347 int degradation = PERFECT_RSSI - rssi_dbm;
3349 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3350 * as indicator; formula is (signal dbm - noise dbm).
3351 * SNR at or above 40 is a great signal (100%).
3352 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3353 * Weakest usable signal is usually 10 - 15 dB SNR. */
3354 if (noise_dbm) {
3355 if (rssi_dbm - noise_dbm >= 40)
3356 return 100;
3357 else if (rssi_dbm < noise_dbm)
3358 return 0;
3359 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3361 /* Else use just the signal level.
3362 * This formula is a least squares fit of data points collected and
3363 * compared with a reference system that had a percentage (%) display
3364 * for signal quality. */
3365 } else
3366 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3367 (15 * RSSI_RANGE + 62 * degradation)) /
3368 (RSSI_RANGE * RSSI_RANGE);
3370 if (sig_qual > 100)
3371 sig_qual = 100;
3372 else if (sig_qual < 1)
3373 sig_qual = 0;
3375 return sig_qual;
3379 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
3381 * Uses the priv->rx_handlers callback function array to invoke
3382 * the appropriate handlers, including command responses,
3383 * frame-received notifications, and other notifications.
3385 static void iwl3945_rx_handle(struct iwl_priv *priv)
3387 struct iwl_rx_mem_buffer *rxb;
3388 struct iwl_rx_packet *pkt;
3389 struct iwl_rx_queue *rxq = &priv->rxq;
3390 u32 r, i;
3391 int reclaim;
3392 unsigned long flags;
3393 u8 fill_rx = 0;
3394 u32 count = 8;
3396 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3397 * buffer that the driver may process (last buffer filled by ucode). */
3398 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
3399 i = rxq->read;
3401 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3402 fill_rx = 1;
3403 /* Rx interrupt, but nothing sent from uCode */
3404 if (i == r)
3405 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3407 while (i != r) {
3408 rxb = rxq->queue[i];
3410 /* If an RXB doesn't have a Rx queue slot associated with it,
3411 * then a bug has been introduced in the queue refilling
3412 * routines -- catch it here */
3413 BUG_ON(rxb == NULL);
3415 rxq->queue[i] = NULL;
3417 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
3418 priv->hw_params.rx_buf_size,
3419 PCI_DMA_FROMDEVICE);
3420 pkt = (struct iwl_rx_packet *)rxb->skb->data;
3422 /* Reclaim a command buffer only if this packet is a response
3423 * to a (driver-originated) command.
3424 * If the packet (e.g. Rx frame) originated from uCode,
3425 * there is no command buffer to reclaim.
3426 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
3427 * but apparently a few don't get set; catch them here. */
3428 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
3429 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
3430 (pkt->hdr.cmd != REPLY_TX);
3432 /* Based on type of command response or notification,
3433 * handle those that need handling via function in
3434 * rx_handlers table. See iwl3945_setup_rx_handlers() */
3435 if (priv->rx_handlers[pkt->hdr.cmd]) {
3436 IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
3437 "r = %d, i = %d, %s, 0x%02x\n", r, i,
3438 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
3439 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
3440 } else {
3441 /* No handling needed */
3442 IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
3443 "r %d i %d No handler needed for %s, 0x%02x\n",
3444 r, i, get_cmd_string(pkt->hdr.cmd),
3445 pkt->hdr.cmd);
3448 if (reclaim) {
3449 /* Invoke any callbacks, transfer the skb to caller, and
3450 * fire off the (possibly) blocking iwl3945_send_cmd()
3451 * as we reclaim the driver command queue */
3452 if (rxb && rxb->skb)
3453 iwl3945_tx_cmd_complete(priv, rxb);
3454 else
3455 IWL_WARN(priv, "Claim null rxb?\n");
3458 /* For now we just don't re-use anything. We can tweak this
3459 * later to try and re-use notification packets and SKBs that
3460 * fail to Rx correctly */
3461 if (rxb->skb != NULL) {
3462 priv->alloc_rxb_skb--;
3463 dev_kfree_skb_any(rxb->skb);
3464 rxb->skb = NULL;
3467 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
3468 priv->hw_params.rx_buf_size,
3469 PCI_DMA_FROMDEVICE);
3470 spin_lock_irqsave(&rxq->lock, flags);
3471 list_add_tail(&rxb->list, &priv->rxq.rx_used);
3472 spin_unlock_irqrestore(&rxq->lock, flags);
3473 i = (i + 1) & RX_QUEUE_MASK;
3474 /* If there are a lot of unused frames,
3475 * restock the Rx queue so ucode won't assert. */
3476 if (fill_rx) {
3477 count++;
3478 if (count >= 8) {
3479 priv->rxq.read = i;
3480 __iwl3945_rx_replenish(priv);
3481 count = 0;
3486 /* Backtrack one entry */
3487 priv->rxq.read = i;
3488 iwl3945_rx_queue_restock(priv);
3491 #ifdef CONFIG_IWL3945_DEBUG
3492 static void iwl3945_print_rx_config_cmd(struct iwl_priv *priv,
3493 struct iwl3945_rxon_cmd *rxon)
3495 IWL_DEBUG_RADIO("RX CONFIG:\n");
3496 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
3497 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
3498 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
3499 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
3500 le32_to_cpu(rxon->filter_flags));
3501 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
3502 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
3503 rxon->ofdm_basic_rates);
3504 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
3505 IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
3506 IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
3507 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
3509 #endif
3511 static void iwl3945_enable_interrupts(struct iwl_priv *priv)
3513 IWL_DEBUG_ISR("Enabling interrupts\n");
3514 set_bit(STATUS_INT_ENABLED, &priv->status);
3515 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
3519 /* call this function to flush any scheduled tasklet */
3520 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
3522 /* wait to make sure we flush pending tasklet*/
3523 synchronize_irq(priv->pci_dev->irq);
3524 tasklet_kill(&priv->irq_tasklet);
3528 static inline void iwl3945_disable_interrupts(struct iwl_priv *priv)
3530 clear_bit(STATUS_INT_ENABLED, &priv->status);
3532 /* disable interrupts from uCode/NIC to host */
3533 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
3535 /* acknowledge/clear/reset any interrupts still pending
3536 * from uCode or flow handler (Rx/Tx DMA) */
3537 iwl_write32(priv, CSR_INT, 0xffffffff);
3538 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
3539 IWL_DEBUG_ISR("Disabled interrupts\n");
3542 static const char *desc_lookup(int i)
3544 switch (i) {
3545 case 1:
3546 return "FAIL";
3547 case 2:
3548 return "BAD_PARAM";
3549 case 3:
3550 return "BAD_CHECKSUM";
3551 case 4:
3552 return "NMI_INTERRUPT";
3553 case 5:
3554 return "SYSASSERT";
3555 case 6:
3556 return "FATAL_ERROR";
3559 return "UNKNOWN";
3562 #define ERROR_START_OFFSET (1 * sizeof(u32))
3563 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
3565 static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
3567 u32 i;
3568 u32 desc, time, count, base, data1;
3569 u32 blink1, blink2, ilink1, ilink2;
3570 int rc;
3572 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
3574 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
3575 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
3576 return;
3579 rc = iwl_grab_nic_access(priv);
3580 if (rc) {
3581 IWL_WARN(priv, "Can not read from adapter at this time.\n");
3582 return;
3585 count = iwl_read_targ_mem(priv, base);
3587 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
3588 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
3589 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
3590 priv->status, count);
3593 IWL_ERR(priv, "Desc Time asrtPC blink2 "
3594 "ilink1 nmiPC Line\n");
3595 for (i = ERROR_START_OFFSET;
3596 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
3597 i += ERROR_ELEM_SIZE) {
3598 desc = iwl_read_targ_mem(priv, base + i);
3599 time =
3600 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
3601 blink1 =
3602 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
3603 blink2 =
3604 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
3605 ilink1 =
3606 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
3607 ilink2 =
3608 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
3609 data1 =
3610 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
3612 IWL_ERR(priv,
3613 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
3614 desc_lookup(desc), desc, time, blink1, blink2,
3615 ilink1, ilink2, data1);
3618 iwl_release_nic_access(priv);
3622 #define EVENT_START_OFFSET (6 * sizeof(u32))
3625 * iwl3945_print_event_log - Dump error event log to syslog
3627 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
3629 static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
3630 u32 num_events, u32 mode)
3632 u32 i;
3633 u32 base; /* SRAM byte address of event log header */
3634 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
3635 u32 ptr; /* SRAM byte address of log data */
3636 u32 ev, time, data; /* event log data */
3638 if (num_events == 0)
3639 return;
3641 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
3643 if (mode == 0)
3644 event_size = 2 * sizeof(u32);
3645 else
3646 event_size = 3 * sizeof(u32);
3648 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
3650 /* "time" is actually "data" for mode 0 (no timestamp).
3651 * place event id # at far right for easier visual parsing. */
3652 for (i = 0; i < num_events; i++) {
3653 ev = iwl_read_targ_mem(priv, ptr);
3654 ptr += sizeof(u32);
3655 time = iwl_read_targ_mem(priv, ptr);
3656 ptr += sizeof(u32);
3657 if (mode == 0) {
3658 /* data, ev */
3659 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
3660 } else {
3661 data = iwl_read_targ_mem(priv, ptr);
3662 ptr += sizeof(u32);
3663 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
3668 static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
3670 int rc;
3671 u32 base; /* SRAM byte address of event log header */
3672 u32 capacity; /* event log capacity in # entries */
3673 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
3674 u32 num_wraps; /* # times uCode wrapped to top of log */
3675 u32 next_entry; /* index of next entry to be written by uCode */
3676 u32 size; /* # entries that we'll print */
3678 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
3679 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
3680 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
3681 return;
3684 rc = iwl_grab_nic_access(priv);
3685 if (rc) {
3686 IWL_WARN(priv, "Can not read from adapter at this time.\n");
3687 return;
3690 /* event log header */
3691 capacity = iwl_read_targ_mem(priv, base);
3692 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
3693 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
3694 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
3696 size = num_wraps ? capacity : next_entry;
3698 /* bail out if nothing in log */
3699 if (size == 0) {
3700 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
3701 iwl_release_nic_access(priv);
3702 return;
3705 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
3706 size, num_wraps);
3708 /* if uCode has wrapped back to top of log, start at the oldest entry,
3709 * i.e the next one that uCode would fill. */
3710 if (num_wraps)
3711 iwl3945_print_event_log(priv, next_entry,
3712 capacity - next_entry, mode);
3714 /* (then/else) start at top of log */
3715 iwl3945_print_event_log(priv, 0, next_entry, mode);
3717 iwl_release_nic_access(priv);
3721 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
3723 static void iwl3945_irq_handle_error(struct iwl_priv *priv)
3725 /* Set the FW error flag -- cleared on iwl3945_down */
3726 set_bit(STATUS_FW_ERROR, &priv->status);
3728 /* Cancel currently queued command. */
3729 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3731 #ifdef CONFIG_IWL3945_DEBUG
3732 if (priv->debug_level & IWL_DL_FW_ERRORS) {
3733 iwl3945_dump_nic_error_log(priv);
3734 iwl3945_dump_nic_event_log(priv);
3735 iwl3945_print_rx_config_cmd(priv, &priv->staging39_rxon);
3737 #endif
3739 wake_up_interruptible(&priv->wait_command_queue);
3741 /* Keep the restart process from trying to send host
3742 * commands by clearing the INIT status bit */
3743 clear_bit(STATUS_READY, &priv->status);
3745 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3746 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
3747 "Restarting adapter due to uCode error.\n");
3749 if (iwl3945_is_associated(priv)) {
3750 memcpy(&priv->recovery39_rxon, &priv->active39_rxon,
3751 sizeof(priv->recovery39_rxon));
3752 priv->error_recovering = 1;
3754 queue_work(priv->workqueue, &priv->restart);
3758 static void iwl3945_error_recovery(struct iwl_priv *priv)
3760 unsigned long flags;
3762 memcpy(&priv->staging39_rxon, &priv->recovery39_rxon,
3763 sizeof(priv->staging39_rxon));
3764 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3765 iwl3945_commit_rxon(priv);
3767 iwl3945_add_station(priv, priv->bssid, 1, 0);
3769 spin_lock_irqsave(&priv->lock, flags);
3770 priv->assoc_id = le16_to_cpu(priv->staging39_rxon.assoc_id);
3771 priv->error_recovering = 0;
3772 spin_unlock_irqrestore(&priv->lock, flags);
3775 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
3777 u32 inta, handled = 0;
3778 u32 inta_fh;
3779 unsigned long flags;
3780 #ifdef CONFIG_IWL3945_DEBUG
3781 u32 inta_mask;
3782 #endif
3784 spin_lock_irqsave(&priv->lock, flags);
3786 /* Ack/clear/reset pending uCode interrupts.
3787 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
3788 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
3789 inta = iwl_read32(priv, CSR_INT);
3790 iwl_write32(priv, CSR_INT, inta);
3792 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
3793 * Any new interrupts that happen after this, either while we're
3794 * in this tasklet, or later, will show up in next ISR/tasklet. */
3795 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
3796 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
3798 #ifdef CONFIG_IWL3945_DEBUG
3799 if (priv->debug_level & IWL_DL_ISR) {
3800 /* just for debug */
3801 inta_mask = iwl_read32(priv, CSR_INT_MASK);
3802 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
3803 inta, inta_mask, inta_fh);
3805 #endif
3807 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
3808 * atomic, make sure that inta covers all the interrupts that
3809 * we've discovered, even if FH interrupt came in just after
3810 * reading CSR_INT. */
3811 if (inta_fh & CSR39_FH_INT_RX_MASK)
3812 inta |= CSR_INT_BIT_FH_RX;
3813 if (inta_fh & CSR39_FH_INT_TX_MASK)
3814 inta |= CSR_INT_BIT_FH_TX;
3816 /* Now service all interrupt bits discovered above. */
3817 if (inta & CSR_INT_BIT_HW_ERR) {
3818 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
3820 /* Tell the device to stop sending interrupts */
3821 iwl3945_disable_interrupts(priv);
3823 iwl3945_irq_handle_error(priv);
3825 handled |= CSR_INT_BIT_HW_ERR;
3827 spin_unlock_irqrestore(&priv->lock, flags);
3829 return;
3832 #ifdef CONFIG_IWL3945_DEBUG
3833 if (priv->debug_level & (IWL_DL_ISR)) {
3834 /* NIC fires this, but we don't use it, redundant with WAKEUP */
3835 if (inta & CSR_INT_BIT_SCD)
3836 IWL_DEBUG_ISR("Scheduler finished to transmit "
3837 "the frame/frames.\n");
3839 /* Alive notification via Rx interrupt will do the real work */
3840 if (inta & CSR_INT_BIT_ALIVE)
3841 IWL_DEBUG_ISR("Alive interrupt\n");
3843 #endif
3844 /* Safely ignore these bits for debug checks below */
3845 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
3847 /* Error detected by uCode */
3848 if (inta & CSR_INT_BIT_SW_ERR) {
3849 IWL_ERR(priv, "Microcode SW error detected. "
3850 "Restarting 0x%X.\n", inta);
3851 iwl3945_irq_handle_error(priv);
3852 handled |= CSR_INT_BIT_SW_ERR;
3855 /* uCode wakes up after power-down sleep */
3856 if (inta & CSR_INT_BIT_WAKEUP) {
3857 IWL_DEBUG_ISR("Wakeup interrupt\n");
3858 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
3859 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
3860 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
3861 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
3862 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
3863 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
3864 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
3866 handled |= CSR_INT_BIT_WAKEUP;
3869 /* All uCode command responses, including Tx command responses,
3870 * Rx "responses" (frame-received notification), and other
3871 * notifications from uCode come through here*/
3872 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
3873 iwl3945_rx_handle(priv);
3874 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
3877 if (inta & CSR_INT_BIT_FH_TX) {
3878 IWL_DEBUG_ISR("Tx interrupt\n");
3880 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
3881 if (!iwl_grab_nic_access(priv)) {
3882 iwl_write_direct32(priv, FH39_TCSR_CREDIT
3883 (FH39_SRVC_CHNL), 0x0);
3884 iwl_release_nic_access(priv);
3886 handled |= CSR_INT_BIT_FH_TX;
3889 if (inta & ~handled)
3890 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
3892 if (inta & ~CSR_INI_SET_MASK) {
3893 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
3894 inta & ~CSR_INI_SET_MASK);
3895 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
3898 /* Re-enable all interrupts */
3899 /* only Re-enable if disabled by irq */
3900 if (test_bit(STATUS_INT_ENABLED, &priv->status))
3901 iwl3945_enable_interrupts(priv);
3903 #ifdef CONFIG_IWL3945_DEBUG
3904 if (priv->debug_level & (IWL_DL_ISR)) {
3905 inta = iwl_read32(priv, CSR_INT);
3906 inta_mask = iwl_read32(priv, CSR_INT_MASK);
3907 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
3908 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
3909 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
3911 #endif
3912 spin_unlock_irqrestore(&priv->lock, flags);
3915 static irqreturn_t iwl3945_isr(int irq, void *data)
3917 struct iwl_priv *priv = data;
3918 u32 inta, inta_mask;
3919 u32 inta_fh;
3920 if (!priv)
3921 return IRQ_NONE;
3923 spin_lock(&priv->lock);
3925 /* Disable (but don't clear!) interrupts here to avoid
3926 * back-to-back ISRs and sporadic interrupts from our NIC.
3927 * If we have something to service, the tasklet will re-enable ints.
3928 * If we *don't* have something, we'll re-enable before leaving here. */
3929 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
3930 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
3932 /* Discover which interrupts are active/pending */
3933 inta = iwl_read32(priv, CSR_INT);
3934 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
3936 /* Ignore interrupt if there's nothing in NIC to service.
3937 * This may be due to IRQ shared with another device,
3938 * or due to sporadic interrupts thrown from our NIC. */
3939 if (!inta && !inta_fh) {
3940 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
3941 goto none;
3944 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
3945 /* Hardware disappeared */
3946 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
3947 goto unplugged;
3950 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
3951 inta, inta_mask, inta_fh);
3953 inta &= ~CSR_INT_BIT_SCD;
3955 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
3956 if (likely(inta || inta_fh))
3957 tasklet_schedule(&priv->irq_tasklet);
3958 unplugged:
3959 spin_unlock(&priv->lock);
3961 return IRQ_HANDLED;
3963 none:
3964 /* re-enable interrupts here since we don't have anything to service. */
3965 /* only Re-enable if disabled by irq */
3966 if (test_bit(STATUS_INT_ENABLED, &priv->status))
3967 iwl3945_enable_interrupts(priv);
3968 spin_unlock(&priv->lock);
3969 return IRQ_NONE;
3972 /************************** EEPROM BANDS ****************************
3974 * The iwl3945_eeprom_band definitions below provide the mapping from the
3975 * EEPROM contents to the specific channel number supported for each
3976 * band.
3978 * For example, iwl3945_priv->eeprom39.band_3_channels[4] from the band_3
3979 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
3980 * The specific geography and calibration information for that channel
3981 * is contained in the eeprom map itself.
3983 * During init, we copy the eeprom information and channel map
3984 * information into priv->channel_info_24/52 and priv->channel_map_24/52
3986 * channel_map_24/52 provides the index in the channel_info array for a
3987 * given channel. We have to have two separate maps as there is channel
3988 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
3989 * band_2
3991 * A value of 0xff stored in the channel_map indicates that the channel
3992 * is not supported by the hardware at all.
3994 * A value of 0xfe in the channel_map indicates that the channel is not
3995 * valid for Tx with the current hardware. This means that
3996 * while the system can tune and receive on a given channel, it may not
3997 * be able to associate or transmit any frames on that
3998 * channel. There is no corresponding channel information for that
3999 * entry.
4001 *********************************************************************/
4003 /* 2.4 GHz */
4004 static const u8 iwl3945_eeprom_band_1[14] = {
4005 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4008 /* 5.2 GHz bands */
4009 static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
4010 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4013 static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
4014 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4017 static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
4018 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4021 static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
4022 145, 149, 153, 157, 161, 165
4025 static void iwl3945_init_band_reference(const struct iwl_priv *priv, int band,
4026 int *eeprom_ch_count,
4027 const struct iwl_eeprom_channel
4028 **eeprom_ch_info,
4029 const u8 **eeprom_ch_index)
4031 switch (band) {
4032 case 1: /* 2.4GHz band */
4033 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
4034 *eeprom_ch_info = priv->eeprom39.band_1_channels;
4035 *eeprom_ch_index = iwl3945_eeprom_band_1;
4036 break;
4037 case 2: /* 4.9GHz band */
4038 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
4039 *eeprom_ch_info = priv->eeprom39.band_2_channels;
4040 *eeprom_ch_index = iwl3945_eeprom_band_2;
4041 break;
4042 case 3: /* 5.2GHz band */
4043 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
4044 *eeprom_ch_info = priv->eeprom39.band_3_channels;
4045 *eeprom_ch_index = iwl3945_eeprom_band_3;
4046 break;
4047 case 4: /* 5.5GHz band */
4048 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
4049 *eeprom_ch_info = priv->eeprom39.band_4_channels;
4050 *eeprom_ch_index = iwl3945_eeprom_band_4;
4051 break;
4052 case 5: /* 5.7GHz band */
4053 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
4054 *eeprom_ch_info = priv->eeprom39.band_5_channels;
4055 *eeprom_ch_index = iwl3945_eeprom_band_5;
4056 break;
4057 default:
4058 BUG();
4059 return;
4064 * iwl3945_get_channel_info - Find driver's private channel info
4066 * Based on band and channel number.
4068 const struct iwl_channel_info *
4069 iwl3945_get_channel_info(const struct iwl_priv *priv,
4070 enum ieee80211_band band, u16 channel)
4072 int i;
4074 switch (band) {
4075 case IEEE80211_BAND_5GHZ:
4076 for (i = 14; i < priv->channel_count; i++) {
4077 if (priv->channel_info[i].channel == channel)
4078 return &priv->channel_info[i];
4080 break;
4082 case IEEE80211_BAND_2GHZ:
4083 if (channel >= 1 && channel <= 14)
4084 return &priv->channel_info[channel - 1];
4085 break;
4086 case IEEE80211_NUM_BANDS:
4087 WARN_ON(1);
4090 return NULL;
4093 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
4094 ? # x " " : "")
4097 * iwl3945_init_channel_map - Set up driver's info for all possible channels
4099 static int iwl3945_init_channel_map(struct iwl_priv *priv)
4101 int eeprom_ch_count = 0;
4102 const u8 *eeprom_ch_index = NULL;
4103 const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
4104 int band, ch;
4105 struct iwl_channel_info *ch_info;
4107 if (priv->channel_count) {
4108 IWL_DEBUG_INFO("Channel map already initialized.\n");
4109 return 0;
4112 if (priv->eeprom39.version < 0x2f) {
4113 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
4114 priv->eeprom39.version);
4115 return -EINVAL;
4118 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
4120 priv->channel_count =
4121 ARRAY_SIZE(iwl3945_eeprom_band_1) +
4122 ARRAY_SIZE(iwl3945_eeprom_band_2) +
4123 ARRAY_SIZE(iwl3945_eeprom_band_3) +
4124 ARRAY_SIZE(iwl3945_eeprom_band_4) +
4125 ARRAY_SIZE(iwl3945_eeprom_band_5);
4127 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
4129 priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
4130 priv->channel_count, GFP_KERNEL);
4131 if (!priv->channel_info) {
4132 IWL_ERR(priv, "Could not allocate channel_info\n");
4133 priv->channel_count = 0;
4134 return -ENOMEM;
4137 ch_info = priv->channel_info;
4139 /* Loop through the 5 EEPROM bands adding them in order to the
4140 * channel map we maintain (that contains additional information than
4141 * what just in the EEPROM) */
4142 for (band = 1; band <= 5; band++) {
4144 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
4145 &eeprom_ch_info, &eeprom_ch_index);
4147 /* Loop through each band adding each of the channels */
4148 for (ch = 0; ch < eeprom_ch_count; ch++) {
4149 ch_info->channel = eeprom_ch_index[ch];
4150 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
4151 IEEE80211_BAND_5GHZ;
4153 /* permanently store EEPROM's channel regulatory flags
4154 * and max power in channel info database. */
4155 ch_info->eeprom = eeprom_ch_info[ch];
4157 /* Copy the run-time flags so they are there even on
4158 * invalid channels */
4159 ch_info->flags = eeprom_ch_info[ch].flags;
4161 if (!(is_channel_valid(ch_info))) {
4162 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
4163 "No traffic\n",
4164 ch_info->channel,
4165 ch_info->flags,
4166 is_channel_a_band(ch_info) ?
4167 "5.2" : "2.4");
4168 ch_info++;
4169 continue;
4172 /* Initialize regulatory-based run-time data */
4173 ch_info->max_power_avg = ch_info->curr_txpow =
4174 eeprom_ch_info[ch].max_power_avg;
4175 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
4176 ch_info->min_power = 0;
4178 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
4179 " %ddBm): Ad-Hoc %ssupported\n",
4180 ch_info->channel,
4181 is_channel_a_band(ch_info) ?
4182 "5.2" : "2.4",
4183 CHECK_AND_PRINT(VALID),
4184 CHECK_AND_PRINT(IBSS),
4185 CHECK_AND_PRINT(ACTIVE),
4186 CHECK_AND_PRINT(RADAR),
4187 CHECK_AND_PRINT(WIDE),
4188 CHECK_AND_PRINT(DFS),
4189 eeprom_ch_info[ch].flags,
4190 eeprom_ch_info[ch].max_power_avg,
4191 ((eeprom_ch_info[ch].
4192 flags & EEPROM_CHANNEL_IBSS)
4193 && !(eeprom_ch_info[ch].
4194 flags & EEPROM_CHANNEL_RADAR))
4195 ? "" : "not ");
4197 /* Set the user_txpower_limit to the highest power
4198 * supported by any channel */
4199 if (eeprom_ch_info[ch].max_power_avg >
4200 priv->user_txpower_limit)
4201 priv->user_txpower_limit =
4202 eeprom_ch_info[ch].max_power_avg;
4204 ch_info++;
4208 /* Set up txpower settings in driver for all channels */
4209 if (iwl3945_txpower_set_from_eeprom(priv))
4210 return -EIO;
4212 return 0;
4216 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
4218 static void iwl3945_free_channel_map(struct iwl_priv *priv)
4220 kfree(priv->channel_info);
4221 priv->channel_count = 0;
4224 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4225 * sending probe req. This should be set long enough to hear probe responses
4226 * from more than one AP. */
4227 #define IWL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
4228 #define IWL_ACTIVE_DWELL_TIME_52 (20)
4230 #define IWL_ACTIVE_DWELL_FACTOR_24GHZ (3)
4231 #define IWL_ACTIVE_DWELL_FACTOR_52GHZ (2)
4233 /* For faster active scanning, scan will move to the next channel if fewer than
4234 * PLCP_QUIET_THRESH packets are heard on this channel within
4235 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4236 * time if it's a quiet channel (nothing responded to our probe, and there's
4237 * no other traffic).
4238 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4239 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4240 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(10) /* msec */
4242 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4243 * Must be set longer than active dwell time.
4244 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4245 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4246 #define IWL_PASSIVE_DWELL_TIME_52 (10)
4247 #define IWL_PASSIVE_DWELL_BASE (100)
4248 #define IWL_CHANNEL_TUNE_TIME 5
4250 #define IWL_SCAN_PROBE_MASK(n) (BIT(n) | (BIT(n) - BIT(1)))
4252 static inline u16 iwl3945_get_active_dwell_time(struct iwl_priv *priv,
4253 enum ieee80211_band band,
4254 u8 n_probes)
4256 if (band == IEEE80211_BAND_5GHZ)
4257 return IWL_ACTIVE_DWELL_TIME_52 +
4258 IWL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
4259 else
4260 return IWL_ACTIVE_DWELL_TIME_24 +
4261 IWL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
4264 static u16 iwl3945_get_passive_dwell_time(struct iwl_priv *priv,
4265 enum ieee80211_band band)
4267 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
4268 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4269 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4271 if (iwl3945_is_associated(priv)) {
4272 /* If we're associated, we clamp the maximum passive
4273 * dwell time to be 98% of the beacon interval (minus
4274 * 2 * channel tune time) */
4275 passive = priv->beacon_int;
4276 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4277 passive = IWL_PASSIVE_DWELL_BASE;
4278 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4281 return passive;
4284 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
4285 enum ieee80211_band band,
4286 u8 is_active, u8 n_probes,
4287 struct iwl3945_scan_channel *scan_ch)
4289 const struct ieee80211_channel *channels = NULL;
4290 const struct ieee80211_supported_band *sband;
4291 const struct iwl_channel_info *ch_info;
4292 u16 passive_dwell = 0;
4293 u16 active_dwell = 0;
4294 int added, i;
4296 sband = iwl_get_hw_mode(priv, band);
4297 if (!sband)
4298 return 0;
4300 channels = sband->channels;
4302 active_dwell = iwl3945_get_active_dwell_time(priv, band, n_probes);
4303 passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
4305 if (passive_dwell <= active_dwell)
4306 passive_dwell = active_dwell + 1;
4308 for (i = 0, added = 0; i < sband->n_channels; i++) {
4309 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4310 continue;
4312 scan_ch->channel = channels[i].hw_value;
4314 ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
4315 if (!is_channel_valid(ch_info)) {
4316 IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
4317 scan_ch->channel);
4318 continue;
4321 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4322 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4323 /* If passive , set up for auto-switch
4324 * and use long active_dwell time.
4326 if (!is_active || is_channel_passive(ch_info) ||
4327 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
4328 scan_ch->type = 0; /* passive */
4329 if (IWL_UCODE_API(priv->ucode_ver) == 1)
4330 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
4331 } else {
4332 scan_ch->type = 1; /* active */
4335 /* Set direct probe bits. These may be used both for active
4336 * scan channels (probes gets sent right away),
4337 * or for passive channels (probes get se sent only after
4338 * hearing clear Rx packet).*/
4339 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
4340 if (n_probes)
4341 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4342 } else {
4343 /* uCode v1 does not allow setting direct probe bits on
4344 * passive channel. */
4345 if ((scan_ch->type & 1) && n_probes)
4346 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4349 /* Set txpower levels to defaults */
4350 scan_ch->tpc.dsp_atten = 110;
4351 /* scan_pwr_info->tpc.dsp_atten; */
4353 /*scan_pwr_info->tpc.tx_gain; */
4354 if (band == IEEE80211_BAND_5GHZ)
4355 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4356 else {
4357 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4358 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
4359 * power level:
4360 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
4364 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4365 scan_ch->channel,
4366 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
4367 (scan_ch->type & 1) ?
4368 active_dwell : passive_dwell);
4370 scan_ch++;
4371 added++;
4374 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
4375 return added;
4378 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
4379 struct ieee80211_rate *rates)
4381 int i;
4383 for (i = 0; i < IWL_RATE_COUNT; i++) {
4384 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
4385 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4386 rates[i].hw_value_short = i;
4387 rates[i].flags = 0;
4388 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
4390 * If CCK != 1M then set short preamble rate flag.
4392 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
4393 0 : IEEE80211_RATE_SHORT_PREAMBLE;
4399 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
4401 static int iwl3945_init_geos(struct iwl_priv *priv)
4403 struct iwl_channel_info *ch;
4404 struct ieee80211_supported_band *sband;
4405 struct ieee80211_channel *channels;
4406 struct ieee80211_channel *geo_ch;
4407 struct ieee80211_rate *rates;
4408 int i = 0;
4410 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
4411 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
4412 IWL_DEBUG_INFO("Geography modes already initialized.\n");
4413 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4414 return 0;
4417 channels = kzalloc(sizeof(struct ieee80211_channel) *
4418 priv->channel_count, GFP_KERNEL);
4419 if (!channels)
4420 return -ENOMEM;
4422 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
4423 GFP_KERNEL);
4424 if (!rates) {
4425 kfree(channels);
4426 return -ENOMEM;
4429 /* 5.2GHz channels start after the 2.4GHz channels */
4430 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4431 sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
4432 /* just OFDM */
4433 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
4434 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
4436 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4437 sband->channels = channels;
4438 /* OFDM & CCK */
4439 sband->bitrates = rates;
4440 sband->n_bitrates = IWL_RATE_COUNT;
4442 priv->ieee_channels = channels;
4443 priv->ieee_rates = rates;
4445 iwl3945_init_hw_rates(priv, rates);
4447 for (i = 0; i < priv->channel_count; i++) {
4448 ch = &priv->channel_info[i];
4450 /* FIXME: might be removed if scan is OK*/
4451 if (!is_channel_valid(ch))
4452 continue;
4454 if (is_channel_a_band(ch))
4455 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4456 else
4457 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4459 geo_ch = &sband->channels[sband->n_channels++];
4461 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
4462 geo_ch->max_power = ch->max_power_avg;
4463 geo_ch->max_antenna_gain = 0xff;
4464 geo_ch->hw_value = ch->channel;
4466 if (is_channel_valid(ch)) {
4467 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
4468 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
4470 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
4471 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
4473 if (ch->flags & EEPROM_CHANNEL_RADAR)
4474 geo_ch->flags |= IEEE80211_CHAN_RADAR;
4476 if (ch->max_power_avg > priv->max_channel_txpower_limit)
4477 priv->max_channel_txpower_limit =
4478 ch->max_power_avg;
4479 } else {
4480 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
4483 /* Save flags for reg domain usage */
4484 geo_ch->orig_flags = geo_ch->flags;
4486 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
4487 ch->channel, geo_ch->center_freq,
4488 is_channel_a_band(ch) ? "5.2" : "2.4",
4489 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
4490 "restricted" : "valid",
4491 geo_ch->flags);
4494 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
4495 priv->cfg->sku & IWL_SKU_A) {
4496 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
4497 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
4498 priv->pci_dev->device, priv->pci_dev->subsystem_device);
4499 priv->cfg->sku &= ~IWL_SKU_A;
4502 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
4503 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
4504 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
4506 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
4507 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
4508 &priv->bands[IEEE80211_BAND_2GHZ];
4509 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
4510 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
4511 &priv->bands[IEEE80211_BAND_5GHZ];
4513 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4515 return 0;
4519 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
4521 static void iwl3945_free_geos(struct iwl_priv *priv)
4523 kfree(priv->ieee_channels);
4524 kfree(priv->ieee_rates);
4525 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
4528 /******************************************************************************
4530 * uCode download functions
4532 ******************************************************************************/
4534 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
4536 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
4537 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
4538 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
4539 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
4540 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
4541 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
4545 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
4546 * looking at all data.
4548 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
4550 u32 val;
4551 u32 save_len = len;
4552 int rc = 0;
4553 u32 errcnt;
4555 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4557 rc = iwl_grab_nic_access(priv);
4558 if (rc)
4559 return rc;
4561 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
4562 IWL39_RTC_INST_LOWER_BOUND);
4564 errcnt = 0;
4565 for (; len > 0; len -= sizeof(u32), image++) {
4566 /* read data comes through single port, auto-incr addr */
4567 /* NOTE: Use the debugless read so we don't flood kernel log
4568 * if IWL_DL_IO is set */
4569 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
4570 if (val != le32_to_cpu(*image)) {
4571 IWL_ERR(priv, "uCode INST section is invalid at "
4572 "offset 0x%x, is 0x%x, s/b 0x%x\n",
4573 save_len - len, val, le32_to_cpu(*image));
4574 rc = -EIO;
4575 errcnt++;
4576 if (errcnt >= 20)
4577 break;
4581 iwl_release_nic_access(priv);
4583 if (!errcnt)
4584 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
4586 return rc;
4591 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
4592 * using sample data 100 bytes apart. If these sample points are good,
4593 * it's a pretty good bet that everything between them is good, too.
4595 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
4597 u32 val;
4598 int rc = 0;
4599 u32 errcnt = 0;
4600 u32 i;
4602 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4604 rc = iwl_grab_nic_access(priv);
4605 if (rc)
4606 return rc;
4608 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
4609 /* read data comes through single port, auto-incr addr */
4610 /* NOTE: Use the debugless read so we don't flood kernel log
4611 * if IWL_DL_IO is set */
4612 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
4613 i + IWL39_RTC_INST_LOWER_BOUND);
4614 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
4615 if (val != le32_to_cpu(*image)) {
4616 #if 0 /* Enable this if you want to see details */
4617 IWL_ERR(priv, "uCode INST section is invalid at "
4618 "offset 0x%x, is 0x%x, s/b 0x%x\n",
4619 i, val, *image);
4620 #endif
4621 rc = -EIO;
4622 errcnt++;
4623 if (errcnt >= 3)
4624 break;
4628 iwl_release_nic_access(priv);
4630 return rc;
4635 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
4636 * and verify its contents
4638 static int iwl3945_verify_ucode(struct iwl_priv *priv)
4640 __le32 *image;
4641 u32 len;
4642 int rc = 0;
4644 /* Try bootstrap */
4645 image = (__le32 *)priv->ucode_boot.v_addr;
4646 len = priv->ucode_boot.len;
4647 rc = iwl3945_verify_inst_sparse(priv, image, len);
4648 if (rc == 0) {
4649 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
4650 return 0;
4653 /* Try initialize */
4654 image = (__le32 *)priv->ucode_init.v_addr;
4655 len = priv->ucode_init.len;
4656 rc = iwl3945_verify_inst_sparse(priv, image, len);
4657 if (rc == 0) {
4658 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
4659 return 0;
4662 /* Try runtime/protocol */
4663 image = (__le32 *)priv->ucode_code.v_addr;
4664 len = priv->ucode_code.len;
4665 rc = iwl3945_verify_inst_sparse(priv, image, len);
4666 if (rc == 0) {
4667 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
4668 return 0;
4671 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
4673 /* Since nothing seems to match, show first several data entries in
4674 * instruction SRAM, so maybe visual inspection will give a clue.
4675 * Selection of bootstrap image (vs. other images) is arbitrary. */
4676 image = (__le32 *)priv->ucode_boot.v_addr;
4677 len = priv->ucode_boot.len;
4678 rc = iwl3945_verify_inst_full(priv, image, len);
4680 return rc;
4683 static void iwl3945_nic_start(struct iwl_priv *priv)
4685 /* Remove all resets to allow NIC to operate */
4686 iwl_write32(priv, CSR_RESET, 0);
4690 * iwl3945_read_ucode - Read uCode images from disk file.
4692 * Copy into buffers for card to fetch via bus-mastering
4694 static int iwl3945_read_ucode(struct iwl_priv *priv)
4696 struct iwl_ucode *ucode;
4697 int ret = -EINVAL, index;
4698 const struct firmware *ucode_raw;
4699 /* firmware file name contains uCode/driver compatibility version */
4700 const char *name_pre = priv->cfg->fw_name_pre;
4701 const unsigned int api_max = priv->cfg->ucode_api_max;
4702 const unsigned int api_min = priv->cfg->ucode_api_min;
4703 char buf[25];
4704 u8 *src;
4705 size_t len;
4706 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
4708 /* Ask kernel firmware_class module to get the boot firmware off disk.
4709 * request_firmware() is synchronous, file is in memory on return. */
4710 for (index = api_max; index >= api_min; index--) {
4711 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
4712 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
4713 if (ret < 0) {
4714 IWL_ERR(priv, "%s firmware file req failed: %d\n",
4715 buf, ret);
4716 if (ret == -ENOENT)
4717 continue;
4718 else
4719 goto error;
4720 } else {
4721 if (index < api_max)
4722 IWL_ERR(priv, "Loaded firmware %s, "
4723 "which is deprecated. "
4724 " Please use API v%u instead.\n",
4725 buf, api_max);
4726 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
4727 buf, ucode_raw->size);
4728 break;
4732 if (ret < 0)
4733 goto error;
4735 /* Make sure that we got at least our header! */
4736 if (ucode_raw->size < sizeof(*ucode)) {
4737 IWL_ERR(priv, "File size way too small!\n");
4738 ret = -EINVAL;
4739 goto err_release;
4742 /* Data from ucode file: header followed by uCode images */
4743 ucode = (void *)ucode_raw->data;
4745 priv->ucode_ver = le32_to_cpu(ucode->ver);
4746 api_ver = IWL_UCODE_API(priv->ucode_ver);
4747 inst_size = le32_to_cpu(ucode->inst_size);
4748 data_size = le32_to_cpu(ucode->data_size);
4749 init_size = le32_to_cpu(ucode->init_size);
4750 init_data_size = le32_to_cpu(ucode->init_data_size);
4751 boot_size = le32_to_cpu(ucode->boot_size);
4753 /* api_ver should match the api version forming part of the
4754 * firmware filename ... but we don't check for that and only rely
4755 * on the API version read from firware header from here on forward */
4757 if (api_ver < api_min || api_ver > api_max) {
4758 IWL_ERR(priv, "Driver unable to support your firmware API. "
4759 "Driver supports v%u, firmware is v%u.\n",
4760 api_max, api_ver);
4761 priv->ucode_ver = 0;
4762 ret = -EINVAL;
4763 goto err_release;
4765 if (api_ver != api_max)
4766 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
4767 "got %u. New firmware can be obtained "
4768 "from http://www.intellinuxwireless.org.\n",
4769 api_max, api_ver);
4771 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
4772 IWL_UCODE_MAJOR(priv->ucode_ver),
4773 IWL_UCODE_MINOR(priv->ucode_ver),
4774 IWL_UCODE_API(priv->ucode_ver),
4775 IWL_UCODE_SERIAL(priv->ucode_ver));
4777 IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
4778 priv->ucode_ver);
4779 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
4780 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
4781 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
4782 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
4783 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
4786 /* Verify size of file vs. image size info in file's header */
4787 if (ucode_raw->size < sizeof(*ucode) +
4788 inst_size + data_size + init_size +
4789 init_data_size + boot_size) {
4791 IWL_DEBUG_INFO("uCode file size %d too small\n",
4792 (int)ucode_raw->size);
4793 ret = -EINVAL;
4794 goto err_release;
4797 /* Verify that uCode images will fit in card's SRAM */
4798 if (inst_size > IWL39_MAX_INST_SIZE) {
4799 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
4800 inst_size);
4801 ret = -EINVAL;
4802 goto err_release;
4805 if (data_size > IWL39_MAX_DATA_SIZE) {
4806 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
4807 data_size);
4808 ret = -EINVAL;
4809 goto err_release;
4811 if (init_size > IWL39_MAX_INST_SIZE) {
4812 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
4813 init_size);
4814 ret = -EINVAL;
4815 goto err_release;
4817 if (init_data_size > IWL39_MAX_DATA_SIZE) {
4818 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
4819 init_data_size);
4820 ret = -EINVAL;
4821 goto err_release;
4823 if (boot_size > IWL39_MAX_BSM_SIZE) {
4824 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
4825 boot_size);
4826 ret = -EINVAL;
4827 goto err_release;
4830 /* Allocate ucode buffers for card's bus-master loading ... */
4832 /* Runtime instructions and 2 copies of data:
4833 * 1) unmodified from disk
4834 * 2) backup cache for save/restore during power-downs */
4835 priv->ucode_code.len = inst_size;
4836 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
4838 priv->ucode_data.len = data_size;
4839 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
4841 priv->ucode_data_backup.len = data_size;
4842 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
4844 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
4845 !priv->ucode_data_backup.v_addr)
4846 goto err_pci_alloc;
4848 /* Initialization instructions and data */
4849 if (init_size && init_data_size) {
4850 priv->ucode_init.len = init_size;
4851 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
4853 priv->ucode_init_data.len = init_data_size;
4854 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
4856 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
4857 goto err_pci_alloc;
4860 /* Bootstrap (instructions only, no data) */
4861 if (boot_size) {
4862 priv->ucode_boot.len = boot_size;
4863 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
4865 if (!priv->ucode_boot.v_addr)
4866 goto err_pci_alloc;
4869 /* Copy images into buffers for card's bus-master reads ... */
4871 /* Runtime instructions (first block of data in file) */
4872 src = &ucode->data[0];
4873 len = priv->ucode_code.len;
4874 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
4875 memcpy(priv->ucode_code.v_addr, src, len);
4876 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
4877 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
4879 /* Runtime data (2nd block)
4880 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
4881 src = &ucode->data[inst_size];
4882 len = priv->ucode_data.len;
4883 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
4884 memcpy(priv->ucode_data.v_addr, src, len);
4885 memcpy(priv->ucode_data_backup.v_addr, src, len);
4887 /* Initialization instructions (3rd block) */
4888 if (init_size) {
4889 src = &ucode->data[inst_size + data_size];
4890 len = priv->ucode_init.len;
4891 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
4892 len);
4893 memcpy(priv->ucode_init.v_addr, src, len);
4896 /* Initialization data (4th block) */
4897 if (init_data_size) {
4898 src = &ucode->data[inst_size + data_size + init_size];
4899 len = priv->ucode_init_data.len;
4900 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
4901 (int)len);
4902 memcpy(priv->ucode_init_data.v_addr, src, len);
4905 /* Bootstrap instructions (5th block) */
4906 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
4907 len = priv->ucode_boot.len;
4908 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
4909 (int)len);
4910 memcpy(priv->ucode_boot.v_addr, src, len);
4912 /* We have our copies now, allow OS release its copies */
4913 release_firmware(ucode_raw);
4914 return 0;
4916 err_pci_alloc:
4917 IWL_ERR(priv, "failed to allocate pci memory\n");
4918 ret = -ENOMEM;
4919 iwl3945_dealloc_ucode_pci(priv);
4921 err_release:
4922 release_firmware(ucode_raw);
4924 error:
4925 return ret;
4930 * iwl3945_set_ucode_ptrs - Set uCode address location
4932 * Tell initialization uCode where to find runtime uCode.
4934 * BSM registers initially contain pointers to initialization uCode.
4935 * We need to replace them to load runtime uCode inst and data,
4936 * and to save runtime data when powering down.
4938 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
4940 dma_addr_t pinst;
4941 dma_addr_t pdata;
4942 int rc = 0;
4943 unsigned long flags;
4945 /* bits 31:0 for 3945 */
4946 pinst = priv->ucode_code.p_addr;
4947 pdata = priv->ucode_data_backup.p_addr;
4949 spin_lock_irqsave(&priv->lock, flags);
4950 rc = iwl_grab_nic_access(priv);
4951 if (rc) {
4952 spin_unlock_irqrestore(&priv->lock, flags);
4953 return rc;
4956 /* Tell bootstrap uCode where to find image to load */
4957 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
4958 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
4959 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
4960 priv->ucode_data.len);
4962 /* Inst byte count must be last to set up, bit 31 signals uCode
4963 * that all new ptr/size info is in place */
4964 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
4965 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
4967 iwl_release_nic_access(priv);
4969 spin_unlock_irqrestore(&priv->lock, flags);
4971 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
4973 return rc;
4977 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
4979 * Called after REPLY_ALIVE notification received from "initialize" uCode.
4981 * Tell "initialize" uCode to go ahead and load the runtime uCode.
4983 static void iwl3945_init_alive_start(struct iwl_priv *priv)
4985 /* Check alive response for "valid" sign from uCode */
4986 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
4987 /* We had an error bringing up the hardware, so take it
4988 * all the way back down so we can try again */
4989 IWL_DEBUG_INFO("Initialize Alive failed.\n");
4990 goto restart;
4993 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
4994 * This is a paranoid check, because we would not have gotten the
4995 * "initialize" alive if code weren't properly loaded. */
4996 if (iwl3945_verify_ucode(priv)) {
4997 /* Runtime instruction load was bad;
4998 * take it all the way back down so we can try again */
4999 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5000 goto restart;
5003 /* Send pointers to protocol/runtime uCode image ... init code will
5004 * load and launch runtime uCode, which will send us another "Alive"
5005 * notification. */
5006 IWL_DEBUG_INFO("Initialization Alive received.\n");
5007 if (iwl3945_set_ucode_ptrs(priv)) {
5008 /* Runtime instruction load won't happen;
5009 * take it all the way back down so we can try again */
5010 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5011 goto restart;
5013 return;
5015 restart:
5016 queue_work(priv->workqueue, &priv->restart);
5020 /* temporary */
5021 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
5022 struct sk_buff *skb);
5025 * iwl3945_alive_start - called after REPLY_ALIVE notification received
5026 * from protocol/runtime uCode (initialization uCode's
5027 * Alive gets handled by iwl3945_init_alive_start()).
5029 static void iwl3945_alive_start(struct iwl_priv *priv)
5031 int rc = 0;
5032 int thermal_spin = 0;
5033 u32 rfkill;
5035 IWL_DEBUG_INFO("Runtime Alive received.\n");
5037 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5038 /* We had an error bringing up the hardware, so take it
5039 * all the way back down so we can try again */
5040 IWL_DEBUG_INFO("Alive failed.\n");
5041 goto restart;
5044 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5045 * This is a paranoid check, because we would not have gotten the
5046 * "runtime" alive if code weren't properly loaded. */
5047 if (iwl3945_verify_ucode(priv)) {
5048 /* Runtime instruction load was bad;
5049 * take it all the way back down so we can try again */
5050 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5051 goto restart;
5054 iwl3945_clear_stations_table(priv);
5056 rc = iwl_grab_nic_access(priv);
5057 if (rc) {
5058 IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
5059 return;
5062 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
5063 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
5064 iwl_release_nic_access(priv);
5066 if (rfkill & 0x1) {
5067 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5068 /* if RFKILL is not on, then wait for thermal
5069 * sensor in adapter to kick in */
5070 while (iwl3945_hw_get_temperature(priv) == 0) {
5071 thermal_spin++;
5072 udelay(10);
5075 if (thermal_spin)
5076 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
5077 thermal_spin * 10);
5078 } else
5079 set_bit(STATUS_RF_KILL_HW, &priv->status);
5081 /* After the ALIVE response, we can send commands to 3945 uCode */
5082 set_bit(STATUS_ALIVE, &priv->status);
5084 /* Clear out the uCode error bit if it is set */
5085 clear_bit(STATUS_FW_ERROR, &priv->status);
5087 if (iwl_is_rfkill(priv))
5088 return;
5090 ieee80211_wake_queues(priv->hw);
5092 priv->active_rate = priv->rates_mask;
5093 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5095 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
5097 if (iwl3945_is_associated(priv)) {
5098 struct iwl3945_rxon_cmd *active_rxon =
5099 (struct iwl3945_rxon_cmd *)(&priv->active39_rxon);
5101 memcpy(&priv->staging39_rxon, &priv->active39_rxon,
5102 sizeof(priv->staging39_rxon));
5103 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5104 } else {
5105 /* Initialize our rx_config data */
5106 iwl3945_connection_init_rx_config(priv, priv->iw_mode);
5107 memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5110 /* Configure Bluetooth device coexistence support */
5111 iwl3945_send_bt_config(priv);
5113 /* Configure the adapter for unassociated operation */
5114 iwl3945_commit_rxon(priv);
5116 iwl3945_reg_txpower_periodic(priv);
5118 iwl3945_led_register(priv);
5120 IWL_DEBUG_INFO("ALIVE processing complete.\n");
5121 set_bit(STATUS_READY, &priv->status);
5122 wake_up_interruptible(&priv->wait_command_queue);
5124 if (priv->error_recovering)
5125 iwl3945_error_recovery(priv);
5127 /* reassociate for ADHOC mode */
5128 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
5129 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
5130 priv->vif);
5131 if (beacon)
5132 iwl3945_mac_beacon_update(priv->hw, beacon);
5135 return;
5137 restart:
5138 queue_work(priv->workqueue, &priv->restart);
5141 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
5143 static void __iwl3945_down(struct iwl_priv *priv)
5145 unsigned long flags;
5146 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5147 struct ieee80211_conf *conf = NULL;
5149 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5151 conf = ieee80211_get_hw_conf(priv->hw);
5153 if (!exit_pending)
5154 set_bit(STATUS_EXIT_PENDING, &priv->status);
5156 iwl3945_led_unregister(priv);
5157 iwl3945_clear_stations_table(priv);
5159 /* Unblock any waiting calls */
5160 wake_up_interruptible_all(&priv->wait_command_queue);
5162 /* Wipe out the EXIT_PENDING status bit if we are not actually
5163 * exiting the module */
5164 if (!exit_pending)
5165 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5167 /* stop and reset the on-board processor */
5168 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
5170 /* tell the device to stop sending interrupts */
5171 spin_lock_irqsave(&priv->lock, flags);
5172 iwl3945_disable_interrupts(priv);
5173 spin_unlock_irqrestore(&priv->lock, flags);
5174 iwl_synchronize_irq(priv);
5176 if (priv->mac80211_registered)
5177 ieee80211_stop_queues(priv->hw);
5179 /* If we have not previously called iwl3945_init() then
5180 * clear all bits but the RF Kill and SUSPEND bits and return */
5181 if (!iwl_is_init(priv)) {
5182 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5183 STATUS_RF_KILL_HW |
5184 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5185 STATUS_RF_KILL_SW |
5186 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5187 STATUS_GEO_CONFIGURED |
5188 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5189 STATUS_IN_SUSPEND |
5190 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5191 STATUS_EXIT_PENDING;
5192 goto exit;
5195 /* ...otherwise clear out all the status bits but the RF Kill and
5196 * SUSPEND bits and continue taking the NIC down. */
5197 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5198 STATUS_RF_KILL_HW |
5199 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5200 STATUS_RF_KILL_SW |
5201 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5202 STATUS_GEO_CONFIGURED |
5203 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5204 STATUS_IN_SUSPEND |
5205 test_bit(STATUS_FW_ERROR, &priv->status) <<
5206 STATUS_FW_ERROR |
5207 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5208 STATUS_EXIT_PENDING;
5210 spin_lock_irqsave(&priv->lock, flags);
5211 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
5212 spin_unlock_irqrestore(&priv->lock, flags);
5214 iwl3945_hw_txq_ctx_stop(priv);
5215 iwl3945_hw_rxq_stop(priv);
5217 spin_lock_irqsave(&priv->lock, flags);
5218 if (!iwl_grab_nic_access(priv)) {
5219 iwl_write_prph(priv, APMG_CLK_DIS_REG,
5220 APMG_CLK_VAL_DMA_CLK_RQT);
5221 iwl_release_nic_access(priv);
5223 spin_unlock_irqrestore(&priv->lock, flags);
5225 udelay(5);
5227 priv->cfg->ops->lib->apm_ops.reset(priv);
5228 exit:
5229 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
5231 if (priv->ibss_beacon)
5232 dev_kfree_skb(priv->ibss_beacon);
5233 priv->ibss_beacon = NULL;
5235 /* clear out any free frames */
5236 iwl3945_clear_free_frames(priv);
5239 static void iwl3945_down(struct iwl_priv *priv)
5241 mutex_lock(&priv->mutex);
5242 __iwl3945_down(priv);
5243 mutex_unlock(&priv->mutex);
5245 iwl3945_cancel_deferred_work(priv);
5248 #define MAX_HW_RESTARTS 5
5250 static int __iwl3945_up(struct iwl_priv *priv)
5252 int rc, i;
5254 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5255 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
5256 return -EIO;
5259 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5260 IWL_WARN(priv, "Radio disabled by SW RF kill (module "
5261 "parameter)\n");
5262 return -ENODEV;
5265 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5266 IWL_ERR(priv, "ucode not available for device bring up\n");
5267 return -EIO;
5270 /* If platform's RF_KILL switch is NOT set to KILL */
5271 if (iwl_read32(priv, CSR_GP_CNTRL) &
5272 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5273 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5274 else {
5275 set_bit(STATUS_RF_KILL_HW, &priv->status);
5276 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
5277 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
5278 return -ENODEV;
5282 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5284 rc = iwl3945_hw_nic_init(priv);
5285 if (rc) {
5286 IWL_ERR(priv, "Unable to int nic\n");
5287 return rc;
5290 /* make sure rfkill handshake bits are cleared */
5291 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5292 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
5293 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5295 /* clear (again), then enable host interrupts */
5296 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5297 iwl3945_enable_interrupts(priv);
5299 /* really make sure rfkill handshake bits are cleared */
5300 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5301 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5303 /* Copy original ucode data image from disk into backup cache.
5304 * This will be used to initialize the on-board processor's
5305 * data SRAM for a clean start when the runtime program first loads. */
5306 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5307 priv->ucode_data.len);
5309 /* We return success when we resume from suspend and rf_kill is on. */
5310 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
5311 return 0;
5313 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5315 iwl3945_clear_stations_table(priv);
5317 /* load bootstrap state machine,
5318 * load bootstrap program into processor's memory,
5319 * prepare to load the "initialize" uCode */
5320 priv->cfg->ops->lib->load_ucode(priv);
5322 if (rc) {
5323 IWL_ERR(priv,
5324 "Unable to set up bootstrap uCode: %d\n", rc);
5325 continue;
5328 /* start card; "initialize" will load runtime ucode */
5329 iwl3945_nic_start(priv);
5331 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
5333 return 0;
5336 set_bit(STATUS_EXIT_PENDING, &priv->status);
5337 __iwl3945_down(priv);
5338 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5340 /* tried to restart and config the device for as long as our
5341 * patience could withstand */
5342 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
5343 return -EIO;
5347 /*****************************************************************************
5349 * Workqueue callbacks
5351 *****************************************************************************/
5353 static void iwl3945_bg_init_alive_start(struct work_struct *data)
5355 struct iwl_priv *priv =
5356 container_of(data, struct iwl_priv, init_alive_start.work);
5358 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5359 return;
5361 mutex_lock(&priv->mutex);
5362 iwl3945_init_alive_start(priv);
5363 mutex_unlock(&priv->mutex);
5366 static void iwl3945_bg_alive_start(struct work_struct *data)
5368 struct iwl_priv *priv =
5369 container_of(data, struct iwl_priv, alive_start.work);
5371 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5372 return;
5374 mutex_lock(&priv->mutex);
5375 iwl3945_alive_start(priv);
5376 mutex_unlock(&priv->mutex);
5379 static void iwl3945_bg_rf_kill(struct work_struct *work)
5381 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
5383 wake_up_interruptible(&priv->wait_command_queue);
5385 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5386 return;
5388 mutex_lock(&priv->mutex);
5390 if (!iwl_is_rfkill(priv)) {
5391 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
5392 "HW and/or SW RF Kill no longer active, restarting "
5393 "device\n");
5394 if (!test_bit(STATUS_EXIT_PENDING, &priv->status) &&
5395 test_bit(STATUS_ALIVE, &priv->status))
5396 queue_work(priv->workqueue, &priv->restart);
5397 } else {
5399 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
5400 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
5401 "disabled by SW switch\n");
5402 else
5403 IWL_WARN(priv, "Radio Frequency Kill Switch is On:\n"
5404 "Kill switch must be turned off for "
5405 "wireless networking to work.\n");
5408 mutex_unlock(&priv->mutex);
5409 iwl3945_rfkill_set_hw_state(priv);
5412 static void iwl3945_rfkill_poll(struct work_struct *data)
5414 struct iwl_priv *priv =
5415 container_of(data, struct iwl_priv, rfkill_poll.work);
5416 unsigned long status = priv->status;
5418 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5419 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5420 else
5421 set_bit(STATUS_RF_KILL_HW, &priv->status);
5423 if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status))
5424 queue_work(priv->workqueue, &priv->rf_kill);
5426 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
5427 round_jiffies_relative(2 * HZ));
5431 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
5433 static void iwl3945_bg_scan_check(struct work_struct *data)
5435 struct iwl_priv *priv =
5436 container_of(data, struct iwl_priv, scan_check.work);
5438 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5439 return;
5441 mutex_lock(&priv->mutex);
5442 if (test_bit(STATUS_SCANNING, &priv->status) ||
5443 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5444 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
5445 "Scan completion watchdog resetting adapter (%dms)\n",
5446 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
5448 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5449 iwl3945_send_scan_abort(priv);
5451 mutex_unlock(&priv->mutex);
5454 static void iwl3945_bg_request_scan(struct work_struct *data)
5456 struct iwl_priv *priv =
5457 container_of(data, struct iwl_priv, request_scan);
5458 struct iwl_host_cmd cmd = {
5459 .id = REPLY_SCAN_CMD,
5460 .len = sizeof(struct iwl3945_scan_cmd),
5461 .meta.flags = CMD_SIZE_HUGE,
5463 int rc = 0;
5464 struct iwl3945_scan_cmd *scan;
5465 struct ieee80211_conf *conf = NULL;
5466 u8 n_probes = 2;
5467 enum ieee80211_band band;
5468 DECLARE_SSID_BUF(ssid);
5470 conf = ieee80211_get_hw_conf(priv->hw);
5472 mutex_lock(&priv->mutex);
5474 if (!iwl_is_ready(priv)) {
5475 IWL_WARN(priv, "request scan called when driver not ready.\n");
5476 goto done;
5479 /* Make sure the scan wasn't canceled before this queued work
5480 * was given the chance to run... */
5481 if (!test_bit(STATUS_SCANNING, &priv->status))
5482 goto done;
5484 /* This should never be called or scheduled if there is currently
5485 * a scan active in the hardware. */
5486 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
5487 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
5488 "Ignoring second request.\n");
5489 rc = -EIO;
5490 goto done;
5493 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5494 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
5495 goto done;
5498 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5499 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
5500 goto done;
5503 if (iwl_is_rfkill(priv)) {
5504 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
5505 goto done;
5508 if (!test_bit(STATUS_READY, &priv->status)) {
5509 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
5510 goto done;
5513 if (!priv->scan_bands) {
5514 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
5515 goto done;
5518 if (!priv->scan39) {
5519 priv->scan39 = kmalloc(sizeof(struct iwl3945_scan_cmd) +
5520 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
5521 if (!priv->scan39) {
5522 rc = -ENOMEM;
5523 goto done;
5526 scan = priv->scan39;
5527 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
5529 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
5530 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
5532 if (iwl3945_is_associated(priv)) {
5533 u16 interval = 0;
5534 u32 extra;
5535 u32 suspend_time = 100;
5536 u32 scan_suspend_time = 100;
5537 unsigned long flags;
5539 IWL_DEBUG_INFO("Scanning while associated...\n");
5541 spin_lock_irqsave(&priv->lock, flags);
5542 interval = priv->beacon_int;
5543 spin_unlock_irqrestore(&priv->lock, flags);
5545 scan->suspend_time = 0;
5546 scan->max_out_time = cpu_to_le32(200 * 1024);
5547 if (!interval)
5548 interval = suspend_time;
5550 * suspend time format:
5551 * 0-19: beacon interval in usec (time before exec.)
5552 * 20-23: 0
5553 * 24-31: number of beacons (suspend between channels)
5556 extra = (suspend_time / interval) << 24;
5557 scan_suspend_time = 0xFF0FFFFF &
5558 (extra | ((suspend_time % interval) * 1024));
5560 scan->suspend_time = cpu_to_le32(scan_suspend_time);
5561 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
5562 scan_suspend_time, interval);
5565 /* We should add the ability for user to lock to PASSIVE ONLY */
5566 if (priv->one_direct_scan) {
5567 IWL_DEBUG_SCAN
5568 ("Kicking off one direct scan for '%s'\n",
5569 print_ssid(ssid, priv->direct_ssid,
5570 priv->direct_ssid_len));
5571 scan->direct_scan[0].id = WLAN_EID_SSID;
5572 scan->direct_scan[0].len = priv->direct_ssid_len;
5573 memcpy(scan->direct_scan[0].ssid,
5574 priv->direct_ssid, priv->direct_ssid_len);
5575 n_probes++;
5576 } else
5577 IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
5579 /* We don't build a direct scan probe request; the uCode will do
5580 * that based on the direct_mask added to each channel entry */
5581 scan->tx_cmd.len = cpu_to_le16(
5582 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
5583 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
5584 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
5585 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
5586 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
5588 /* flags + rate selection */
5590 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
5591 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
5592 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
5593 scan->good_CRC_th = 0;
5594 band = IEEE80211_BAND_2GHZ;
5595 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
5596 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
5597 scan->good_CRC_th = IWL_GOOD_CRC_TH;
5598 band = IEEE80211_BAND_5GHZ;
5599 } else {
5600 IWL_WARN(priv, "Invalid scan band count\n");
5601 goto done;
5604 /* select Rx antennas */
5605 scan->flags |= iwl3945_get_antenna_flags(priv);
5607 if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
5608 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
5610 scan->channel_count =
5611 iwl3945_get_channels_for_scan(priv, band, 1, /* active */
5612 n_probes,
5613 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
5615 if (scan->channel_count == 0) {
5616 IWL_DEBUG_SCAN("channel count %d\n", scan->channel_count);
5617 goto done;
5620 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
5621 scan->channel_count * sizeof(struct iwl3945_scan_channel);
5622 cmd.data = scan;
5623 scan->len = cpu_to_le16(cmd.len);
5625 set_bit(STATUS_SCAN_HW, &priv->status);
5626 rc = iwl3945_send_cmd_sync(priv, &cmd);
5627 if (rc)
5628 goto done;
5630 queue_delayed_work(priv->workqueue, &priv->scan_check,
5631 IWL_SCAN_CHECK_WATCHDOG);
5633 mutex_unlock(&priv->mutex);
5634 return;
5636 done:
5637 /* can not perform scan make sure we clear scanning
5638 * bits from status so next scan request can be performed.
5639 * if we dont clear scanning status bit here all next scan
5640 * will fail
5642 clear_bit(STATUS_SCAN_HW, &priv->status);
5643 clear_bit(STATUS_SCANNING, &priv->status);
5645 /* inform mac80211 scan aborted */
5646 queue_work(priv->workqueue, &priv->scan_completed);
5647 mutex_unlock(&priv->mutex);
5650 static void iwl3945_bg_up(struct work_struct *data)
5652 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
5654 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5655 return;
5657 mutex_lock(&priv->mutex);
5658 __iwl3945_up(priv);
5659 mutex_unlock(&priv->mutex);
5660 iwl3945_rfkill_set_hw_state(priv);
5663 static void iwl3945_bg_restart(struct work_struct *data)
5665 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
5667 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5668 return;
5670 iwl3945_down(priv);
5671 queue_work(priv->workqueue, &priv->up);
5674 static void iwl3945_bg_rx_replenish(struct work_struct *data)
5676 struct iwl_priv *priv =
5677 container_of(data, struct iwl_priv, rx_replenish);
5679 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5680 return;
5682 mutex_lock(&priv->mutex);
5683 iwl3945_rx_replenish(priv);
5684 mutex_unlock(&priv->mutex);
5687 #define IWL_DELAY_NEXT_SCAN (HZ*2)
5689 static void iwl3945_post_associate(struct iwl_priv *priv)
5691 int rc = 0;
5692 struct ieee80211_conf *conf = NULL;
5694 if (priv->iw_mode == NL80211_IFTYPE_AP) {
5695 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
5696 return;
5700 IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
5701 priv->assoc_id, priv->active39_rxon.bssid_addr);
5703 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5704 return;
5706 if (!priv->vif || !priv->is_open)
5707 return;
5709 iwl_scan_cancel_timeout(priv, 200);
5711 conf = ieee80211_get_hw_conf(priv->hw);
5713 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5714 iwl3945_commit_rxon(priv);
5716 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
5717 iwl3945_setup_rxon_timing(priv);
5718 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
5719 sizeof(priv->rxon_timing), &priv->rxon_timing);
5720 if (rc)
5721 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
5722 "Attempting to continue.\n");
5724 priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
5726 priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
5728 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
5729 priv->assoc_id, priv->beacon_int);
5731 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
5732 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
5733 else
5734 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
5736 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
5737 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
5738 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
5739 else
5740 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
5742 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
5743 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
5747 iwl3945_commit_rxon(priv);
5749 switch (priv->iw_mode) {
5750 case NL80211_IFTYPE_STATION:
5751 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
5752 break;
5754 case NL80211_IFTYPE_ADHOC:
5756 priv->assoc_id = 1;
5757 iwl3945_add_station(priv, priv->bssid, 0, 0);
5758 iwl3945_sync_sta(priv, IWL_STA_ID,
5759 (priv->band == IEEE80211_BAND_5GHZ) ?
5760 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
5761 CMD_ASYNC);
5762 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
5763 iwl3945_send_beacon_cmd(priv);
5765 break;
5767 default:
5768 IWL_ERR(priv, "%s Should not be called in %d mode\n",
5769 __func__, priv->iw_mode);
5770 break;
5773 iwl3945_activate_qos(priv, 0);
5775 /* we have just associated, don't start scan too early */
5776 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
5779 static void iwl3945_bg_abort_scan(struct work_struct *work)
5781 struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
5783 if (!iwl_is_ready(priv))
5784 return;
5786 mutex_lock(&priv->mutex);
5788 set_bit(STATUS_SCAN_ABORTING, &priv->status);
5789 iwl3945_send_scan_abort(priv);
5791 mutex_unlock(&priv->mutex);
5794 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
5796 static void iwl3945_bg_scan_completed(struct work_struct *work)
5798 struct iwl_priv *priv =
5799 container_of(work, struct iwl_priv, scan_completed);
5801 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
5803 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5804 return;
5806 if (test_bit(STATUS_CONF_PENDING, &priv->status))
5807 iwl3945_mac_config(priv->hw, 0);
5809 ieee80211_scan_completed(priv->hw);
5811 /* Since setting the TXPOWER may have been deferred while
5812 * performing the scan, fire one off */
5813 mutex_lock(&priv->mutex);
5814 iwl3945_hw_reg_send_txpower(priv);
5815 mutex_unlock(&priv->mutex);
5818 /*****************************************************************************
5820 * mac80211 entry point functions
5822 *****************************************************************************/
5824 #define UCODE_READY_TIMEOUT (2 * HZ)
5826 static int iwl3945_mac_start(struct ieee80211_hw *hw)
5828 struct iwl_priv *priv = hw->priv;
5829 int ret;
5831 IWL_DEBUG_MAC80211("enter\n");
5833 /* we should be verifying the device is ready to be opened */
5834 mutex_lock(&priv->mutex);
5836 memset(&priv->staging39_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
5837 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
5838 * ucode filename and max sizes are card-specific. */
5840 if (!priv->ucode_code.len) {
5841 ret = iwl3945_read_ucode(priv);
5842 if (ret) {
5843 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
5844 mutex_unlock(&priv->mutex);
5845 goto out_release_irq;
5849 ret = __iwl3945_up(priv);
5851 mutex_unlock(&priv->mutex);
5853 iwl3945_rfkill_set_hw_state(priv);
5855 if (ret)
5856 goto out_release_irq;
5858 IWL_DEBUG_INFO("Start UP work.\n");
5860 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
5861 return 0;
5863 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
5864 * mac80211 will not be run successfully. */
5865 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
5866 test_bit(STATUS_READY, &priv->status),
5867 UCODE_READY_TIMEOUT);
5868 if (!ret) {
5869 if (!test_bit(STATUS_READY, &priv->status)) {
5870 IWL_ERR(priv,
5871 "Wait for START_ALIVE timeout after %dms.\n",
5872 jiffies_to_msecs(UCODE_READY_TIMEOUT));
5873 ret = -ETIMEDOUT;
5874 goto out_release_irq;
5878 /* ucode is running and will send rfkill notifications,
5879 * no need to poll the killswitch state anymore */
5880 cancel_delayed_work(&priv->rfkill_poll);
5882 priv->is_open = 1;
5883 IWL_DEBUG_MAC80211("leave\n");
5884 return 0;
5886 out_release_irq:
5887 priv->is_open = 0;
5888 IWL_DEBUG_MAC80211("leave - failed\n");
5889 return ret;
5892 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
5894 struct iwl_priv *priv = hw->priv;
5896 IWL_DEBUG_MAC80211("enter\n");
5898 if (!priv->is_open) {
5899 IWL_DEBUG_MAC80211("leave - skip\n");
5900 return;
5903 priv->is_open = 0;
5905 if (iwl_is_ready_rf(priv)) {
5906 /* stop mac, cancel any scan request and clear
5907 * RXON_FILTER_ASSOC_MSK BIT
5909 mutex_lock(&priv->mutex);
5910 iwl_scan_cancel_timeout(priv, 100);
5911 mutex_unlock(&priv->mutex);
5914 iwl3945_down(priv);
5916 flush_workqueue(priv->workqueue);
5918 /* start polling the killswitch state again */
5919 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
5920 round_jiffies_relative(2 * HZ));
5922 IWL_DEBUG_MAC80211("leave\n");
5925 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
5927 struct iwl_priv *priv = hw->priv;
5929 IWL_DEBUG_MAC80211("enter\n");
5931 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
5932 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
5934 if (iwl3945_tx_skb(priv, skb))
5935 dev_kfree_skb_any(skb);
5937 IWL_DEBUG_MAC80211("leave\n");
5938 return NETDEV_TX_OK;
5941 static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
5942 struct ieee80211_if_init_conf *conf)
5944 struct iwl_priv *priv = hw->priv;
5945 unsigned long flags;
5947 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
5949 if (priv->vif) {
5950 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
5951 return -EOPNOTSUPP;
5954 spin_lock_irqsave(&priv->lock, flags);
5955 priv->vif = conf->vif;
5956 priv->iw_mode = conf->type;
5958 spin_unlock_irqrestore(&priv->lock, flags);
5960 mutex_lock(&priv->mutex);
5962 if (conf->mac_addr) {
5963 IWL_DEBUG_MAC80211("Set: %pM\n", conf->mac_addr);
5964 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
5967 if (iwl_is_ready(priv))
5968 iwl3945_set_mode(priv, conf->type);
5970 mutex_unlock(&priv->mutex);
5972 IWL_DEBUG_MAC80211("leave\n");
5973 return 0;
5977 * iwl3945_mac_config - mac80211 config callback
5979 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
5980 * be set inappropriately and the driver currently sets the hardware up to
5981 * use it whenever needed.
5983 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
5985 struct iwl_priv *priv = hw->priv;
5986 const struct iwl_channel_info *ch_info;
5987 struct ieee80211_conf *conf = &hw->conf;
5988 unsigned long flags;
5989 int ret = 0;
5991 mutex_lock(&priv->mutex);
5992 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
5994 if (!iwl_is_ready(priv)) {
5995 IWL_DEBUG_MAC80211("leave - not ready\n");
5996 ret = -EIO;
5997 goto out;
6000 if (unlikely(!iwl3945_mod_params.disable_hw_scan &&
6001 test_bit(STATUS_SCANNING, &priv->status))) {
6002 IWL_DEBUG_MAC80211("leave - scanning\n");
6003 set_bit(STATUS_CONF_PENDING, &priv->status);
6004 mutex_unlock(&priv->mutex);
6005 return 0;
6008 spin_lock_irqsave(&priv->lock, flags);
6010 ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
6011 conf->channel->hw_value);
6012 if (!is_channel_valid(ch_info)) {
6013 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n",
6014 conf->channel->hw_value, conf->channel->band);
6015 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6016 spin_unlock_irqrestore(&priv->lock, flags);
6017 ret = -EINVAL;
6018 goto out;
6021 iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
6023 iwl3945_set_flags_for_phymode(priv, conf->channel->band);
6025 /* The list of supported rates and rate mask can be different
6026 * for each phymode; since the phymode may have changed, reset
6027 * the rate mask to what mac80211 lists */
6028 iwl3945_set_rate(priv);
6030 spin_unlock_irqrestore(&priv->lock, flags);
6032 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
6033 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
6034 iwl3945_hw_channel_switch(priv, conf->channel);
6035 goto out;
6037 #endif
6039 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
6041 if (!conf->radio_enabled) {
6042 IWL_DEBUG_MAC80211("leave - radio disabled\n");
6043 goto out;
6046 if (iwl_is_rfkill(priv)) {
6047 IWL_DEBUG_MAC80211("leave - RF kill\n");
6048 ret = -EIO;
6049 goto out;
6052 iwl3945_set_rate(priv);
6054 if (memcmp(&priv->active39_rxon,
6055 &priv->staging39_rxon, sizeof(priv->staging39_rxon)))
6056 iwl3945_commit_rxon(priv);
6057 else
6058 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6060 IWL_DEBUG_MAC80211("leave\n");
6062 out:
6063 clear_bit(STATUS_CONF_PENDING, &priv->status);
6064 mutex_unlock(&priv->mutex);
6065 return ret;
6068 static void iwl3945_config_ap(struct iwl_priv *priv)
6070 int rc = 0;
6072 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6073 return;
6075 /* The following should be done only at AP bring up */
6076 if (!(iwl3945_is_associated(priv))) {
6078 /* RXON - unassoc (to set timing command) */
6079 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6080 iwl3945_commit_rxon(priv);
6082 /* RXON Timing */
6083 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
6084 iwl3945_setup_rxon_timing(priv);
6085 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6086 sizeof(priv->rxon_timing), &priv->rxon_timing);
6087 if (rc)
6088 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
6089 "Attempting to continue.\n");
6091 /* FIXME: what should be the assoc_id for AP? */
6092 priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6093 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6094 priv->staging39_rxon.flags |=
6095 RXON_FLG_SHORT_PREAMBLE_MSK;
6096 else
6097 priv->staging39_rxon.flags &=
6098 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6100 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6101 if (priv->assoc_capability &
6102 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6103 priv->staging39_rxon.flags |=
6104 RXON_FLG_SHORT_SLOT_MSK;
6105 else
6106 priv->staging39_rxon.flags &=
6107 ~RXON_FLG_SHORT_SLOT_MSK;
6109 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
6110 priv->staging39_rxon.flags &=
6111 ~RXON_FLG_SHORT_SLOT_MSK;
6113 /* restore RXON assoc */
6114 priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6115 iwl3945_commit_rxon(priv);
6116 iwl3945_add_station(priv, iwl_bcast_addr, 0, 0);
6118 iwl3945_send_beacon_cmd(priv);
6120 /* FIXME - we need to add code here to detect a totally new
6121 * configuration, reset the AP, unassoc, rxon timing, assoc,
6122 * clear sta table, add BCAST sta... */
6125 static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
6126 struct ieee80211_vif *vif,
6127 struct ieee80211_if_conf *conf)
6129 struct iwl_priv *priv = hw->priv;
6130 int rc;
6132 if (conf == NULL)
6133 return -EIO;
6135 if (priv->vif != vif) {
6136 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
6137 return 0;
6140 /* handle this temporarily here */
6141 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
6142 conf->changed & IEEE80211_IFCC_BEACON) {
6143 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
6144 if (!beacon)
6145 return -ENOMEM;
6146 mutex_lock(&priv->mutex);
6147 rc = iwl3945_mac_beacon_update(hw, beacon);
6148 mutex_unlock(&priv->mutex);
6149 if (rc)
6150 return rc;
6153 if (!iwl_is_alive(priv))
6154 return -EAGAIN;
6156 mutex_lock(&priv->mutex);
6158 if (conf->bssid)
6159 IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
6162 * very dubious code was here; the probe filtering flag is never set:
6164 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6165 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
6168 if (priv->iw_mode == NL80211_IFTYPE_AP) {
6169 if (!conf->bssid) {
6170 conf->bssid = priv->mac_addr;
6171 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
6172 IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
6173 conf->bssid);
6175 if (priv->ibss_beacon)
6176 dev_kfree_skb(priv->ibss_beacon);
6178 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
6181 if (iwl_is_rfkill(priv))
6182 goto done;
6184 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6185 !is_multicast_ether_addr(conf->bssid)) {
6186 /* If there is currently a HW scan going on in the background
6187 * then we need to cancel it else the RXON below will fail. */
6188 if (iwl_scan_cancel_timeout(priv, 100)) {
6189 IWL_WARN(priv, "Aborted scan still in progress "
6190 "after 100ms\n");
6191 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6192 mutex_unlock(&priv->mutex);
6193 return -EAGAIN;
6195 memcpy(priv->staging39_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6197 /* TODO: Audit driver for usage of these members and see
6198 * if mac80211 deprecates them (priv->bssid looks like it
6199 * shouldn't be there, but I haven't scanned the IBSS code
6200 * to verify) - jpk */
6201 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6203 if (priv->iw_mode == NL80211_IFTYPE_AP)
6204 iwl3945_config_ap(priv);
6205 else {
6206 rc = iwl3945_commit_rxon(priv);
6207 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
6208 iwl3945_add_station(priv,
6209 priv->active39_rxon.bssid_addr, 1, 0);
6212 } else {
6213 iwl_scan_cancel_timeout(priv, 100);
6214 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6215 iwl3945_commit_rxon(priv);
6218 done:
6219 IWL_DEBUG_MAC80211("leave\n");
6220 mutex_unlock(&priv->mutex);
6222 return 0;
6225 static void iwl3945_configure_filter(struct ieee80211_hw *hw,
6226 unsigned int changed_flags,
6227 unsigned int *total_flags,
6228 int mc_count, struct dev_addr_list *mc_list)
6230 struct iwl_priv *priv = hw->priv;
6231 __le32 *filter_flags = &priv->staging39_rxon.filter_flags;
6233 IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
6234 changed_flags, *total_flags);
6236 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
6237 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
6238 *filter_flags |= RXON_FILTER_PROMISC_MSK;
6239 else
6240 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
6242 if (changed_flags & FIF_ALLMULTI) {
6243 if (*total_flags & FIF_ALLMULTI)
6244 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
6245 else
6246 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
6248 if (changed_flags & FIF_CONTROL) {
6249 if (*total_flags & FIF_CONTROL)
6250 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
6251 else
6252 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
6254 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
6255 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
6256 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
6257 else
6258 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
6261 /* We avoid iwl_commit_rxon here to commit the new filter flags
6262 * since mac80211 will call ieee80211_hw_config immediately.
6263 * (mc_list is not supported at this time). Otherwise, we need to
6264 * queue a background iwl_commit_rxon work.
6267 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
6268 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
6271 static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
6272 struct ieee80211_if_init_conf *conf)
6274 struct iwl_priv *priv = hw->priv;
6276 IWL_DEBUG_MAC80211("enter\n");
6278 mutex_lock(&priv->mutex);
6280 if (iwl_is_ready_rf(priv)) {
6281 iwl_scan_cancel_timeout(priv, 100);
6282 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6283 iwl3945_commit_rxon(priv);
6285 if (priv->vif == conf->vif) {
6286 priv->vif = NULL;
6287 memset(priv->bssid, 0, ETH_ALEN);
6289 mutex_unlock(&priv->mutex);
6291 IWL_DEBUG_MAC80211("leave\n");
6294 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
6296 static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
6297 struct ieee80211_vif *vif,
6298 struct ieee80211_bss_conf *bss_conf,
6299 u32 changes)
6301 struct iwl_priv *priv = hw->priv;
6303 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
6305 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
6306 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
6307 bss_conf->use_short_preamble);
6308 if (bss_conf->use_short_preamble)
6309 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6310 else
6311 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6314 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
6315 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
6316 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
6317 priv->staging39_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
6318 else
6319 priv->staging39_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
6322 if (changes & BSS_CHANGED_ASSOC) {
6323 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
6324 /* This should never happen as this function should
6325 * never be called from interrupt context. */
6326 if (WARN_ON_ONCE(in_interrupt()))
6327 return;
6328 if (bss_conf->assoc) {
6329 priv->assoc_id = bss_conf->aid;
6330 priv->beacon_int = bss_conf->beacon_int;
6331 priv->timestamp = bss_conf->timestamp;
6332 priv->assoc_capability = bss_conf->assoc_capability;
6333 priv->next_scan_jiffies = jiffies +
6334 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
6335 mutex_lock(&priv->mutex);
6336 iwl3945_post_associate(priv);
6337 mutex_unlock(&priv->mutex);
6338 } else {
6339 priv->assoc_id = 0;
6340 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
6342 } else if (changes && iwl3945_is_associated(priv) && priv->assoc_id) {
6343 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
6344 iwl3945_send_rxon_assoc(priv);
6349 static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
6351 int rc = 0;
6352 unsigned long flags;
6353 struct iwl_priv *priv = hw->priv;
6354 DECLARE_SSID_BUF(ssid_buf);
6356 IWL_DEBUG_MAC80211("enter\n");
6358 mutex_lock(&priv->mutex);
6359 spin_lock_irqsave(&priv->lock, flags);
6361 if (!iwl_is_ready_rf(priv)) {
6362 rc = -EIO;
6363 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
6364 goto out_unlock;
6367 /* we don't schedule scan within next_scan_jiffies period */
6368 if (priv->next_scan_jiffies &&
6369 time_after(priv->next_scan_jiffies, jiffies)) {
6370 rc = -EAGAIN;
6371 goto out_unlock;
6373 /* if we just finished scan ask for delay for a broadcast scan */
6374 if ((len == 0) && priv->last_scan_jiffies &&
6375 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
6376 jiffies)) {
6377 rc = -EAGAIN;
6378 goto out_unlock;
6380 if (len) {
6381 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
6382 print_ssid(ssid_buf, ssid, len), (int)len);
6384 priv->one_direct_scan = 1;
6385 priv->direct_ssid_len = (u8)
6386 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
6387 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
6388 } else
6389 priv->one_direct_scan = 0;
6391 rc = iwl3945_scan_initiate(priv);
6393 IWL_DEBUG_MAC80211("leave\n");
6395 out_unlock:
6396 spin_unlock_irqrestore(&priv->lock, flags);
6397 mutex_unlock(&priv->mutex);
6399 return rc;
6402 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
6403 struct ieee80211_vif *vif,
6404 struct ieee80211_sta *sta,
6405 struct ieee80211_key_conf *key)
6407 struct iwl_priv *priv = hw->priv;
6408 const u8 *addr;
6409 int ret;
6410 u8 sta_id;
6412 IWL_DEBUG_MAC80211("enter\n");
6414 if (iwl3945_mod_params.sw_crypto) {
6415 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
6416 return -EOPNOTSUPP;
6419 addr = sta ? sta->addr : iwl_bcast_addr;
6420 sta_id = iwl3945_hw_find_station(priv, addr);
6421 if (sta_id == IWL_INVALID_STATION) {
6422 IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
6423 addr);
6424 return -EINVAL;
6427 mutex_lock(&priv->mutex);
6429 iwl_scan_cancel_timeout(priv, 100);
6431 switch (cmd) {
6432 case SET_KEY:
6433 ret = iwl3945_update_sta_key_info(priv, key, sta_id);
6434 if (!ret) {
6435 iwl3945_set_rxon_hwcrypto(priv, 1);
6436 iwl3945_commit_rxon(priv);
6437 key->hw_key_idx = sta_id;
6438 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
6439 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
6441 break;
6442 case DISABLE_KEY:
6443 ret = iwl3945_clear_sta_key_info(priv, sta_id);
6444 if (!ret) {
6445 iwl3945_set_rxon_hwcrypto(priv, 0);
6446 iwl3945_commit_rxon(priv);
6447 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
6449 break;
6450 default:
6451 ret = -EINVAL;
6454 IWL_DEBUG_MAC80211("leave\n");
6455 mutex_unlock(&priv->mutex);
6457 return ret;
6460 static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
6461 const struct ieee80211_tx_queue_params *params)
6463 struct iwl_priv *priv = hw->priv;
6464 unsigned long flags;
6465 int q;
6467 IWL_DEBUG_MAC80211("enter\n");
6469 if (!iwl_is_ready_rf(priv)) {
6470 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6471 return -EIO;
6474 if (queue >= AC_NUM) {
6475 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
6476 return 0;
6479 q = AC_NUM - 1 - queue;
6481 spin_lock_irqsave(&priv->lock, flags);
6483 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
6484 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
6485 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
6486 priv->qos_data.def_qos_parm.ac[q].edca_txop =
6487 cpu_to_le16((params->txop * 32));
6489 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
6490 priv->qos_data.qos_active = 1;
6492 spin_unlock_irqrestore(&priv->lock, flags);
6494 mutex_lock(&priv->mutex);
6495 if (priv->iw_mode == NL80211_IFTYPE_AP)
6496 iwl3945_activate_qos(priv, 1);
6497 else if (priv->assoc_id && iwl3945_is_associated(priv))
6498 iwl3945_activate_qos(priv, 0);
6500 mutex_unlock(&priv->mutex);
6502 IWL_DEBUG_MAC80211("leave\n");
6503 return 0;
6506 static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
6507 struct ieee80211_tx_queue_stats *stats)
6509 struct iwl_priv *priv = hw->priv;
6510 int i, avail;
6511 struct iwl_tx_queue *txq;
6512 struct iwl_queue *q;
6513 unsigned long flags;
6515 IWL_DEBUG_MAC80211("enter\n");
6517 if (!iwl_is_ready_rf(priv)) {
6518 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6519 return -EIO;
6522 spin_lock_irqsave(&priv->lock, flags);
6524 for (i = 0; i < AC_NUM; i++) {
6525 txq = &priv->txq[i];
6526 q = &txq->q;
6527 avail = iwl_queue_space(q);
6529 stats[i].len = q->n_window - avail;
6530 stats[i].limit = q->n_window - q->high_mark;
6531 stats[i].count = q->n_window;
6534 spin_unlock_irqrestore(&priv->lock, flags);
6536 IWL_DEBUG_MAC80211("leave\n");
6538 return 0;
6541 static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
6543 struct iwl_priv *priv = hw->priv;
6544 unsigned long flags;
6546 mutex_lock(&priv->mutex);
6547 IWL_DEBUG_MAC80211("enter\n");
6549 iwl_reset_qos(priv);
6551 spin_lock_irqsave(&priv->lock, flags);
6552 priv->assoc_id = 0;
6553 priv->assoc_capability = 0;
6554 priv->call_post_assoc_from_beacon = 0;
6556 /* new association get rid of ibss beacon skb */
6557 if (priv->ibss_beacon)
6558 dev_kfree_skb(priv->ibss_beacon);
6560 priv->ibss_beacon = NULL;
6562 priv->beacon_int = priv->hw->conf.beacon_int;
6563 priv->timestamp = 0;
6564 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
6565 priv->beacon_int = 0;
6567 spin_unlock_irqrestore(&priv->lock, flags);
6569 if (!iwl_is_ready_rf(priv)) {
6570 IWL_DEBUG_MAC80211("leave - not ready\n");
6571 mutex_unlock(&priv->mutex);
6572 return;
6575 /* we are restarting association process
6576 * clear RXON_FILTER_ASSOC_MSK bit
6578 if (priv->iw_mode != NL80211_IFTYPE_AP) {
6579 iwl_scan_cancel_timeout(priv, 100);
6580 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6581 iwl3945_commit_rxon(priv);
6584 /* Per mac80211.h: This is only used in IBSS mode... */
6585 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
6587 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
6588 mutex_unlock(&priv->mutex);
6589 return;
6592 iwl3945_set_rate(priv);
6594 mutex_unlock(&priv->mutex);
6596 IWL_DEBUG_MAC80211("leave\n");
6600 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
6602 struct iwl_priv *priv = hw->priv;
6603 unsigned long flags;
6605 IWL_DEBUG_MAC80211("enter\n");
6607 if (!iwl_is_ready_rf(priv)) {
6608 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6609 return -EIO;
6612 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
6613 IWL_DEBUG_MAC80211("leave - not IBSS\n");
6614 return -EIO;
6617 spin_lock_irqsave(&priv->lock, flags);
6619 if (priv->ibss_beacon)
6620 dev_kfree_skb(priv->ibss_beacon);
6622 priv->ibss_beacon = skb;
6624 priv->assoc_id = 0;
6626 IWL_DEBUG_MAC80211("leave\n");
6627 spin_unlock_irqrestore(&priv->lock, flags);
6629 iwl_reset_qos(priv);
6631 iwl3945_post_associate(priv);
6634 return 0;
6637 /*****************************************************************************
6639 * sysfs attributes
6641 *****************************************************************************/
6643 #ifdef CONFIG_IWL3945_DEBUG
6646 * The following adds a new attribute to the sysfs representation
6647 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
6648 * used for controlling the debug level.
6650 * See the level definitions in iwl for details.
6652 static ssize_t show_debug_level(struct device *d,
6653 struct device_attribute *attr, char *buf)
6655 struct iwl_priv *priv = d->driver_data;
6657 return sprintf(buf, "0x%08X\n", priv->debug_level);
6659 static ssize_t store_debug_level(struct device *d,
6660 struct device_attribute *attr,
6661 const char *buf, size_t count)
6663 struct iwl_priv *priv = d->driver_data;
6664 unsigned long val;
6665 int ret;
6667 ret = strict_strtoul(buf, 0, &val);
6668 if (ret)
6669 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
6670 else
6671 priv->debug_level = val;
6673 return strnlen(buf, count);
6676 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
6677 show_debug_level, store_debug_level);
6679 #endif /* CONFIG_IWL3945_DEBUG */
6681 static ssize_t show_temperature(struct device *d,
6682 struct device_attribute *attr, char *buf)
6684 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
6686 if (!iwl_is_alive(priv))
6687 return -EAGAIN;
6689 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
6692 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
6694 static ssize_t show_tx_power(struct device *d,
6695 struct device_attribute *attr, char *buf)
6697 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
6698 return sprintf(buf, "%d\n", priv->user_txpower_limit);
6701 static ssize_t store_tx_power(struct device *d,
6702 struct device_attribute *attr,
6703 const char *buf, size_t count)
6705 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
6706 char *p = (char *)buf;
6707 u32 val;
6709 val = simple_strtoul(p, &p, 10);
6710 if (p == buf)
6711 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
6712 else
6713 iwl3945_hw_reg_set_txpower(priv, val);
6715 return count;
6718 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
6720 static ssize_t show_flags(struct device *d,
6721 struct device_attribute *attr, char *buf)
6723 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
6725 return sprintf(buf, "0x%04X\n", priv->active39_rxon.flags);
6728 static ssize_t store_flags(struct device *d,
6729 struct device_attribute *attr,
6730 const char *buf, size_t count)
6732 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
6733 u32 flags = simple_strtoul(buf, NULL, 0);
6735 mutex_lock(&priv->mutex);
6736 if (le32_to_cpu(priv->staging39_rxon.flags) != flags) {
6737 /* Cancel any currently running scans... */
6738 if (iwl_scan_cancel_timeout(priv, 100))
6739 IWL_WARN(priv, "Could not cancel scan.\n");
6740 else {
6741 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
6742 flags);
6743 priv->staging39_rxon.flags = cpu_to_le32(flags);
6744 iwl3945_commit_rxon(priv);
6747 mutex_unlock(&priv->mutex);
6749 return count;
6752 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
6754 static ssize_t show_filter_flags(struct device *d,
6755 struct device_attribute *attr, char *buf)
6757 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
6759 return sprintf(buf, "0x%04X\n",
6760 le32_to_cpu(priv->active39_rxon.filter_flags));
6763 static ssize_t store_filter_flags(struct device *d,
6764 struct device_attribute *attr,
6765 const char *buf, size_t count)
6767 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
6768 u32 filter_flags = simple_strtoul(buf, NULL, 0);
6770 mutex_lock(&priv->mutex);
6771 if (le32_to_cpu(priv->staging39_rxon.filter_flags) != filter_flags) {
6772 /* Cancel any currently running scans... */
6773 if (iwl_scan_cancel_timeout(priv, 100))
6774 IWL_WARN(priv, "Could not cancel scan.\n");
6775 else {
6776 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
6777 "0x%04X\n", filter_flags);
6778 priv->staging39_rxon.filter_flags =
6779 cpu_to_le32(filter_flags);
6780 iwl3945_commit_rxon(priv);
6783 mutex_unlock(&priv->mutex);
6785 return count;
6788 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
6789 store_filter_flags);
6791 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
6793 static ssize_t show_measurement(struct device *d,
6794 struct device_attribute *attr, char *buf)
6796 struct iwl_priv *priv = dev_get_drvdata(d);
6797 struct iwl_spectrum_notification measure_report;
6798 u32 size = sizeof(measure_report), len = 0, ofs = 0;
6799 u8 *data = (u8 *)&measure_report;
6800 unsigned long flags;
6802 spin_lock_irqsave(&priv->lock, flags);
6803 if (!(priv->measurement_status & MEASUREMENT_READY)) {
6804 spin_unlock_irqrestore(&priv->lock, flags);
6805 return 0;
6807 memcpy(&measure_report, &priv->measure_report, size);
6808 priv->measurement_status = 0;
6809 spin_unlock_irqrestore(&priv->lock, flags);
6811 while (size && (PAGE_SIZE - len)) {
6812 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
6813 PAGE_SIZE - len, 1);
6814 len = strlen(buf);
6815 if (PAGE_SIZE - len)
6816 buf[len++] = '\n';
6818 ofs += 16;
6819 size -= min(size, 16U);
6822 return len;
6825 static ssize_t store_measurement(struct device *d,
6826 struct device_attribute *attr,
6827 const char *buf, size_t count)
6829 struct iwl_priv *priv = dev_get_drvdata(d);
6830 struct ieee80211_measurement_params params = {
6831 .channel = le16_to_cpu(priv->active39_rxon.channel),
6832 .start_time = cpu_to_le64(priv->last_tsf),
6833 .duration = cpu_to_le16(1),
6835 u8 type = IWL_MEASURE_BASIC;
6836 u8 buffer[32];
6837 u8 channel;
6839 if (count) {
6840 char *p = buffer;
6841 strncpy(buffer, buf, min(sizeof(buffer), count));
6842 channel = simple_strtoul(p, NULL, 0);
6843 if (channel)
6844 params.channel = channel;
6846 p = buffer;
6847 while (*p && *p != ' ')
6848 p++;
6849 if (*p)
6850 type = simple_strtoul(p + 1, NULL, 0);
6853 IWL_DEBUG_INFO("Invoking measurement of type %d on "
6854 "channel %d (for '%s')\n", type, params.channel, buf);
6855 iwl3945_get_measurement(priv, &params, type);
6857 return count;
6860 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
6861 show_measurement, store_measurement);
6862 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
6864 static ssize_t store_retry_rate(struct device *d,
6865 struct device_attribute *attr,
6866 const char *buf, size_t count)
6868 struct iwl_priv *priv = dev_get_drvdata(d);
6870 priv->retry_rate = simple_strtoul(buf, NULL, 0);
6871 if (priv->retry_rate <= 0)
6872 priv->retry_rate = 1;
6874 return count;
6877 static ssize_t show_retry_rate(struct device *d,
6878 struct device_attribute *attr, char *buf)
6880 struct iwl_priv *priv = dev_get_drvdata(d);
6881 return sprintf(buf, "%d", priv->retry_rate);
6884 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
6885 store_retry_rate);
6887 static ssize_t store_power_level(struct device *d,
6888 struct device_attribute *attr,
6889 const char *buf, size_t count)
6891 struct iwl_priv *priv = dev_get_drvdata(d);
6892 int rc;
6893 int mode;
6895 mode = simple_strtoul(buf, NULL, 0);
6896 mutex_lock(&priv->mutex);
6898 if (!iwl_is_ready(priv)) {
6899 rc = -EAGAIN;
6900 goto out;
6903 if ((mode < 1) || (mode > IWL39_POWER_LIMIT) ||
6904 (mode == IWL39_POWER_AC))
6905 mode = IWL39_POWER_AC;
6906 else
6907 mode |= IWL_POWER_ENABLED;
6909 if (mode != priv->power_mode) {
6910 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
6911 if (rc) {
6912 IWL_DEBUG_MAC80211("failed setting power mode.\n");
6913 goto out;
6915 priv->power_mode = mode;
6918 rc = count;
6920 out:
6921 mutex_unlock(&priv->mutex);
6922 return rc;
6925 #define MAX_WX_STRING 80
6927 /* Values are in microsecond */
6928 static const s32 timeout_duration[] = {
6929 350000,
6930 250000,
6931 75000,
6932 37000,
6933 25000,
6935 static const s32 period_duration[] = {
6936 400000,
6937 700000,
6938 1000000,
6939 1000000,
6940 1000000
6943 static ssize_t show_power_level(struct device *d,
6944 struct device_attribute *attr, char *buf)
6946 struct iwl_priv *priv = dev_get_drvdata(d);
6947 int level = IWL_POWER_LEVEL(priv->power_mode);
6948 char *p = buf;
6950 p += sprintf(p, "%d ", level);
6951 switch (level) {
6952 case IWL_POWER_MODE_CAM:
6953 case IWL39_POWER_AC:
6954 p += sprintf(p, "(AC)");
6955 break;
6956 case IWL39_POWER_BATTERY:
6957 p += sprintf(p, "(BATTERY)");
6958 break;
6959 default:
6960 p += sprintf(p,
6961 "(Timeout %dms, Period %dms)",
6962 timeout_duration[level - 1] / 1000,
6963 period_duration[level - 1] / 1000);
6966 if (!(priv->power_mode & IWL_POWER_ENABLED))
6967 p += sprintf(p, " OFF\n");
6968 else
6969 p += sprintf(p, " \n");
6971 return p - buf + 1;
6975 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
6976 store_power_level);
6978 static ssize_t show_channels(struct device *d,
6979 struct device_attribute *attr, char *buf)
6981 /* all this shit doesn't belong into sysfs anyway */
6982 return 0;
6985 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
6987 static ssize_t show_statistics(struct device *d,
6988 struct device_attribute *attr, char *buf)
6990 struct iwl_priv *priv = dev_get_drvdata(d);
6991 u32 size = sizeof(struct iwl3945_notif_statistics);
6992 u32 len = 0, ofs = 0;
6993 u8 *data = (u8 *)&priv->statistics_39;
6994 int rc = 0;
6996 if (!iwl_is_alive(priv))
6997 return -EAGAIN;
6999 mutex_lock(&priv->mutex);
7000 rc = iwl3945_send_statistics_request(priv);
7001 mutex_unlock(&priv->mutex);
7003 if (rc) {
7004 len = sprintf(buf,
7005 "Error sending statistics request: 0x%08X\n", rc);
7006 return len;
7009 while (size && (PAGE_SIZE - len)) {
7010 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7011 PAGE_SIZE - len, 1);
7012 len = strlen(buf);
7013 if (PAGE_SIZE - len)
7014 buf[len++] = '\n';
7016 ofs += 16;
7017 size -= min(size, 16U);
7020 return len;
7023 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7025 static ssize_t show_antenna(struct device *d,
7026 struct device_attribute *attr, char *buf)
7028 struct iwl_priv *priv = dev_get_drvdata(d);
7030 if (!iwl_is_alive(priv))
7031 return -EAGAIN;
7033 return sprintf(buf, "%d\n", priv->antenna);
7036 static ssize_t store_antenna(struct device *d,
7037 struct device_attribute *attr,
7038 const char *buf, size_t count)
7040 int ant;
7041 struct iwl_priv *priv = dev_get_drvdata(d);
7043 if (count == 0)
7044 return 0;
7046 if (sscanf(buf, "%1i", &ant) != 1) {
7047 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7048 return count;
7051 if ((ant >= 0) && (ant <= 2)) {
7052 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
7053 priv->antenna = (enum iwl3945_antenna)ant;
7054 } else
7055 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7058 return count;
7061 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7063 static ssize_t show_status(struct device *d,
7064 struct device_attribute *attr, char *buf)
7066 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7067 if (!iwl_is_alive(priv))
7068 return -EAGAIN;
7069 return sprintf(buf, "0x%08x\n", (int)priv->status);
7072 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7074 static ssize_t dump_error_log(struct device *d,
7075 struct device_attribute *attr,
7076 const char *buf, size_t count)
7078 char *p = (char *)buf;
7080 if (p[0] == '1')
7081 iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
7083 return strnlen(buf, count);
7086 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7088 static ssize_t dump_event_log(struct device *d,
7089 struct device_attribute *attr,
7090 const char *buf, size_t count)
7092 char *p = (char *)buf;
7094 if (p[0] == '1')
7095 iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
7097 return strnlen(buf, count);
7100 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7102 /*****************************************************************************
7104 * driver setup and tear down
7106 *****************************************************************************/
7108 static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
7110 priv->workqueue = create_workqueue(DRV_NAME);
7112 init_waitqueue_head(&priv->wait_command_queue);
7114 INIT_WORK(&priv->up, iwl3945_bg_up);
7115 INIT_WORK(&priv->restart, iwl3945_bg_restart);
7116 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
7117 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
7118 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
7119 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
7120 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
7121 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
7122 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
7123 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
7124 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
7125 INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
7127 iwl3945_hw_setup_deferred_work(priv);
7129 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
7130 iwl3945_irq_tasklet, (unsigned long)priv);
7133 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
7135 iwl3945_hw_cancel_deferred_work(priv);
7137 cancel_delayed_work_sync(&priv->init_alive_start);
7138 cancel_delayed_work(&priv->scan_check);
7139 cancel_delayed_work(&priv->alive_start);
7140 cancel_work_sync(&priv->beacon_update);
7143 static struct attribute *iwl3945_sysfs_entries[] = {
7144 &dev_attr_antenna.attr,
7145 &dev_attr_channels.attr,
7146 &dev_attr_dump_errors.attr,
7147 &dev_attr_dump_events.attr,
7148 &dev_attr_flags.attr,
7149 &dev_attr_filter_flags.attr,
7150 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7151 &dev_attr_measurement.attr,
7152 #endif
7153 &dev_attr_power_level.attr,
7154 &dev_attr_retry_rate.attr,
7155 &dev_attr_statistics.attr,
7156 &dev_attr_status.attr,
7157 &dev_attr_temperature.attr,
7158 &dev_attr_tx_power.attr,
7159 #ifdef CONFIG_IWL3945_DEBUG
7160 &dev_attr_debug_level.attr,
7161 #endif
7162 NULL
7165 static struct attribute_group iwl3945_attribute_group = {
7166 .name = NULL, /* put in device directory */
7167 .attrs = iwl3945_sysfs_entries,
7170 static struct ieee80211_ops iwl3945_hw_ops = {
7171 .tx = iwl3945_mac_tx,
7172 .start = iwl3945_mac_start,
7173 .stop = iwl3945_mac_stop,
7174 .add_interface = iwl3945_mac_add_interface,
7175 .remove_interface = iwl3945_mac_remove_interface,
7176 .config = iwl3945_mac_config,
7177 .config_interface = iwl3945_mac_config_interface,
7178 .configure_filter = iwl3945_configure_filter,
7179 .set_key = iwl3945_mac_set_key,
7180 .get_tx_stats = iwl3945_mac_get_tx_stats,
7181 .conf_tx = iwl3945_mac_conf_tx,
7182 .reset_tsf = iwl3945_mac_reset_tsf,
7183 .bss_info_changed = iwl3945_bss_info_changed,
7184 .hw_scan = iwl3945_mac_hw_scan
7187 static int iwl3945_init_drv(struct iwl_priv *priv)
7189 int ret;
7191 priv->retry_rate = 1;
7192 priv->ibss_beacon = NULL;
7194 spin_lock_init(&priv->lock);
7195 spin_lock_init(&priv->power_data_39.lock);
7196 spin_lock_init(&priv->sta_lock);
7197 spin_lock_init(&priv->hcmd_lock);
7199 INIT_LIST_HEAD(&priv->free_frames);
7201 mutex_init(&priv->mutex);
7203 /* Clear the driver's (not device's) station table */
7204 iwl3945_clear_stations_table(priv);
7206 priv->data_retry_limit = -1;
7207 priv->ieee_channels = NULL;
7208 priv->ieee_rates = NULL;
7209 priv->band = IEEE80211_BAND_2GHZ;
7211 priv->iw_mode = NL80211_IFTYPE_STATION;
7213 iwl_reset_qos(priv);
7215 priv->qos_data.qos_active = 0;
7216 priv->qos_data.qos_cap.val = 0;
7218 priv->rates_mask = IWL_RATES_MASK;
7219 /* If power management is turned on, default to AC mode */
7220 priv->power_mode = IWL39_POWER_AC;
7221 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
7223 ret = iwl3945_init_channel_map(priv);
7224 if (ret) {
7225 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
7226 goto err;
7229 ret = iwl3945_init_geos(priv);
7230 if (ret) {
7231 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
7232 goto err_free_channel_map;
7235 return 0;
7237 err_free_channel_map:
7238 iwl3945_free_channel_map(priv);
7239 err:
7240 return ret;
7243 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7245 int err = 0;
7246 struct iwl_priv *priv;
7247 struct ieee80211_hw *hw;
7248 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
7249 unsigned long flags;
7251 /***********************
7252 * 1. Allocating HW data
7253 * ********************/
7255 /* mac80211 allocates memory for this device instance, including
7256 * space for this driver's private structure */
7257 hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
7258 if (hw == NULL) {
7259 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
7260 err = -ENOMEM;
7261 goto out;
7263 priv = hw->priv;
7264 SET_IEEE80211_DEV(hw, &pdev->dev);
7266 if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
7267 (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
7268 IWL_ERR(priv,
7269 "invalid queues_num, should be between %d and %d\n",
7270 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
7271 err = -EINVAL;
7272 goto out;
7276 * Disabling hardware scan means that mac80211 will perform scans
7277 * "the hard way", rather than using device's scan.
7279 if (iwl3945_mod_params.disable_hw_scan) {
7280 IWL_DEBUG_INFO("Disabling hw_scan\n");
7281 iwl3945_hw_ops.hw_scan = NULL;
7285 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
7286 priv->cfg = cfg;
7287 priv->pci_dev = pdev;
7289 #ifdef CONFIG_IWL3945_DEBUG
7290 priv->debug_level = iwl3945_mod_params.debug;
7291 atomic_set(&priv->restrict_refcnt, 0);
7292 #endif
7293 hw->rate_control_algorithm = "iwl-3945-rs";
7294 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
7296 /* Select antenna (may be helpful if only one antenna is connected) */
7297 priv->antenna = (enum iwl3945_antenna)iwl3945_mod_params.antenna;
7299 /* Tell mac80211 our characteristics */
7300 hw->flags = IEEE80211_HW_SIGNAL_DBM |
7301 IEEE80211_HW_NOISE_DBM;
7303 hw->wiphy->interface_modes =
7304 BIT(NL80211_IFTYPE_STATION) |
7305 BIT(NL80211_IFTYPE_ADHOC);
7307 hw->wiphy->fw_handles_regulatory = true;
7309 /* 4 EDCA QOS priorities */
7310 hw->queues = 4;
7312 /***************************
7313 * 2. Initializing PCI bus
7314 * *************************/
7315 if (pci_enable_device(pdev)) {
7316 err = -ENODEV;
7317 goto out_ieee80211_free_hw;
7320 pci_set_master(pdev);
7322 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
7323 if (!err)
7324 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
7325 if (err) {
7326 IWL_WARN(priv, "No suitable DMA available.\n");
7327 goto out_pci_disable_device;
7330 pci_set_drvdata(pdev, priv);
7331 err = pci_request_regions(pdev, DRV_NAME);
7332 if (err)
7333 goto out_pci_disable_device;
7335 /***********************
7336 * 3. Read REV Register
7337 * ********************/
7338 priv->hw_base = pci_iomap(pdev, 0, 0);
7339 if (!priv->hw_base) {
7340 err = -ENODEV;
7341 goto out_pci_release_regions;
7344 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
7345 (unsigned long long) pci_resource_len(pdev, 0));
7346 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
7348 /* We disable the RETRY_TIMEOUT register (0x41) to keep
7349 * PCI Tx retries from interfering with C3 CPU state */
7350 pci_write_config_byte(pdev, 0x41, 0x00);
7352 /* amp init */
7353 err = priv->cfg->ops->lib->apm_ops.init(priv);
7354 if (err < 0) {
7355 IWL_DEBUG_INFO("Failed to init APMG\n");
7356 goto out_iounmap;
7359 /***********************
7360 * 4. Read EEPROM
7361 * ********************/
7363 /* Read the EEPROM */
7364 err = iwl3945_eeprom_init(priv);
7365 if (err) {
7366 IWL_ERR(priv, "Unable to init EEPROM\n");
7367 goto out_remove_sysfs;
7369 /* MAC Address location in EEPROM same for 3945/4965 */
7370 get_eeprom_mac(priv, priv->mac_addr);
7371 IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
7372 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
7374 /***********************
7375 * 5. Setup HW Constants
7376 * ********************/
7377 /* Device-specific setup */
7378 if (iwl3945_hw_set_hw_params(priv)) {
7379 IWL_ERR(priv, "failed to set hw settings\n");
7380 goto out_iounmap;
7383 /***********************
7384 * 6. Setup priv
7385 * ********************/
7387 err = iwl3945_init_drv(priv);
7388 if (err) {
7389 IWL_ERR(priv, "initializing driver failed\n");
7390 goto out_free_geos;
7393 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
7394 priv->cfg->name);
7396 /***********************************
7397 * 7. Initialize Module Parameters
7398 * **********************************/
7400 /* Initialize module parameter values here */
7401 /* Disable radio (SW RF KILL) via parameter when loading driver */
7402 if (iwl3945_mod_params.disable) {
7403 set_bit(STATUS_RF_KILL_SW, &priv->status);
7404 IWL_DEBUG_INFO("Radio disabled.\n");
7408 /***********************
7409 * 8. Setup Services
7410 * ********************/
7412 spin_lock_irqsave(&priv->lock, flags);
7413 iwl3945_disable_interrupts(priv);
7414 spin_unlock_irqrestore(&priv->lock, flags);
7416 pci_enable_msi(priv->pci_dev);
7418 err = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
7419 DRV_NAME, priv);
7420 if (err) {
7421 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
7422 goto out_disable_msi;
7425 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
7426 if (err) {
7427 IWL_ERR(priv, "failed to create sysfs device attributes\n");
7428 goto out_release_irq;
7431 iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
7432 iwl3945_setup_deferred_work(priv);
7433 iwl3945_setup_rx_handlers(priv);
7435 /*********************************
7436 * 9. Setup and Register mac80211
7437 * *******************************/
7439 err = ieee80211_register_hw(priv->hw);
7440 if (err) {
7441 IWL_ERR(priv, "Failed to register network device: %d\n", err);
7442 goto out_remove_sysfs;
7445 priv->hw->conf.beacon_int = 100;
7446 priv->mac80211_registered = 1;
7448 err = iwl3945_rfkill_init(priv);
7449 if (err)
7450 IWL_ERR(priv, "Unable to initialize RFKILL system. "
7451 "Ignoring error: %d\n", err);
7453 /* Start monitoring the killswitch */
7454 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
7455 2 * HZ);
7457 return 0;
7459 out_remove_sysfs:
7460 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
7461 out_free_geos:
7462 iwl3945_free_geos(priv);
7464 out_release_irq:
7465 free_irq(priv->pci_dev->irq, priv);
7466 destroy_workqueue(priv->workqueue);
7467 priv->workqueue = NULL;
7468 iwl3945_unset_hw_params(priv);
7469 out_disable_msi:
7470 pci_disable_msi(priv->pci_dev);
7471 out_iounmap:
7472 pci_iounmap(pdev, priv->hw_base);
7473 out_pci_release_regions:
7474 pci_release_regions(pdev);
7475 out_pci_disable_device:
7476 pci_disable_device(pdev);
7477 pci_set_drvdata(pdev, NULL);
7478 out_ieee80211_free_hw:
7479 ieee80211_free_hw(priv->hw);
7480 out:
7481 return err;
7484 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
7486 struct iwl_priv *priv = pci_get_drvdata(pdev);
7487 unsigned long flags;
7489 if (!priv)
7490 return;
7492 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
7494 set_bit(STATUS_EXIT_PENDING, &priv->status);
7496 if (priv->mac80211_registered) {
7497 ieee80211_unregister_hw(priv->hw);
7498 priv->mac80211_registered = 0;
7499 } else {
7500 iwl3945_down(priv);
7503 /* make sure we flush any pending irq or
7504 * tasklet for the driver
7506 spin_lock_irqsave(&priv->lock, flags);
7507 iwl3945_disable_interrupts(priv);
7508 spin_unlock_irqrestore(&priv->lock, flags);
7510 iwl_synchronize_irq(priv);
7512 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
7514 iwl3945_rfkill_unregister(priv);
7515 cancel_delayed_work(&priv->rfkill_poll);
7517 iwl3945_dealloc_ucode_pci(priv);
7519 if (priv->rxq.bd)
7520 iwl_rx_queue_free(priv, &priv->rxq);
7521 iwl3945_hw_txq_ctx_free(priv);
7523 iwl3945_unset_hw_params(priv);
7524 iwl3945_clear_stations_table(priv);
7526 /*netif_stop_queue(dev); */
7527 flush_workqueue(priv->workqueue);
7529 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
7530 * priv->workqueue... so we can't take down the workqueue
7531 * until now... */
7532 destroy_workqueue(priv->workqueue);
7533 priv->workqueue = NULL;
7535 free_irq(pdev->irq, priv);
7536 pci_disable_msi(pdev);
7538 pci_iounmap(pdev, priv->hw_base);
7539 pci_release_regions(pdev);
7540 pci_disable_device(pdev);
7541 pci_set_drvdata(pdev, NULL);
7543 iwl3945_free_channel_map(priv);
7544 iwl3945_free_geos(priv);
7545 kfree(priv->scan39);
7546 if (priv->ibss_beacon)
7547 dev_kfree_skb(priv->ibss_beacon);
7549 ieee80211_free_hw(priv->hw);
7552 #ifdef CONFIG_PM
7554 static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
7556 struct iwl_priv *priv = pci_get_drvdata(pdev);
7558 if (priv->is_open) {
7559 set_bit(STATUS_IN_SUSPEND, &priv->status);
7560 iwl3945_mac_stop(priv->hw);
7561 priv->is_open = 1;
7563 pci_save_state(pdev);
7564 pci_disable_device(pdev);
7565 pci_set_power_state(pdev, PCI_D3hot);
7567 return 0;
7570 static int iwl3945_pci_resume(struct pci_dev *pdev)
7572 struct iwl_priv *priv = pci_get_drvdata(pdev);
7574 pci_set_power_state(pdev, PCI_D0);
7575 pci_enable_device(pdev);
7576 pci_restore_state(pdev);
7578 if (priv->is_open)
7579 iwl3945_mac_start(priv->hw);
7581 clear_bit(STATUS_IN_SUSPEND, &priv->status);
7582 return 0;
7585 #endif /* CONFIG_PM */
7587 /*************** RFKILL FUNCTIONS **********/
7588 #ifdef CONFIG_IWL3945_RFKILL
7589 /* software rf-kill from user */
7590 static int iwl3945_rfkill_soft_rf_kill(void *data, enum rfkill_state state)
7592 struct iwl_priv *priv = data;
7593 int err = 0;
7595 if (!priv->rfkill)
7596 return 0;
7598 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7599 return 0;
7601 IWL_DEBUG_RF_KILL("we received soft RFKILL set to state %d\n", state);
7602 mutex_lock(&priv->mutex);
7604 switch (state) {
7605 case RFKILL_STATE_UNBLOCKED:
7606 if (iwl_is_rfkill_hw(priv)) {
7607 err = -EBUSY;
7608 goto out_unlock;
7610 iwl3945_radio_kill_sw(priv, 0);
7611 break;
7612 case RFKILL_STATE_SOFT_BLOCKED:
7613 iwl3945_radio_kill_sw(priv, 1);
7614 break;
7615 default:
7616 IWL_WARN(priv, "received unexpected RFKILL state %d\n", state);
7617 break;
7619 out_unlock:
7620 mutex_unlock(&priv->mutex);
7622 return err;
7625 int iwl3945_rfkill_init(struct iwl_priv *priv)
7627 struct device *device = wiphy_dev(priv->hw->wiphy);
7628 int ret = 0;
7630 BUG_ON(device == NULL);
7632 IWL_DEBUG_RF_KILL("Initializing RFKILL.\n");
7633 priv->rfkill = rfkill_allocate(device, RFKILL_TYPE_WLAN);
7634 if (!priv->rfkill) {
7635 IWL_ERR(priv, "Unable to allocate rfkill device.\n");
7636 ret = -ENOMEM;
7637 goto error;
7640 priv->rfkill->name = priv->cfg->name;
7641 priv->rfkill->data = priv;
7642 priv->rfkill->state = RFKILL_STATE_UNBLOCKED;
7643 priv->rfkill->toggle_radio = iwl3945_rfkill_soft_rf_kill;
7644 priv->rfkill->user_claim_unsupported = 1;
7646 priv->rfkill->dev.class->suspend = NULL;
7647 priv->rfkill->dev.class->resume = NULL;
7649 ret = rfkill_register(priv->rfkill);
7650 if (ret) {
7651 IWL_ERR(priv, "Unable to register rfkill: %d\n", ret);
7652 goto freed_rfkill;
7655 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
7656 return ret;
7658 freed_rfkill:
7659 if (priv->rfkill != NULL)
7660 rfkill_free(priv->rfkill);
7661 priv->rfkill = NULL;
7663 error:
7664 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
7665 return ret;
7668 void iwl3945_rfkill_unregister(struct iwl_priv *priv)
7670 if (priv->rfkill)
7671 rfkill_unregister(priv->rfkill);
7673 priv->rfkill = NULL;
7676 /* set rf-kill to the right state. */
7677 void iwl3945_rfkill_set_hw_state(struct iwl_priv *priv)
7680 if (!priv->rfkill)
7681 return;
7683 if (iwl_is_rfkill_hw(priv)) {
7684 rfkill_force_state(priv->rfkill, RFKILL_STATE_HARD_BLOCKED);
7685 return;
7688 if (!iwl_is_rfkill_sw(priv))
7689 rfkill_force_state(priv->rfkill, RFKILL_STATE_UNBLOCKED);
7690 else
7691 rfkill_force_state(priv->rfkill, RFKILL_STATE_SOFT_BLOCKED);
7693 #endif
7695 /*****************************************************************************
7697 * driver and module entry point
7699 *****************************************************************************/
7701 static struct pci_driver iwl3945_driver = {
7702 .name = DRV_NAME,
7703 .id_table = iwl3945_hw_card_ids,
7704 .probe = iwl3945_pci_probe,
7705 .remove = __devexit_p(iwl3945_pci_remove),
7706 #ifdef CONFIG_PM
7707 .suspend = iwl3945_pci_suspend,
7708 .resume = iwl3945_pci_resume,
7709 #endif
7712 static int __init iwl3945_init(void)
7715 int ret;
7716 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
7717 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
7719 ret = iwl3945_rate_control_register();
7720 if (ret) {
7721 printk(KERN_ERR DRV_NAME
7722 "Unable to register rate control algorithm: %d\n", ret);
7723 return ret;
7726 ret = pci_register_driver(&iwl3945_driver);
7727 if (ret) {
7728 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
7729 goto error_register;
7732 return ret;
7734 error_register:
7735 iwl3945_rate_control_unregister();
7736 return ret;
7739 static void __exit iwl3945_exit(void)
7741 pci_unregister_driver(&iwl3945_driver);
7742 iwl3945_rate_control_unregister();
7745 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
7747 module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
7748 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
7749 module_param_named(disable, iwl3945_mod_params.disable, int, 0444);
7750 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
7751 module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
7752 MODULE_PARM_DESC(swcrypto,
7753 "using software crypto (default 1 [software])\n");
7754 module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
7755 MODULE_PARM_DESC(debug, "debug output mask");
7756 module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
7757 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
7759 module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
7760 MODULE_PARM_DESC(queues_num, "number of hw queues.");
7762 module_exit(iwl3945_exit);
7763 module_init(iwl3945_init);