2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved.
9 #include <linux/module.h>
10 #include <asm/sn/nodepda.h>
11 #include <asm/sn/addrs.h>
12 #include <asm/sn/arch.h>
13 #include <asm/sn/sn_cpuid.h>
14 #include <asm/sn/pda.h>
15 #include <asm/sn/shubio.h>
16 #include <asm/nodedata.h>
17 #include <asm/delay.h>
19 #include <linux/bootmem.h>
20 #include <linux/string.h>
21 #include <linux/sched.h>
23 #include <asm/sn/bte.h>
26 #define L1_CACHE_MASK (L1_CACHE_BYTES - 1)
29 /* two interfaces on two btes */
30 #define MAX_INTERFACES_TO_TRY 4
31 #define MAX_NODES_TO_TRY 2
33 static struct bteinfo_s
*bte_if_on_node(nasid_t nasid
, int interface
)
35 nodepda_t
*tmp_nodepda
;
37 if (nasid_to_cnodeid(nasid
) == -1)
38 return (struct bteinfo_s
*)NULL
;
40 tmp_nodepda
= NODEPDA(nasid_to_cnodeid(nasid
));
41 return &tmp_nodepda
->bte_if
[interface
];
45 static inline void bte_start_transfer(struct bteinfo_s
*bte
, u64 len
, u64 mode
)
48 BTE_CTRL_STORE(bte
, (IBLS_BUSY
| ((len
) | (mode
) << 24)));
50 BTE_LNSTAT_STORE(bte
, len
);
51 BTE_CTRL_STORE(bte
, mode
);
55 /************************************************************************
56 * Block Transfer Engine copy related functions.
58 ***********************************************************************/
61 * bte_copy(src, dest, len, mode, notification)
63 * Use the block transfer engine to move kernel memory from src to dest
64 * using the assigned mode.
67 * src - physical address of the transfer source.
68 * dest - physical address of the transfer destination.
69 * len - number of bytes to transfer from source to dest.
70 * mode - hardware defined. See reference information
71 * for IBCT0/1 in the SHUB Programmers Reference
72 * notification - kernel virtual address of the notification cache
73 * line. If NULL, the default is used and
74 * the bte_copy is synchronous.
76 * NOTE: This function requires src, dest, and len to
77 * be cacheline aligned.
79 bte_result_t
bte_copy(u64 src
, u64 dest
, u64 len
, u64 mode
, void *notification
)
84 struct bteinfo_s
*bte
;
85 bte_result_t bte_status
;
86 unsigned long irq_flags
;
87 unsigned long itc_end
= 0;
88 int nasid_to_try
[MAX_NODES_TO_TRY
];
89 int my_nasid
= cpuid_to_nasid(raw_smp_processor_id());
90 int bte_if_index
, nasid_index
;
91 int bte_first
, btes_per_node
= BTES_PER_NODE
;
93 BTE_PRINTK(("bte_copy(0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%p)\n",
94 src
, dest
, len
, mode
, notification
));
100 BUG_ON(len
& L1_CACHE_MASK
);
101 BUG_ON(src
& L1_CACHE_MASK
);
102 BUG_ON(dest
& L1_CACHE_MASK
);
103 BUG_ON(len
> BTE_MAX_XFER
);
106 * Start with interface corresponding to cpu number
108 bte_first
= raw_smp_processor_id() % btes_per_node
;
110 if (mode
& BTE_USE_DEST
) {
111 /* try remote then local */
112 nasid_to_try
[0] = NASID_GET(dest
);
113 if (mode
& BTE_USE_ANY
) {
114 nasid_to_try
[1] = my_nasid
;
116 nasid_to_try
[1] = (int)NULL
;
119 /* try local then remote */
120 nasid_to_try
[0] = my_nasid
;
121 if (mode
& BTE_USE_ANY
) {
122 nasid_to_try
[1] = NASID_GET(dest
);
124 nasid_to_try
[1] = (int)NULL
;
130 local_irq_save(irq_flags
);
132 bte_if_index
= bte_first
;
135 /* Attempt to lock one of the BTE interfaces. */
136 while (nasid_index
< MAX_NODES_TO_TRY
) {
137 bte
= bte_if_on_node(nasid_to_try
[nasid_index
],bte_if_index
);
144 if (spin_trylock(&bte
->spinlock
)) {
145 if (!(*bte
->most_rcnt_na
& BTE_WORD_AVAILABLE
) ||
146 (BTE_LNSTAT_LOAD(bte
) & BTE_ACTIVE
)) {
147 /* Got the lock but BTE still busy */
148 spin_unlock(&bte
->spinlock
);
150 /* we got the lock and it's not busy */
155 bte_if_index
= (bte_if_index
+ 1) % btes_per_node
; /* Next interface */
156 if (bte_if_index
== bte_first
) {
158 * We've tried all interfaces on this node
170 local_irq_restore(irq_flags
);
172 if (!(mode
& BTE_WACQUIRE
)) {
173 return BTEFAIL_NOTAVAIL
;
177 if (notification
== NULL
) {
178 /* User does not want to be notified. */
179 bte
->most_rcnt_na
= &bte
->notify
;
181 bte
->most_rcnt_na
= notification
;
184 /* Calculate the number of cache lines to transfer. */
185 transfer_size
= ((len
>> L1_CACHE_SHIFT
) & BTE_LEN_MASK
);
187 /* Initialize the notification to a known value. */
188 *bte
->most_rcnt_na
= BTE_WORD_BUSY
;
189 notif_phys_addr
= (u64
)bte
->most_rcnt_na
;
191 /* Set the source and destination registers */
192 BTE_PRINTKV(("IBSA = 0x%lx)\n", src
));
193 BTE_SRC_STORE(bte
, src
);
194 BTE_PRINTKV(("IBDA = 0x%lx)\n", dest
));
195 BTE_DEST_STORE(bte
, dest
);
197 /* Set the notification register */
198 BTE_PRINTKV(("IBNA = 0x%lx)\n", notif_phys_addr
));
199 BTE_NOTIF_STORE(bte
, notif_phys_addr
);
201 /* Initiate the transfer */
202 BTE_PRINTK(("IBCT = 0x%lx)\n", BTE_VALID_MODE(mode
)));
203 bte_start_transfer(bte
, transfer_size
, BTE_VALID_MODE(mode
));
205 itc_end
= ia64_get_itc() + (40000000 * local_cpu_data
->cyc_per_usec
);
207 spin_unlock_irqrestore(&bte
->spinlock
, irq_flags
);
209 if (notification
!= NULL
) {
213 while ((transfer_stat
= *bte
->most_rcnt_na
) == BTE_WORD_BUSY
) {
215 if (ia64_get_itc() > itc_end
) {
216 BTE_PRINTK(("BTE timeout nasid 0x%x bte%d IBLS = 0x%lx na 0x%lx\n",
217 NASID_GET(bte
->bte_base_addr
), bte
->bte_num
,
218 BTE_LNSTAT_LOAD(bte
), *bte
->most_rcnt_na
) );
219 bte
->bte_error_count
++;
220 bte
->bh_error
= IBLS_ERROR
;
221 bte_error_handler((unsigned long)NODEPDA(bte
->bte_cnode
));
222 *bte
->most_rcnt_na
= BTE_WORD_AVAILABLE
;
227 BTE_PRINTKV((" Delay Done. IBLS = 0x%lx, most_rcnt_na = 0x%lx\n",
228 BTE_LNSTAT_LOAD(bte
), *bte
->most_rcnt_na
));
230 if (transfer_stat
& IBLS_ERROR
) {
231 bte_status
= BTE_GET_ERROR_STATUS(transfer_stat
);
233 bte_status
= BTE_SUCCESS
;
235 *bte
->most_rcnt_na
= BTE_WORD_AVAILABLE
;
237 BTE_PRINTK(("Returning status is 0x%lx and most_rcnt_na is 0x%lx\n",
238 BTE_LNSTAT_LOAD(bte
), *bte
->most_rcnt_na
));
243 EXPORT_SYMBOL(bte_copy
);
246 * bte_unaligned_copy(src, dest, len, mode)
248 * use the block transfer engine to move kernel
249 * memory from src to dest using the assigned mode.
252 * src - physical address of the transfer source.
253 * dest - physical address of the transfer destination.
254 * len - number of bytes to transfer from source to dest.
255 * mode - hardware defined. See reference information
256 * for IBCT0/1 in the SGI documentation.
258 * NOTE: If the source, dest, and len are all cache line aligned,
259 * then it would be _FAR_ preferable to use bte_copy instead.
261 bte_result_t
bte_unaligned_copy(u64 src
, u64 dest
, u64 len
, u64 mode
)
263 int destFirstCacheOffset
;
266 u64 headBcopySrcOffset
;
274 char *bteBlock
, *bteBlock_unaligned
;
280 /* temporary buffer used during unaligned transfers */
281 bteBlock_unaligned
= kmalloc(len
+ 3 * L1_CACHE_BYTES
, GFP_KERNEL
);
282 if (bteBlock_unaligned
== NULL
) {
283 return BTEFAIL_NOTAVAIL
;
285 bteBlock
= (char *)L1_CACHE_ALIGN((u64
) bteBlock_unaligned
);
287 headBcopySrcOffset
= src
& L1_CACHE_MASK
;
288 destFirstCacheOffset
= dest
& L1_CACHE_MASK
;
291 * At this point, the transfer is broken into
292 * (up to) three sections. The first section is
293 * from the start address to the first physical
294 * cache line, the second is from the first physical
295 * cache line to the last complete cache line,
296 * and the third is from the last cache line to the
297 * end of the buffer. The first and third sections
298 * are handled by bte copying into a temporary buffer
299 * and then bcopy'ing the necessary section into the
300 * final location. The middle section is handled with
301 * a standard bte copy.
303 * One nasty exception to the above rule is when the
304 * source and destination are not symmetrically
305 * mis-aligned. If the source offset from the first
306 * cache line is different from the destination offset,
307 * we make the first section be the entire transfer
308 * and the bcopy the entire block into place.
310 if (headBcopySrcOffset
== destFirstCacheOffset
) {
313 * Both the source and destination are the same
314 * distance from a cache line boundary so we can
315 * use the bte to transfer the bulk of the
318 headBteSource
= src
& ~L1_CACHE_MASK
;
319 headBcopyDest
= dest
;
320 if (headBcopySrcOffset
) {
324 headBcopySrcOffset
) ? L1_CACHE_BYTES
325 - headBcopySrcOffset
: len
);
326 headBteLen
= L1_CACHE_BYTES
;
332 if (len
> headBcopyLen
) {
333 footBcopyLen
= (len
- headBcopyLen
) & L1_CACHE_MASK
;
334 footBteLen
= L1_CACHE_BYTES
;
336 footBteSource
= src
+ len
- footBcopyLen
;
337 footBcopyDest
= dest
+ len
- footBcopyLen
;
339 if (footBcopyDest
== (headBcopyDest
+ headBcopyLen
)) {
341 * We have two contiguous bcopy
342 * blocks. Merge them.
344 headBcopyLen
+= footBcopyLen
;
345 headBteLen
+= footBteLen
;
346 } else if (footBcopyLen
> 0) {
347 rv
= bte_copy(footBteSource
,
348 ia64_tpa((unsigned long)bteBlock
),
349 footBteLen
, mode
, NULL
);
350 if (rv
!= BTE_SUCCESS
) {
351 kfree(bteBlock_unaligned
);
355 memcpy(__va(footBcopyDest
),
356 (char *)bteBlock
, footBcopyLen
);
363 if (len
> (headBcopyLen
+ footBcopyLen
)) {
364 /* now transfer the middle. */
365 rv
= bte_copy((src
+ headBcopyLen
),
368 (len
- headBcopyLen
-
369 footBcopyLen
), mode
, NULL
);
370 if (rv
!= BTE_SUCCESS
) {
371 kfree(bteBlock_unaligned
);
379 * The transfer is not symmetric, we will
380 * allocate a buffer large enough for all the
381 * data, bte_copy into that buffer and then
382 * bcopy to the destination.
385 headBcopySrcOffset
= src
& L1_CACHE_MASK
;
386 headBcopyDest
= dest
;
389 headBteSource
= src
- headBcopySrcOffset
;
390 /* Add the leading and trailing bytes from source */
391 headBteLen
= L1_CACHE_ALIGN(len
+ headBcopySrcOffset
);
394 if (headBcopyLen
> 0) {
395 rv
= bte_copy(headBteSource
,
396 ia64_tpa((unsigned long)bteBlock
), headBteLen
,
398 if (rv
!= BTE_SUCCESS
) {
399 kfree(bteBlock_unaligned
);
403 memcpy(__va(headBcopyDest
), ((char *)bteBlock
+
404 headBcopySrcOffset
), headBcopyLen
);
406 kfree(bteBlock_unaligned
);
410 EXPORT_SYMBOL(bte_unaligned_copy
);
412 /************************************************************************
413 * Block Transfer Engine initialization functions.
415 ***********************************************************************/
418 * bte_init_node(nodepda, cnode)
420 * Initialize the nodepda structure with BTE base addresses and
423 void bte_init_node(nodepda_t
* mynodepda
, cnodeid_t cnode
)
428 * Indicate that all the block transfer engines on this node
433 * Allocate one bte_recover_t structure per node. It holds
434 * the recovery lock for node. All the bte interface structures
435 * will point at this one bte_recover structure to get the lock.
437 spin_lock_init(&mynodepda
->bte_recovery_lock
);
438 init_timer(&mynodepda
->bte_recovery_timer
);
439 mynodepda
->bte_recovery_timer
.function
= bte_error_handler
;
440 mynodepda
->bte_recovery_timer
.data
= (unsigned long)mynodepda
;
442 for (i
= 0; i
< BTES_PER_NODE
; i
++) {
445 /* Which link status register should we use? */
447 REMOTE_HUB_ADDR(cnodeid_to_nasid(cnode
), BTE_BASE_ADDR(i
));
448 mynodepda
->bte_if
[i
].bte_base_addr
= base_addr
;
449 mynodepda
->bte_if
[i
].bte_source_addr
= BTE_SOURCE_ADDR(base_addr
);
450 mynodepda
->bte_if
[i
].bte_destination_addr
= BTE_DEST_ADDR(base_addr
);
451 mynodepda
->bte_if
[i
].bte_control_addr
= BTE_CTRL_ADDR(base_addr
);
452 mynodepda
->bte_if
[i
].bte_notify_addr
= BTE_NOTIF_ADDR(base_addr
);
455 * Initialize the notification and spinlock
456 * so the first transfer can occur.
458 mynodepda
->bte_if
[i
].most_rcnt_na
=
459 &(mynodepda
->bte_if
[i
].notify
);
460 mynodepda
->bte_if
[i
].notify
= BTE_WORD_AVAILABLE
;
461 spin_lock_init(&mynodepda
->bte_if
[i
].spinlock
);
463 mynodepda
->bte_if
[i
].bte_cnode
= cnode
;
464 mynodepda
->bte_if
[i
].bte_error_count
= 0;
465 mynodepda
->bte_if
[i
].bte_num
= i
;
466 mynodepda
->bte_if
[i
].cleanup_active
= 0;
467 mynodepda
->bte_if
[i
].bh_error
= 0;