2 * drivers/net/gianfar_mii.h
4 * Gianfar Ethernet Driver -- MII Management Bus Implementation
5 * Driver for the MDIO bus controller in the Gianfar register space
8 * Maintainer: Kumar Gala
10 * Copyright (c) 2002-2004 Freescale Semiconductor, Inc.
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
18 #ifndef __GIANFAR_MII_H
19 #define __GIANFAR_MII_H
21 #define MIIMIND_BUSY 0x00000001
22 #define MIIMIND_NOTVALID 0x00000004
24 #define MII_READ_COMMAND 0x00000001
26 #define GFAR_SUPPORTED (SUPPORTED_10baseT_Half \
27 | SUPPORTED_10baseT_Full \
28 | SUPPORTED_100baseT_Half \
29 | SUPPORTED_100baseT_Full \
34 u32 miimcfg
; /* 0x.520 - MII Management Config Register */
35 u32 miimcom
; /* 0x.524 - MII Management Command Register */
36 u32 miimadd
; /* 0x.528 - MII Management Address Register */
37 u32 miimcon
; /* 0x.52c - MII Management Control Register */
38 u32 miimstat
; /* 0x.530 - MII Management Status Register */
39 u32 miimind
; /* 0x.534 - MII Management Indicator Register */
42 int gfar_mdio_read(struct mii_bus
*bus
, int mii_id
, int regnum
);
43 int gfar_mdio_write(struct mii_bus
*bus
, int mii_id
, int regnum
, u16 value
);
44 int __init
gfar_mdio_init(void);
45 void gfar_mdio_exit(void);
46 #endif /* GIANFAR_PHY_H */