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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lrg/voltage-2.6
[linux-2.6/mini2440.git] / drivers / net / dm9000.c
blobd8350860c0f8db5e6c622f4962586d8024c2636f
1 /*
2 * Davicom DM9000 Fast Ethernet driver for Linux.
3 * Copyright (C) 1997 Sten Wang
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * (C) Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
16 *
17 * Additional updates, Copyright:
18 * Ben Dooks <ben@simtec.co.uk>
19 * Sascha Hauer <s.hauer@pengutronix.de>
20 */
21
22 #include <linux/module.h>
23 #include <linux/ioport.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/init.h>
27 #include <linux/skbuff.h>
28 #include <linux/spinlock.h>
29 #include <linux/crc32.h>
30 #include <linux/mii.h>
31 #include <linux/ethtool.h>
32 #include <linux/dm9000.h>
33 #include <linux/delay.h>
34 #include <linux/platform_device.h>
35 #include <linux/irq.h>
36
37 #include <asm/delay.h>
38 #include <asm/irq.h>
39 #include <asm/io.h>
40
41 #include "dm9000.h"
42
43 /* Board/System/Debug information/definition ---------------- */
44
45 #define DM9000_PHY 0x40 /* PHY address 0x01 */
46
47 #define CARDNAME "dm9000"
48 #define DRV_VERSION "1.31"
49
50 /*
51 * Transmit timeout, default 5 seconds.
52 */
53 static int watchdog = 5000;
54 module_param(watchdog, int, 0400);
55 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
56
57 /* DM9000 register address locking.
58 *
59 * The DM9000 uses an address register to control where data written
60 * to the data register goes. This means that the address register
61 * must be preserved over interrupts or similar calls.
62 *
63 * During interrupt and other critical calls, a spinlock is used to
64 * protect the system, but the calls themselves save the address
65 * in the address register in case they are interrupting another
66 * access to the device.
67 *
68 * For general accesses a lock is provided so that calls which are
69 * allowed to sleep are serialised so that the address register does
70 * not need to be saved. This lock also serves to serialise access
71 * to the EEPROM and PHY access registers which are shared between
72 * these two devices.
73 */
74
75 /* The driver supports the original DM9000E, and now the two newer
76 * devices, DM9000A and DM9000B.
77 */
78
79 enum dm9000_type {
80 TYPE_DM9000E, /* original DM9000 */
81 TYPE_DM9000A,
82 TYPE_DM9000B
83 };
84
85 /* Structure/enum declaration ------------------------------- */
86 typedef struct board_info {
87
88 void __iomem *io_addr; /* Register I/O base address */
89 void __iomem *io_data; /* Data I/O address */
90 u16 irq; /* IRQ */
91
92 u16 tx_pkt_cnt;
93 u16 queue_pkt_len;
94 u16 queue_start_addr;
95 u16 dbug_cnt;
96 u8 io_mode; /* 0:word, 2:byte */
97 u8 phy_addr;
98 u8 imr_all;
99
100 unsigned int flags;
101 unsigned int in_suspend :1;
102 int debug_level;
103
104 enum dm9000_type type;
105
106 void (*inblk)(void __iomem *port, void *data, int length);
107 void (*outblk)(void __iomem *port, void *data, int length);
108 void (*dumpblk)(void __iomem *port, int length);
109
110 struct device *dev; /* parent device */
111
112 struct resource *addr_res; /* resources found */
113 struct resource *data_res;
114 struct resource *addr_req; /* resources requested */
115 struct resource *data_req;
116 struct resource *irq_res;
117
118 struct mutex addr_lock; /* phy and eeprom access lock */
119
120 struct delayed_work phy_poll;
121 struct net_device *ndev;
122
123 spinlock_t lock;
124
125 struct mii_if_info mii;
126 u32 msg_enable;
127 } board_info_t;
128
129 /* debug code */
130
131 #define dm9000_dbg(db, lev, msg...) do { \
132 if ((lev) < CONFIG_DM9000_DEBUGLEVEL && \
133 (lev) < db->debug_level) { \
134 dev_dbg(db->dev, msg); \
135 } \
136 } while (0)
137
138 static inline board_info_t *to_dm9000_board(struct net_device *dev)
139 {
140 return netdev_priv(dev);
141 }
142
143 /* DM9000 network board routine ---------------------------- */
144
145 static void
146 dm9000_reset(board_info_t * db)
147 {
148 dev_dbg(db->dev, "resetting device\n");
149
150 /* RESET device */
151 writeb(DM9000_NCR, db->io_addr);
152 udelay(200);
153 writeb(NCR_RST, db->io_data);
154 udelay(200);
155 }
156
157 /*
158 * Read a byte from I/O port
159 */
160 static u8
161 ior(board_info_t * db, int reg)
162 {
163 writeb(reg, db->io_addr);
164 return readb(db->io_data);
165 }
166
167 /*
168 * Write a byte to I/O port
169 */
170
171 static void
172 iow(board_info_t * db, int reg, int value)
173 {
174 writeb(reg, db->io_addr);
175 writeb(value, db->io_data);
176 }
177
178 /* routines for sending block to chip */
179
180 static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
181 {
182 writesb(reg, data, count);
183 }
184
185 static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
186 {
187 writesw(reg, data, (count+1) >> 1);
188 }
189
190 static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
191 {
192 writesl(reg, data, (count+3) >> 2);
193 }
194
195 /* input block from chip to memory */
196
197 static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
198 {
199 readsb(reg, data, count);
200 }
201
202
203 static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
204 {
205 readsw(reg, data, (count+1) >> 1);
206 }
207
208 static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
209 {
210 readsl(reg, data, (count+3) >> 2);
211 }
212
213 /* dump block from chip to null */
214
215 static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
216 {
217 int i;
218 int tmp;
219
220 for (i = 0; i < count; i++)
221 tmp = readb(reg);
222 }
223
224 static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
225 {
226 int i;
227 int tmp;
228
229 count = (count + 1) >> 1;
230
231 for (i = 0; i < count; i++)
232 tmp = readw(reg);
233 }
234
235 static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
236 {
237 int i;
238 int tmp;
239
240 count = (count + 3) >> 2;
241
242 for (i = 0; i < count; i++)
243 tmp = readl(reg);
244 }
245
246 /* dm9000_set_io
247 *
248 * select the specified set of io routines to use with the
249 * device
250 */
251
252 static void dm9000_set_io(struct board_info *db, int byte_width)
253 {
254 /* use the size of the data resource to work out what IO
255 * routines we want to use
256 */
257
258 switch (byte_width) {
259 case 1:
260 db->dumpblk = dm9000_dumpblk_8bit;
261 db->outblk = dm9000_outblk_8bit;
262 db->inblk = dm9000_inblk_8bit;
263 break;
264
265
266 case 3:
267 dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n");
268 case 2:
269 db->dumpblk = dm9000_dumpblk_16bit;
270 db->outblk = dm9000_outblk_16bit;
271 db->inblk = dm9000_inblk_16bit;
272 break;
273
274 case 4:
275 default:
276 db->dumpblk = dm9000_dumpblk_32bit;
277 db->outblk = dm9000_outblk_32bit;
278 db->inblk = dm9000_inblk_32bit;
279 break;
280 }
281 }
282
283 static void dm9000_schedule_poll(board_info_t *db)
284 {
285 if (db->type == TYPE_DM9000E)
286 schedule_delayed_work(&db->phy_poll, HZ * 2);
287 }
288
289 static int dm9000_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
290 {
291 board_info_t *dm = to_dm9000_board(dev);
292
293 if (!netif_running(dev))
294 return -EINVAL;
295
296 return generic_mii_ioctl(&dm->mii, if_mii(req), cmd, NULL);
297 }
298
299 static unsigned int
300 dm9000_read_locked(board_info_t *db, int reg)
301 {
302 unsigned long flags;
303 unsigned int ret;
304
305 spin_lock_irqsave(&db->lock, flags);
306 ret = ior(db, reg);
307 spin_unlock_irqrestore(&db->lock, flags);
308
309 return ret;
310 }
311
312 static int dm9000_wait_eeprom(board_info_t *db)
313 {
314 unsigned int status;
315 int timeout = 8; /* wait max 8msec */
316
317 /* The DM9000 data sheets say we should be able to
318 * poll the ERRE bit in EPCR to wait for the EEPROM
319 * operation. From testing several chips, this bit
320 * does not seem to work.
321 *
322 * We attempt to use the bit, but fall back to the
323 * timeout (which is why we do not return an error
324 * on expiry) to say that the EEPROM operation has
325 * completed.
326 */
327
328 while (1) {
329 status = dm9000_read_locked(db, DM9000_EPCR);
330
331 if ((status & EPCR_ERRE) == 0)
332 break;
333
334 msleep(1);
335
336 if (timeout-- < 0) {
337 dev_dbg(db->dev, "timeout waiting EEPROM\n");
338 break;
339 }
340 }
341
342 return 0;
343 }
344
345 /*
346 * Read a word data from EEPROM
347 */
348 static void
349 dm9000_read_eeprom(board_info_t *db, int offset, u8 *to)
350 {
351 unsigned long flags;
352
353 if (db->flags & DM9000_PLATF_NO_EEPROM) {
354 to[0] = 0xff;
355 to[1] = 0xff;
356 return;
357 }
358
359 mutex_lock(&db->addr_lock);
360
361 spin_lock_irqsave(&db->lock, flags);
362
363 iow(db, DM9000_EPAR, offset);
364 iow(db, DM9000_EPCR, EPCR_ERPRR);
365
366 spin_unlock_irqrestore(&db->lock, flags);
367
368 dm9000_wait_eeprom(db);
369
370 /* delay for at-least 150uS */
371 msleep(1);
372
373 spin_lock_irqsave(&db->lock, flags);
374
375 iow(db, DM9000_EPCR, 0x0);
376
377 to[0] = ior(db, DM9000_EPDRL);
378 to[1] = ior(db, DM9000_EPDRH);
379
380 spin_unlock_irqrestore(&db->lock, flags);
381
382 mutex_unlock(&db->addr_lock);
383 }
384
385 /*
386 * Write a word data to SROM
387 */
388 static void
389 dm9000_write_eeprom(board_info_t *db, int offset, u8 *data)
390 {
391 unsigned long flags;
392
393 if (db->flags & DM9000_PLATF_NO_EEPROM)
394 return;
395
396 mutex_lock(&db->addr_lock);
397
398 spin_lock_irqsave(&db->lock, flags);
399 iow(db, DM9000_EPAR, offset);
400 iow(db, DM9000_EPDRH, data[1]);
401 iow(db, DM9000_EPDRL, data[0]);
402 iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
403 spin_unlock_irqrestore(&db->lock, flags);
404
405 dm9000_wait_eeprom(db);
406
407 mdelay(1); /* wait at least 150uS to clear */
408
409 spin_lock_irqsave(&db->lock, flags);
410 iow(db, DM9000_EPCR, 0);
411 spin_unlock_irqrestore(&db->lock, flags);
412
413 mutex_unlock(&db->addr_lock);
414 }
415
416 /* ethtool ops */
417
418 static void dm9000_get_drvinfo(struct net_device *dev,
419 struct ethtool_drvinfo *info)
420 {
421 board_info_t *dm = to_dm9000_board(dev);
422
423 strcpy(info->driver, CARDNAME);
424 strcpy(info->version, DRV_VERSION);
425 strcpy(info->bus_info, to_platform_device(dm->dev)->name);
426 }
427
428 static u32 dm9000_get_msglevel(struct net_device *dev)
429 {
430 board_info_t *dm = to_dm9000_board(dev);
431
432 return dm->msg_enable;
433 }
434
435 static void dm9000_set_msglevel(struct net_device *dev, u32 value)
436 {
437 board_info_t *dm = to_dm9000_board(dev);
438
439 dm->msg_enable = value;
440 }
441
442 static int dm9000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
443 {
444 board_info_t *dm = to_dm9000_board(dev);
445
446 mii_ethtool_gset(&dm->mii, cmd);
447 return 0;
448 }
449
450 static int dm9000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
451 {
452 board_info_t *dm = to_dm9000_board(dev);
453
454 return mii_ethtool_sset(&dm->mii, cmd);
455 }
456
457 static int dm9000_nway_reset(struct net_device *dev)
458 {
459 board_info_t *dm = to_dm9000_board(dev);
460 return mii_nway_restart(&dm->mii);
461 }
462
463 static u32 dm9000_get_link(struct net_device *dev)
464 {
465 board_info_t *dm = to_dm9000_board(dev);
466 u32 ret;
467
468 if (dm->flags & DM9000_PLATF_EXT_PHY)
469 ret = mii_link_ok(&dm->mii);
470 else
471 ret = dm9000_read_locked(dm, DM9000_NSR) & NSR_LINKST ? 1 : 0;
472
473 return ret;
474 }
475
476 #define DM_EEPROM_MAGIC (0x444D394B)
477
478 static int dm9000_get_eeprom_len(struct net_device *dev)
479 {
480 return 128;
481 }
482
483 static int dm9000_get_eeprom(struct net_device *dev,
484 struct ethtool_eeprom *ee, u8 *data)
485 {
486 board_info_t *dm = to_dm9000_board(dev);
487 int offset = ee->offset;
488 int len = ee->len;
489 int i;
490
491 /* EEPROM access is aligned to two bytes */
492
493 if ((len & 1) != 0 || (offset & 1) != 0)
494 return -EINVAL;
495
496 if (dm->flags & DM9000_PLATF_NO_EEPROM)
497 return -ENOENT;
498
499 ee->magic = DM_EEPROM_MAGIC;
500
501 for (i = 0; i < len; i += 2)
502 dm9000_read_eeprom(dm, (offset + i) / 2, data + i);
503
504 return 0;
505 }
506
507 static int dm9000_set_eeprom(struct net_device *dev,
508 struct ethtool_eeprom *ee, u8 *data)
509 {
510 board_info_t *dm = to_dm9000_board(dev);
511 int offset = ee->offset;
512 int len = ee->len;
513 int i;
514
515 /* EEPROM access is aligned to two bytes */
516
517 if ((len & 1) != 0 || (offset & 1) != 0)
518 return -EINVAL;
519
520 if (dm->flags & DM9000_PLATF_NO_EEPROM)
521 return -ENOENT;
522
523 if (ee->magic != DM_EEPROM_MAGIC)
524 return -EINVAL;
525
526 for (i = 0; i < len; i += 2)
527 dm9000_write_eeprom(dm, (offset + i) / 2, data + i);
528
529 return 0;
530 }
531
532 static const struct ethtool_ops dm9000_ethtool_ops = {
533 .get_drvinfo = dm9000_get_drvinfo,
534 .get_settings = dm9000_get_settings,
535 .set_settings = dm9000_set_settings,
536 .get_msglevel = dm9000_get_msglevel,
537 .set_msglevel = dm9000_set_msglevel,
538 .nway_reset = dm9000_nway_reset,
539 .get_link = dm9000_get_link,
540 .get_eeprom_len = dm9000_get_eeprom_len,
541 .get_eeprom = dm9000_get_eeprom,
542 .set_eeprom = dm9000_set_eeprom,
543 };
544
545 static void dm9000_show_carrier(board_info_t *db,
546 unsigned carrier, unsigned nsr)
547 {
548 struct net_device *ndev = db->ndev;
549 unsigned ncr = dm9000_read_locked(db, DM9000_NCR);
550
551 if (carrier)
552 dev_info(db->dev, "%s: link up, %dMbps, %s-duplex, no LPA\n",
553 ndev->name, (nsr & NSR_SPEED) ? 10 : 100,
554 (ncr & NCR_FDX) ? "full" : "half");
555 else
556 dev_info(db->dev, "%s: link down\n", ndev->name);
557 }
558
559 static void
560 dm9000_poll_work(struct work_struct *w)
561 {
562 struct delayed_work *dw = to_delayed_work(w);
563 board_info_t *db = container_of(dw, board_info_t, phy_poll);
564 struct net_device *ndev = db->ndev;
565
566 if (db->flags & DM9000_PLATF_SIMPLE_PHY &&
567 !(db->flags & DM9000_PLATF_EXT_PHY)) {
568 unsigned nsr = dm9000_read_locked(db, DM9000_NSR);
569 unsigned old_carrier = netif_carrier_ok(ndev) ? 1 : 0;
570 unsigned new_carrier;
571
572 new_carrier = (nsr & NSR_LINKST) ? 1 : 0;
573
574 if (old_carrier != new_carrier) {
575 if (netif_msg_link(db))
576 dm9000_show_carrier(db, new_carrier, nsr);
577
578 if (!new_carrier)
579 netif_carrier_off(ndev);
580 else
581 netif_carrier_on(ndev);
582 }
583 } else
584 mii_check_media(&db->mii, netif_msg_link(db), 0);
585
586 if (netif_running(ndev))
587 dm9000_schedule_poll(db);
588 }
589
590 /* dm9000_release_board
591 *
592 * release a board, and any mapped resources
593 */
594
595 static void
596 dm9000_release_board(struct platform_device *pdev, struct board_info *db)
597 {
598 /* unmap our resources */
599
600 iounmap(db->io_addr);
601 iounmap(db->io_data);
602
603 /* release the resources */
604
605 release_resource(db->data_req);
606 kfree(db->data_req);
607
608 release_resource(db->addr_req);
609 kfree(db->addr_req);
610 }
611
612 static unsigned char dm9000_type_to_char(enum dm9000_type type)
613 {
614 switch (type) {
615 case TYPE_DM9000E: return 'e';
616 case TYPE_DM9000A: return 'a';
617 case TYPE_DM9000B: return 'b';
618 }
619
620 return '?';
621 }
622
623 /*
624 * Set DM9000 multicast address
625 */
626 static void
627 dm9000_hash_table(struct net_device *dev)
628 {
629 board_info_t *db = netdev_priv(dev);
630 struct dev_mc_list *mcptr = dev->mc_list;
631 int mc_cnt = dev->mc_count;
632 int i, oft;
633 u32 hash_val;
634 u16 hash_table[4];
635 u8 rcr = RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN;
636 unsigned long flags;
637
638 dm9000_dbg(db, 1, "entering %s\n", __func__);
639
640 spin_lock_irqsave(&db->lock, flags);
641
642 for (i = 0, oft = DM9000_PAR; i < 6; i++, oft++)
643 iow(db, oft, dev->dev_addr[i]);
644
645 /* Clear Hash Table */
646 for (i = 0; i < 4; i++)
647 hash_table[i] = 0x0;
648
649 /* broadcast address */
650 hash_table[3] = 0x8000;
651
652 if (dev->flags & IFF_PROMISC)
653 rcr |= RCR_PRMSC;
654
655 if (dev->flags & IFF_ALLMULTI)
656 rcr |= RCR_ALL;
657
658 /* the multicast address in Hash Table : 64 bits */
659 for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
660 hash_val = ether_crc_le(6, mcptr->dmi_addr) & 0x3f;
661 hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
662 }
663
664 /* Write the hash table to MAC MD table */
665 for (i = 0, oft = DM9000_MAR; i < 4; i++) {
666 iow(db, oft++, hash_table[i]);
667 iow(db, oft++, hash_table[i] >> 8);
668 }
669
670 iow(db, DM9000_RCR, rcr);
671 spin_unlock_irqrestore(&db->lock, flags);
672 }
673
674 /*
675 * Initilize dm9000 board
676 */
677 static void
678 dm9000_init_dm9000(struct net_device *dev)
679 {
680 board_info_t *db = netdev_priv(dev);
681 unsigned int imr;
682
683 dm9000_dbg(db, 1, "entering %s\n", __func__);
684
685 /* I/O mode */
686 db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
687
688 /* GPIO0 on pre-activate PHY */
689 iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
690 iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
691 iow(db, DM9000_GPR, 0); /* Enable PHY */
692
693 if (db->flags & DM9000_PLATF_EXT_PHY)
694 iow(db, DM9000_NCR, NCR_EXT_PHY);
695
696 /* Program operating register */
697 iow(db, DM9000_TCR, 0); /* TX Polling clear */
698 iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
699 iow(db, DM9000_FCR, 0xff); /* Flow Control */
700 iow(db, DM9000_SMCR, 0); /* Special Mode */
701 /* clear TX status */
702 iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
703 iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
704
705 /* Set address filter table */
706 dm9000_hash_table(dev);
707
708 imr = IMR_PAR | IMR_PTM | IMR_PRM;
709 if (db->type != TYPE_DM9000E)
710 imr |= IMR_LNKCHNG;
711
712 db->imr_all = imr;
713
714 /* Enable TX/RX interrupt mask */
715 iow(db, DM9000_IMR, imr);
716
717 /* Init Driver variable */
718 db->tx_pkt_cnt = 0;
719 db->queue_pkt_len = 0;
720 dev->trans_start = 0;
721 }
722
723 /* Our watchdog timed out. Called by the networking layer */
724 static void dm9000_timeout(struct net_device *dev)
725 {
726 board_info_t *db = netdev_priv(dev);
727 u8 reg_save;
728 unsigned long flags;
729
730 /* Save previous register address */
731 reg_save = readb(db->io_addr);
732 spin_lock_irqsave(&db->lock, flags);
733
734 netif_stop_queue(dev);
735 dm9000_reset(db);
736 dm9000_init_dm9000(dev);
737 /* We can accept TX packets again */
738 dev->trans_start = jiffies;
739 netif_wake_queue(dev);
740
741 /* Restore previous register address */
742 writeb(reg_save, db->io_addr);
743 spin_unlock_irqrestore(&db->lock, flags);
744 }
745
746 /*
747 * Hardware start transmission.
748 * Send a packet to media from the upper layer.
749 */
750 static int
751 dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
752 {
753 unsigned long flags;
754 board_info_t *db = netdev_priv(dev);
755
756 dm9000_dbg(db, 3, "%s:\n", __func__);
757
758 if (db->tx_pkt_cnt > 1)
759 return 1;
760
761 spin_lock_irqsave(&db->lock, flags);
762
763 /* Move data to DM9000 TX RAM */
764 writeb(DM9000_MWCMD, db->io_addr);
765
766 (db->outblk)(db->io_data, skb->data, skb->len);
767 dev->stats.tx_bytes += skb->len;
768
769 db->tx_pkt_cnt++;
770 /* TX control: First packet immediately send, second packet queue */
771 if (db->tx_pkt_cnt == 1) {
772 /* Set TX length to DM9000 */
773 iow(db, DM9000_TXPLL, skb->len);
774 iow(db, DM9000_TXPLH, skb->len >> 8);
775
776 /* Issue TX polling command */
777 iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
778
779 dev->trans_start = jiffies; /* save the time stamp */
780 } else {
781 /* Second packet */
782 db->queue_pkt_len = skb->len;
783 netif_stop_queue(dev);
784 }
785
786 spin_unlock_irqrestore(&db->lock, flags);
787
788 /* free this SKB */
789 dev_kfree_skb(skb);
790
791 return 0;
792 }
793
794 /*
795 * DM9000 interrupt handler
796 * receive the packet to upper layer, free the transmitted packet
797 */
798
799 static void dm9000_tx_done(struct net_device *dev, board_info_t *db)
800 {
801 int tx_status = ior(db, DM9000_NSR); /* Got TX status */
802
803 if (tx_status & (NSR_TX2END | NSR_TX1END)) {
804 /* One packet sent complete */
805 db->tx_pkt_cnt--;
806 dev->stats.tx_packets++;
807
808 if (netif_msg_tx_done(db))
809 dev_dbg(db->dev, "tx done, NSR %02x\n", tx_status);
810
811 /* Queue packet check & send */
812 if (db->tx_pkt_cnt > 0) {
813 iow(db, DM9000_TXPLL, db->queue_pkt_len);
814 iow(db, DM9000_TXPLH, db->queue_pkt_len >> 8);
815 iow(db, DM9000_TCR, TCR_TXREQ);
816 dev->trans_start = jiffies;
817 }
818 netif_wake_queue(dev);
819 }
820 }
821
822 struct dm9000_rxhdr {
823 u8 RxPktReady;
824 u8 RxStatus;
825 __le16 RxLen;
826 } __attribute__((__packed__));
827
828 /*
829 * Received a packet and pass to upper layer
830 */
831 static void
832 dm9000_rx(struct net_device *dev)
833 {
834 board_info_t *db = netdev_priv(dev);
835 struct dm9000_rxhdr rxhdr;
836 struct sk_buff *skb;
837 u8 rxbyte, *rdptr;
838 bool GoodPacket;
839 int RxLen;
840
841 /* Check packet ready or not */
842 do {
843 ior(db, DM9000_MRCMDX); /* Dummy read */
844
845 /* Get most updated data */
846 rxbyte = readb(db->io_data);
847
848 /* Status check: this byte must be 0 or 1 */
849 if (rxbyte > DM9000_PKT_RDY) {
850 dev_warn(db->dev, "status check fail: %d\n", rxbyte);
851 iow(db, DM9000_RCR, 0x00); /* Stop Device */
852 iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
853 return;
854 }
855
856 if (rxbyte != DM9000_PKT_RDY)
857 return;
858
859 /* A packet ready now & Get status/length */
860 GoodPacket = true;
861 writeb(DM9000_MRCMD, db->io_addr);
862
863 (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
864
865 RxLen = le16_to_cpu(rxhdr.RxLen);
866
867 if (netif_msg_rx_status(db))
868 dev_dbg(db->dev, "RX: status %02x, length %04x\n",
869 rxhdr.RxStatus, RxLen);
870
871 /* Packet Status check */
872 if (RxLen < 0x40) {
873 GoodPacket = false;
874 if (netif_msg_rx_err(db))
875 dev_dbg(db->dev, "RX: Bad Packet (runt)\n");
876 }
877
878 if (RxLen > DM9000_PKT_MAX) {
879 dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen);
880 }
881
882 /* rxhdr.RxStatus is identical to RSR register. */
883 if (rxhdr.RxStatus & (RSR_FOE | RSR_CE | RSR_AE |
884 RSR_PLE | RSR_RWTO |
885 RSR_LCS | RSR_RF)) {
886 GoodPacket = false;
887 if (rxhdr.RxStatus & RSR_FOE) {
888 if (netif_msg_rx_err(db))
889 dev_dbg(db->dev, "fifo error\n");
890 dev->stats.rx_fifo_errors++;
891 }
892 if (rxhdr.RxStatus & RSR_CE) {
893 if (netif_msg_rx_err(db))
894 dev_dbg(db->dev, "crc error\n");
895 dev->stats.rx_crc_errors++;
896 }
897 if (rxhdr.RxStatus & RSR_RF) {
898 if (netif_msg_rx_err(db))
899 dev_dbg(db->dev, "length error\n");
900 dev->stats.rx_length_errors++;
901 }
902 }
903
904 /* Move data from DM9000 */
905 if (GoodPacket
906 && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
907 skb_reserve(skb, 2);
908 rdptr = (u8 *) skb_put(skb, RxLen - 4);
909
910 /* Read received packet from RX SRAM */
911
912 (db->inblk)(db->io_data, rdptr, RxLen);
913 dev->stats.rx_bytes += RxLen;
914
915 /* Pass to upper layer */
916 skb->protocol = eth_type_trans(skb, dev);
917 netif_rx(skb);
918 dev->stats.rx_packets++;
919
920 } else {
921 /* need to dump the packet's data */
922
923 (db->dumpblk)(db->io_data, RxLen);
924 }
925 } while (rxbyte == DM9000_PKT_RDY);
926 }
927
928 static irqreturn_t dm9000_interrupt(int irq, void *dev_id)
929 {
930 struct net_device *dev = dev_id;
931 board_info_t *db = netdev_priv(dev);
932 int int_status;
933 unsigned long flags;
934 u8 reg_save;
935
936 dm9000_dbg(db, 3, "entering %s\n", __func__);
937
938 /* A real interrupt coming */
939
940 /* holders of db->lock must always block IRQs */
941 spin_lock_irqsave(&db->lock, flags);
942
943 /* Save previous register address */
944 reg_save = readb(db->io_addr);
945
946 /* Disable all interrupts */
947 iow(db, DM9000_IMR, IMR_PAR);
948
949 /* Got DM9000 interrupt status */
950 int_status = ior(db, DM9000_ISR); /* Got ISR */
951 iow(db, DM9000_ISR, int_status); /* Clear ISR status */
952
953 if (netif_msg_intr(db))
954 dev_dbg(db->dev, "interrupt status %02x\n", int_status);
955
956 /* Received the coming packet */
957 if (int_status & ISR_PRS)
958 dm9000_rx(dev);
959
960 /* Trnasmit Interrupt check */
961 if (int_status & ISR_PTS)
962 dm9000_tx_done(dev, db);
963
964 if (db->type != TYPE_DM9000E) {
965 if (int_status & ISR_LNKCHNG) {
966 /* fire a link-change request */
967 schedule_delayed_work(&db->phy_poll, 1);
968 }
969 }
970
971 /* Re-enable interrupt mask */
972 iow(db, DM9000_IMR, db->imr_all);
973
974 /* Restore previous register address */
975 writeb(reg_save, db->io_addr);
976
977 spin_unlock_irqrestore(&db->lock, flags);
978
979 return IRQ_HANDLED;
980 }
981
982 #ifdef CONFIG_NET_POLL_CONTROLLER
983 /*
984 *Used by netconsole
985 */
986 static void dm9000_poll_controller(struct net_device *dev)
987 {
988 disable_irq(dev->irq);
989 dm9000_interrupt(dev->irq, dev);
990 enable_irq(dev->irq);
991 }
992 #endif
993
994 /*
995 * Open the interface.
996 * The interface is opened whenever "ifconfig" actives it.
997 */
998 static int
999 dm9000_open(struct net_device *dev)
1000 {
1001 board_info_t *db = netdev_priv(dev);
1002 unsigned long irqflags = db->irq_res->flags & IRQF_TRIGGER_MASK;
1003
1004 if (netif_msg_ifup(db))
1005 dev_dbg(db->dev, "enabling %s\n", dev->name);
1006
1007 /* If there is no IRQ type specified, default to something that
1008 * may work, and tell the user that this is a problem */
1009
1010 if (irqflags == IRQF_TRIGGER_NONE)
1011 dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n");
1012
1013 irqflags |= IRQF_SHARED;
1014
1015 if (request_irq(dev->irq, &dm9000_interrupt, irqflags, dev->name, dev))
1016 return -EAGAIN;
1017
1018 /* Initialize DM9000 board */
1019 dm9000_reset(db);
1020 dm9000_init_dm9000(dev);
1021
1022 /* Init driver variable */
1023 db->dbug_cnt = 0;
1024
1025 mii_check_media(&db->mii, netif_msg_link(db), 1);
1026 netif_start_queue(dev);
1027
1028 dm9000_schedule_poll(db);
1029
1030 return 0;
1031 }
1032
1033 /*
1034 * Sleep, either by using msleep() or if we are suspending, then
1035 * use mdelay() to sleep.
1036 */
1037 static void dm9000_msleep(board_info_t *db, unsigned int ms)
1038 {
1039 if (db->in_suspend)
1040 mdelay(ms);
1041 else
1042 msleep(ms);
1043 }
1044
1045 /*
1046 * Read a word from phyxcer
1047 */
1048 static int
1049 dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
1050 {
1051 board_info_t *db = netdev_priv(dev);
1052 unsigned long flags;
1053 unsigned int reg_save;
1054 int ret;
1055
1056 mutex_lock(&db->addr_lock);
1057
1058 spin_lock_irqsave(&db->lock,flags);
1059
1060 /* Save previous register address */
1061 reg_save = readb(db->io_addr);
1062
1063 /* Fill the phyxcer register into REG_0C */
1064 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1065
1066 iow(db, DM9000_EPCR, EPCR_ERPRR | EPCR_EPOS); /* Issue phyxcer read command */
1067
1068 writeb(reg_save, db->io_addr);
1069 spin_unlock_irqrestore(&db->lock,flags);
1070
1071 dm9000_msleep(db, 1); /* Wait read complete */
1072
1073 spin_lock_irqsave(&db->lock,flags);
1074 reg_save = readb(db->io_addr);
1075
1076 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
1077
1078 /* The read data keeps on REG_0D & REG_0E */
1079 ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
1080
1081 /* restore the previous address */
1082 writeb(reg_save, db->io_addr);
1083 spin_unlock_irqrestore(&db->lock,flags);
1084
1085 mutex_unlock(&db->addr_lock);
1086
1087 dm9000_dbg(db, 5, "phy_read[%02x] -> %04x\n", reg, ret);
1088 return ret;
1089 }
1090
1091 /*
1092 * Write a word to phyxcer
1093 */
1094 static void
1095 dm9000_phy_write(struct net_device *dev,
1096 int phyaddr_unused, int reg, int value)
1097 {
1098 board_info_t *db = netdev_priv(dev);
1099 unsigned long flags;
1100 unsigned long reg_save;
1101
1102 dm9000_dbg(db, 5, "phy_write[%02x] = %04x\n", reg, value);
1103 mutex_lock(&db->addr_lock);
1104
1105 spin_lock_irqsave(&db->lock,flags);
1106
1107 /* Save previous register address */
1108 reg_save = readb(db->io_addr);
1109
1110 /* Fill the phyxcer register into REG_0C */
1111 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1112
1113 /* Fill the written data into REG_0D & REG_0E */
1114 iow(db, DM9000_EPDRL, value);
1115 iow(db, DM9000_EPDRH, value >> 8);
1116
1117 iow(db, DM9000_EPCR, EPCR_EPOS | EPCR_ERPRW); /* Issue phyxcer write command */
1118
1119 writeb(reg_save, db->io_addr);
1120 spin_unlock_irqrestore(&db->lock, flags);
1121
1122 dm9000_msleep(db, 1); /* Wait write complete */
1123
1124 spin_lock_irqsave(&db->lock,flags);
1125 reg_save = readb(db->io_addr);
1126
1127 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
1128
1129 /* restore the previous address */
1130 writeb(reg_save, db->io_addr);
1131
1132 spin_unlock_irqrestore(&db->lock, flags);
1133 mutex_unlock(&db->addr_lock);
1134 }
1135
1136 static void
1137 dm9000_shutdown(struct net_device *dev)
1138 {
1139 board_info_t *db = netdev_priv(dev);
1140
1141 /* RESET device */
1142 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
1143 iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
1144 iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
1145 iow(db, DM9000_RCR, 0x00); /* Disable RX */
1146 }
1147
1148 /*
1149 * Stop the interface.
1150 * The interface is stopped when it is brought.
1151 */
1152 static int
1153 dm9000_stop(struct net_device *ndev)
1154 {
1155 board_info_t *db = netdev_priv(ndev);
1156
1157 if (netif_msg_ifdown(db))
1158 dev_dbg(db->dev, "shutting down %s\n", ndev->name);
1159
1160 cancel_delayed_work_sync(&db->phy_poll);
1161
1162 netif_stop_queue(ndev);
1163 netif_carrier_off(ndev);
1164
1165 /* free interrupt */
1166 free_irq(ndev->irq, ndev);
1167
1168 dm9000_shutdown(ndev);
1169
1170 return 0;
1171 }
1172
1173 #define res_size(_r) (((_r)->end - (_r)->start) + 1)
1174
1175 /*
1176 * Search DM9000 board, allocate space and register it
1177 */
1178 static int __devinit
1179 dm9000_probe(struct platform_device *pdev)
1180 {
1181 struct dm9000_plat_data *pdata = pdev->dev.platform_data;
1182 struct board_info *db; /* Point a board information structure */
1183 struct net_device *ndev;
1184 const unsigned char *mac_src;
1185 int ret = 0;
1186 int iosize;
1187 int i;
1188 u32 id_val;
1189
1190 /* Init network device */
1191 ndev = alloc_etherdev(sizeof(struct board_info));
1192 if (!ndev) {
1193 dev_err(&pdev->dev, "could not allocate device.\n");
1194 return -ENOMEM;
1195 }
1196
1197 SET_NETDEV_DEV(ndev, &pdev->dev);
1198
1199 dev_dbg(&pdev->dev, "dm9000_probe()\n");
1200
1201 /* setup board info structure */
1202 db = netdev_priv(ndev);
1203 memset(db, 0, sizeof(*db));
1204
1205 db->dev = &pdev->dev;
1206 db->ndev = ndev;
1207
1208 spin_lock_init(&db->lock);
1209 mutex_init(&db->addr_lock);
1210
1211 INIT_DELAYED_WORK(&db->phy_poll, dm9000_poll_work);
1212
1213 db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1214 db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1215 db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1216
1217 if (db->addr_res == NULL || db->data_res == NULL ||
1218 db->irq_res == NULL) {
1219 dev_err(db->dev, "insufficient resources\n");
1220 ret = -ENOENT;
1221 goto out;
1222 }
1223
1224 iosize = res_size(db->addr_res);
1225 db->addr_req = request_mem_region(db->addr_res->start, iosize,
1226 pdev->name);
1227
1228 if (db->addr_req == NULL) {
1229 dev_err(db->dev, "cannot claim address reg area\n");
1230 ret = -EIO;
1231 goto out;
1232 }
1233
1234 db->io_addr = ioremap(db->addr_res->start, iosize);
1235
1236 if (db->io_addr == NULL) {
1237 dev_err(db->dev, "failed to ioremap address reg\n");
1238 ret = -EINVAL;
1239 goto out;
1240 }
1241
1242 iosize = res_size(db->data_res);
1243 db->data_req = request_mem_region(db->data_res->start, iosize,
1244 pdev->name);
1245
1246 if (db->data_req == NULL) {
1247 dev_err(db->dev, "cannot claim data reg area\n");
1248 ret = -EIO;
1249 goto out;
1250 }
1251
1252 db->io_data = ioremap(db->data_res->start, iosize);
1253
1254 if (db->io_data == NULL) {
1255 dev_err(db->dev, "failed to ioremap data reg\n");
1256 ret = -EINVAL;
1257 goto out;
1258 }
1259
1260 /* fill in parameters for net-dev structure */
1261 ndev->base_addr = (unsigned long)db->io_addr;
1262 ndev->irq = db->irq_res->start;
1263
1264 /* ensure at least we have a default set of IO routines */
1265 dm9000_set_io(db, iosize);
1266
1267 /* check to see if anything is being over-ridden */
1268 if (pdata != NULL) {
1269 /* check to see if the driver wants to over-ride the
1270 * default IO width */
1271
1272 if (pdata->flags & DM9000_PLATF_8BITONLY)
1273 dm9000_set_io(db, 1);
1274
1275 if (pdata->flags & DM9000_PLATF_16BITONLY)
1276 dm9000_set_io(db, 2);
1277
1278 if (pdata->flags & DM9000_PLATF_32BITONLY)
1279 dm9000_set_io(db, 4);
1280
1281 /* check to see if there are any IO routine
1282 * over-rides */
1283
1284 if (pdata->inblk != NULL)
1285 db->inblk = pdata->inblk;
1286
1287 if (pdata->outblk != NULL)
1288 db->outblk = pdata->outblk;
1289
1290 if (pdata->dumpblk != NULL)
1291 db->dumpblk = pdata->dumpblk;
1292
1293 db->flags = pdata->flags;
1294 }
1295
1296 #ifdef CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL
1297 db->flags |= DM9000_PLATF_SIMPLE_PHY;
1298 #endif
1299
1300 dm9000_reset(db);
1301
1302 /* try multiple times, DM9000 sometimes gets the read wrong */
1303 for (i = 0; i < 8; i++) {
1304 id_val = ior(db, DM9000_VIDL);
1305 id_val |= (u32)ior(db, DM9000_VIDH) << 8;
1306 id_val |= (u32)ior(db, DM9000_PIDL) << 16;
1307 id_val |= (u32)ior(db, DM9000_PIDH) << 24;
1308
1309 if (id_val == DM9000_ID)
1310 break;
1311 dev_err(db->dev, "read wrong id 0x%08x\n", id_val);
1312 }
1313
1314 if (id_val != DM9000_ID) {
1315 dev_err(db->dev, "wrong id: 0x%08x\n", id_val);
1316 ret = -ENODEV;
1317 goto out;
1318 }
1319
1320 /* Identify what type of DM9000 we are working on */
1321
1322 id_val = ior(db, DM9000_CHIPR);
1323 dev_dbg(db->dev, "dm9000 revision 0x%02x\n", id_val);
1324
1325 switch (id_val) {
1326 case CHIPR_DM9000A:
1327 db->type = TYPE_DM9000A;
1328 break;
1329 case CHIPR_DM9000B:
1330 db->type = TYPE_DM9000B;
1331 break;
1332 default:
1333 dev_dbg(db->dev, "ID %02x => defaulting to DM9000E\n", id_val);
1334 db->type = TYPE_DM9000E;
1335 }
1336
1337 /* from this point we assume that we have found a DM9000 */
1338
1339 /* driver system function */
1340 ether_setup(ndev);
1341
1342 ndev->open = &dm9000_open;
1343 ndev->hard_start_xmit = &dm9000_start_xmit;
1344 ndev->tx_timeout = &dm9000_timeout;
1345 ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
1346 ndev->stop = &dm9000_stop;
1347 ndev->set_multicast_list = &dm9000_hash_table;
1348 ndev->ethtool_ops = &dm9000_ethtool_ops;
1349 ndev->do_ioctl = &dm9000_ioctl;
1350
1351 #ifdef CONFIG_NET_POLL_CONTROLLER
1352 ndev->poll_controller = &dm9000_poll_controller;
1353 #endif
1354
1355 db->msg_enable = NETIF_MSG_LINK;
1356 db->mii.phy_id_mask = 0x1f;
1357 db->mii.reg_num_mask = 0x1f;
1358 db->mii.force_media = 0;
1359 db->mii.full_duplex = 0;
1360 db->mii.dev = ndev;
1361 db->mii.mdio_read = dm9000_phy_read;
1362 db->mii.mdio_write = dm9000_phy_write;
1363
1364 mac_src = "eeprom";
1365
1366 /* try reading the node address from the attached EEPROM */
1367 for (i = 0; i < 6; i += 2)
1368 dm9000_read_eeprom(db, i / 2, ndev->dev_addr+i);
1369
1370 if (!is_valid_ether_addr(ndev->dev_addr) && pdata != NULL) {
1371 mac_src = "platform data";
1372 memcpy(ndev->dev_addr, pdata->dev_addr, 6);
1373 }
1374
1375 if (!is_valid_ether_addr(ndev->dev_addr)) {
1376 /* try reading from mac */
1377
1378 mac_src = "chip";
1379 for (i = 0; i < 6; i++)
1380 ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
1381 }
1382
1383 if (!is_valid_ether_addr(ndev->dev_addr))
1384 dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please "
1385 "set using ifconfig\n", ndev->name);
1386
1387 platform_set_drvdata(pdev, ndev);
1388 ret = register_netdev(ndev);
1389
1390 if (ret == 0)
1391 printk(KERN_INFO "%s: dm9000%c at %p,%p IRQ %d MAC: %pM (%s)\n",
1392 ndev->name, dm9000_type_to_char(db->type),
1393 db->io_addr, db->io_data, ndev->irq,
1394 ndev->dev_addr, mac_src);
1395 return 0;
1396
1397 out:
1398 dev_err(db->dev, "not found (%d).\n", ret);
1399
1400 dm9000_release_board(pdev, db);
1401 free_netdev(ndev);
1402
1403 return ret;
1404 }
1405
1406 static int
1407 dm9000_drv_suspend(struct platform_device *dev, pm_message_t state)
1408 {
1409 struct net_device *ndev = platform_get_drvdata(dev);
1410 board_info_t *db;
1411
1412 if (ndev) {
1413 db = netdev_priv(ndev);
1414 db->in_suspend = 1;
1415
1416 if (netif_running(ndev)) {
1417 netif_device_detach(ndev);
1418 dm9000_shutdown(ndev);
1419 }
1420 }
1421 return 0;
1422 }
1423
1424 static int
1425 dm9000_drv_resume(struct platform_device *dev)
1426 {
1427 struct net_device *ndev = platform_get_drvdata(dev);
1428 board_info_t *db = netdev_priv(ndev);
1429
1430 if (ndev) {
1431
1432 if (netif_running(ndev)) {
1433 dm9000_reset(db);
1434 dm9000_init_dm9000(ndev);
1435
1436 netif_device_attach(ndev);
1437 }
1438
1439 db->in_suspend = 0;
1440 }
1441 return 0;
1442 }
1443
1444 static int __devexit
1445 dm9000_drv_remove(struct platform_device *pdev)
1446 {
1447 struct net_device *ndev = platform_get_drvdata(pdev);
1448
1449 platform_set_drvdata(pdev, NULL);
1450
1451 unregister_netdev(ndev);
1452 dm9000_release_board(pdev, (board_info_t *) netdev_priv(ndev));
1453 free_netdev(ndev); /* free device structure */
1454
1455 dev_dbg(&pdev->dev, "released and freed device\n");
1456 return 0;
1457 }
1458
1459 static struct platform_driver dm9000_driver = {
1460 .driver = {
1461 .name = "dm9000",
1462 .owner = THIS_MODULE,
1463 },
1464 .probe = dm9000_probe,
1465 .remove = __devexit_p(dm9000_drv_remove),
1466 .suspend = dm9000_drv_suspend,
1467 .resume = dm9000_drv_resume,
1468 };
1469
1470 static int __init
1471 dm9000_init(void)
1472 {
1473 printk(KERN_INFO "%s Ethernet Driver, V%s\n", CARDNAME, DRV_VERSION);
1474
1475 return platform_driver_register(&dm9000_driver);
1476 }
1477
1478 static void __exit
1479 dm9000_cleanup(void)
1480 {
1481 platform_driver_unregister(&dm9000_driver);
1482 }
1483
1484 module_init(dm9000_init);
1485 module_exit(dm9000_cleanup);
1486
1487 MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1488 MODULE_DESCRIPTION("Davicom DM9000 network driver");
1489 MODULE_LICENSE("GPL");
1490 MODULE_ALIAS("platform:dm9000");
Support for the Chinese Samsung S3C2440 based development boards