reduce tlb/cache flush times of agpgart memory allocation
[linux-2.6/mini2440.git] / drivers / char / agp / generic.c
blobbf239b8ecac5ed5de00a49202adf718608d58a33
1 /*
2 * AGPGART driver.
3 * Copyright (C) 2004 Silicon Graphics, Inc.
4 * Copyright (C) 2002-2005 Dave Jones.
5 * Copyright (C) 1999 Jeff Hartmann.
6 * Copyright (C) 1999 Precision Insight, Inc.
7 * Copyright (C) 1999 Xi Graphics, Inc.
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice shall be included
17 * in all copies or substantial portions of the Software.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
23 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
24 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
25 * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 * TODO:
28 * - Allocate more than order 0 pages to avoid too much linear map splitting.
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/init.h>
33 #include <linux/pagemap.h>
34 #include <linux/miscdevice.h>
35 #include <linux/pm.h>
36 #include <linux/agp_backend.h>
37 #include <linux/vmalloc.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/mm.h>
40 #include <linux/sched.h>
41 #include <asm/io.h>
42 #include <asm/cacheflush.h>
43 #include <asm/pgtable.h>
44 #include "agp.h"
46 __u32 *agp_gatt_table;
47 int agp_memory_reserved;
50 * Needed by the Nforce GART driver for the time being. Would be
51 * nice to do this some other way instead of needing this export.
53 EXPORT_SYMBOL_GPL(agp_memory_reserved);
56 * Generic routines for handling agp_memory structures -
57 * They use the basic page allocation routines to do the brunt of the work.
60 void agp_free_key(int key)
62 if (key < 0)
63 return;
65 if (key < MAXKEY)
66 clear_bit(key, agp_bridge->key_list);
68 EXPORT_SYMBOL(agp_free_key);
71 static int agp_get_key(void)
73 int bit;
75 bit = find_first_zero_bit(agp_bridge->key_list, MAXKEY);
76 if (bit < MAXKEY) {
77 set_bit(bit, agp_bridge->key_list);
78 return bit;
80 return -1;
83 void agp_flush_chipset(struct agp_bridge_data *bridge)
85 if (bridge->driver->chipset_flush)
86 bridge->driver->chipset_flush(bridge);
88 EXPORT_SYMBOL(agp_flush_chipset);
91 * Use kmalloc if possible for the page list. Otherwise fall back to
92 * vmalloc. This speeds things up and also saves memory for small AGP
93 * regions.
96 void agp_alloc_page_array(size_t size, struct agp_memory *mem)
98 mem->memory = NULL;
99 mem->vmalloc_flag = false;
101 if (size <= 2*PAGE_SIZE)
102 mem->memory = kmalloc(size, GFP_KERNEL | __GFP_NORETRY);
103 if (mem->memory == NULL) {
104 mem->memory = vmalloc(size);
105 mem->vmalloc_flag = true;
108 EXPORT_SYMBOL(agp_alloc_page_array);
110 void agp_free_page_array(struct agp_memory *mem)
112 if (mem->vmalloc_flag) {
113 vfree(mem->memory);
114 } else {
115 kfree(mem->memory);
118 EXPORT_SYMBOL(agp_free_page_array);
121 static struct agp_memory *agp_create_user_memory(unsigned long num_agp_pages)
123 struct agp_memory *new;
124 unsigned long alloc_size = num_agp_pages*sizeof(struct page *);
126 new = kzalloc(sizeof(struct agp_memory), GFP_KERNEL);
127 if (new == NULL)
128 return NULL;
130 new->key = agp_get_key();
132 if (new->key < 0) {
133 kfree(new);
134 return NULL;
137 agp_alloc_page_array(alloc_size, new);
139 if (new->memory == NULL) {
140 agp_free_key(new->key);
141 kfree(new);
142 return NULL;
144 new->num_scratch_pages = 0;
145 return new;
148 struct agp_memory *agp_create_memory(int scratch_pages)
150 struct agp_memory *new;
152 new = kzalloc(sizeof(struct agp_memory), GFP_KERNEL);
153 if (new == NULL)
154 return NULL;
156 new->key = agp_get_key();
158 if (new->key < 0) {
159 kfree(new);
160 return NULL;
163 agp_alloc_page_array(PAGE_SIZE * scratch_pages, new);
165 if (new->memory == NULL) {
166 agp_free_key(new->key);
167 kfree(new);
168 return NULL;
170 new->num_scratch_pages = scratch_pages;
171 new->type = AGP_NORMAL_MEMORY;
172 return new;
174 EXPORT_SYMBOL(agp_create_memory);
177 * agp_free_memory - free memory associated with an agp_memory pointer.
179 * @curr: agp_memory pointer to be freed.
181 * It is the only function that can be called when the backend is not owned
182 * by the caller. (So it can free memory on client death.)
184 void agp_free_memory(struct agp_memory *curr)
186 size_t i;
188 if (curr == NULL)
189 return;
191 if (curr->is_bound)
192 agp_unbind_memory(curr);
194 if (curr->type >= AGP_USER_TYPES) {
195 agp_generic_free_by_type(curr);
196 return;
199 if (curr->type != 0) {
200 curr->bridge->driver->free_by_type(curr);
201 return;
203 if (curr->page_count != 0) {
204 for (i = 0; i < curr->page_count; i++) {
205 curr->memory[i] = (unsigned long)gart_to_virt(curr->memory[i]);
206 curr->bridge->driver->agp_destroy_page((void *)curr->memory[i],
207 AGP_PAGE_DESTROY_UNMAP);
209 for (i = 0; i < curr->page_count; i++) {
210 curr->bridge->driver->agp_destroy_page((void *)curr->memory[i],
211 AGP_PAGE_DESTROY_FREE);
214 agp_free_key(curr->key);
215 agp_free_page_array(curr);
216 kfree(curr);
218 EXPORT_SYMBOL(agp_free_memory);
220 #define ENTRIES_PER_PAGE (PAGE_SIZE / sizeof(unsigned long))
223 * agp_allocate_memory - allocate a group of pages of a certain type.
225 * @page_count: size_t argument of the number of pages
226 * @type: u32 argument of the type of memory to be allocated.
228 * Every agp bridge device will allow you to allocate AGP_NORMAL_MEMORY which
229 * maps to physical ram. Any other type is device dependent.
231 * It returns NULL whenever memory is unavailable.
233 struct agp_memory *agp_allocate_memory(struct agp_bridge_data *bridge,
234 size_t page_count, u32 type)
236 int scratch_pages;
237 struct agp_memory *new;
238 size_t i;
240 if (!bridge)
241 return NULL;
243 if ((atomic_read(&bridge->current_memory_agp) + page_count) > bridge->max_memory_agp)
244 return NULL;
246 if (type >= AGP_USER_TYPES) {
247 new = agp_generic_alloc_user(page_count, type);
248 if (new)
249 new->bridge = bridge;
250 return new;
253 if (type != 0) {
254 new = bridge->driver->alloc_by_type(page_count, type);
255 if (new)
256 new->bridge = bridge;
257 return new;
260 scratch_pages = (page_count + ENTRIES_PER_PAGE - 1) / ENTRIES_PER_PAGE;
262 new = agp_create_memory(scratch_pages);
264 if (new == NULL)
265 return NULL;
267 for (i = 0; i < page_count; i++) {
268 void *addr = bridge->driver->agp_alloc_page(bridge);
270 if (addr == NULL) {
271 agp_free_memory(new);
272 return NULL;
274 new->memory[i] = virt_to_gart(addr);
275 new->page_count++;
277 map_page_into_agp_global_flush();
278 new->bridge = bridge;
280 return new;
282 EXPORT_SYMBOL(agp_allocate_memory);
285 /* End - Generic routines for handling agp_memory structures */
288 static int agp_return_size(void)
290 int current_size;
291 void *temp;
293 temp = agp_bridge->current_size;
295 switch (agp_bridge->driver->size_type) {
296 case U8_APER_SIZE:
297 current_size = A_SIZE_8(temp)->size;
298 break;
299 case U16_APER_SIZE:
300 current_size = A_SIZE_16(temp)->size;
301 break;
302 case U32_APER_SIZE:
303 current_size = A_SIZE_32(temp)->size;
304 break;
305 case LVL2_APER_SIZE:
306 current_size = A_SIZE_LVL2(temp)->size;
307 break;
308 case FIXED_APER_SIZE:
309 current_size = A_SIZE_FIX(temp)->size;
310 break;
311 default:
312 current_size = 0;
313 break;
316 current_size -= (agp_memory_reserved / (1024*1024));
317 if (current_size <0)
318 current_size = 0;
319 return current_size;
323 int agp_num_entries(void)
325 int num_entries;
326 void *temp;
328 temp = agp_bridge->current_size;
330 switch (agp_bridge->driver->size_type) {
331 case U8_APER_SIZE:
332 num_entries = A_SIZE_8(temp)->num_entries;
333 break;
334 case U16_APER_SIZE:
335 num_entries = A_SIZE_16(temp)->num_entries;
336 break;
337 case U32_APER_SIZE:
338 num_entries = A_SIZE_32(temp)->num_entries;
339 break;
340 case LVL2_APER_SIZE:
341 num_entries = A_SIZE_LVL2(temp)->num_entries;
342 break;
343 case FIXED_APER_SIZE:
344 num_entries = A_SIZE_FIX(temp)->num_entries;
345 break;
346 default:
347 num_entries = 0;
348 break;
351 num_entries -= agp_memory_reserved>>PAGE_SHIFT;
352 if (num_entries<0)
353 num_entries = 0;
354 return num_entries;
356 EXPORT_SYMBOL_GPL(agp_num_entries);
360 * agp_copy_info - copy bridge state information
362 * @info: agp_kern_info pointer. The caller should insure that this pointer is valid.
364 * This function copies information about the agp bridge device and the state of
365 * the agp backend into an agp_kern_info pointer.
367 int agp_copy_info(struct agp_bridge_data *bridge, struct agp_kern_info *info)
369 memset(info, 0, sizeof(struct agp_kern_info));
370 if (!bridge) {
371 info->chipset = NOT_SUPPORTED;
372 return -EIO;
375 info->version.major = bridge->version->major;
376 info->version.minor = bridge->version->minor;
377 info->chipset = SUPPORTED;
378 info->device = bridge->dev;
379 if (bridge->mode & AGPSTAT_MODE_3_0)
380 info->mode = bridge->mode & ~AGP3_RESERVED_MASK;
381 else
382 info->mode = bridge->mode & ~AGP2_RESERVED_MASK;
383 info->aper_base = bridge->gart_bus_addr;
384 info->aper_size = agp_return_size();
385 info->max_memory = bridge->max_memory_agp;
386 info->current_memory = atomic_read(&bridge->current_memory_agp);
387 info->cant_use_aperture = bridge->driver->cant_use_aperture;
388 info->vm_ops = bridge->vm_ops;
389 info->page_mask = ~0UL;
390 return 0;
392 EXPORT_SYMBOL(agp_copy_info);
394 /* End - Routine to copy over information structure */
397 * Routines for handling swapping of agp_memory into the GATT -
398 * These routines take agp_memory and insert them into the GATT.
399 * They call device specific routines to actually write to the GATT.
403 * agp_bind_memory - Bind an agp_memory structure into the GATT.
405 * @curr: agp_memory pointer
406 * @pg_start: an offset into the graphics aperture translation table
408 * It returns -EINVAL if the pointer == NULL.
409 * It returns -EBUSY if the area of the table requested is already in use.
411 int agp_bind_memory(struct agp_memory *curr, off_t pg_start)
413 int ret_val;
415 if (curr == NULL)
416 return -EINVAL;
418 if (curr->is_bound) {
419 printk(KERN_INFO PFX "memory %p is already bound!\n", curr);
420 return -EINVAL;
422 if (!curr->is_flushed) {
423 curr->bridge->driver->cache_flush();
424 curr->is_flushed = true;
426 ret_val = curr->bridge->driver->insert_memory(curr, pg_start, curr->type);
428 if (ret_val != 0)
429 return ret_val;
431 curr->is_bound = true;
432 curr->pg_start = pg_start;
433 return 0;
435 EXPORT_SYMBOL(agp_bind_memory);
439 * agp_unbind_memory - Removes an agp_memory structure from the GATT
441 * @curr: agp_memory pointer to be removed from the GATT.
443 * It returns -EINVAL if this piece of agp_memory is not currently bound to
444 * the graphics aperture translation table or if the agp_memory pointer == NULL
446 int agp_unbind_memory(struct agp_memory *curr)
448 int ret_val;
450 if (curr == NULL)
451 return -EINVAL;
453 if (!curr->is_bound) {
454 printk(KERN_INFO PFX "memory %p was not bound!\n", curr);
455 return -EINVAL;
458 ret_val = curr->bridge->driver->remove_memory(curr, curr->pg_start, curr->type);
460 if (ret_val != 0)
461 return ret_val;
463 curr->is_bound = false;
464 curr->pg_start = 0;
465 return 0;
467 EXPORT_SYMBOL(agp_unbind_memory);
469 /* End - Routines for handling swapping of agp_memory into the GATT */
472 /* Generic Agp routines - Start */
473 static void agp_v2_parse_one(u32 *requested_mode, u32 *bridge_agpstat, u32 *vga_agpstat)
475 u32 tmp;
477 if (*requested_mode & AGP2_RESERVED_MASK) {
478 printk(KERN_INFO PFX "reserved bits set (%x) in mode 0x%x. Fixed.\n",
479 *requested_mode & AGP2_RESERVED_MASK, *requested_mode);
480 *requested_mode &= ~AGP2_RESERVED_MASK;
484 * Some dumb bridges are programmed to disobey the AGP2 spec.
485 * This is likely a BIOS misprogramming rather than poweron default, or
486 * it would be a lot more common.
487 * https://bugs.freedesktop.org/show_bug.cgi?id=8816
488 * AGPv2 spec 6.1.9 states:
489 * The RATE field indicates the data transfer rates supported by this
490 * device. A.G.P. devices must report all that apply.
491 * Fix them up as best we can.
493 switch (*bridge_agpstat & 7) {
494 case 4:
495 *bridge_agpstat |= (AGPSTAT2_2X | AGPSTAT2_1X);
496 printk(KERN_INFO PFX "BIOS bug. AGP bridge claims to only support x4 rate"
497 "Fixing up support for x2 & x1\n");
498 break;
499 case 2:
500 *bridge_agpstat |= AGPSTAT2_1X;
501 printk(KERN_INFO PFX "BIOS bug. AGP bridge claims to only support x2 rate"
502 "Fixing up support for x1\n");
503 break;
504 default:
505 break;
508 /* Check the speed bits make sense. Only one should be set. */
509 tmp = *requested_mode & 7;
510 switch (tmp) {
511 case 0:
512 printk(KERN_INFO PFX "%s tried to set rate=x0. Setting to x1 mode.\n", current->comm);
513 *requested_mode |= AGPSTAT2_1X;
514 break;
515 case 1:
516 case 2:
517 break;
518 case 3:
519 *requested_mode &= ~(AGPSTAT2_1X); /* rate=2 */
520 break;
521 case 4:
522 break;
523 case 5:
524 case 6:
525 case 7:
526 *requested_mode &= ~(AGPSTAT2_1X|AGPSTAT2_2X); /* rate=4*/
527 break;
530 /* disable SBA if it's not supported */
531 if (!((*bridge_agpstat & AGPSTAT_SBA) && (*vga_agpstat & AGPSTAT_SBA) && (*requested_mode & AGPSTAT_SBA)))
532 *bridge_agpstat &= ~AGPSTAT_SBA;
534 /* Set rate */
535 if (!((*bridge_agpstat & AGPSTAT2_4X) && (*vga_agpstat & AGPSTAT2_4X) && (*requested_mode & AGPSTAT2_4X)))
536 *bridge_agpstat &= ~AGPSTAT2_4X;
538 if (!((*bridge_agpstat & AGPSTAT2_2X) && (*vga_agpstat & AGPSTAT2_2X) && (*requested_mode & AGPSTAT2_2X)))
539 *bridge_agpstat &= ~AGPSTAT2_2X;
541 if (!((*bridge_agpstat & AGPSTAT2_1X) && (*vga_agpstat & AGPSTAT2_1X) && (*requested_mode & AGPSTAT2_1X)))
542 *bridge_agpstat &= ~AGPSTAT2_1X;
544 /* Now we know what mode it should be, clear out the unwanted bits. */
545 if (*bridge_agpstat & AGPSTAT2_4X)
546 *bridge_agpstat &= ~(AGPSTAT2_1X | AGPSTAT2_2X); /* 4X */
548 if (*bridge_agpstat & AGPSTAT2_2X)
549 *bridge_agpstat &= ~(AGPSTAT2_1X | AGPSTAT2_4X); /* 2X */
551 if (*bridge_agpstat & AGPSTAT2_1X)
552 *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X); /* 1X */
554 /* Apply any errata. */
555 if (agp_bridge->flags & AGP_ERRATA_FASTWRITES)
556 *bridge_agpstat &= ~AGPSTAT_FW;
558 if (agp_bridge->flags & AGP_ERRATA_SBA)
559 *bridge_agpstat &= ~AGPSTAT_SBA;
561 if (agp_bridge->flags & AGP_ERRATA_1X) {
562 *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X);
563 *bridge_agpstat |= AGPSTAT2_1X;
566 /* If we've dropped down to 1X, disable fast writes. */
567 if (*bridge_agpstat & AGPSTAT2_1X)
568 *bridge_agpstat &= ~AGPSTAT_FW;
572 * requested_mode = Mode requested by (typically) X.
573 * bridge_agpstat = PCI_AGP_STATUS from agp bridge.
574 * vga_agpstat = PCI_AGP_STATUS from graphic card.
576 static void agp_v3_parse_one(u32 *requested_mode, u32 *bridge_agpstat, u32 *vga_agpstat)
578 u32 origbridge=*bridge_agpstat, origvga=*vga_agpstat;
579 u32 tmp;
581 if (*requested_mode & AGP3_RESERVED_MASK) {
582 printk(KERN_INFO PFX "reserved bits set (%x) in mode 0x%x. Fixed.\n",
583 *requested_mode & AGP3_RESERVED_MASK, *requested_mode);
584 *requested_mode &= ~AGP3_RESERVED_MASK;
587 /* Check the speed bits make sense. */
588 tmp = *requested_mode & 7;
589 if (tmp == 0) {
590 printk(KERN_INFO PFX "%s tried to set rate=x0. Setting to AGP3 x4 mode.\n", current->comm);
591 *requested_mode |= AGPSTAT3_4X;
593 if (tmp >= 3) {
594 printk(KERN_INFO PFX "%s tried to set rate=x%d. Setting to AGP3 x8 mode.\n", current->comm, tmp * 4);
595 *requested_mode = (*requested_mode & ~7) | AGPSTAT3_8X;
598 /* ARQSZ - Set the value to the maximum one.
599 * Don't allow the mode register to override values. */
600 *bridge_agpstat = ((*bridge_agpstat & ~AGPSTAT_ARQSZ) |
601 max_t(u32,(*bridge_agpstat & AGPSTAT_ARQSZ),(*vga_agpstat & AGPSTAT_ARQSZ)));
603 /* Calibration cycle.
604 * Don't allow the mode register to override values. */
605 *bridge_agpstat = ((*bridge_agpstat & ~AGPSTAT_CAL_MASK) |
606 min_t(u32,(*bridge_agpstat & AGPSTAT_CAL_MASK),(*vga_agpstat & AGPSTAT_CAL_MASK)));
608 /* SBA *must* be supported for AGP v3 */
609 *bridge_agpstat |= AGPSTAT_SBA;
612 * Set speed.
613 * Check for invalid speeds. This can happen when applications
614 * written before the AGP 3.0 standard pass AGP2.x modes to AGP3 hardware
616 if (*requested_mode & AGPSTAT_MODE_3_0) {
618 * Caller hasn't a clue what it is doing. Bridge is in 3.0 mode,
619 * have been passed a 3.0 mode, but with 2.x speed bits set.
620 * AGP2.x 4x -> AGP3.0 4x.
622 if (*requested_mode & AGPSTAT2_4X) {
623 printk(KERN_INFO PFX "%s passes broken AGP3 flags (%x). Fixed.\n",
624 current->comm, *requested_mode);
625 *requested_mode &= ~AGPSTAT2_4X;
626 *requested_mode |= AGPSTAT3_4X;
628 } else {
630 * The caller doesn't know what they are doing. We are in 3.0 mode,
631 * but have been passed an AGP 2.x mode.
632 * Convert AGP 1x,2x,4x -> AGP 3.0 4x.
634 printk(KERN_INFO PFX "%s passes broken AGP2 flags (%x) in AGP3 mode. Fixed.\n",
635 current->comm, *requested_mode);
636 *requested_mode &= ~(AGPSTAT2_4X | AGPSTAT2_2X | AGPSTAT2_1X);
637 *requested_mode |= AGPSTAT3_4X;
640 if (*requested_mode & AGPSTAT3_8X) {
641 if (!(*bridge_agpstat & AGPSTAT3_8X)) {
642 *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
643 *bridge_agpstat |= AGPSTAT3_4X;
644 printk(KERN_INFO PFX "%s requested AGPx8 but bridge not capable.\n", current->comm);
645 return;
647 if (!(*vga_agpstat & AGPSTAT3_8X)) {
648 *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
649 *bridge_agpstat |= AGPSTAT3_4X;
650 printk(KERN_INFO PFX "%s requested AGPx8 but graphic card not capable.\n", current->comm);
651 return;
653 /* All set, bridge & device can do AGP x8*/
654 *bridge_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
655 goto done;
657 } else if (*requested_mode & AGPSTAT3_4X) {
658 *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
659 *bridge_agpstat |= AGPSTAT3_4X;
660 goto done;
662 } else {
665 * If we didn't specify an AGP mode, we see if both
666 * the graphics card, and the bridge can do x8, and use if so.
667 * If not, we fall back to x4 mode.
669 if ((*bridge_agpstat & AGPSTAT3_8X) && (*vga_agpstat & AGPSTAT3_8X)) {
670 printk(KERN_INFO PFX "No AGP mode specified. Setting to highest mode "
671 "supported by bridge & card (x8).\n");
672 *bridge_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
673 *vga_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
674 } else {
675 printk(KERN_INFO PFX "Fell back to AGPx4 mode because");
676 if (!(*bridge_agpstat & AGPSTAT3_8X)) {
677 printk(KERN_INFO PFX "bridge couldn't do x8. bridge_agpstat:%x (orig=%x)\n",
678 *bridge_agpstat, origbridge);
679 *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
680 *bridge_agpstat |= AGPSTAT3_4X;
682 if (!(*vga_agpstat & AGPSTAT3_8X)) {
683 printk(KERN_INFO PFX "graphics card couldn't do x8. vga_agpstat:%x (orig=%x)\n",
684 *vga_agpstat, origvga);
685 *vga_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
686 *vga_agpstat |= AGPSTAT3_4X;
691 done:
692 /* Apply any errata. */
693 if (agp_bridge->flags & AGP_ERRATA_FASTWRITES)
694 *bridge_agpstat &= ~AGPSTAT_FW;
696 if (agp_bridge->flags & AGP_ERRATA_SBA)
697 *bridge_agpstat &= ~AGPSTAT_SBA;
699 if (agp_bridge->flags & AGP_ERRATA_1X) {
700 *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X);
701 *bridge_agpstat |= AGPSTAT2_1X;
707 * agp_collect_device_status - determine correct agp_cmd from various agp_stat's
708 * @bridge: an agp_bridge_data struct allocated for the AGP host bridge.
709 * @requested_mode: requested agp_stat from userspace (Typically from X)
710 * @bridge_agpstat: current agp_stat from AGP bridge.
712 * This function will hunt for an AGP graphics card, and try to match
713 * the requested mode to the capabilities of both the bridge and the card.
715 u32 agp_collect_device_status(struct agp_bridge_data *bridge, u32 requested_mode, u32 bridge_agpstat)
717 struct pci_dev *device = NULL;
718 u32 vga_agpstat;
719 u8 cap_ptr;
721 for (;;) {
722 device = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, device);
723 if (!device) {
724 printk(KERN_INFO PFX "Couldn't find an AGP VGA controller.\n");
725 return 0;
727 cap_ptr = pci_find_capability(device, PCI_CAP_ID_AGP);
728 if (cap_ptr)
729 break;
733 * Ok, here we have a AGP device. Disable impossible
734 * settings, and adjust the readqueue to the minimum.
736 pci_read_config_dword(device, cap_ptr+PCI_AGP_STATUS, &vga_agpstat);
738 /* adjust RQ depth */
739 bridge_agpstat = ((bridge_agpstat & ~AGPSTAT_RQ_DEPTH) |
740 min_t(u32, (requested_mode & AGPSTAT_RQ_DEPTH),
741 min_t(u32, (bridge_agpstat & AGPSTAT_RQ_DEPTH), (vga_agpstat & AGPSTAT_RQ_DEPTH))));
743 /* disable FW if it's not supported */
744 if (!((bridge_agpstat & AGPSTAT_FW) &&
745 (vga_agpstat & AGPSTAT_FW) &&
746 (requested_mode & AGPSTAT_FW)))
747 bridge_agpstat &= ~AGPSTAT_FW;
749 /* Check to see if we are operating in 3.0 mode */
750 if (agp_bridge->mode & AGPSTAT_MODE_3_0)
751 agp_v3_parse_one(&requested_mode, &bridge_agpstat, &vga_agpstat);
752 else
753 agp_v2_parse_one(&requested_mode, &bridge_agpstat, &vga_agpstat);
755 pci_dev_put(device);
756 return bridge_agpstat;
758 EXPORT_SYMBOL(agp_collect_device_status);
761 void agp_device_command(u32 bridge_agpstat, bool agp_v3)
763 struct pci_dev *device = NULL;
764 int mode;
766 mode = bridge_agpstat & 0x7;
767 if (agp_v3)
768 mode *= 4;
770 for_each_pci_dev(device) {
771 u8 agp = pci_find_capability(device, PCI_CAP_ID_AGP);
772 if (!agp)
773 continue;
775 printk(KERN_INFO PFX "Putting AGP V%d device at %s into %dx mode\n",
776 agp_v3 ? 3 : 2, pci_name(device), mode);
777 pci_write_config_dword(device, agp + PCI_AGP_COMMAND, bridge_agpstat);
780 EXPORT_SYMBOL(agp_device_command);
783 void get_agp_version(struct agp_bridge_data *bridge)
785 u32 ncapid;
787 /* Exit early if already set by errata workarounds. */
788 if (bridge->major_version != 0)
789 return;
791 pci_read_config_dword(bridge->dev, bridge->capndx, &ncapid);
792 bridge->major_version = (ncapid >> AGP_MAJOR_VERSION_SHIFT) & 0xf;
793 bridge->minor_version = (ncapid >> AGP_MINOR_VERSION_SHIFT) & 0xf;
795 EXPORT_SYMBOL(get_agp_version);
798 void agp_generic_enable(struct agp_bridge_data *bridge, u32 requested_mode)
800 u32 bridge_agpstat, temp;
802 get_agp_version(agp_bridge);
804 printk(KERN_INFO PFX "Found an AGP %d.%d compliant device at %s.\n",
805 agp_bridge->major_version,
806 agp_bridge->minor_version,
807 pci_name(agp_bridge->dev));
809 pci_read_config_dword(agp_bridge->dev,
810 agp_bridge->capndx + PCI_AGP_STATUS, &bridge_agpstat);
812 bridge_agpstat = agp_collect_device_status(agp_bridge, requested_mode, bridge_agpstat);
813 if (bridge_agpstat == 0)
814 /* Something bad happened. FIXME: Return error code? */
815 return;
817 bridge_agpstat |= AGPSTAT_AGP_ENABLE;
819 /* Do AGP version specific frobbing. */
820 if (bridge->major_version >= 3) {
821 if (bridge->mode & AGPSTAT_MODE_3_0) {
822 /* If we have 3.5, we can do the isoch stuff. */
823 if (bridge->minor_version >= 5)
824 agp_3_5_enable(bridge);
825 agp_device_command(bridge_agpstat, true);
826 return;
827 } else {
828 /* Disable calibration cycle in RX91<1> when not in AGP3.0 mode of operation.*/
829 bridge_agpstat &= ~(7<<10) ;
830 pci_read_config_dword(bridge->dev,
831 bridge->capndx+AGPCTRL, &temp);
832 temp |= (1<<9);
833 pci_write_config_dword(bridge->dev,
834 bridge->capndx+AGPCTRL, temp);
836 printk(KERN_INFO PFX "Device is in legacy mode,"
837 " falling back to 2.x\n");
841 /* AGP v<3 */
842 agp_device_command(bridge_agpstat, false);
844 EXPORT_SYMBOL(agp_generic_enable);
847 int agp_generic_create_gatt_table(struct agp_bridge_data *bridge)
849 char *table;
850 char *table_end;
851 int size;
852 int page_order;
853 int num_entries;
854 int i;
855 void *temp;
856 struct page *page;
858 /* The generic routines can't handle 2 level gatt's */
859 if (bridge->driver->size_type == LVL2_APER_SIZE)
860 return -EINVAL;
862 table = NULL;
863 i = bridge->aperture_size_idx;
864 temp = bridge->current_size;
865 size = page_order = num_entries = 0;
867 if (bridge->driver->size_type != FIXED_APER_SIZE) {
868 do {
869 switch (bridge->driver->size_type) {
870 case U8_APER_SIZE:
871 size = A_SIZE_8(temp)->size;
872 page_order =
873 A_SIZE_8(temp)->page_order;
874 num_entries =
875 A_SIZE_8(temp)->num_entries;
876 break;
877 case U16_APER_SIZE:
878 size = A_SIZE_16(temp)->size;
879 page_order = A_SIZE_16(temp)->page_order;
880 num_entries = A_SIZE_16(temp)->num_entries;
881 break;
882 case U32_APER_SIZE:
883 size = A_SIZE_32(temp)->size;
884 page_order = A_SIZE_32(temp)->page_order;
885 num_entries = A_SIZE_32(temp)->num_entries;
886 break;
887 /* This case will never really happen. */
888 case FIXED_APER_SIZE:
889 case LVL2_APER_SIZE:
890 default:
891 size = page_order = num_entries = 0;
892 break;
895 table = alloc_gatt_pages(page_order);
897 if (table == NULL) {
898 i++;
899 switch (bridge->driver->size_type) {
900 case U8_APER_SIZE:
901 bridge->current_size = A_IDX8(bridge);
902 break;
903 case U16_APER_SIZE:
904 bridge->current_size = A_IDX16(bridge);
905 break;
906 case U32_APER_SIZE:
907 bridge->current_size = A_IDX32(bridge);
908 break;
909 /* These cases will never really happen. */
910 case FIXED_APER_SIZE:
911 case LVL2_APER_SIZE:
912 default:
913 break;
915 temp = bridge->current_size;
916 } else {
917 bridge->aperture_size_idx = i;
919 } while (!table && (i < bridge->driver->num_aperture_sizes));
920 } else {
921 size = ((struct aper_size_info_fixed *) temp)->size;
922 page_order = ((struct aper_size_info_fixed *) temp)->page_order;
923 num_entries = ((struct aper_size_info_fixed *) temp)->num_entries;
924 table = alloc_gatt_pages(page_order);
927 if (table == NULL)
928 return -ENOMEM;
930 table_end = table + ((PAGE_SIZE * (1 << page_order)) - 1);
932 for (page = virt_to_page(table); page <= virt_to_page(table_end); page++)
933 SetPageReserved(page);
935 bridge->gatt_table_real = (u32 *) table;
936 agp_gatt_table = (void *)table;
938 bridge->driver->cache_flush();
939 #ifdef CONFIG_X86
940 set_memory_uc((unsigned long)table, 1 << page_order);
941 bridge->gatt_table = (void *)table;
942 #else
943 bridge->gatt_table = ioremap_nocache(virt_to_gart(table),
944 (PAGE_SIZE * (1 << page_order)));
945 bridge->driver->cache_flush();
946 #endif
948 if (bridge->gatt_table == NULL) {
949 for (page = virt_to_page(table); page <= virt_to_page(table_end); page++)
950 ClearPageReserved(page);
952 free_gatt_pages(table, page_order);
954 return -ENOMEM;
956 bridge->gatt_bus_addr = virt_to_gart(bridge->gatt_table_real);
958 /* AK: bogus, should encode addresses > 4GB */
959 for (i = 0; i < num_entries; i++) {
960 writel(bridge->scratch_page, bridge->gatt_table+i);
961 readl(bridge->gatt_table+i); /* PCI Posting. */
964 return 0;
966 EXPORT_SYMBOL(agp_generic_create_gatt_table);
968 int agp_generic_free_gatt_table(struct agp_bridge_data *bridge)
970 int page_order;
971 char *table, *table_end;
972 void *temp;
973 struct page *page;
975 temp = bridge->current_size;
977 switch (bridge->driver->size_type) {
978 case U8_APER_SIZE:
979 page_order = A_SIZE_8(temp)->page_order;
980 break;
981 case U16_APER_SIZE:
982 page_order = A_SIZE_16(temp)->page_order;
983 break;
984 case U32_APER_SIZE:
985 page_order = A_SIZE_32(temp)->page_order;
986 break;
987 case FIXED_APER_SIZE:
988 page_order = A_SIZE_FIX(temp)->page_order;
989 break;
990 case LVL2_APER_SIZE:
991 /* The generic routines can't deal with 2 level gatt's */
992 return -EINVAL;
993 break;
994 default:
995 page_order = 0;
996 break;
999 /* Do not worry about freeing memory, because if this is
1000 * called, then all agp memory is deallocated and removed
1001 * from the table. */
1003 #ifdef CONFIG_X86
1004 set_memory_wb((unsigned long)bridge->gatt_table, 1 << page_order);
1005 #else
1006 iounmap(bridge->gatt_table);
1007 #endif
1008 table = (char *) bridge->gatt_table_real;
1009 table_end = table + ((PAGE_SIZE * (1 << page_order)) - 1);
1011 for (page = virt_to_page(table); page <= virt_to_page(table_end); page++)
1012 ClearPageReserved(page);
1014 free_gatt_pages(bridge->gatt_table_real, page_order);
1016 agp_gatt_table = NULL;
1017 bridge->gatt_table = NULL;
1018 bridge->gatt_table_real = NULL;
1019 bridge->gatt_bus_addr = 0;
1021 return 0;
1023 EXPORT_SYMBOL(agp_generic_free_gatt_table);
1026 int agp_generic_insert_memory(struct agp_memory * mem, off_t pg_start, int type)
1028 int num_entries;
1029 size_t i;
1030 off_t j;
1031 void *temp;
1032 struct agp_bridge_data *bridge;
1033 int mask_type;
1035 bridge = mem->bridge;
1036 if (!bridge)
1037 return -EINVAL;
1039 if (mem->page_count == 0)
1040 return 0;
1042 temp = bridge->current_size;
1044 switch (bridge->driver->size_type) {
1045 case U8_APER_SIZE:
1046 num_entries = A_SIZE_8(temp)->num_entries;
1047 break;
1048 case U16_APER_SIZE:
1049 num_entries = A_SIZE_16(temp)->num_entries;
1050 break;
1051 case U32_APER_SIZE:
1052 num_entries = A_SIZE_32(temp)->num_entries;
1053 break;
1054 case FIXED_APER_SIZE:
1055 num_entries = A_SIZE_FIX(temp)->num_entries;
1056 break;
1057 case LVL2_APER_SIZE:
1058 /* The generic routines can't deal with 2 level gatt's */
1059 return -EINVAL;
1060 break;
1061 default:
1062 num_entries = 0;
1063 break;
1066 num_entries -= agp_memory_reserved/PAGE_SIZE;
1067 if (num_entries < 0) num_entries = 0;
1069 if (type != mem->type)
1070 return -EINVAL;
1072 mask_type = bridge->driver->agp_type_to_mask_type(bridge, type);
1073 if (mask_type != 0) {
1074 /* The generic routines know nothing of memory types */
1075 return -EINVAL;
1078 /* AK: could wrap */
1079 if ((pg_start + mem->page_count) > num_entries)
1080 return -EINVAL;
1082 j = pg_start;
1084 while (j < (pg_start + mem->page_count)) {
1085 if (!PGE_EMPTY(bridge, readl(bridge->gatt_table+j)))
1086 return -EBUSY;
1087 j++;
1090 if (!mem->is_flushed) {
1091 bridge->driver->cache_flush();
1092 mem->is_flushed = true;
1095 for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
1096 writel(bridge->driver->mask_memory(bridge, mem->memory[i], mask_type),
1097 bridge->gatt_table+j);
1099 readl(bridge->gatt_table+j-1); /* PCI Posting. */
1101 bridge->driver->tlb_flush(mem);
1102 return 0;
1104 EXPORT_SYMBOL(agp_generic_insert_memory);
1107 int agp_generic_remove_memory(struct agp_memory *mem, off_t pg_start, int type)
1109 size_t i;
1110 struct agp_bridge_data *bridge;
1111 int mask_type;
1113 bridge = mem->bridge;
1114 if (!bridge)
1115 return -EINVAL;
1117 if (mem->page_count == 0)
1118 return 0;
1120 if (type != mem->type)
1121 return -EINVAL;
1123 mask_type = bridge->driver->agp_type_to_mask_type(bridge, type);
1124 if (mask_type != 0) {
1125 /* The generic routines know nothing of memory types */
1126 return -EINVAL;
1129 /* AK: bogus, should encode addresses > 4GB */
1130 for (i = pg_start; i < (mem->page_count + pg_start); i++) {
1131 writel(bridge->scratch_page, bridge->gatt_table+i);
1133 readl(bridge->gatt_table+i-1); /* PCI Posting. */
1135 bridge->driver->tlb_flush(mem);
1136 return 0;
1138 EXPORT_SYMBOL(agp_generic_remove_memory);
1140 struct agp_memory *agp_generic_alloc_by_type(size_t page_count, int type)
1142 return NULL;
1144 EXPORT_SYMBOL(agp_generic_alloc_by_type);
1146 void agp_generic_free_by_type(struct agp_memory *curr)
1148 agp_free_page_array(curr);
1149 agp_free_key(curr->key);
1150 kfree(curr);
1152 EXPORT_SYMBOL(agp_generic_free_by_type);
1154 struct agp_memory *agp_generic_alloc_user(size_t page_count, int type)
1156 struct agp_memory *new;
1157 int i;
1158 int pages;
1160 pages = (page_count + ENTRIES_PER_PAGE - 1) / ENTRIES_PER_PAGE;
1161 new = agp_create_user_memory(page_count);
1162 if (new == NULL)
1163 return NULL;
1165 for (i = 0; i < page_count; i++)
1166 new->memory[i] = 0;
1167 new->page_count = 0;
1168 new->type = type;
1169 new->num_scratch_pages = pages;
1171 return new;
1173 EXPORT_SYMBOL(agp_generic_alloc_user);
1176 * Basic Page Allocation Routines -
1177 * These routines handle page allocation and by default they reserve the allocated
1178 * memory. They also handle incrementing the current_memory_agp value, Which is checked
1179 * against a maximum value.
1182 void *agp_generic_alloc_page(struct agp_bridge_data *bridge)
1184 struct page * page;
1186 page = alloc_page(GFP_KERNEL | GFP_DMA32);
1187 if (page == NULL)
1188 return NULL;
1190 /* agp_allocate_memory will do flush */
1191 map_page_into_agp_noflush(page);
1193 get_page(page);
1194 atomic_inc(&agp_bridge->current_memory_agp);
1195 return page_address(page);
1197 EXPORT_SYMBOL(agp_generic_alloc_page);
1200 void agp_generic_destroy_page(void *addr, int flags)
1202 struct page *page;
1204 if (addr == NULL)
1205 return;
1207 page = virt_to_page(addr);
1208 if (flags & AGP_PAGE_DESTROY_UNMAP)
1209 unmap_page_from_agp(page);
1211 if (flags & AGP_PAGE_DESTROY_FREE) {
1212 put_page(page);
1213 free_page((unsigned long)addr);
1214 atomic_dec(&agp_bridge->current_memory_agp);
1217 EXPORT_SYMBOL(agp_generic_destroy_page);
1219 /* End Basic Page Allocation Routines */
1223 * agp_enable - initialise the agp point-to-point connection.
1225 * @mode: agp mode register value to configure with.
1227 void agp_enable(struct agp_bridge_data *bridge, u32 mode)
1229 if (!bridge)
1230 return;
1231 bridge->driver->agp_enable(bridge, mode);
1233 EXPORT_SYMBOL(agp_enable);
1235 /* When we remove the global variable agp_bridge from all drivers
1236 * then agp_alloc_bridge and agp_generic_find_bridge need to be updated
1239 struct agp_bridge_data *agp_generic_find_bridge(struct pci_dev *pdev)
1241 if (list_empty(&agp_bridges))
1242 return NULL;
1244 return agp_bridge;
1247 static void ipi_handler(void *null)
1249 flush_agp_cache();
1252 void global_cache_flush(void)
1254 if (on_each_cpu(ipi_handler, NULL, 1) != 0)
1255 panic(PFX "timed out waiting for the other CPUs!\n");
1257 EXPORT_SYMBOL(global_cache_flush);
1259 unsigned long agp_generic_mask_memory(struct agp_bridge_data *bridge,
1260 unsigned long addr, int type)
1262 /* memory type is ignored in the generic routine */
1263 if (bridge->driver->masks)
1264 return addr | bridge->driver->masks[0].mask;
1265 else
1266 return addr;
1268 EXPORT_SYMBOL(agp_generic_mask_memory);
1270 int agp_generic_type_to_mask_type(struct agp_bridge_data *bridge,
1271 int type)
1273 if (type >= AGP_USER_TYPES)
1274 return 0;
1275 return type;
1277 EXPORT_SYMBOL(agp_generic_type_to_mask_type);
1280 * These functions are implemented according to the AGPv3 spec,
1281 * which covers implementation details that had previously been
1282 * left open.
1285 int agp3_generic_fetch_size(void)
1287 u16 temp_size;
1288 int i;
1289 struct aper_size_info_16 *values;
1291 pci_read_config_word(agp_bridge->dev, agp_bridge->capndx+AGPAPSIZE, &temp_size);
1292 values = A_SIZE_16(agp_bridge->driver->aperture_sizes);
1294 for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
1295 if (temp_size == values[i].size_value) {
1296 agp_bridge->previous_size =
1297 agp_bridge->current_size = (void *) (values + i);
1299 agp_bridge->aperture_size_idx = i;
1300 return values[i].size;
1303 return 0;
1305 EXPORT_SYMBOL(agp3_generic_fetch_size);
1307 void agp3_generic_tlbflush(struct agp_memory *mem)
1309 u32 ctrl;
1310 pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &ctrl);
1311 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl & ~AGPCTRL_GTLBEN);
1312 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl);
1314 EXPORT_SYMBOL(agp3_generic_tlbflush);
1316 int agp3_generic_configure(void)
1318 u32 temp;
1319 struct aper_size_info_16 *current_size;
1321 current_size = A_SIZE_16(agp_bridge->current_size);
1323 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1324 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1326 /* set aperture size */
1327 pci_write_config_word(agp_bridge->dev, agp_bridge->capndx+AGPAPSIZE, current_size->size_value);
1328 /* set gart pointer */
1329 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPGARTLO, agp_bridge->gatt_bus_addr);
1330 /* enable aperture and GTLB */
1331 pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &temp);
1332 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, temp | AGPCTRL_APERENB | AGPCTRL_GTLBEN);
1333 return 0;
1335 EXPORT_SYMBOL(agp3_generic_configure);
1337 void agp3_generic_cleanup(void)
1339 u32 ctrl;
1340 pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &ctrl);
1341 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl & ~AGPCTRL_APERENB);
1343 EXPORT_SYMBOL(agp3_generic_cleanup);
1345 const struct aper_size_info_16 agp3_generic_sizes[AGP_GENERIC_SIZES_ENTRIES] =
1347 {4096, 1048576, 10,0x000},
1348 {2048, 524288, 9, 0x800},
1349 {1024, 262144, 8, 0xc00},
1350 { 512, 131072, 7, 0xe00},
1351 { 256, 65536, 6, 0xf00},
1352 { 128, 32768, 5, 0xf20},
1353 { 64, 16384, 4, 0xf30},
1354 { 32, 8192, 3, 0xf38},
1355 { 16, 4096, 2, 0xf3c},
1356 { 8, 2048, 1, 0xf3e},
1357 { 4, 1024, 0, 0xf3f}
1359 EXPORT_SYMBOL(agp3_generic_sizes);