[WANROUTER]: Kill kmalloc debugging code.
[linux-2.6/mini2440.git] / drivers / mtd / onenand / onenand_base.c
blob8ed68b28afe37651d85500889676f7a48a93e9b0
1 /*
2 * linux/drivers/mtd/onenand/onenand_base.c
4 * Copyright (C) 2005-2006 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/sched.h>
16 #include <linux/jiffies.h>
17 #include <linux/mtd/mtd.h>
18 #include <linux/mtd/onenand.h>
19 #include <linux/mtd/partitions.h>
21 #include <asm/io.h>
23 /**
24 * onenand_oob_64 - oob info for large (2KB) page
26 static struct nand_ecclayout onenand_oob_64 = {
27 .eccbytes = 20,
28 .eccpos = {
29 8, 9, 10, 11, 12,
30 24, 25, 26, 27, 28,
31 40, 41, 42, 43, 44,
32 56, 57, 58, 59, 60,
34 .oobfree = {
35 {2, 3}, {14, 2}, {18, 3}, {30, 2},
36 {34, 3}, {46, 2}, {50, 3}, {62, 2}
40 /**
41 * onenand_oob_32 - oob info for middle (1KB) page
43 static struct nand_ecclayout onenand_oob_32 = {
44 .eccbytes = 10,
45 .eccpos = {
46 8, 9, 10, 11, 12,
47 24, 25, 26, 27, 28,
49 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
52 static const unsigned char ffchars[] = {
53 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
54 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
55 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
56 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
57 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
58 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
59 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
60 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
63 /**
64 * onenand_readw - [OneNAND Interface] Read OneNAND register
65 * @param addr address to read
67 * Read OneNAND register
69 static unsigned short onenand_readw(void __iomem *addr)
71 return readw(addr);
74 /**
75 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
76 * @param value value to write
77 * @param addr address to write
79 * Write OneNAND register with value
81 static void onenand_writew(unsigned short value, void __iomem *addr)
83 writew(value, addr);
86 /**
87 * onenand_block_address - [DEFAULT] Get block address
88 * @param this onenand chip data structure
89 * @param block the block
90 * @return translated block address if DDP, otherwise same
92 * Setup Start Address 1 Register (F100h)
94 static int onenand_block_address(struct onenand_chip *this, int block)
96 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
97 /* Device Flash Core select, NAND Flash Block Address */
98 int dfs = 0;
100 if (block & this->density_mask)
101 dfs = 1;
103 return (dfs << ONENAND_DDP_SHIFT) |
104 (block & (this->density_mask - 1));
107 return block;
111 * onenand_bufferram_address - [DEFAULT] Get bufferram address
112 * @param this onenand chip data structure
113 * @param block the block
114 * @return set DBS value if DDP, otherwise 0
116 * Setup Start Address 2 Register (F101h) for DDP
118 static int onenand_bufferram_address(struct onenand_chip *this, int block)
120 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
121 /* Device BufferRAM Select */
122 int dbs = 0;
124 if (block & this->density_mask)
125 dbs = 1;
127 return (dbs << ONENAND_DDP_SHIFT);
130 return 0;
134 * onenand_page_address - [DEFAULT] Get page address
135 * @param page the page address
136 * @param sector the sector address
137 * @return combined page and sector address
139 * Setup Start Address 8 Register (F107h)
141 static int onenand_page_address(int page, int sector)
143 /* Flash Page Address, Flash Sector Address */
144 int fpa, fsa;
146 fpa = page & ONENAND_FPA_MASK;
147 fsa = sector & ONENAND_FSA_MASK;
149 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
153 * onenand_buffer_address - [DEFAULT] Get buffer address
154 * @param dataram1 DataRAM index
155 * @param sectors the sector address
156 * @param count the number of sectors
157 * @return the start buffer value
159 * Setup Start Buffer Register (F200h)
161 static int onenand_buffer_address(int dataram1, int sectors, int count)
163 int bsa, bsc;
165 /* BufferRAM Sector Address */
166 bsa = sectors & ONENAND_BSA_MASK;
168 if (dataram1)
169 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
170 else
171 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
173 /* BufferRAM Sector Count */
174 bsc = count & ONENAND_BSC_MASK;
176 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
180 * onenand_command - [DEFAULT] Send command to OneNAND device
181 * @param mtd MTD device structure
182 * @param cmd the command to be sent
183 * @param addr offset to read from or write to
184 * @param len number of bytes to read or write
186 * Send command to OneNAND device. This function is used for middle/large page
187 * devices (1KB/2KB Bytes per page)
189 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
191 struct onenand_chip *this = mtd->priv;
192 int value, readcmd = 0, block_cmd = 0;
193 int block, page;
194 /* Now we use page size operation */
195 int sectors = 4, count = 4;
197 /* Address translation */
198 switch (cmd) {
199 case ONENAND_CMD_UNLOCK:
200 case ONENAND_CMD_LOCK:
201 case ONENAND_CMD_LOCK_TIGHT:
202 case ONENAND_CMD_UNLOCK_ALL:
203 block = -1;
204 page = -1;
205 break;
207 case ONENAND_CMD_ERASE:
208 case ONENAND_CMD_BUFFERRAM:
209 case ONENAND_CMD_OTP_ACCESS:
210 block_cmd = 1;
211 block = (int) (addr >> this->erase_shift);
212 page = -1;
213 break;
215 default:
216 block = (int) (addr >> this->erase_shift);
217 page = (int) (addr >> this->page_shift);
218 page &= this->page_mask;
219 break;
222 /* NOTE: The setting order of the registers is very important! */
223 if (cmd == ONENAND_CMD_BUFFERRAM) {
224 /* Select DataRAM for DDP */
225 value = onenand_bufferram_address(this, block);
226 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
228 /* Switch to the next data buffer */
229 ONENAND_SET_NEXT_BUFFERRAM(this);
231 return 0;
234 if (block != -1) {
235 /* Write 'DFS, FBA' of Flash */
236 value = onenand_block_address(this, block);
237 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
239 if (block_cmd) {
240 /* Select DataRAM for DDP */
241 value = onenand_bufferram_address(this, block);
242 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
246 if (page != -1) {
247 int dataram;
249 switch (cmd) {
250 case ONENAND_CMD_READ:
251 case ONENAND_CMD_READOOB:
252 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
253 readcmd = 1;
254 break;
256 default:
257 dataram = ONENAND_CURRENT_BUFFERRAM(this);
258 break;
261 /* Write 'FPA, FSA' of Flash */
262 value = onenand_page_address(page, sectors);
263 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
265 /* Write 'BSA, BSC' of DataRAM */
266 value = onenand_buffer_address(dataram, sectors, count);
267 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
269 if (readcmd) {
270 /* Select DataRAM for DDP */
271 value = onenand_bufferram_address(this, block);
272 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
276 /* Interrupt clear */
277 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
279 /* Write command */
280 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
282 return 0;
286 * onenand_wait - [DEFAULT] wait until the command is done
287 * @param mtd MTD device structure
288 * @param state state to select the max. timeout value
290 * Wait for command done. This applies to all OneNAND command
291 * Read can take up to 30us, erase up to 2ms and program up to 350us
292 * according to general OneNAND specs
294 static int onenand_wait(struct mtd_info *mtd, int state)
296 struct onenand_chip * this = mtd->priv;
297 unsigned long timeout;
298 unsigned int flags = ONENAND_INT_MASTER;
299 unsigned int interrupt = 0;
300 unsigned int ctrl, ecc;
302 /* The 20 msec is enough */
303 timeout = jiffies + msecs_to_jiffies(20);
304 while (time_before(jiffies, timeout)) {
305 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
307 if (interrupt & flags)
308 break;
310 if (state != FL_READING)
311 cond_resched();
312 touch_softlockup_watchdog();
314 /* To get correct interrupt status in timeout case */
315 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
317 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
319 if (ctrl & ONENAND_CTRL_ERROR) {
320 /* It maybe occur at initial bad block */
321 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
322 /* Clear other interrupt bits for preventing ECC error */
323 interrupt &= ONENAND_INT_MASTER;
326 if (ctrl & ONENAND_CTRL_LOCK) {
327 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error = 0x%04x\n", ctrl);
328 return -EACCES;
331 if (interrupt & ONENAND_INT_READ) {
332 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
333 if (ecc & ONENAND_ECC_2BIT_ALL) {
334 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
335 return -EBADMSG;
339 return 0;
343 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
344 * @param mtd MTD data structure
345 * @param area BufferRAM area
346 * @return offset given area
348 * Return BufferRAM offset given area
350 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
352 struct onenand_chip *this = mtd->priv;
354 if (ONENAND_CURRENT_BUFFERRAM(this)) {
355 if (area == ONENAND_DATARAM)
356 return mtd->writesize;
357 if (area == ONENAND_SPARERAM)
358 return mtd->oobsize;
361 return 0;
365 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
366 * @param mtd MTD data structure
367 * @param area BufferRAM area
368 * @param buffer the databuffer to put/get data
369 * @param offset offset to read from or write to
370 * @param count number of bytes to read/write
372 * Read the BufferRAM area
374 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
375 unsigned char *buffer, int offset, size_t count)
377 struct onenand_chip *this = mtd->priv;
378 void __iomem *bufferram;
380 bufferram = this->base + area;
382 bufferram += onenand_bufferram_offset(mtd, area);
384 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
385 unsigned short word;
387 /* Align with word(16-bit) size */
388 count--;
390 /* Read word and save byte */
391 word = this->read_word(bufferram + offset + count);
392 buffer[count] = (word & 0xff);
395 memcpy(buffer, bufferram + offset, count);
397 return 0;
401 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
402 * @param mtd MTD data structure
403 * @param area BufferRAM area
404 * @param buffer the databuffer to put/get data
405 * @param offset offset to read from or write to
406 * @param count number of bytes to read/write
408 * Read the BufferRAM area with Sync. Burst Mode
410 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
411 unsigned char *buffer, int offset, size_t count)
413 struct onenand_chip *this = mtd->priv;
414 void __iomem *bufferram;
416 bufferram = this->base + area;
418 bufferram += onenand_bufferram_offset(mtd, area);
420 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
422 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
423 unsigned short word;
425 /* Align with word(16-bit) size */
426 count--;
428 /* Read word and save byte */
429 word = this->read_word(bufferram + offset + count);
430 buffer[count] = (word & 0xff);
433 memcpy(buffer, bufferram + offset, count);
435 this->mmcontrol(mtd, 0);
437 return 0;
441 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
442 * @param mtd MTD data structure
443 * @param area BufferRAM area
444 * @param buffer the databuffer to put/get data
445 * @param offset offset to read from or write to
446 * @param count number of bytes to read/write
448 * Write the BufferRAM area
450 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
451 const unsigned char *buffer, int offset, size_t count)
453 struct onenand_chip *this = mtd->priv;
454 void __iomem *bufferram;
456 bufferram = this->base + area;
458 bufferram += onenand_bufferram_offset(mtd, area);
460 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
461 unsigned short word;
462 int byte_offset;
464 /* Align with word(16-bit) size */
465 count--;
467 /* Calculate byte access offset */
468 byte_offset = offset + count;
470 /* Read word and save byte */
471 word = this->read_word(bufferram + byte_offset);
472 word = (word & ~0xff) | buffer[count];
473 this->write_word(word, bufferram + byte_offset);
476 memcpy(bufferram + offset, buffer, count);
478 return 0;
482 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
483 * @param mtd MTD data structure
484 * @param addr address to check
485 * @return 1 if there are valid data, otherwise 0
487 * Check bufferram if there is data we required
489 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
491 struct onenand_chip *this = mtd->priv;
492 int block, page;
493 int i;
495 block = (int) (addr >> this->erase_shift);
496 page = (int) (addr >> this->page_shift);
497 page &= this->page_mask;
499 i = ONENAND_CURRENT_BUFFERRAM(this);
501 /* Is there valid data? */
502 if (this->bufferram[i].block == block &&
503 this->bufferram[i].page == page &&
504 this->bufferram[i].valid)
505 return 1;
507 return 0;
511 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
512 * @param mtd MTD data structure
513 * @param addr address to update
514 * @param valid valid flag
516 * Update BufferRAM information
518 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
519 int valid)
521 struct onenand_chip *this = mtd->priv;
522 int block, page;
523 int i;
525 block = (int) (addr >> this->erase_shift);
526 page = (int) (addr >> this->page_shift);
527 page &= this->page_mask;
529 /* Invalidate BufferRAM */
530 for (i = 0; i < MAX_BUFFERRAM; i++) {
531 if (this->bufferram[i].block == block &&
532 this->bufferram[i].page == page)
533 this->bufferram[i].valid = 0;
536 /* Update BufferRAM */
537 i = ONENAND_CURRENT_BUFFERRAM(this);
538 this->bufferram[i].block = block;
539 this->bufferram[i].page = page;
540 this->bufferram[i].valid = valid;
542 return 0;
546 * onenand_get_device - [GENERIC] Get chip for selected access
547 * @param mtd MTD device structure
548 * @param new_state the state which is requested
550 * Get the device and lock it for exclusive access
552 static int onenand_get_device(struct mtd_info *mtd, int new_state)
554 struct onenand_chip *this = mtd->priv;
555 DECLARE_WAITQUEUE(wait, current);
558 * Grab the lock and see if the device is available
560 while (1) {
561 spin_lock(&this->chip_lock);
562 if (this->state == FL_READY) {
563 this->state = new_state;
564 spin_unlock(&this->chip_lock);
565 break;
567 if (new_state == FL_PM_SUSPENDED) {
568 spin_unlock(&this->chip_lock);
569 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
571 set_current_state(TASK_UNINTERRUPTIBLE);
572 add_wait_queue(&this->wq, &wait);
573 spin_unlock(&this->chip_lock);
574 schedule();
575 remove_wait_queue(&this->wq, &wait);
578 return 0;
582 * onenand_release_device - [GENERIC] release chip
583 * @param mtd MTD device structure
585 * Deselect, release chip lock and wake up anyone waiting on the device
587 static void onenand_release_device(struct mtd_info *mtd)
589 struct onenand_chip *this = mtd->priv;
591 /* Release the chip */
592 spin_lock(&this->chip_lock);
593 this->state = FL_READY;
594 wake_up(&this->wq);
595 spin_unlock(&this->chip_lock);
599 * onenand_read - [MTD Interface] Read data from flash
600 * @param mtd MTD device structure
601 * @param from offset to read from
602 * @param len number of bytes to read
603 * @param retlen pointer to variable to store the number of read bytes
604 * @param buf the databuffer to put data
606 * Read with ecc
608 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
609 size_t *retlen, u_char *buf)
611 struct onenand_chip *this = mtd->priv;
612 int read = 0, column;
613 int thislen;
614 int ret = 0;
616 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
618 /* Do not allow reads past end of device */
619 if ((from + len) > mtd->size) {
620 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: Attempt read beyond end of device\n");
621 *retlen = 0;
622 return -EINVAL;
625 /* Grab the lock and see if the device is available */
626 onenand_get_device(mtd, FL_READING);
628 /* TODO handling oob */
630 while (read < len) {
631 thislen = min_t(int, mtd->writesize, len - read);
633 column = from & (mtd->writesize - 1);
634 if (column + thislen > mtd->writesize)
635 thislen = mtd->writesize - column;
637 if (!onenand_check_bufferram(mtd, from)) {
638 this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
640 ret = this->wait(mtd, FL_READING);
641 /* First copy data and check return value for ECC handling */
642 onenand_update_bufferram(mtd, from, 1);
645 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
647 read += thislen;
649 if (read == len)
650 break;
652 if (ret) {
653 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: read failed = %d\n", ret);
654 goto out;
657 from += thislen;
658 buf += thislen;
661 out:
662 /* Deselect and wake up anyone waiting on the device */
663 onenand_release_device(mtd);
666 * Return success, if no ECC failures, else -EBADMSG
667 * fs driver will take care of that, because
668 * retlen == desired len and result == -EBADMSG
670 *retlen = read;
671 return ret;
675 * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
676 * @param mtd MTD device structure
677 * @param from offset to read from
678 * @param len number of bytes to read
679 * @param retlen pointer to variable to store the number of read bytes
680 * @param buf the databuffer to put data
682 * OneNAND read out-of-band data from the spare area
684 int onenand_do_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
685 size_t *retlen, u_char *buf)
687 struct onenand_chip *this = mtd->priv;
688 int read = 0, thislen, column;
689 int ret = 0;
691 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
693 /* Initialize return length value */
694 *retlen = 0;
696 /* Do not allow reads past end of device */
697 if (unlikely((from + len) > mtd->size)) {
698 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempt read beyond end of device\n");
699 return -EINVAL;
702 /* Grab the lock and see if the device is available */
703 onenand_get_device(mtd, FL_READING);
705 column = from & (mtd->oobsize - 1);
707 while (read < len) {
708 thislen = mtd->oobsize - column;
709 thislen = min_t(int, thislen, len);
711 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
713 onenand_update_bufferram(mtd, from, 0);
715 ret = this->wait(mtd, FL_READING);
716 /* First copy data and check return value for ECC handling */
718 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
720 read += thislen;
722 if (read == len)
723 break;
725 if (ret) {
726 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = %d\n", ret);
727 goto out;
730 buf += thislen;
732 /* Read more? */
733 if (read < len) {
734 /* Page size */
735 from += mtd->writesize;
736 column = 0;
740 out:
741 /* Deselect and wake up anyone waiting on the device */
742 onenand_release_device(mtd);
744 *retlen = read;
745 return ret;
749 * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
750 * @mtd: MTD device structure
751 * @from: offset to read from
752 * @ops: oob operation description structure
754 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
755 struct mtd_oob_ops *ops)
757 BUG_ON(ops->mode != MTD_OOB_PLACE);
759 return onenand_do_read_oob(mtd, from + ops->ooboffs, ops->len,
760 &ops->retlen, ops->oobbuf);
763 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
765 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
766 * @param mtd MTD device structure
767 * @param buf the databuffer to verify
768 * @param to offset to read from
769 * @param len number of bytes to read and compare
772 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to, int len)
774 struct onenand_chip *this = mtd->priv;
775 char *readp = this->page_buf;
776 int column = to & (mtd->oobsize - 1);
777 int status, i;
779 this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
780 onenand_update_bufferram(mtd, to, 0);
781 status = this->wait(mtd, FL_READING);
782 if (status)
783 return status;
785 this->read_bufferram(mtd, ONENAND_SPARERAM, readp, column, len);
787 for(i = 0; i < len; i++)
788 if (buf[i] != 0xFF && buf[i] != readp[i])
789 return -EBADMSG;
791 return 0;
795 * onenand_verify_page - [GENERIC] verify the chip contents after a write
796 * @param mtd MTD device structure
797 * @param buf the databuffer to verify
799 * Check DataRAM area directly
801 static int onenand_verify_page(struct mtd_info *mtd, u_char *buf, loff_t addr)
803 struct onenand_chip *this = mtd->priv;
804 void __iomem *dataram0, *dataram1;
805 int ret = 0;
807 this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
809 ret = this->wait(mtd, FL_READING);
810 if (ret)
811 return ret;
813 onenand_update_bufferram(mtd, addr, 1);
815 /* Check, if the two dataram areas are same */
816 dataram0 = this->base + ONENAND_DATARAM;
817 dataram1 = dataram0 + mtd->writesize;
819 if (memcmp(dataram0, dataram1, mtd->writesize))
820 return -EBADMSG;
822 return 0;
824 #else
825 #define onenand_verify_page(...) (0)
826 #define onenand_verify_oob(...) (0)
827 #endif
829 #define NOTALIGNED(x) ((x & (mtd->writesize - 1)) != 0)
832 * onenand_write - [MTD Interface] write buffer to FLASH
833 * @param mtd MTD device structure
834 * @param to offset to write to
835 * @param len number of bytes to write
836 * @param retlen pointer to variable to store the number of written bytes
837 * @param buf the data to write
839 * Write with ECC
841 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
842 size_t *retlen, const u_char *buf)
844 struct onenand_chip *this = mtd->priv;
845 int written = 0;
846 int ret = 0;
848 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
850 /* Initialize retlen, in case of early exit */
851 *retlen = 0;
853 /* Do not allow writes past end of device */
854 if (unlikely((to + len) > mtd->size)) {
855 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt write to past end of device\n");
856 return -EINVAL;
859 /* Reject writes, which are not page aligned */
860 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
861 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt to write not page aligned data\n");
862 return -EINVAL;
865 /* Grab the lock and see if the device is available */
866 onenand_get_device(mtd, FL_WRITING);
868 /* Loop until all data write */
869 while (written < len) {
870 int thislen = min_t(int, mtd->writesize, len - written);
872 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->writesize);
874 this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen);
875 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
877 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
879 onenand_update_bufferram(mtd, to, 1);
881 ret = this->wait(mtd, FL_WRITING);
882 if (ret) {
883 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: write filaed %d\n", ret);
884 goto out;
887 written += thislen;
889 /* Only check verify write turn on */
890 ret = onenand_verify_page(mtd, (u_char *) buf, to);
891 if (ret) {
892 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: verify failed %d\n", ret);
893 goto out;
896 if (written == len)
897 break;
899 to += thislen;
900 buf += thislen;
903 out:
904 /* Deselect and wake up anyone waiting on the device */
905 onenand_release_device(mtd);
907 *retlen = written;
909 return ret;
913 * onenand_do_write_oob - [Internal] OneNAND write out-of-band
914 * @param mtd MTD device structure
915 * @param to offset to write to
916 * @param len number of bytes to write
917 * @param retlen pointer to variable to store the number of written bytes
918 * @param buf the data to write
920 * OneNAND write out-of-band
922 static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
923 size_t *retlen, const u_char *buf)
925 struct onenand_chip *this = mtd->priv;
926 int column, ret = 0;
927 int written = 0;
929 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
931 /* Initialize retlen, in case of early exit */
932 *retlen = 0;
934 /* Do not allow writes past end of device */
935 if (unlikely((to + len) > mtd->size)) {
936 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempt write to past end of device\n");
937 return -EINVAL;
940 /* Grab the lock and see if the device is available */
941 onenand_get_device(mtd, FL_WRITING);
943 /* Loop until all data write */
944 while (written < len) {
945 int thislen = min_t(int, mtd->oobsize, len - written);
947 column = to & (mtd->oobsize - 1);
949 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
951 /* We send data to spare ram with oobsize
952 * to prevent byte access */
953 memset(this->page_buf, 0xff, mtd->oobsize);
954 memcpy(this->page_buf + column, buf, thislen);
955 this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize);
957 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
959 onenand_update_bufferram(mtd, to, 0);
961 ret = this->wait(mtd, FL_WRITING);
962 if (ret) {
963 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: write filaed %d\n", ret);
964 goto out;
967 ret = onenand_verify_oob(mtd, buf, to, thislen);
968 if (ret) {
969 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: verify failed %d\n", ret);
970 goto out;
973 written += thislen;
975 if (written == len)
976 break;
978 to += thislen;
979 buf += thislen;
982 out:
983 /* Deselect and wake up anyone waiting on the device */
984 onenand_release_device(mtd);
986 *retlen = written;
988 return ret;
992 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
993 * @mtd: MTD device structure
994 * @from: offset to read from
995 * @ops: oob operation description structure
997 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
998 struct mtd_oob_ops *ops)
1000 BUG_ON(ops->mode != MTD_OOB_PLACE);
1002 return onenand_do_write_oob(mtd, to + ops->ooboffs, ops->len,
1003 &ops->retlen, ops->oobbuf);
1007 * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1008 * @param mtd MTD device structure
1009 * @param ofs offset from device start
1010 * @param getchip 0, if the chip is already selected
1011 * @param allowbbt 1, if its allowed to access the bbt area
1013 * Check, if the block is bad. Either by reading the bad block table or
1014 * calling of the scan function.
1016 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1018 struct onenand_chip *this = mtd->priv;
1019 struct bbm_info *bbm = this->bbm;
1021 /* Return info from the table */
1022 return bbm->isbad_bbt(mtd, ofs, allowbbt);
1026 * onenand_erase - [MTD Interface] erase block(s)
1027 * @param mtd MTD device structure
1028 * @param instr erase instruction
1030 * Erase one ore more blocks
1032 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1034 struct onenand_chip *this = mtd->priv;
1035 unsigned int block_size;
1036 loff_t addr;
1037 int len;
1038 int ret = 0;
1040 DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1042 block_size = (1 << this->erase_shift);
1044 /* Start address must align on block boundary */
1045 if (unlikely(instr->addr & (block_size - 1))) {
1046 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
1047 return -EINVAL;
1050 /* Length must align on block boundary */
1051 if (unlikely(instr->len & (block_size - 1))) {
1052 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
1053 return -EINVAL;
1056 /* Do not allow erase past end of device */
1057 if (unlikely((instr->len + instr->addr) > mtd->size)) {
1058 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
1059 return -EINVAL;
1062 instr->fail_addr = 0xffffffff;
1064 /* Grab the lock and see if the device is available */
1065 onenand_get_device(mtd, FL_ERASING);
1067 /* Loop throught the pages */
1068 len = instr->len;
1069 addr = instr->addr;
1071 instr->state = MTD_ERASING;
1073 while (len) {
1075 /* Check if we have a bad block, we do not erase bad blocks */
1076 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1077 printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1078 instr->state = MTD_ERASE_FAILED;
1079 goto erase_exit;
1082 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1084 ret = this->wait(mtd, FL_ERASING);
1085 /* Check, if it is write protected */
1086 if (ret) {
1087 if (ret == -EPERM)
1088 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Device is write protected!!!\n");
1089 else
1090 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1091 instr->state = MTD_ERASE_FAILED;
1092 instr->fail_addr = addr;
1093 goto erase_exit;
1096 len -= block_size;
1097 addr += block_size;
1100 instr->state = MTD_ERASE_DONE;
1102 erase_exit:
1104 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1105 /* Do call back function */
1106 if (!ret)
1107 mtd_erase_callback(instr);
1109 /* Deselect and wake up anyone waiting on the device */
1110 onenand_release_device(mtd);
1112 return ret;
1116 * onenand_sync - [MTD Interface] sync
1117 * @param mtd MTD device structure
1119 * Sync is actually a wait for chip ready function
1121 static void onenand_sync(struct mtd_info *mtd)
1123 DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1125 /* Grab the lock and see if the device is available */
1126 onenand_get_device(mtd, FL_SYNCING);
1128 /* Release it and go back */
1129 onenand_release_device(mtd);
1134 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1135 * @param mtd MTD device structure
1136 * @param ofs offset relative to mtd start
1138 * Check whether the block is bad
1140 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1142 /* Check for invalid offset */
1143 if (ofs > mtd->size)
1144 return -EINVAL;
1146 return onenand_block_checkbad(mtd, ofs, 1, 0);
1150 * onenand_default_block_markbad - [DEFAULT] mark a block bad
1151 * @param mtd MTD device structure
1152 * @param ofs offset from device start
1154 * This is the default implementation, which can be overridden by
1155 * a hardware specific driver.
1157 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1159 struct onenand_chip *this = mtd->priv;
1160 struct bbm_info *bbm = this->bbm;
1161 u_char buf[2] = {0, 0};
1162 size_t retlen;
1163 int block;
1165 /* Get block number */
1166 block = ((int) ofs) >> bbm->bbt_erase_shift;
1167 if (bbm->bbt)
1168 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1170 /* We write two bytes, so we dont have to mess with 16 bit access */
1171 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1172 return onenand_do_write_oob(mtd, ofs , 2, &retlen, buf);
1176 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1177 * @param mtd MTD device structure
1178 * @param ofs offset relative to mtd start
1180 * Mark the block as bad
1182 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1184 struct onenand_chip *this = mtd->priv;
1185 int ret;
1187 ret = onenand_block_isbad(mtd, ofs);
1188 if (ret) {
1189 /* If it was bad already, return success and do nothing */
1190 if (ret > 0)
1191 return 0;
1192 return ret;
1195 return this->block_markbad(mtd, ofs);
1199 * onenand_unlock - [MTD Interface] Unlock block(s)
1200 * @param mtd MTD device structure
1201 * @param ofs offset relative to mtd start
1202 * @param len number of bytes to unlock
1204 * Unlock one or more blocks
1206 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1208 struct onenand_chip *this = mtd->priv;
1209 int start, end, block, value, status;
1211 start = ofs >> this->erase_shift;
1212 end = len >> this->erase_shift;
1214 /* Continuous lock scheme */
1215 if (this->options & ONENAND_HAS_CONT_LOCK) {
1216 /* Set start block address */
1217 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1218 /* Set end block address */
1219 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1220 /* Write unlock command */
1221 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1223 /* There's no return value */
1224 this->wait(mtd, FL_UNLOCKING);
1226 /* Sanity check */
1227 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1228 & ONENAND_CTRL_ONGO)
1229 continue;
1231 /* Check lock status */
1232 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1233 if (!(status & ONENAND_WP_US))
1234 printk(KERN_ERR "wp status = 0x%x\n", status);
1236 return 0;
1239 /* Block lock scheme */
1240 for (block = start; block < start + end; block++) {
1241 /* Set block address */
1242 value = onenand_block_address(this, block);
1243 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1244 /* Select DataRAM for DDP */
1245 value = onenand_bufferram_address(this, block);
1246 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1247 /* Set start block address */
1248 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1249 /* Write unlock command */
1250 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1252 /* There's no return value */
1253 this->wait(mtd, FL_UNLOCKING);
1255 /* Sanity check */
1256 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1257 & ONENAND_CTRL_ONGO)
1258 continue;
1260 /* Check lock status */
1261 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1262 if (!(status & ONENAND_WP_US))
1263 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1266 return 0;
1270 * onenand_check_lock_status - [OneNAND Interface] Check lock status
1271 * @param this onenand chip data structure
1273 * Check lock status
1275 static void onenand_check_lock_status(struct onenand_chip *this)
1277 unsigned int value, block, status;
1278 unsigned int end;
1280 end = this->chipsize >> this->erase_shift;
1281 for (block = 0; block < end; block++) {
1282 /* Set block address */
1283 value = onenand_block_address(this, block);
1284 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1285 /* Select DataRAM for DDP */
1286 value = onenand_bufferram_address(this, block);
1287 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1288 /* Set start block address */
1289 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1291 /* Check lock status */
1292 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1293 if (!(status & ONENAND_WP_US))
1294 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1299 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1300 * @param mtd MTD device structure
1302 * Unlock all blocks
1304 static int onenand_unlock_all(struct mtd_info *mtd)
1306 struct onenand_chip *this = mtd->priv;
1308 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1309 /* Write unlock command */
1310 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1312 /* There's no return value */
1313 this->wait(mtd, FL_UNLOCKING);
1315 /* Sanity check */
1316 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1317 & ONENAND_CTRL_ONGO)
1318 continue;
1320 /* Workaround for all block unlock in DDP */
1321 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
1322 loff_t ofs;
1323 size_t len;
1325 /* 1st block on another chip */
1326 ofs = this->chipsize >> 1;
1327 len = 1 << this->erase_shift;
1329 onenand_unlock(mtd, ofs, len);
1332 onenand_check_lock_status(this);
1334 return 0;
1337 mtd->unlock(mtd, 0x0, this->chipsize);
1339 return 0;
1342 #ifdef CONFIG_MTD_ONENAND_OTP
1344 /* Interal OTP operation */
1345 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1346 size_t *retlen, u_char *buf);
1349 * do_otp_read - [DEFAULT] Read OTP block area
1350 * @param mtd MTD device structure
1351 * @param from The offset to read
1352 * @param len number of bytes to read
1353 * @param retlen pointer to variable to store the number of readbytes
1354 * @param buf the databuffer to put/get data
1356 * Read OTP block area.
1358 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1359 size_t *retlen, u_char *buf)
1361 struct onenand_chip *this = mtd->priv;
1362 int ret;
1364 /* Enter OTP access mode */
1365 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1366 this->wait(mtd, FL_OTPING);
1368 ret = mtd->read(mtd, from, len, retlen, buf);
1370 /* Exit OTP access mode */
1371 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1372 this->wait(mtd, FL_RESETING);
1374 return ret;
1378 * do_otp_write - [DEFAULT] Write OTP block area
1379 * @param mtd MTD device structure
1380 * @param from The offset to write
1381 * @param len number of bytes to write
1382 * @param retlen pointer to variable to store the number of write bytes
1383 * @param buf the databuffer to put/get data
1385 * Write OTP block area.
1387 static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1388 size_t *retlen, u_char *buf)
1390 struct onenand_chip *this = mtd->priv;
1391 unsigned char *pbuf = buf;
1392 int ret;
1394 /* Force buffer page aligned */
1395 if (len < mtd->writesize) {
1396 memcpy(this->page_buf, buf, len);
1397 memset(this->page_buf + len, 0xff, mtd->writesize - len);
1398 pbuf = this->page_buf;
1399 len = mtd->writesize;
1402 /* Enter OTP access mode */
1403 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1404 this->wait(mtd, FL_OTPING);
1406 ret = mtd->write(mtd, from, len, retlen, pbuf);
1408 /* Exit OTP access mode */
1409 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1410 this->wait(mtd, FL_RESETING);
1412 return ret;
1416 * do_otp_lock - [DEFAULT] Lock OTP block area
1417 * @param mtd MTD device structure
1418 * @param from The offset to lock
1419 * @param len number of bytes to lock
1420 * @param retlen pointer to variable to store the number of lock bytes
1421 * @param buf the databuffer to put/get data
1423 * Lock OTP block area.
1425 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1426 size_t *retlen, u_char *buf)
1428 struct onenand_chip *this = mtd->priv;
1429 int ret;
1431 /* Enter OTP access mode */
1432 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1433 this->wait(mtd, FL_OTPING);
1435 ret = onenand_do_write_oob(mtd, from, len, retlen, buf);
1437 /* Exit OTP access mode */
1438 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1439 this->wait(mtd, FL_RESETING);
1441 return ret;
1445 * onenand_otp_walk - [DEFAULT] Handle OTP operation
1446 * @param mtd MTD device structure
1447 * @param from The offset to read/write
1448 * @param len number of bytes to read/write
1449 * @param retlen pointer to variable to store the number of read bytes
1450 * @param buf the databuffer to put/get data
1451 * @param action do given action
1452 * @param mode specify user and factory
1454 * Handle OTP operation.
1456 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1457 size_t *retlen, u_char *buf,
1458 otp_op_t action, int mode)
1460 struct onenand_chip *this = mtd->priv;
1461 int otp_pages;
1462 int density;
1463 int ret = 0;
1465 *retlen = 0;
1467 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1468 if (density < ONENAND_DEVICE_DENSITY_512Mb)
1469 otp_pages = 20;
1470 else
1471 otp_pages = 10;
1473 if (mode == MTD_OTP_FACTORY) {
1474 from += mtd->writesize * otp_pages;
1475 otp_pages = 64 - otp_pages;
1478 /* Check User/Factory boundary */
1479 if (((mtd->writesize * otp_pages) - (from + len)) < 0)
1480 return 0;
1482 while (len > 0 && otp_pages > 0) {
1483 if (!action) { /* OTP Info functions */
1484 struct otp_info *otpinfo;
1486 len -= sizeof(struct otp_info);
1487 if (len <= 0)
1488 return -ENOSPC;
1490 otpinfo = (struct otp_info *) buf;
1491 otpinfo->start = from;
1492 otpinfo->length = mtd->writesize;
1493 otpinfo->locked = 0;
1495 from += mtd->writesize;
1496 buf += sizeof(struct otp_info);
1497 *retlen += sizeof(struct otp_info);
1498 } else {
1499 size_t tmp_retlen;
1500 int size = len;
1502 ret = action(mtd, from, len, &tmp_retlen, buf);
1504 buf += size;
1505 len -= size;
1506 *retlen += size;
1508 if (ret < 0)
1509 return ret;
1511 otp_pages--;
1514 return 0;
1518 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
1519 * @param mtd MTD device structure
1520 * @param buf the databuffer to put/get data
1521 * @param len number of bytes to read
1523 * Read factory OTP info.
1525 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
1526 struct otp_info *buf, size_t len)
1528 size_t retlen;
1529 int ret;
1531 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
1533 return ret ? : retlen;
1537 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
1538 * @param mtd MTD device structure
1539 * @param from The offset to read
1540 * @param len number of bytes to read
1541 * @param retlen pointer to variable to store the number of read bytes
1542 * @param buf the databuffer to put/get data
1544 * Read factory OTP area.
1546 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
1547 size_t len, size_t *retlen, u_char *buf)
1549 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
1553 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
1554 * @param mtd MTD device structure
1555 * @param buf the databuffer to put/get data
1556 * @param len number of bytes to read
1558 * Read user OTP info.
1560 static int onenand_get_user_prot_info(struct mtd_info *mtd,
1561 struct otp_info *buf, size_t len)
1563 size_t retlen;
1564 int ret;
1566 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
1568 return ret ? : retlen;
1572 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
1573 * @param mtd MTD device structure
1574 * @param from The offset to read
1575 * @param len number of bytes to read
1576 * @param retlen pointer to variable to store the number of read bytes
1577 * @param buf the databuffer to put/get data
1579 * Read user OTP area.
1581 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
1582 size_t len, size_t *retlen, u_char *buf)
1584 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
1588 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
1589 * @param mtd MTD device structure
1590 * @param from The offset to write
1591 * @param len number of bytes to write
1592 * @param retlen pointer to variable to store the number of write bytes
1593 * @param buf the databuffer to put/get data
1595 * Write user OTP area.
1597 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
1598 size_t len, size_t *retlen, u_char *buf)
1600 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
1604 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
1605 * @param mtd MTD device structure
1606 * @param from The offset to lock
1607 * @param len number of bytes to unlock
1609 * Write lock mark on spare area in page 0 in OTP block
1611 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
1612 size_t len)
1614 unsigned char oob_buf[64];
1615 size_t retlen;
1616 int ret;
1618 memset(oob_buf, 0xff, mtd->oobsize);
1620 * Note: OTP lock operation
1621 * OTP block : 0xXXFC
1622 * 1st block : 0xXXF3 (If chip support)
1623 * Both : 0xXXF0 (If chip support)
1625 oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
1628 * Write lock mark to 8th word of sector0 of page0 of the spare0.
1629 * We write 16 bytes spare area instead of 2 bytes.
1631 from = 0;
1632 len = 16;
1634 ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
1636 return ret ? : retlen;
1638 #endif /* CONFIG_MTD_ONENAND_OTP */
1641 * onenand_lock_scheme - Check and set OneNAND lock scheme
1642 * @param mtd MTD data structure
1644 * Check and set OneNAND lock scheme
1646 static void onenand_lock_scheme(struct mtd_info *mtd)
1648 struct onenand_chip *this = mtd->priv;
1649 unsigned int density, process;
1651 /* Lock scheme depends on density and process */
1652 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1653 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
1655 /* Lock scheme */
1656 if (density >= ONENAND_DEVICE_DENSITY_1Gb) {
1657 /* A-Die has all block unlock */
1658 if (process) {
1659 printk(KERN_DEBUG "Chip support all block unlock\n");
1660 this->options |= ONENAND_HAS_UNLOCK_ALL;
1662 } else {
1663 /* Some OneNAND has continues lock scheme */
1664 if (!process) {
1665 printk(KERN_DEBUG "Lock scheme is Continues Lock\n");
1666 this->options |= ONENAND_HAS_CONT_LOCK;
1672 * onenand_print_device_info - Print device ID
1673 * @param device device ID
1675 * Print device ID
1677 static void onenand_print_device_info(int device, int version)
1679 int vcc, demuxed, ddp, density;
1681 vcc = device & ONENAND_DEVICE_VCC_MASK;
1682 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1683 ddp = device & ONENAND_DEVICE_IS_DDP;
1684 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1685 printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
1686 demuxed ? "" : "Muxed ",
1687 ddp ? "(DDP)" : "",
1688 (16 << density),
1689 vcc ? "2.65/3.3" : "1.8",
1690 device);
1691 printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
1694 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1695 {ONENAND_MFR_SAMSUNG, "Samsung"},
1699 * onenand_check_maf - Check manufacturer ID
1700 * @param manuf manufacturer ID
1702 * Check manufacturer ID
1704 static int onenand_check_maf(int manuf)
1706 int size = ARRAY_SIZE(onenand_manuf_ids);
1707 char *name;
1708 int i;
1710 for (i = 0; i < size; i++)
1711 if (manuf == onenand_manuf_ids[i].id)
1712 break;
1714 if (i < size)
1715 name = onenand_manuf_ids[i].name;
1716 else
1717 name = "Unknown";
1719 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
1721 return (i == size);
1725 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1726 * @param mtd MTD device structure
1728 * OneNAND detection method:
1729 * Compare the the values from command with ones from register
1731 static int onenand_probe(struct mtd_info *mtd)
1733 struct onenand_chip *this = mtd->priv;
1734 int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
1735 int density;
1736 int syscfg;
1738 /* Save system configuration 1 */
1739 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
1740 /* Clear Sync. Burst Read mode to read BootRAM */
1741 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
1743 /* Send the command for reading device ID from BootRAM */
1744 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1746 /* Read manufacturer and device IDs from BootRAM */
1747 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1748 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1750 /* Reset OneNAND to read default register values */
1751 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1752 /* Wait reset */
1753 this->wait(mtd, FL_RESETING);
1755 /* Restore system configuration 1 */
1756 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
1758 /* Check manufacturer ID */
1759 if (onenand_check_maf(bram_maf_id))
1760 return -ENXIO;
1762 /* Read manufacturer and device IDs from Register */
1763 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1764 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1765 ver_id= this->read_word(this->base + ONENAND_REG_VERSION_ID);
1767 /* Check OneNAND device */
1768 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1769 return -ENXIO;
1771 /* Flash device information */
1772 onenand_print_device_info(dev_id, ver_id);
1773 this->device_id = dev_id;
1774 this->version_id = ver_id;
1776 density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1777 this->chipsize = (16 << density) << 20;
1778 /* Set density mask. it is used for DDP */
1779 this->density_mask = (1 << (density + 6));
1781 /* OneNAND page size & block size */
1782 /* The data buffer size is equal to page size */
1783 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1784 mtd->oobsize = mtd->writesize >> 5;
1785 /* Pagers per block is always 64 in OneNAND */
1786 mtd->erasesize = mtd->writesize << 6;
1788 this->erase_shift = ffs(mtd->erasesize) - 1;
1789 this->page_shift = ffs(mtd->writesize) - 1;
1790 this->ppb_shift = (this->erase_shift - this->page_shift);
1791 this->page_mask = (mtd->erasesize / mtd->writesize) - 1;
1793 /* REVIST: Multichip handling */
1795 mtd->size = this->chipsize;
1797 /* Check OneNAND lock scheme */
1798 onenand_lock_scheme(mtd);
1800 return 0;
1804 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
1805 * @param mtd MTD device structure
1807 static int onenand_suspend(struct mtd_info *mtd)
1809 return onenand_get_device(mtd, FL_PM_SUSPENDED);
1813 * onenand_resume - [MTD Interface] Resume the OneNAND flash
1814 * @param mtd MTD device structure
1816 static void onenand_resume(struct mtd_info *mtd)
1818 struct onenand_chip *this = mtd->priv;
1820 if (this->state == FL_PM_SUSPENDED)
1821 onenand_release_device(mtd);
1822 else
1823 printk(KERN_ERR "resume() called for the chip which is not"
1824 "in suspended state\n");
1828 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
1829 * @param mtd MTD device structure
1830 * @param maxchips Number of chips to scan for
1832 * This fills out all the not initialized function pointers
1833 * with the defaults.
1834 * The flash ID is read and the mtd/chip structures are
1835 * filled with the appropriate values.
1837 int onenand_scan(struct mtd_info *mtd, int maxchips)
1839 struct onenand_chip *this = mtd->priv;
1841 if (!this->read_word)
1842 this->read_word = onenand_readw;
1843 if (!this->write_word)
1844 this->write_word = onenand_writew;
1846 if (!this->command)
1847 this->command = onenand_command;
1848 if (!this->wait)
1849 this->wait = onenand_wait;
1851 if (!this->read_bufferram)
1852 this->read_bufferram = onenand_read_bufferram;
1853 if (!this->write_bufferram)
1854 this->write_bufferram = onenand_write_bufferram;
1856 if (!this->block_markbad)
1857 this->block_markbad = onenand_default_block_markbad;
1858 if (!this->scan_bbt)
1859 this->scan_bbt = onenand_default_bbt;
1861 if (onenand_probe(mtd))
1862 return -ENXIO;
1864 /* Set Sync. Burst Read after probing */
1865 if (this->mmcontrol) {
1866 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
1867 this->read_bufferram = onenand_sync_read_bufferram;
1870 /* Allocate buffers, if necessary */
1871 if (!this->page_buf) {
1872 size_t len;
1873 len = mtd->writesize + mtd->oobsize;
1874 this->page_buf = kmalloc(len, GFP_KERNEL);
1875 if (!this->page_buf) {
1876 printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
1877 return -ENOMEM;
1879 this->options |= ONENAND_PAGEBUF_ALLOC;
1882 this->state = FL_READY;
1883 init_waitqueue_head(&this->wq);
1884 spin_lock_init(&this->chip_lock);
1886 switch (mtd->oobsize) {
1887 case 64:
1888 this->ecclayout = &onenand_oob_64;
1889 break;
1891 case 32:
1892 this->ecclayout = &onenand_oob_32;
1893 break;
1895 default:
1896 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
1897 mtd->oobsize);
1898 /* To prevent kernel oops */
1899 this->ecclayout = &onenand_oob_32;
1900 break;
1903 mtd->ecclayout = this->ecclayout;
1905 /* Fill in remaining MTD driver data */
1906 mtd->type = MTD_NANDFLASH;
1907 mtd->flags = MTD_CAP_NANDFLASH;
1908 mtd->ecctype = MTD_ECC_SW;
1909 mtd->erase = onenand_erase;
1910 mtd->point = NULL;
1911 mtd->unpoint = NULL;
1912 mtd->read = onenand_read;
1913 mtd->write = onenand_write;
1914 mtd->read_oob = onenand_read_oob;
1915 mtd->write_oob = onenand_write_oob;
1916 #ifdef CONFIG_MTD_ONENAND_OTP
1917 mtd->get_fact_prot_info = onenand_get_fact_prot_info;
1918 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
1919 mtd->get_user_prot_info = onenand_get_user_prot_info;
1920 mtd->read_user_prot_reg = onenand_read_user_prot_reg;
1921 mtd->write_user_prot_reg = onenand_write_user_prot_reg;
1922 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
1923 #endif
1924 mtd->sync = onenand_sync;
1925 mtd->lock = NULL;
1926 mtd->unlock = onenand_unlock;
1927 mtd->suspend = onenand_suspend;
1928 mtd->resume = onenand_resume;
1929 mtd->block_isbad = onenand_block_isbad;
1930 mtd->block_markbad = onenand_block_markbad;
1931 mtd->owner = THIS_MODULE;
1933 /* Unlock whole block */
1934 onenand_unlock_all(mtd);
1936 return this->scan_bbt(mtd);
1940 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
1941 * @param mtd MTD device structure
1943 void onenand_release(struct mtd_info *mtd)
1945 struct onenand_chip *this = mtd->priv;
1947 #ifdef CONFIG_MTD_PARTITIONS
1948 /* Deregister partitions */
1949 del_mtd_partitions (mtd);
1950 #endif
1951 /* Deregister the device */
1952 del_mtd_device (mtd);
1954 /* Free bad block table memory, if allocated */
1955 if (this->bbm)
1956 kfree(this->bbm);
1957 /* Buffer allocated by onenand_scan */
1958 if (this->options & ONENAND_PAGEBUF_ALLOC)
1959 kfree(this->page_buf);
1962 EXPORT_SYMBOL_GPL(onenand_scan);
1963 EXPORT_SYMBOL_GPL(onenand_release);
1965 MODULE_LICENSE("GPL");
1966 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
1967 MODULE_DESCRIPTION("Generic OneNAND flash driver code");