per_cpu: fix DEFINE_PER_CPU_SHARED_ALIGNED for modules
[linux-2.6/mini2440.git] / arch / arm / mach-pxa / mainstone.c
blob7399fb34da4e8edc3edfa72532276ca05f20005c
1 /*
2 * linux/arch/arm/mach-pxa/mainstone.c
4 * Support for the Intel HCDDBBVA0 Development Platform.
5 * (go figure how they came up with such name...)
7 * Author: Nicolas Pitre
8 * Created: Nov 05, 2002
9 * Copyright: MontaVista Software Inc.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/sysdev.h>
19 #include <linux/interrupt.h>
20 #include <linux/sched.h>
21 #include <linux/bitops.h>
22 #include <linux/fb.h>
23 #include <linux/ioport.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/partitions.h>
26 #include <linux/backlight.h>
27 #include <linux/input.h>
28 #include <linux/gpio_keys.h>
30 #include <asm/types.h>
31 #include <asm/setup.h>
32 #include <asm/memory.h>
33 #include <asm/mach-types.h>
34 #include <asm/hardware.h>
35 #include <asm/irq.h>
36 #include <asm/sizes.h>
38 #include <asm/mach/arch.h>
39 #include <asm/mach/map.h>
40 #include <asm/mach/irq.h>
41 #include <asm/mach/flash.h>
43 #include <asm/arch/pxa-regs.h>
44 #include <asm/arch/pxa2xx-regs.h>
45 #include <asm/arch/mfp-pxa27x.h>
46 #include <asm/arch/mainstone.h>
47 #include <asm/arch/audio.h>
48 #include <asm/arch/pxafb.h>
49 #include <asm/arch/i2c.h>
50 #include <asm/arch/mmc.h>
51 #include <asm/arch/irda.h>
52 #include <asm/arch/ohci.h>
53 #include <asm/arch/pxa27x_keypad.h>
55 #include "generic.h"
56 #include "devices.h"
58 static unsigned long mainstone_pin_config[] = {
59 /* Chip Select */
60 GPIO15_nCS_1,
62 /* LCD - 16bpp Active TFT */
63 GPIO58_LCD_LDD_0,
64 GPIO59_LCD_LDD_1,
65 GPIO60_LCD_LDD_2,
66 GPIO61_LCD_LDD_3,
67 GPIO62_LCD_LDD_4,
68 GPIO63_LCD_LDD_5,
69 GPIO64_LCD_LDD_6,
70 GPIO65_LCD_LDD_7,
71 GPIO66_LCD_LDD_8,
72 GPIO67_LCD_LDD_9,
73 GPIO68_LCD_LDD_10,
74 GPIO69_LCD_LDD_11,
75 GPIO70_LCD_LDD_12,
76 GPIO71_LCD_LDD_13,
77 GPIO72_LCD_LDD_14,
78 GPIO73_LCD_LDD_15,
79 GPIO74_LCD_FCLK,
80 GPIO75_LCD_LCLK,
81 GPIO76_LCD_PCLK,
82 GPIO77_LCD_BIAS,
83 GPIO16_PWM0_OUT, /* Backlight */
85 /* MMC */
86 GPIO32_MMC_CLK,
87 GPIO112_MMC_CMD,
88 GPIO92_MMC_DAT_0,
89 GPIO109_MMC_DAT_1,
90 GPIO110_MMC_DAT_2,
91 GPIO111_MMC_DAT_3,
93 /* USB Host Port 1 */
94 GPIO88_USBH1_PWR,
95 GPIO89_USBH1_PEN,
97 /* PC Card */
98 GPIO48_nPOE,
99 GPIO49_nPWE,
100 GPIO50_nPIOR,
101 GPIO51_nPIOW,
102 GPIO85_nPCE_1,
103 GPIO54_nPCE_2,
104 GPIO79_PSKTSEL,
105 GPIO55_nPREG,
106 GPIO56_nPWAIT,
107 GPIO57_nIOIS16,
109 /* AC97 */
110 GPIO45_AC97_SYSCLK,
112 /* Keypad */
113 GPIO93_KP_DKIN_0 | WAKEUP_ON_LEVEL_HIGH,
114 GPIO94_KP_DKIN_1 | WAKEUP_ON_LEVEL_HIGH,
115 GPIO95_KP_DKIN_2 | WAKEUP_ON_LEVEL_HIGH,
116 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
117 GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
118 GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
119 GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
120 GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH,
121 GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH,
122 GPIO103_KP_MKOUT_0,
123 GPIO104_KP_MKOUT_1,
124 GPIO105_KP_MKOUT_2,
125 GPIO106_KP_MKOUT_3,
126 GPIO107_KP_MKOUT_4,
127 GPIO108_KP_MKOUT_5,
128 GPIO96_KP_MKOUT_6,
130 /* GPIO */
131 GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
134 static unsigned long mainstone_irq_enabled;
136 static void mainstone_mask_irq(unsigned int irq)
138 int mainstone_irq = (irq - MAINSTONE_IRQ(0));
139 MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
142 static void mainstone_unmask_irq(unsigned int irq)
144 int mainstone_irq = (irq - MAINSTONE_IRQ(0));
145 /* the irq can be acknowledged only if deasserted, so it's done here */
146 MST_INTSETCLR &= ~(1 << mainstone_irq);
147 MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
150 static struct irq_chip mainstone_irq_chip = {
151 .name = "FPGA",
152 .ack = mainstone_mask_irq,
153 .mask = mainstone_mask_irq,
154 .unmask = mainstone_unmask_irq,
157 static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
159 unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
160 do {
161 GEDR(0) = GPIO_bit(0); /* clear useless edge notification */
162 if (likely(pending)) {
163 irq = MAINSTONE_IRQ(0) + __ffs(pending);
164 desc = irq_desc + irq;
165 desc_handle_irq(irq, desc);
167 pending = MST_INTSETCLR & mainstone_irq_enabled;
168 } while (pending);
171 static void __init mainstone_init_irq(void)
173 int irq;
175 pxa27x_init_irq();
177 /* setup extra Mainstone irqs */
178 for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
179 set_irq_chip(irq, &mainstone_irq_chip);
180 set_irq_handler(irq, handle_level_irq);
181 if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
182 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
183 else
184 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
186 set_irq_flags(MAINSTONE_IRQ(8), 0);
187 set_irq_flags(MAINSTONE_IRQ(12), 0);
189 MST_INTMSKENA = 0;
190 MST_INTSETCLR = 0;
192 set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
193 set_irq_type(IRQ_GPIO(0), IRQT_FALLING);
196 #ifdef CONFIG_PM
198 static int mainstone_irq_resume(struct sys_device *dev)
200 MST_INTMSKENA = mainstone_irq_enabled;
201 return 0;
204 static struct sysdev_class mainstone_irq_sysclass = {
205 .name = "cpld_irq",
206 .resume = mainstone_irq_resume,
209 static struct sys_device mainstone_irq_device = {
210 .cls = &mainstone_irq_sysclass,
213 static int __init mainstone_irq_device_init(void)
215 int ret = -ENODEV;
217 if (machine_is_mainstone()) {
218 ret = sysdev_class_register(&mainstone_irq_sysclass);
219 if (ret == 0)
220 ret = sysdev_register(&mainstone_irq_device);
222 return ret;
225 device_initcall(mainstone_irq_device_init);
227 #endif
230 static struct resource smc91x_resources[] = {
231 [0] = {
232 .start = (MST_ETH_PHYS + 0x300),
233 .end = (MST_ETH_PHYS + 0xfffff),
234 .flags = IORESOURCE_MEM,
236 [1] = {
237 .start = MAINSTONE_IRQ(3),
238 .end = MAINSTONE_IRQ(3),
239 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
243 static struct platform_device smc91x_device = {
244 .name = "smc91x",
245 .id = 0,
246 .num_resources = ARRAY_SIZE(smc91x_resources),
247 .resource = smc91x_resources,
250 static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv)
252 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
253 MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
254 return 0;
257 static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv)
259 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
260 MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
263 static long mst_audio_suspend_mask;
265 static void mst_audio_suspend(void *priv)
267 mst_audio_suspend_mask = MST_MSCWR2;
268 MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
271 static void mst_audio_resume(void *priv)
273 MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
276 static pxa2xx_audio_ops_t mst_audio_ops = {
277 .startup = mst_audio_startup,
278 .shutdown = mst_audio_shutdown,
279 .suspend = mst_audio_suspend,
280 .resume = mst_audio_resume,
283 static struct platform_device mst_audio_device = {
284 .name = "pxa2xx-ac97",
285 .id = -1,
286 .dev = { .platform_data = &mst_audio_ops },
289 static struct resource flash_resources[] = {
290 [0] = {
291 .start = PXA_CS0_PHYS,
292 .end = PXA_CS0_PHYS + SZ_64M - 1,
293 .flags = IORESOURCE_MEM,
295 [1] = {
296 .start = PXA_CS1_PHYS,
297 .end = PXA_CS1_PHYS + SZ_64M - 1,
298 .flags = IORESOURCE_MEM,
302 static struct mtd_partition mainstoneflash0_partitions[] = {
304 .name = "Bootloader",
305 .size = 0x00040000,
306 .offset = 0,
307 .mask_flags = MTD_WRITEABLE /* force read-only */
309 .name = "Kernel",
310 .size = 0x00400000,
311 .offset = 0x00040000,
313 .name = "Filesystem",
314 .size = MTDPART_SIZ_FULL,
315 .offset = 0x00440000
319 static struct flash_platform_data mst_flash_data[2] = {
321 .map_name = "cfi_probe",
322 .parts = mainstoneflash0_partitions,
323 .nr_parts = ARRAY_SIZE(mainstoneflash0_partitions),
324 }, {
325 .map_name = "cfi_probe",
326 .parts = NULL,
327 .nr_parts = 0,
331 static struct platform_device mst_flash_device[2] = {
333 .name = "pxa2xx-flash",
334 .id = 0,
335 .dev = {
336 .platform_data = &mst_flash_data[0],
338 .resource = &flash_resources[0],
339 .num_resources = 1,
342 .name = "pxa2xx-flash",
343 .id = 1,
344 .dev = {
345 .platform_data = &mst_flash_data[1],
347 .resource = &flash_resources[1],
348 .num_resources = 1,
352 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
353 static int mainstone_backlight_update_status(struct backlight_device *bl)
355 int brightness = bl->props.brightness;
357 if (bl->props.power != FB_BLANK_UNBLANK ||
358 bl->props.fb_blank != FB_BLANK_UNBLANK)
359 brightness = 0;
361 if (brightness != 0)
362 pxa_set_cken(CKEN_PWM0, 1);
364 PWM_CTRL0 = 0;
365 PWM_PWDUTY0 = brightness;
366 PWM_PERVAL0 = bl->props.max_brightness;
368 if (brightness == 0)
369 pxa_set_cken(CKEN_PWM0, 0);
370 return 0; /* pointless return value */
373 static int mainstone_backlight_get_brightness(struct backlight_device *bl)
375 return PWM_PWDUTY0;
378 static /*const*/ struct backlight_ops mainstone_backlight_ops = {
379 .update_status = mainstone_backlight_update_status,
380 .get_brightness = mainstone_backlight_get_brightness,
383 static void __init mainstone_backlight_register(void)
385 struct backlight_device *bl;
387 bl = backlight_device_register("mainstone-bl", &pxa_device_fb.dev,
388 NULL, &mainstone_backlight_ops);
389 if (IS_ERR(bl)) {
390 printk(KERN_ERR "mainstone: unable to register backlight: %ld\n",
391 PTR_ERR(bl));
392 return;
396 * broken design - register-then-setup interfaces are
397 * utterly broken by definition.
399 bl->props.max_brightness = 1023;
400 bl->props.brightness = 1023;
401 backlight_update_status(bl);
403 #else
404 #define mainstone_backlight_register() do { } while (0)
405 #endif
407 static struct pxafb_mode_info toshiba_ltm04c380k_mode = {
408 .pixclock = 50000,
409 .xres = 640,
410 .yres = 480,
411 .bpp = 16,
412 .hsync_len = 1,
413 .left_margin = 0x9f,
414 .right_margin = 1,
415 .vsync_len = 44,
416 .upper_margin = 0,
417 .lower_margin = 0,
418 .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
421 static struct pxafb_mode_info toshiba_ltm035a776c_mode = {
422 .pixclock = 110000,
423 .xres = 240,
424 .yres = 320,
425 .bpp = 16,
426 .hsync_len = 4,
427 .left_margin = 8,
428 .right_margin = 20,
429 .vsync_len = 3,
430 .upper_margin = 1,
431 .lower_margin = 10,
432 .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
435 static struct pxafb_mach_info mainstone_pxafb_info = {
436 .num_modes = 1,
437 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
440 static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data)
442 int err;
444 /* make sure SD/Memory Stick multiplexer's signals
445 * are routed to MMC controller
447 MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
449 err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED,
450 "MMC card detect", data);
451 if (err)
452 printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
454 return err;
457 static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
459 struct pxamci_platform_data* p_d = dev->platform_data;
461 if (( 1 << vdd) & p_d->ocr_mask) {
462 printk(KERN_DEBUG "%s: on\n", __func__);
463 MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
464 MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
465 } else {
466 printk(KERN_DEBUG "%s: off\n", __func__);
467 MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
471 static void mainstone_mci_exit(struct device *dev, void *data)
473 free_irq(MAINSTONE_MMC_IRQ, data);
476 static struct pxamci_platform_data mainstone_mci_platform_data = {
477 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
478 .init = mainstone_mci_init,
479 .setpower = mainstone_mci_setpower,
480 .exit = mainstone_mci_exit,
483 static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
485 unsigned long flags;
487 local_irq_save(flags);
488 if (mode & IR_SIRMODE) {
489 MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
490 } else if (mode & IR_FIRMODE) {
491 MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
493 if (mode & IR_OFF) {
494 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
495 } else {
496 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
498 local_irq_restore(flags);
501 static struct pxaficp_platform_data mainstone_ficp_platform_data = {
502 .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
503 .transceiver_mode = mainstone_irda_transceiver_mode,
506 static struct gpio_keys_button gpio_keys_button[] = {
507 [0] = {
508 .desc = "wakeup",
509 .code = KEY_SUSPEND,
510 .type = EV_KEY,
511 .gpio = 1,
512 .wakeup = 1,
516 static struct gpio_keys_platform_data mainstone_gpio_keys = {
517 .buttons = gpio_keys_button,
518 .nbuttons = 1,
521 static struct platform_device mst_gpio_keys_device = {
522 .name = "gpio-keys",
523 .id = -1,
524 .dev = {
525 .platform_data = &mainstone_gpio_keys,
529 static struct platform_device *platform_devices[] __initdata = {
530 &smc91x_device,
531 &mst_audio_device,
532 &mst_flash_device[0],
533 &mst_flash_device[1],
534 &mst_gpio_keys_device,
537 static int mainstone_ohci_init(struct device *dev)
539 /* Set the Power Control Polarity Low and Power Sense
540 Polarity Low to active low. */
541 UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
542 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
544 return 0;
547 static struct pxaohci_platform_data mainstone_ohci_platform_data = {
548 .port_mode = PMM_PERPORT_MODE,
549 .init = mainstone_ohci_init,
552 #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULES)
553 static unsigned int mainstone_matrix_keys[] = {
554 KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C),
555 KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F),
556 KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I),
557 KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L),
558 KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O),
559 KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R),
560 KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U),
561 KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X),
562 KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z),
564 KEY(0, 4, KEY_DOT), /* . */
565 KEY(1, 4, KEY_CLOSE), /* @ */
566 KEY(4, 4, KEY_SLASH),
567 KEY(5, 4, KEY_BACKSLASH),
568 KEY(0, 5, KEY_HOME),
569 KEY(1, 5, KEY_LEFTSHIFT),
570 KEY(2, 5, KEY_SPACE),
571 KEY(3, 5, KEY_SPACE),
572 KEY(4, 5, KEY_ENTER),
573 KEY(5, 5, KEY_BACKSPACE),
575 KEY(0, 6, KEY_UP),
576 KEY(1, 6, KEY_DOWN),
577 KEY(2, 6, KEY_LEFT),
578 KEY(3, 6, KEY_RIGHT),
579 KEY(4, 6, KEY_SELECT),
582 struct pxa27x_keypad_platform_data mainstone_keypad_info = {
583 .matrix_key_rows = 6,
584 .matrix_key_cols = 7,
585 .matrix_key_map = mainstone_matrix_keys,
586 .matrix_key_map_size = ARRAY_SIZE(mainstone_matrix_keys),
588 .enable_rotary0 = 1,
589 .rotary0_up_key = KEY_UP,
590 .rotary0_down_key = KEY_DOWN,
592 .debounce_interval = 30,
595 static void __init mainstone_init_keypad(void)
597 pxa_set_keypad_info(&mainstone_keypad_info);
599 #else
600 static inline void mainstone_init_keypad(void) {}
601 #endif
603 static void __init mainstone_init(void)
605 int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */
607 pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config));
609 mst_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
610 mst_flash_data[1].width = 4;
612 /* Compensate for SW7 which swaps the flash banks */
613 mst_flash_data[SW7].name = "processor-flash";
614 mst_flash_data[SW7 ^ 1].name = "mainboard-flash";
616 printk(KERN_NOTICE "Mainstone configured to boot from %s\n",
617 mst_flash_data[0].name);
619 /* system bus arbiter setting
620 * - Core_Park
621 * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
623 ARB_CNTRL = ARB_CORE_PARK | 0x234;
625 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
627 /* reading Mainstone's "Virtual Configuration Register"
628 might be handy to select LCD type here */
629 if (0)
630 mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode;
631 else
632 mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
634 set_pxa_fb_info(&mainstone_pxafb_info);
635 mainstone_backlight_register();
637 pxa_set_mci_info(&mainstone_mci_platform_data);
638 pxa_set_ficp_info(&mainstone_ficp_platform_data);
639 pxa_set_ohci_info(&mainstone_ohci_platform_data);
640 pxa_set_i2c_info(NULL);
642 mainstone_init_keypad();
646 static struct map_desc mainstone_io_desc[] __initdata = {
647 { /* CPLD */
648 .virtual = MST_FPGA_VIRT,
649 .pfn = __phys_to_pfn(MST_FPGA_PHYS),
650 .length = 0x00100000,
651 .type = MT_DEVICE
655 static void __init mainstone_map_io(void)
657 pxa_map_io();
658 iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
660 /* for use I SRAM as framebuffer. */
661 PSLR |= 0xF04;
662 PCFR = 0x66;
665 MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
666 /* Maintainer: MontaVista Software Inc. */
667 .phys_io = 0x40000000,
668 .boot_params = 0xa0000100, /* BLOB boot parameter setting */
669 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
670 .map_io = mainstone_map_io,
671 .init_irq = mainstone_init_irq,
672 .timer = &pxa_timer,
673 .init_machine = mainstone_init,
674 MACHINE_END