arch/arm/mach-pxa/em-x270.c

   1 /*
   2  * Support for CompuLab EM-x270 platform
   3  *
   4  * Copyright (C) 2007 CompuLab, Ltd.
   5  * Author: Mike Rapoport <mike@compulab.co.il>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/irq.h>
  13 #include <linux/platform_device.h>
  14
  15 #include <linux/dm9000.h>
  16 #include <linux/rtc-v3020.h>
  17
  18 #include <linux/mtd/nand.h>
  19 #include <linux/mtd/partitions.h>
  20
  21 #include <asm/mach-types.h>
  22
  23 #include <asm/mach/arch.h>
  24
  25 #include <asm/arch/pxa-regs.h>
  26 #include <asm/arch/pxa2xx-gpio.h>
  27 #include <asm/arch/pxafb.h>
  28 #include <asm/arch/ohci.h>
  29 #include <asm/arch/mmc.h>
  30 #include <asm/arch/bitfield.h>
  31
  32 #include "generic.h"
  33
  34 /* GPIO IRQ usage */
  35 #define EM_X270_MMC_PD          (105)
  36 #define EM_X270_ETHIRQ          IRQ_GPIO(41)
  37 #define EM_X270_MMC_IRQ         IRQ_GPIO(13)
  38
  39 static struct resource em_x270_dm9k_resource[] = {
  40         [0] = {
  41                 .start = PXA_CS2_PHYS,
  42                 .end   = PXA_CS2_PHYS + 3,
  43                 .flags = IORESOURCE_MEM,
  44         },
  45         [1] = {
  46                 .start = PXA_CS2_PHYS + 8,
  47                 .end   = PXA_CS2_PHYS + 8 + 0x3f,
  48                 .flags = IORESOURCE_MEM,
  49         },
  50         [2] = {
  51                 .start = EM_X270_ETHIRQ,
  52                 .end   = EM_X270_ETHIRQ,
  53                 .flags = IORESOURCE_IRQ,
  54         }
  55 };
  56
  57 /* for the moment we limit ourselves to 32bit IO until some
  58  * better IO routines can be written and tested
  59  */
  60 static struct dm9000_plat_data em_x270_dm9k_platdata = {
  61         .flags          = DM9000_PLATF_32BITONLY,
  62 };
  63
  64 /* Ethernet device */
  65 static struct platform_device em_x270_dm9k = {
  66         .name           = "dm9000",
  67         .id             = 0,
  68         .num_resources  = ARRAY_SIZE(em_x270_dm9k_resource),
  69         .resource       = em_x270_dm9k_resource,
  70         .dev            = {
  71                 .platform_data = &em_x270_dm9k_platdata,
  72         }
  73 };
  74
  75 /* audio device */
  76 static struct platform_device em_x270_audio = {
  77         .name           = "pxa2xx-ac97",
  78         .id             = -1,
  79 };
  80
  81 /* WM9712 touchscreen controller. Hopefully the driver will make it to
  82  * the mainstream sometime */
  83 static struct platform_device em_x270_ts = {
  84         .name           = "wm97xx-ts",
  85         .id             = -1,
  86 };
  87
  88 /* RTC */
  89 static struct resource em_x270_v3020_resource[] = {
  90         [0] = {
  91                 .start = PXA_CS4_PHYS,
  92                 .end   = PXA_CS4_PHYS + 3,
  93                 .flags = IORESOURCE_MEM,
  94         },
  95 };
  96
  97 static struct v3020_platform_data em_x270_v3020_platdata = {
  98         .leftshift = 0,
  99 };
 100
 101 static struct platform_device em_x270_rtc = {
 102         .name           = "v3020",
 103         .num_resources  = ARRAY_SIZE(em_x270_v3020_resource),
 104         .resource       = em_x270_v3020_resource,
 105         .id             = -1,
 106         .dev            = {
 107                 .platform_data = &em_x270_v3020_platdata,
 108         }
 109 };
 110
 111 /* NAND flash */
 112 #define GPIO_NAND_CS    (11)
 113 #define GPIO_NAND_RB    (56)
 114
 115 static inline void nand_cs_on(void)
 116 {
 117         GPCR(GPIO_NAND_CS) = GPIO_bit(GPIO_NAND_CS);
 118 }
 119
 120 static void nand_cs_off(void)
 121 {
 122         dsb();
 123
 124         GPSR(GPIO_NAND_CS) = GPIO_bit(GPIO_NAND_CS);
 125 }
 126
 127 /* hardware specific access to control-lines */
 128 static void em_x270_nand_cmd_ctl(struct mtd_info *mtd, int dat,
 129                                  unsigned int ctrl)
 130 {
 131         struct nand_chip *this = mtd->priv;
 132         unsigned long nandaddr = (unsigned long)this->IO_ADDR_W;
 133
 134         dsb();
 135
 136         if (ctrl & NAND_CTRL_CHANGE) {
 137                 if (ctrl & NAND_ALE)
 138                         nandaddr |=  (1 << 3);
 139                 else
 140                         nandaddr &= ~(1 << 3);
 141                 if (ctrl & NAND_CLE)
 142                         nandaddr |=  (1 << 2);
 143                 else
 144                         nandaddr &= ~(1 << 2);
 145                 if (ctrl & NAND_NCE)
 146                         nand_cs_on();
 147                 else
 148                         nand_cs_off();
 149         }
 150
 151         dsb();
 152         this->IO_ADDR_W = (void __iomem *)nandaddr;
 153         if (dat != NAND_CMD_NONE)
 154                 writel(dat, this->IO_ADDR_W);
 155
 156         dsb();
 157 }
 158
 159 /* read device ready pin */
 160 static int em_x270_nand_device_ready(struct mtd_info *mtd)
 161 {
 162         dsb();
 163
 164         return GPLR(GPIO_NAND_RB) & GPIO_bit(GPIO_NAND_RB);
 165 }
 166
 167 static struct mtd_partition em_x270_partition_info[] = {
 168         [0] = {
 169                 .name   = "em_x270-0",
 170                 .offset = 0,
 171                 .size   = SZ_4M,
 172         },
 173         [1] = {
 174                 .name   = "em_x270-1",
 175                 .offset = MTDPART_OFS_APPEND,
 176                 .size   = MTDPART_SIZ_FULL
 177         },
 178 };
 179
 180 static const char *em_x270_part_probes[] = { "cmdlinepart", NULL };
 181
 182 struct platform_nand_data em_x270_nand_platdata = {
 183         .chip = {
 184                 .nr_chips = 1,
 185                 .chip_offset = 0,
 186                 .nr_partitions = ARRAY_SIZE(em_x270_partition_info),
 187                 .partitions = em_x270_partition_info,
 188                 .chip_delay = 20,
 189                 .part_probe_types = em_x270_part_probes,
 190         },
 191         .ctrl = {
 192                 .hwcontrol = 0,
 193                 .dev_ready = em_x270_nand_device_ready,
 194                 .select_chip = 0,
 195                 .cmd_ctrl = em_x270_nand_cmd_ctl,
 196         },
 197 };
 198
 199 static struct resource em_x270_nand_resource[] = {
 200         [0] = {
 201                 .start = PXA_CS1_PHYS,
 202                 .end   = PXA_CS1_PHYS + 12,
 203                 .flags = IORESOURCE_MEM,
 204         },
 205 };
 206
 207 static struct platform_device em_x270_nand = {
 208         .name           = "gen_nand",
 209         .num_resources  = ARRAY_SIZE(em_x270_nand_resource),
 210         .resource       = em_x270_nand_resource,
 211         .id             = -1,
 212         .dev            = {
 213                 .platform_data = &em_x270_nand_platdata,
 214         }
 215 };
 216
 217 /* platform devices */
 218 static struct platform_device *platform_devices[] __initdata = {
 219         &em_x270_dm9k,
 220         &em_x270_audio,
 221         &em_x270_ts,
 222         &em_x270_rtc,
 223         &em_x270_nand,
 224 };
 225
 226
 227 /* PXA27x OHCI controller setup */
 228 static int em_x270_ohci_init(struct device *dev)
 229 {
 230         /* Set the Power Control Polarity Low */
 231         UHCHR = (UHCHR | UHCHR_PCPL) &
 232                 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);
 233
 234         /* enable port 2 transiever */
 235         UP2OCR = UP2OCR_HXS | UP2OCR_HXOE;
 236
 237         return 0;
 238 }
 239
 240 static struct pxaohci_platform_data em_x270_ohci_platform_data = {
 241         .port_mode      = PMM_PERPORT_MODE,
 242         .init           = em_x270_ohci_init,
 243 };
 244
 245
 246 static int em_x270_mci_init(struct device *dev,
 247                             irq_handler_t em_x270_detect_int,
 248                             void *data)
 249 {
 250         int err;
 251
 252         /* setup GPIO for PXA27x MMC controller */
 253         pxa_gpio_mode(GPIO32_MMCCLK_MD);
 254         pxa_gpio_mode(GPIO112_MMCCMD_MD);
 255         pxa_gpio_mode(GPIO92_MMCDAT0_MD);
 256         pxa_gpio_mode(GPIO109_MMCDAT1_MD);
 257         pxa_gpio_mode(GPIO110_MMCDAT2_MD);
 258         pxa_gpio_mode(GPIO111_MMCDAT3_MD);
 259
 260         /* EM-X270 uses GPIO13 as SD power enable */
 261         pxa_gpio_mode(EM_X270_MMC_PD | GPIO_OUT);
 262
 263         err = request_irq(EM_X270_MMC_IRQ, em_x270_detect_int,
 264                           IRQF_DISABLED | IRQF_TRIGGER_FALLING,
 265                           "MMC card detect", data);
 266         if (err) {
 267                 printk(KERN_ERR "%s: can't request MMC card detect IRQ: %d\n",
 268                        __func__, err);
 269                 return err;
 270         }
 271
 272         return 0;
 273 }
 274
 275 static void em_x270_mci_setpower(struct device *dev, unsigned int vdd)
 276 {
 277         /*
 278            FIXME: current hardware implementation does not allow to
 279            enable/disable MMC power. This will be fixed in next HW releases,
 280            and we'll need to add implmentation here.
 281         */
 282         return;
 283 }
 284
 285 static void em_x270_mci_exit(struct device *dev, void *data)
 286 {
 287         free_irq(EM_X270_MMC_IRQ, data);
 288 }
 289
 290 static struct pxamci_platform_data em_x270_mci_platform_data = {
 291         .ocr_mask       = MMC_VDD_28_29|MMC_VDD_29_30|MMC_VDD_30_31,
 292         .init           = em_x270_mci_init,
 293         .setpower       = em_x270_mci_setpower,
 294         .exit           = em_x270_mci_exit,
 295 };
 296
 297 /* LCD 480x640 */
 298 static struct pxafb_mode_info em_x270_lcd_mode = {
 299         .pixclock       = 50000,
 300         .bpp            = 16,
 301         .xres           = 480,
 302         .yres           = 640,
 303         .hsync_len      = 8,
 304         .vsync_len      = 2,
 305         .left_margin    = 8,
 306         .upper_margin   = 0,
 307         .right_margin   = 24,
 308         .lower_margin   = 4,
 309         .cmap_greyscale = 0,
 310 };
 311
 312 static struct pxafb_mach_info em_x270_lcd = {
 313         .modes          = &em_x270_lcd_mode,
 314         .num_modes      = 1,
 315         .cmap_inverse   = 0,
 316         .cmap_static    = 0,
 317         .lccr0          = LCCR0_PAS,
 318         .lccr3          = LCCR3_PixClkDiv(0x01) | LCCR3_Acb(0xff),
 319 };
 320
 321 static void __init em_x270_init(void)
 322 {
 323         /* setup LCD */
 324         set_pxa_fb_info(&em_x270_lcd);
 325
 326         /* register EM-X270 platform devices */
 327         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 328
 329         /* set MCI and OHCI platform parameters */
 330         pxa_set_mci_info(&em_x270_mci_platform_data);
 331         pxa_set_ohci_info(&em_x270_ohci_platform_data);
 332
 333         /* setup STUART GPIOs */
 334         pxa_gpio_mode(GPIO46_STRXD_MD);
 335         pxa_gpio_mode(GPIO47_STTXD_MD);
 336
 337         /* setup BTUART GPIOs */
 338         pxa_gpio_mode(GPIO42_BTRXD_MD);
 339         pxa_gpio_mode(GPIO43_BTTXD_MD);
 340         pxa_gpio_mode(GPIO44_BTCTS_MD);
 341         pxa_gpio_mode(GPIO45_BTRTS_MD);
 342
 343         /* Setup interrupt for dm9000 */
 344         set_irq_type(EM_X270_ETHIRQ, IRQT_RISING);
 345 }
 346
 347 MACHINE_START(EM_X270, "Compulab EM-x270")
 348         .boot_params    = 0xa0000100,
 349         .phys_io        = 0x40000000,
 350         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
 351         .map_io         = pxa_map_io,
 352         .init_irq       = pxa27x_init_irq,
 353         .timer          = &pxa_timer,
 354         .init_machine   = em_x270_init,
 355 MACHINE_END