2 * @file me4600_ext_irq.c
4 * @brief ME-4000 external interrupt subdevice instance.
5 * @note Copyright (C) 2007 Meilhaus Electronic GmbH (support@meilhaus.de)
6 * @author Guenter Gebhardt
7 * @author Krzysztof Gantzke (k.gantzke@meilhaus.de)
11 * Copyright (C) 2007 Meilhaus Electronic GmbH (support@meilhaus.de)
13 * This file is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
35 #include <linux/module.h>
37 #include <linux/slab.h>
38 #include <linux/spinlock.h>
39 #include <linux/interrupt.h>
41 #include <linux/types.h>
42 #include <linux/version.h>
44 #include "medefines.h"
45 #include "meinternal.h"
50 #include "me4600_reg.h"
51 #include "me4600_ai_reg.h"
52 #include "me4600_ext_irq_reg.h"
53 #include "me4600_ext_irq.h"
63 static int me4600_ext_irq_io_irq_start(me_subdevice_t
* subdevice
,
67 int irq_edge
, int irq_arg
, int flags
)
69 me4600_ext_irq_subdevice_t
*instance
;
70 int err
= ME_ERRNO_SUCCESS
;
71 unsigned long cpu_flags
;
74 PDEBUG("executed.\n");
76 instance
= (me4600_ext_irq_subdevice_t
*) subdevice
;
78 if (flags
& ~ME_IO_IRQ_START_DIO_BIT
) {
79 PERROR("Invalid flag specified.\n");
80 return ME_ERRNO_INVALID_FLAGS
;
83 if ((irq_edge
!= ME_IRQ_EDGE_RISING
)
84 && (irq_edge
!= ME_IRQ_EDGE_FALLING
)
85 && (irq_edge
!= ME_IRQ_EDGE_ANY
)
87 PERROR("Invalid irq edge specified.\n");
88 return ME_ERRNO_INVALID_IRQ_EDGE
;
91 if (irq_source
!= ME_IRQ_SOURCE_DIO_LINE
) {
92 PERROR("Invalid irq source specified.\n");
93 return ME_ERRNO_INVALID_IRQ_SOURCE
;
97 PERROR("Invalid channel specified.\n");
98 return ME_ERRNO_INVALID_CHANNEL
;
103 spin_lock(&instance
->subdevice_lock
);
104 tmp
= 0x0; //inl(instance->ext_irq_config_reg);
106 if (irq_edge
== ME_IRQ_EDGE_RISING
) {
107 //tmp &= ~ME4600_EXT_IRQ_CONFIG_MASK;
108 //tmp |= ME4600_EXT_IRQ_CONFIG_MASK_RISING;
109 } else if (irq_edge
== ME_IRQ_EDGE_FALLING
) {
110 //tmp &= ~ME4600_EXT_IRQ_CONFIG_MASK;
111 //tmp |= ME4600_EXT_IRQ_CONFIG_MASK_FALLING;
112 tmp
= ME4600_EXT_IRQ_CONFIG_MASK_FALLING
;
113 } else if (irq_edge
== ME_IRQ_EDGE_ANY
) {
114 //tmp &= ~ME4600_EXT_IRQ_CONFIG_MASK;
115 //tmp |= ME4600_EXT_IRQ_CONFIG_MASK_ANY;
116 tmp
= ME4600_EXT_IRQ_CONFIG_MASK_ANY
;
119 outl(tmp
, instance
->ext_irq_config_reg
);
120 PDEBUG_REG("ext_irq_config_reg outl(0x%lX+0x%lX)=0x%x\n",
122 instance
->ext_irq_config_reg
- instance
->reg_base
, tmp
);
124 spin_lock_irqsave(instance
->ctrl_reg_lock
, cpu_flags
);
125 tmp
= inl(instance
->ctrl_reg
);
126 tmp
&= ~(ME4600_AI_CTRL_BIT_EX_IRQ
| ME4600_AI_CTRL_BIT_EX_IRQ_RESET
);
127 tmp
|= ME4600_AI_CTRL_BIT_EX_IRQ
;
128 outl(tmp
, instance
->ctrl_reg
);
129 spin_unlock_irqrestore(instance
->ctrl_reg_lock
, cpu_flags
);
131 spin_unlock(&instance
->subdevice_lock
);
138 static int me4600_ext_irq_io_irq_wait(me_subdevice_t
* subdevice
,
142 int *value
, int time_out
, int flags
)
144 me4600_ext_irq_subdevice_t
*instance
;
145 int err
= ME_ERRNO_SUCCESS
;
147 unsigned long cpu_flags
;
149 PDEBUG("executed.\n");
151 instance
= (me4600_ext_irq_subdevice_t
*) subdevice
;
154 PERROR("Invalid flag specified.\n");
155 return ME_ERRNO_INVALID_FLAGS
;
159 PERROR("Invalid channel specified.\n");
160 return ME_ERRNO_INVALID_CHANNEL
;
164 PERROR("Invalid time_out specified.\n");
165 return ME_ERRNO_INVALID_TIMEOUT
;
169 t
= (time_out
* HZ
) / 1000;
177 if (instance
->rised
<= 0) {
180 t
= wait_event_interruptible_timeout(instance
->
187 ("Wait on external interrupt timed out.\n");
188 err
= ME_ERRNO_TIMEOUT
;
191 wait_event_interruptible(instance
->wait_queue
,
192 (instance
->rised
!= 0));
195 if (instance
->rised
< 0) {
196 PERROR("Wait on interrupt aborted by user.\n");
197 err
= ME_ERRNO_CANCELLED
;
201 if (signal_pending(current
)) {
202 PERROR("Wait on external interrupt aborted by signal.\n");
203 err
= ME_ERRNO_SIGNAL
;
206 spin_lock_irqsave(&instance
->subdevice_lock
, cpu_flags
);
208 *irq_count
= instance
->count
;
209 *value
= instance
->value
;
210 spin_unlock_irqrestore(&instance
->subdevice_lock
, cpu_flags
);
217 static int me4600_ext_irq_io_irq_stop(me_subdevice_t
* subdevice
,
219 int channel
, int flags
)
221 me4600_ext_irq_subdevice_t
*instance
;
222 int err
= ME_ERRNO_SUCCESS
;
223 unsigned long cpu_flags
;
226 PDEBUG("executed.\n");
228 instance
= (me4600_ext_irq_subdevice_t
*) subdevice
;
231 PERROR("Invalid flag specified.\n");
232 return ME_ERRNO_INVALID_FLAGS
;
236 PERROR("Invalid channel specified.\n");
237 return ME_ERRNO_INVALID_CHANNEL
;
242 spin_lock_irqsave(&instance
->subdevice_lock
, cpu_flags
);
243 spin_lock(instance
->ctrl_reg_lock
);
244 tmp
= inl(instance
->ctrl_reg
);
245 tmp
&= ~(ME4600_AI_CTRL_BIT_EX_IRQ
| ME4600_AI_CTRL_BIT_EX_IRQ_RESET
);
246 outl(tmp
, instance
->ctrl_reg
);
247 PDEBUG_REG("ctrl_regv outl(0x%lX+0x%lX)=0x%x\n", instance
->reg_base
,
248 instance
->ctrl_reg
- instance
->reg_base
, tmp
);
249 spin_unlock(instance
->ctrl_reg_lock
);
250 instance
->rised
= -1;
251 spin_unlock_irqrestore(&instance
->subdevice_lock
, cpu_flags
);
252 wake_up_interruptible_all(&instance
->wait_queue
);
259 static int me4600_ext_irq_io_reset_subdevice(me_subdevice_t
* subdevice
,
260 struct file
*filep
, int flags
)
262 me4600_ext_irq_subdevice_t
*instance
;
263 unsigned long cpu_flags
;
266 PDEBUG("executed.\n");
268 instance
= (me4600_ext_irq_subdevice_t
*) subdevice
;
271 PERROR("Invalid flag specified.\n");
272 return ME_ERRNO_INVALID_FLAGS
;
277 spin_lock_irqsave(&instance
->subdevice_lock
, cpu_flags
);
278 spin_lock(instance
->ctrl_reg_lock
);
279 tmp
= inl(instance
->ctrl_reg
);
280 tmp
&= ~(ME4600_AI_CTRL_BIT_EX_IRQ
| ME4600_AI_CTRL_BIT_EX_IRQ_RESET
);
281 outl(tmp
, instance
->ctrl_reg
);
282 PDEBUG_REG("ctrl_regv outl(0x%lX+0x%lX)=0x%x\n", instance
->reg_base
,
283 instance
->ctrl_reg
- instance
->reg_base
, tmp
);
284 spin_unlock(instance
->ctrl_reg_lock
);
285 instance
->rised
= -1;
287 outl(ME4600_EXT_IRQ_CONFIG_MASK_ANY
, instance
->ext_irq_config_reg
);
288 PDEBUG_REG("ext_irq_config_reg outl(0x%lX+0x%lX)=0x%x\n",
290 instance
->ext_irq_config_reg
- instance
->reg_base
,
291 ME4600_EXT_IRQ_CONFIG_MASK_ANY
);
292 spin_unlock_irqrestore(&instance
->subdevice_lock
, cpu_flags
);
293 wake_up_interruptible_all(&instance
->wait_queue
);
297 return ME_ERRNO_SUCCESS
;
300 static void me4600_ext_irq_destructor(struct me_subdevice
*subdevice
)
302 me4600_ext_irq_subdevice_t
*instance
;
304 PDEBUG("executed.\n");
305 instance
= (me4600_ext_irq_subdevice_t
*) subdevice
;
306 me_subdevice_deinit(&instance
->base
);
307 free_irq(instance
->irq
, instance
);
311 static int me4600_ext_irq_query_number_channels(me_subdevice_t
* subdevice
,
314 PDEBUG("executed.\n");
316 return ME_ERRNO_SUCCESS
;
319 static int me4600_ext_irq_query_subdevice_type(me_subdevice_t
* subdevice
,
320 int *type
, int *subtype
)
322 PDEBUG("executed.\n");
323 *type
= ME_TYPE_EXT_IRQ
;
324 *subtype
= ME_SUBTYPE_SINGLE
;
325 return ME_ERRNO_SUCCESS
;
328 static int me4600_ext_irq_query_subdevice_caps(me_subdevice_t
* subdevice
,
331 PDEBUG("executed.\n");
333 ME_CAPS_EXT_IRQ_EDGE_RISING
| ME_CAPS_EXT_IRQ_EDGE_FALLING
|
334 ME_CAPS_EXT_IRQ_EDGE_ANY
;
335 return ME_ERRNO_SUCCESS
;
338 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 19)
339 static irqreturn_t
me4600_ext_irq_isr(int irq
, void *dev_id
)
341 static irqreturn_t
me4600_ext_irq_isr(int irq
, void *dev_id
,
342 struct pt_regs
*regs
)
345 me4600_ext_irq_subdevice_t
*instance
;
349 instance
= (me4600_ext_irq_subdevice_t
*) dev_id
;
351 if (irq
!= instance
->irq
) {
352 PERROR("Incorrect interrupt num: %d.\n", irq
);
356 irq_status
= inl(instance
->irq_status_reg
);
357 if (!(irq_status
& ME4600_IRQ_STATUS_BIT_EX
)) {
358 PINFO("%ld Shared interrupt. %s(): irq_status_reg=0x%04X\n",
359 jiffies
, __FUNCTION__
, irq_status
);
363 PDEBUG("executed.\n");
365 spin_lock(&instance
->subdevice_lock
);
367 instance
->value
= inl(instance
->ext_irq_value_reg
);
370 spin_lock(instance
->ctrl_reg_lock
);
371 ctrl
= inl(instance
->ctrl_reg
);
372 ctrl
|= ME4600_AI_CTRL_BIT_EX_IRQ_RESET
;
373 outl(ctrl
, instance
->ctrl_reg
);
374 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance
->reg_base
,
375 instance
->ctrl_reg
- instance
->reg_base
, ctrl
);
376 ctrl
&= ~ME4600_AI_CTRL_BIT_EX_IRQ_RESET
;
377 outl(ctrl
, instance
->ctrl_reg
);
378 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance
->reg_base
,
379 instance
->ctrl_reg
- instance
->reg_base
, ctrl
);
380 spin_unlock(instance
->ctrl_reg_lock
);
382 spin_unlock(&instance
->subdevice_lock
);
383 wake_up_interruptible_all(&instance
->wait_queue
);
388 me4600_ext_irq_subdevice_t
*me4600_ext_irq_constructor(uint32_t reg_base
,
393 me4600_ext_irq_subdevice_t
*subdevice
;
396 PDEBUG("executed.\n");
398 /* Allocate memory for subdevice instance */
399 subdevice
= kmalloc(sizeof(me4600_ext_irq_subdevice_t
), GFP_KERNEL
);
402 PERROR("Cannot get memory for subdevice instance.\n");
406 memset(subdevice
, 0, sizeof(me4600_ext_irq_subdevice_t
));
408 /* Initialize subdevice base class */
409 err
= me_subdevice_init(&subdevice
->base
);
412 PERROR("Cannot initialize subdevice base class instance.\n");
416 // Initialize spin locks.
417 spin_lock_init(&subdevice
->subdevice_lock
);
419 subdevice
->ctrl_reg_lock
= ctrl_reg_lock
;
421 /* Initialize wait queue */
422 init_waitqueue_head(&subdevice
->wait_queue
);
424 /* Register interrupt */
425 subdevice
->irq
= irq
;
427 if (request_irq(subdevice
->irq
, me4600_ext_irq_isr
,
429 IRQF_DISABLED
| IRQF_SHARED
,
431 SA_INTERRUPT
| SA_SHIRQ
,
433 ME4600_NAME
, subdevice
)) {
434 PERROR("Cannot register interrupt.\n");
438 PINFO("Registered irq=%d.\n", subdevice
->irq
);
440 /* Initialize registers */
441 subdevice
->irq_status_reg
= reg_base
+ ME4600_IRQ_STATUS_REG
;
442 subdevice
->ctrl_reg
= reg_base
+ ME4600_AI_CTRL_REG
;
443 subdevice
->ext_irq_config_reg
= reg_base
+ ME4600_EXT_IRQ_CONFIG_REG
;
444 subdevice
->ext_irq_value_reg
= reg_base
+ ME4600_EXT_IRQ_VALUE_REG
;
445 #ifdef MEDEBUG_DEBUG_REG
446 subdevice
->reg_base
= reg_base
;
449 /* Override base class methods. */
450 subdevice
->base
.me_subdevice_destructor
= me4600_ext_irq_destructor
;
451 subdevice
->base
.me_subdevice_io_reset_subdevice
=
452 me4600_ext_irq_io_reset_subdevice
;
453 subdevice
->base
.me_subdevice_io_irq_start
= me4600_ext_irq_io_irq_start
;
454 subdevice
->base
.me_subdevice_io_irq_wait
= me4600_ext_irq_io_irq_wait
;
455 subdevice
->base
.me_subdevice_io_irq_stop
= me4600_ext_irq_io_irq_stop
;
456 subdevice
->base
.me_subdevice_query_number_channels
=
457 me4600_ext_irq_query_number_channels
;
458 subdevice
->base
.me_subdevice_query_subdevice_type
=
459 me4600_ext_irq_query_subdevice_type
;
460 subdevice
->base
.me_subdevice_query_subdevice_caps
=
461 me4600_ext_irq_query_subdevice_caps
;
463 subdevice
->rised
= 0;
464 subdevice
->count
= 0;