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removed unused #include <version.h>
[linux-2.6/mini2440.git] / drivers / net / wireless / iwlwifi / iwl-3945.c
blob3f51f36353449bdf0eaa8afa6c2fc1ec2bb39665
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/pci.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/delay.h>
33 #include <linux/skbuff.h>
34 #include <linux/netdevice.h>
35 #include <linux/wireless.h>
36 #include <linux/firmware.h>
37 #include <linux/etherdevice.h>
38 #include <asm/unaligned.h>
39 #include <net/mac80211.h>
40
41 #include "iwl-3945-core.h"
42 #include "iwl-3945.h"
43 #include "iwl-helpers.h"
44 #include "iwl-3945-rs.h"
45
46 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np) \
47 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
48 IWL_RATE_##r##M_IEEE, \
49 IWL_RATE_##ip##M_INDEX, \
50 IWL_RATE_##in##M_INDEX, \
51 IWL_RATE_##rp##M_INDEX, \
52 IWL_RATE_##rn##M_INDEX, \
53 IWL_RATE_##pp##M_INDEX, \
54 IWL_RATE_##np##M_INDEX, \
55 IWL_RATE_##r##M_INDEX_TABLE, \
56 IWL_RATE_##ip##M_INDEX_TABLE }
57
58 /*
59 * Parameter order:
60 * rate, prev rate, next rate, prev tgg rate, next tgg rate
61 *
62 * If there isn't a valid next or previous rate then INV is used which
63 * maps to IWL_RATE_INVALID
64 *
65 */
66 const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT] = {
67 IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2), /* 1mbps */
68 IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5), /* 2mbps */
69 IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11), /*5.5mbps */
70 IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18), /* 11mbps */
71 IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11), /* 6mbps */
72 IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11), /* 9mbps */
73 IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18), /* 12mbps */
74 IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24), /* 18mbps */
75 IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36), /* 24mbps */
76 IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48), /* 36mbps */
77 IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54), /* 48mbps */
78 IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
79 };
80
81 /* 1 = enable the iwl3945_disable_events() function */
82 #define IWL_EVT_DISABLE (0)
83 #define IWL_EVT_DISABLE_SIZE (1532/32)
84
85 /**
86 * iwl3945_disable_events - Disable selected events in uCode event log
87 *
88 * Disable an event by writing "1"s into "disable"
89 * bitmap in SRAM. Bit position corresponds to Event # (id/type).
90 * Default values of 0 enable uCode events to be logged.
91 * Use for only special debugging. This function is just a placeholder as-is,
92 * you'll need to provide the special bits! ...
93 * ... and set IWL_EVT_DISABLE to 1. */
94 void iwl3945_disable_events(struct iwl3945_priv *priv)
95 {
96 int ret;
97 int i;
98 u32 base; /* SRAM address of event log header */
99 u32 disable_ptr; /* SRAM address of event-disable bitmap array */
100 u32 array_size; /* # of u32 entries in array */
101 u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
102 0x00000000, /* 31 - 0 Event id numbers */
103 0x00000000, /* 63 - 32 */
104 0x00000000, /* 95 - 64 */
105 0x00000000, /* 127 - 96 */
106 0x00000000, /* 159 - 128 */
107 0x00000000, /* 191 - 160 */
108 0x00000000, /* 223 - 192 */
109 0x00000000, /* 255 - 224 */
110 0x00000000, /* 287 - 256 */
111 0x00000000, /* 319 - 288 */
112 0x00000000, /* 351 - 320 */
113 0x00000000, /* 383 - 352 */
114 0x00000000, /* 415 - 384 */
115 0x00000000, /* 447 - 416 */
116 0x00000000, /* 479 - 448 */
117 0x00000000, /* 511 - 480 */
118 0x00000000, /* 543 - 512 */
119 0x00000000, /* 575 - 544 */
120 0x00000000, /* 607 - 576 */
121 0x00000000, /* 639 - 608 */
122 0x00000000, /* 671 - 640 */
123 0x00000000, /* 703 - 672 */
124 0x00000000, /* 735 - 704 */
125 0x00000000, /* 767 - 736 */
126 0x00000000, /* 799 - 768 */
127 0x00000000, /* 831 - 800 */
128 0x00000000, /* 863 - 832 */
129 0x00000000, /* 895 - 864 */
130 0x00000000, /* 927 - 896 */
131 0x00000000, /* 959 - 928 */
132 0x00000000, /* 991 - 960 */
133 0x00000000, /* 1023 - 992 */
134 0x00000000, /* 1055 - 1024 */
135 0x00000000, /* 1087 - 1056 */
136 0x00000000, /* 1119 - 1088 */
137 0x00000000, /* 1151 - 1120 */
138 0x00000000, /* 1183 - 1152 */
139 0x00000000, /* 1215 - 1184 */
140 0x00000000, /* 1247 - 1216 */
141 0x00000000, /* 1279 - 1248 */
142 0x00000000, /* 1311 - 1280 */
143 0x00000000, /* 1343 - 1312 */
144 0x00000000, /* 1375 - 1344 */
145 0x00000000, /* 1407 - 1376 */
146 0x00000000, /* 1439 - 1408 */
147 0x00000000, /* 1471 - 1440 */
148 0x00000000, /* 1503 - 1472 */
149 };
150
151 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
152 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
153 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
154 return;
155 }
156
157 ret = iwl3945_grab_nic_access(priv);
158 if (ret) {
159 IWL_WARNING("Can not read from adapter at this time.\n");
160 return;
161 }
162
163 disable_ptr = iwl3945_read_targ_mem(priv, base + (4 * sizeof(u32)));
164 array_size = iwl3945_read_targ_mem(priv, base + (5 * sizeof(u32)));
165 iwl3945_release_nic_access(priv);
166
167 if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
168 IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
169 disable_ptr);
170 ret = iwl3945_grab_nic_access(priv);
171 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
172 iwl3945_write_targ_mem(priv,
173 disable_ptr + (i * sizeof(u32)),
174 evt_disable[i]);
175
176 iwl3945_release_nic_access(priv);
177 } else {
178 IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
179 IWL_DEBUG_INFO(" by writing \"1\"s into disable bitmap\n");
180 IWL_DEBUG_INFO(" in SRAM at 0x%x, size %d u32s\n",
181 disable_ptr, array_size);
182 }
183
184 }
185
186 static int iwl3945_hwrate_to_plcp_idx(u8 plcp)
187 {
188 int idx;
189
190 for (idx = 0; idx < IWL_RATE_COUNT; idx++)
191 if (iwl3945_rates[idx].plcp == plcp)
192 return idx;
193 return -1;
194 }
195
196 /**
197 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
198 * @priv: eeprom and antenna fields are used to determine antenna flags
199 *
200 * priv->eeprom is used to determine if antenna AUX/MAIN are reversed
201 * priv->antenna specifies the antenna diversity mode:
202 *
203 * IWL_ANTENNA_DIVERISTY - NIC selects best antenna by itself
204 * IWL_ANTENNA_MAIN - Force MAIN antenna
205 * IWL_ANTENNA_AUX - Force AUX antenna
206 */
207 __le32 iwl3945_get_antenna_flags(const struct iwl3945_priv *priv)
208 {
209 switch (priv->antenna) {
210 case IWL_ANTENNA_DIVERSITY:
211 return 0;
212
213 case IWL_ANTENNA_MAIN:
214 if (priv->eeprom.antenna_switch_type)
215 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
216 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
217
218 case IWL_ANTENNA_AUX:
219 if (priv->eeprom.antenna_switch_type)
220 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
221 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
222 }
223
224 /* bad antenna selector value */
225 IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna);
226 return 0; /* "diversity" is default if error */
227 }
228
229 #ifdef CONFIG_IWL3945_DEBUG
230 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
231
232 static const char *iwl3945_get_tx_fail_reason(u32 status)
233 {
234 switch (status & TX_STATUS_MSK) {
235 case TX_STATUS_SUCCESS:
236 return "SUCCESS";
237 TX_STATUS_ENTRY(SHORT_LIMIT);
238 TX_STATUS_ENTRY(LONG_LIMIT);
239 TX_STATUS_ENTRY(FIFO_UNDERRUN);
240 TX_STATUS_ENTRY(MGMNT_ABORT);
241 TX_STATUS_ENTRY(NEXT_FRAG);
242 TX_STATUS_ENTRY(LIFE_EXPIRE);
243 TX_STATUS_ENTRY(DEST_PS);
244 TX_STATUS_ENTRY(ABORTED);
245 TX_STATUS_ENTRY(BT_RETRY);
246 TX_STATUS_ENTRY(STA_INVALID);
247 TX_STATUS_ENTRY(FRAG_DROPPED);
248 TX_STATUS_ENTRY(TID_DISABLE);
249 TX_STATUS_ENTRY(FRAME_FLUSHED);
250 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
251 TX_STATUS_ENTRY(TX_LOCKED);
252 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
253 }
254
255 return "UNKNOWN";
256 }
257 #else
258 static inline const char *iwl3945_get_tx_fail_reason(u32 status)
259 {
260 return "";
261 }
262 #endif
263
264
265 /**
266 * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
267 *
268 * When FW advances 'R' index, all entries between old and new 'R' index
269 * need to be reclaimed. As result, some free space forms. If there is
270 * enough free space (> low mark), wake the stack that feeds us.
271 */
272 static void iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv,
273 int txq_id, int index)
274 {
275 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
276 struct iwl3945_queue *q = &txq->q;
277 struct iwl3945_tx_info *tx_info;
278
279 BUG_ON(txq_id == IWL_CMD_QUEUE_NUM);
280
281 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
282 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
283
284 tx_info = &txq->txb[txq->q.read_ptr];
285 ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb[0]);
286 tx_info->skb[0] = NULL;
287 iwl3945_hw_txq_free_tfd(priv, txq);
288 }
289
290 if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) &&
291 (txq_id != IWL_CMD_QUEUE_NUM) &&
292 priv->mac80211_registered)
293 ieee80211_wake_queue(priv->hw, txq_id);
294 }
295
296 /**
297 * iwl3945_rx_reply_tx - Handle Tx response
298 */
299 static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
300 struct iwl3945_rx_mem_buffer *rxb)
301 {
302 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
303 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
304 int txq_id = SEQ_TO_QUEUE(sequence);
305 int index = SEQ_TO_INDEX(sequence);
306 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
307 struct ieee80211_tx_info *info;
308 struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
309 u32 status = le32_to_cpu(tx_resp->status);
310 int rate_idx;
311
312 if ((index >= txq->q.n_bd) || (iwl3945_x2_queue_used(&txq->q, index) == 0)) {
313 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
314 "is out of range [0-%d] %d %d\n", txq_id,
315 index, txq->q.n_bd, txq->q.write_ptr,
316 txq->q.read_ptr);
317 return;
318 }
319
320 info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
321 memset(&info->status, 0, sizeof(info->status));
322
323 info->status.retry_count = tx_resp->failure_frame;
324 /* tx_status->rts_retry_count = tx_resp->failure_rts; */
325 info->flags |= ((status & TX_STATUS_MSK) == TX_STATUS_SUCCESS) ?
326 IEEE80211_TX_STAT_ACK : 0;
327
328 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
329 txq_id, iwl3945_get_tx_fail_reason(status), status,
330 tx_resp->rate, tx_resp->failure_frame);
331
332 rate_idx = iwl3945_hwrate_to_plcp_idx(tx_resp->rate);
333 if (info->band == IEEE80211_BAND_5GHZ)
334 rate_idx -= IWL_FIRST_OFDM_RATE;
335 info->tx_rate_idx = rate_idx;
336 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
337 iwl3945_tx_queue_reclaim(priv, txq_id, index);
338
339 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
340 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
341 }
342
343
344
345 /*****************************************************************************
346 *
347 * Intel PRO/Wireless 3945ABG/BG Network Connection
348 *
349 * RX handler implementations
350 *
351 *****************************************************************************/
352
353 void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
354 {
355 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
356 IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
357 (int)sizeof(struct iwl3945_notif_statistics),
358 le32_to_cpu(pkt->len));
359
360 memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
361
362 iwl3945_led_background(priv);
363
364 priv->last_statistics_time = jiffies;
365 }
366
367 /******************************************************************************
368 *
369 * Misc. internal state and helper functions
370 *
371 ******************************************************************************/
372 #ifdef CONFIG_IWL3945_DEBUG
373
374 /**
375 * iwl3945_report_frame - dump frame to syslog during debug sessions
376 *
377 * You may hack this function to show different aspects of received frames,
378 * including selective frame dumps.
379 * group100 parameter selects whether to show 1 out of 100 good frames.
380 */
381 static void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
382 struct iwl3945_rx_packet *pkt,
383 struct ieee80211_hdr *header, int group100)
384 {
385 u32 to_us;
386 u32 print_summary = 0;
387 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
388 u32 hundred = 0;
389 u32 dataframe = 0;
390 __le16 fc;
391 u16 seq_ctl;
392 u16 channel;
393 u16 phy_flags;
394 u16 length;
395 u16 status;
396 u16 bcn_tmr;
397 u32 tsf_low;
398 u64 tsf;
399 u8 rssi;
400 u8 agc;
401 u16 sig_avg;
402 u16 noise_diff;
403 struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
404 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
405 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
406 u8 *data = IWL_RX_DATA(pkt);
407
408 /* MAC header */
409 fc = header->frame_control;
410 seq_ctl = le16_to_cpu(header->seq_ctrl);
411
412 /* metadata */
413 channel = le16_to_cpu(rx_hdr->channel);
414 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
415 length = le16_to_cpu(rx_hdr->len);
416
417 /* end-of-frame status and timestamp */
418 status = le32_to_cpu(rx_end->status);
419 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
420 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
421 tsf = le64_to_cpu(rx_end->timestamp);
422
423 /* signal statistics */
424 rssi = rx_stats->rssi;
425 agc = rx_stats->agc;
426 sig_avg = le16_to_cpu(rx_stats->sig_avg);
427 noise_diff = le16_to_cpu(rx_stats->noise_diff);
428
429 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
430
431 /* if data frame is to us and all is good,
432 * (optionally) print summary for only 1 out of every 100 */
433 if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
434 cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
435 dataframe = 1;
436 if (!group100)
437 print_summary = 1; /* print each frame */
438 else if (priv->framecnt_to_us < 100) {
439 priv->framecnt_to_us++;
440 print_summary = 0;
441 } else {
442 priv->framecnt_to_us = 0;
443 print_summary = 1;
444 hundred = 1;
445 }
446 } else {
447 /* print summary for all other frames */
448 print_summary = 1;
449 }
450
451 if (print_summary) {
452 char *title;
453 int rate;
454
455 if (hundred)
456 title = "100Frames";
457 else if (ieee80211_has_retry(fc))
458 title = "Retry";
459 else if (ieee80211_is_assoc_resp(fc))
460 title = "AscRsp";
461 else if (ieee80211_is_reassoc_resp(fc))
462 title = "RasRsp";
463 else if (ieee80211_is_probe_resp(fc)) {
464 title = "PrbRsp";
465 print_dump = 1; /* dump frame contents */
466 } else if (ieee80211_is_beacon(fc)) {
467 title = "Beacon";
468 print_dump = 1; /* dump frame contents */
469 } else if (ieee80211_is_atim(fc))
470 title = "ATIM";
471 else if (ieee80211_is_auth(fc))
472 title = "Auth";
473 else if (ieee80211_is_deauth(fc))
474 title = "DeAuth";
475 else if (ieee80211_is_disassoc(fc))
476 title = "DisAssoc";
477 else
478 title = "Frame";
479
480 rate = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
481 if (rate == -1)
482 rate = 0;
483 else
484 rate = iwl3945_rates[rate].ieee / 2;
485
486 /* print frame summary.
487 * MAC addresses show just the last byte (for brevity),
488 * but you can hack it to show more, if you'd like to. */
489 if (dataframe)
490 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
491 "len=%u, rssi=%d, chnl=%d, rate=%d, \n",
492 title, le16_to_cpu(fc), header->addr1[5],
493 length, rssi, channel, rate);
494 else {
495 /* src/dst addresses assume managed mode */
496 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
497 "src=0x%02x, rssi=%u, tim=%lu usec, "
498 "phy=0x%02x, chnl=%d\n",
499 title, le16_to_cpu(fc), header->addr1[5],
500 header->addr3[5], rssi,
501 tsf_low - priv->scan_start_tsf,
502 phy_flags, channel);
503 }
504 }
505 if (print_dump)
506 iwl3945_print_hex_dump(IWL_DL_RX, data, length);
507 }
508 #else
509 static inline void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
510 struct iwl3945_rx_packet *pkt,
511 struct ieee80211_hdr *header, int group100)
512 {
513 }
514 #endif
515
516 /* This is necessary only for a number of statistics, see the caller. */
517 static int iwl3945_is_network_packet(struct iwl3945_priv *priv,
518 struct ieee80211_hdr *header)
519 {
520 /* Filter incoming packets to determine if they are targeted toward
521 * this network, discarding packets coming from ourselves */
522 switch (priv->iw_mode) {
523 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
524 /* packets to our IBSS update information */
525 return !compare_ether_addr(header->addr3, priv->bssid);
526 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
527 /* packets to our IBSS update information */
528 return !compare_ether_addr(header->addr2, priv->bssid);
529 default:
530 return 1;
531 }
532 }
533
534 static void iwl3945_add_radiotap(struct iwl3945_priv *priv,
535 struct sk_buff *skb,
536 struct iwl3945_rx_frame_hdr *rx_hdr,
537 struct ieee80211_rx_status *stats)
538 {
539 /* First cache any information we need before we overwrite
540 * the information provided in the skb from the hardware */
541 s8 signal = stats->signal;
542 s8 noise = 0;
543 int rate = stats->rate_idx;
544 u64 tsf = stats->mactime;
545 __le16 phy_flags_hw = rx_hdr->phy_flags, antenna;
546
547 struct iwl3945_rt_rx_hdr {
548 struct ieee80211_radiotap_header rt_hdr;
549 __le64 rt_tsf; /* TSF */
550 u8 rt_flags; /* radiotap packet flags */
551 u8 rt_rate; /* rate in 500kb/s */
552 __le16 rt_channelMHz; /* channel in MHz */
553 __le16 rt_chbitmask; /* channel bitfield */
554 s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
555 s8 rt_dbmnoise;
556 u8 rt_antenna; /* antenna number */
557 } __attribute__ ((packed)) *iwl3945_rt;
558
559 if (skb_headroom(skb) < sizeof(*iwl3945_rt)) {
560 if (net_ratelimit())
561 printk(KERN_ERR "not enough headroom [%d] for "
562 "radiotap head [%zd]\n",
563 skb_headroom(skb), sizeof(*iwl3945_rt));
564 return;
565 }
566
567 /* put radiotap header in front of 802.11 header and data */
568 iwl3945_rt = (void *)skb_push(skb, sizeof(*iwl3945_rt));
569
570 /* initialise radiotap header */
571 iwl3945_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
572 iwl3945_rt->rt_hdr.it_pad = 0;
573
574 /* total header + data */
575 put_unaligned_le16(sizeof(*iwl3945_rt), &iwl3945_rt->rt_hdr.it_len);
576
577 /* Indicate all the fields we add to the radiotap header */
578 put_unaligned_le32((1 << IEEE80211_RADIOTAP_TSFT) |
579 (1 << IEEE80211_RADIOTAP_FLAGS) |
580 (1 << IEEE80211_RADIOTAP_RATE) |
581 (1 << IEEE80211_RADIOTAP_CHANNEL) |
582 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
583 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
584 (1 << IEEE80211_RADIOTAP_ANTENNA),
585 &iwl3945_rt->rt_hdr.it_present);
586
587 /* Zero the flags, we'll add to them as we go */
588 iwl3945_rt->rt_flags = 0;
589
590 put_unaligned_le64(tsf, &iwl3945_rt->rt_tsf);
591
592 iwl3945_rt->rt_dbmsignal = signal;
593 iwl3945_rt->rt_dbmnoise = noise;
594
595 /* Convert the channel frequency and set the flags */
596 put_unaligned_le16(stats->freq, &iwl3945_rt->rt_channelMHz);
597 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
598 put_unaligned_le16(IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ,
599 &iwl3945_rt->rt_chbitmask);
600 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
601 put_unaligned_le16(IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ,
602 &iwl3945_rt->rt_chbitmask);
603 else /* 802.11g */
604 put_unaligned_le16(IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ,
605 &iwl3945_rt->rt_chbitmask);
606
607 if (rate == -1)
608 iwl3945_rt->rt_rate = 0;
609 else {
610 if (stats->band == IEEE80211_BAND_5GHZ)
611 rate += IWL_FIRST_OFDM_RATE;
612
613 iwl3945_rt->rt_rate = iwl3945_rates[rate].ieee;
614 }
615
616 /* antenna number */
617 antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK;
618 iwl3945_rt->rt_antenna = le16_to_cpu(antenna) >> 4;
619
620 /* set the preamble flag if we have it */
621 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
622 iwl3945_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
623
624 stats->flag |= RX_FLAG_RADIOTAP;
625 }
626
627 static void iwl3945_pass_packet_to_mac80211(struct iwl3945_priv *priv,
628 struct iwl3945_rx_mem_buffer *rxb,
629 struct ieee80211_rx_status *stats)
630 {
631 struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
632 #ifdef CONFIG_IWL3945_LEDS
633 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
634 #endif
635 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
636 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
637 short len = le16_to_cpu(rx_hdr->len);
638
639 /* We received data from the HW, so stop the watchdog */
640 if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) {
641 IWL_DEBUG_DROP("Corruption detected!\n");
642 return;
643 }
644
645 /* We only process data packets if the interface is open */
646 if (unlikely(!priv->is_open)) {
647 IWL_DEBUG_DROP_LIMIT
648 ("Dropping packet while interface is not open.\n");
649 return;
650 }
651
652 skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt);
653 /* Set the size of the skb to the size of the frame */
654 skb_put(rxb->skb, le16_to_cpu(rx_hdr->len));
655
656 if (iwl3945_param_hwcrypto)
657 iwl3945_set_decrypted_flag(priv, rxb->skb,
658 le32_to_cpu(rx_end->status), stats);
659
660 if (priv->add_radiotap)
661 iwl3945_add_radiotap(priv, rxb->skb, rx_hdr, stats);
662
663 #ifdef CONFIG_IWL3945_LEDS
664 if (ieee80211_is_data(hdr->frame_control))
665 priv->rxtxpackets += len;
666 #endif
667 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
668 rxb->skb = NULL;
669 }
670
671 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
672
673 static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv,
674 struct iwl3945_rx_mem_buffer *rxb)
675 {
676 struct ieee80211_hdr *header;
677 struct ieee80211_rx_status rx_status;
678 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
679 struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
680 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
681 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
682 int snr;
683 u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
684 u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
685 u8 network_packet;
686
687 rx_status.antenna = 0;
688 rx_status.flag = 0;
689 rx_status.mactime = le64_to_cpu(rx_end->timestamp);
690 rx_status.freq =
691 ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr->channel));
692 rx_status.band = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
693 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
694
695 rx_status.rate_idx = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
696 if (rx_status.band == IEEE80211_BAND_5GHZ)
697 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
698
699 if ((unlikely(rx_stats->phy_count > 20))) {
700 IWL_DEBUG_DROP
701 ("dsp size out of range [0,20]: "
702 "%d/n", rx_stats->phy_count);
703 return;
704 }
705
706 if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
707 || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
708 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
709 return;
710 }
711
712
713
714 /* Convert 3945's rssi indicator to dBm */
715 rx_status.signal = rx_stats->rssi - IWL_RSSI_OFFSET;
716
717 /* Set default noise value to -127 */
718 if (priv->last_rx_noise == 0)
719 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
720
721 /* 3945 provides noise info for OFDM frames only.
722 * sig_avg and noise_diff are measured by the 3945's digital signal
723 * processor (DSP), and indicate linear levels of signal level and
724 * distortion/noise within the packet preamble after
725 * automatic gain control (AGC). sig_avg should stay fairly
726 * constant if the radio's AGC is working well.
727 * Since these values are linear (not dB or dBm), linear
728 * signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
729 * Convert linear SNR to dB SNR, then subtract that from rssi dBm
730 * to obtain noise level in dBm.
731 * Calculate rx_status.signal (quality indicator in %) based on SNR. */
732 if (rx_stats_noise_diff) {
733 snr = rx_stats_sig_avg / rx_stats_noise_diff;
734 rx_status.noise = rx_status.signal -
735 iwl3945_calc_db_from_ratio(snr);
736 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal,
737 rx_status.noise);
738
739 /* If noise info not available, calculate signal quality indicator (%)
740 * using just the dBm signal level. */
741 } else {
742 rx_status.noise = priv->last_rx_noise;
743 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal, 0);
744 }
745
746
747 IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
748 rx_status.signal, rx_status.noise, rx_status.qual,
749 rx_stats_sig_avg, rx_stats_noise_diff);
750
751 header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
752
753 network_packet = iwl3945_is_network_packet(priv, header);
754
755 IWL_DEBUG_STATS_LIMIT("[%c] %d RSSI:%d Signal:%u, Noise:%u, Rate:%u\n",
756 network_packet ? '*' : ' ',
757 le16_to_cpu(rx_hdr->channel),
758 rx_status.signal, rx_status.signal,
759 rx_status.noise, rx_status.rate_idx);
760
761 #ifdef CONFIG_IWL3945_DEBUG
762 if (iwl3945_debug_level & (IWL_DL_RX))
763 /* Set "1" to report good data frames in groups of 100 */
764 iwl3945_dbg_report_frame(priv, pkt, header, 1);
765 #endif
766
767 if (network_packet) {
768 priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
769 priv->last_tsf = le64_to_cpu(rx_end->timestamp);
770 priv->last_rx_rssi = rx_status.signal;
771 priv->last_rx_noise = rx_status.noise;
772 }
773
774 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
775 iwl3945_pass_packet_to_mac80211(priv, rxb, &rx_status);
776 return;
777 }
778
779 switch (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FTYPE) {
780 case IEEE80211_FTYPE_MGMT:
781 switch (le16_to_cpu(header->frame_control) &
782 IEEE80211_FCTL_STYPE) {
783 case IEEE80211_STYPE_PROBE_RESP:
784 case IEEE80211_STYPE_BEACON:{
785 /* If this is a beacon or probe response for
786 * our network then cache the beacon
787 * timestamp */
788 if ((((priv->iw_mode == IEEE80211_IF_TYPE_STA)
789 && !compare_ether_addr(header->addr2,
790 priv->bssid)) ||
791 ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
792 && !compare_ether_addr(header->addr3,
793 priv->bssid)))) {
794 struct ieee80211_mgmt *mgmt =
795 (struct ieee80211_mgmt *)header;
796 __le32 *pos;
797 pos = (__le32 *)&mgmt->u.beacon.
798 timestamp;
799 priv->timestamp0 = le32_to_cpu(pos[0]);
800 priv->timestamp1 = le32_to_cpu(pos[1]);
801 priv->beacon_int = le16_to_cpu(
802 mgmt->u.beacon.beacon_int);
803 if (priv->call_post_assoc_from_beacon &&
804 (priv->iw_mode ==
805 IEEE80211_IF_TYPE_STA))
806 queue_work(priv->workqueue,
807 &priv->post_associate.work);
808
809 priv->call_post_assoc_from_beacon = 0;
810 }
811
812 break;
813 }
814
815 case IEEE80211_STYPE_ACTION:
816 /* TODO: Parse 802.11h frames for CSA... */
817 break;
818
819 /*
820 * TODO: Use the new callback function from
821 * mac80211 instead of sniffing these packets.
822 */
823 case IEEE80211_STYPE_ASSOC_RESP:
824 case IEEE80211_STYPE_REASSOC_RESP:{
825 struct ieee80211_mgmt *mgnt =
826 (struct ieee80211_mgmt *)header;
827
828 /* We have just associated, give some
829 * time for the 4-way handshake if
830 * any. Don't start scan too early. */
831 priv->next_scan_jiffies = jiffies +
832 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
833
834 priv->assoc_id = (~((1 << 15) | (1 << 14)) &
835 le16_to_cpu(mgnt->u.
836 assoc_resp.aid));
837 priv->assoc_capability =
838 le16_to_cpu(mgnt->u.assoc_resp.capab_info);
839 if (priv->beacon_int)
840 queue_work(priv->workqueue,
841 &priv->post_associate.work);
842 else
843 priv->call_post_assoc_from_beacon = 1;
844 break;
845 }
846
847 case IEEE80211_STYPE_PROBE_REQ:{
848 DECLARE_MAC_BUF(mac1);
849 DECLARE_MAC_BUF(mac2);
850 DECLARE_MAC_BUF(mac3);
851 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
852 IWL_DEBUG_DROP
853 ("Dropping (non network): %s"
854 ", %s, %s\n",
855 print_mac(mac1, header->addr1),
856 print_mac(mac2, header->addr2),
857 print_mac(mac3, header->addr3));
858 return;
859 }
860 }
861
862 case IEEE80211_FTYPE_DATA:
863 /* fall through */
864 default:
865 iwl3945_pass_packet_to_mac80211(priv, rxb, &rx_status);
866 break;
867 }
868 }
869
870 int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl3945_priv *priv, void *ptr,
871 dma_addr_t addr, u16 len)
872 {
873 int count;
874 u32 pad;
875 struct iwl3945_tfd_frame *tfd = (struct iwl3945_tfd_frame *)ptr;
876
877 count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
878 pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags));
879
880 if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
881 IWL_ERROR("Error can not send more than %d chunks\n",
882 NUM_TFD_CHUNKS);
883 return -EINVAL;
884 }
885
886 tfd->pa[count].addr = cpu_to_le32(addr);
887 tfd->pa[count].len = cpu_to_le32(len);
888
889 count++;
890
891 tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
892 TFD_CTL_PAD_SET(pad));
893
894 return 0;
895 }
896
897 /**
898 * iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
899 *
900 * Does NOT advance any indexes
901 */
902 int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
903 {
904 struct iwl3945_tfd_frame *bd_tmp = (struct iwl3945_tfd_frame *)&txq->bd[0];
905 struct iwl3945_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
906 struct pci_dev *dev = priv->pci_dev;
907 int i;
908 int counter;
909
910 /* classify bd */
911 if (txq->q.id == IWL_CMD_QUEUE_NUM)
912 /* nothing to cleanup after for host commands */
913 return 0;
914
915 /* sanity check */
916 counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags));
917 if (counter > NUM_TFD_CHUNKS) {
918 IWL_ERROR("Too many chunks: %i\n", counter);
919 /* @todo issue fatal error, it is quite serious situation */
920 return 0;
921 }
922
923 /* unmap chunks if any */
924
925 for (i = 1; i < counter; i++) {
926 pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
927 le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
928 if (txq->txb[txq->q.read_ptr].skb[0]) {
929 struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0];
930 if (txq->txb[txq->q.read_ptr].skb[0]) {
931 /* Can be called from interrupt context */
932 dev_kfree_skb_any(skb);
933 txq->txb[txq->q.read_ptr].skb[0] = NULL;
934 }
935 }
936 }
937 return 0;
938 }
939
940 u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *addr)
941 {
942 int i;
943 int ret = IWL_INVALID_STATION;
944 unsigned long flags;
945 DECLARE_MAC_BUF(mac);
946
947 spin_lock_irqsave(&priv->sta_lock, flags);
948 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
949 if ((priv->stations[i].used) &&
950 (!compare_ether_addr
951 (priv->stations[i].sta.sta.addr, addr))) {
952 ret = i;
953 goto out;
954 }
955
956 IWL_DEBUG_INFO("can not find STA %s (total %d)\n",
957 print_mac(mac, addr), priv->num_stations);
958 out:
959 spin_unlock_irqrestore(&priv->sta_lock, flags);
960 return ret;
961 }
962
963 /**
964 * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
965 *
966 */
967 void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv *priv,
968 struct iwl3945_cmd *cmd,
969 struct ieee80211_tx_info *info,
970 struct ieee80211_hdr *hdr, int sta_id, int tx_id)
971 {
972 unsigned long flags;
973 u16 hw_value = ieee80211_get_tx_rate(priv->hw, info)->hw_value;
974 u16 rate_index = min(hw_value & 0xffff, IWL_RATE_COUNT - 1);
975 u16 rate_mask;
976 int rate;
977 u8 rts_retry_limit;
978 u8 data_retry_limit;
979 __le32 tx_flags;
980 __le16 fc = hdr->frame_control;
981
982 rate = iwl3945_rates[rate_index].plcp;
983 tx_flags = cmd->cmd.tx.tx_flags;
984
985 /* We need to figure out how to get the sta->supp_rates while
986 * in this running context */
987 rate_mask = IWL_RATES_MASK;
988
989 spin_lock_irqsave(&priv->sta_lock, flags);
990
991 priv->stations[sta_id].current_rate.rate_n_flags = rate;
992
993 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
994 (sta_id != priv->hw_setting.bcast_sta_id) &&
995 (sta_id != IWL_MULTICAST_ID))
996 priv->stations[IWL_STA_ID].current_rate.rate_n_flags = rate;
997
998 spin_unlock_irqrestore(&priv->sta_lock, flags);
999
1000 if (tx_id >= IWL_CMD_QUEUE_NUM)
1001 rts_retry_limit = 3;
1002 else
1003 rts_retry_limit = 7;
1004
1005 if (ieee80211_is_probe_resp(fc)) {
1006 data_retry_limit = 3;
1007 if (data_retry_limit < rts_retry_limit)
1008 rts_retry_limit = data_retry_limit;
1009 } else
1010 data_retry_limit = IWL_DEFAULT_TX_RETRY;
1011
1012 if (priv->data_retry_limit != -1)
1013 data_retry_limit = priv->data_retry_limit;
1014
1015 if (ieee80211_is_mgmt(fc)) {
1016 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
1017 case cpu_to_le16(IEEE80211_STYPE_AUTH):
1018 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
1019 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
1020 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
1021 if (tx_flags & TX_CMD_FLG_RTS_MSK) {
1022 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
1023 tx_flags |= TX_CMD_FLG_CTS_MSK;
1024 }
1025 break;
1026 default:
1027 break;
1028 }
1029 }
1030
1031 cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
1032 cmd->cmd.tx.data_retry_limit = data_retry_limit;
1033 cmd->cmd.tx.rate = rate;
1034 cmd->cmd.tx.tx_flags = tx_flags;
1035
1036 /* OFDM */
1037 cmd->cmd.tx.supp_rates[0] =
1038 ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF;
1039
1040 /* CCK */
1041 cmd->cmd.tx.supp_rates[1] = (rate_mask & 0xF);
1042
1043 IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
1044 "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
1045 cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags),
1046 cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]);
1047 }
1048
1049 u8 iwl3945_sync_sta(struct iwl3945_priv *priv, int sta_id, u16 tx_rate, u8 flags)
1050 {
1051 unsigned long flags_spin;
1052 struct iwl3945_station_entry *station;
1053
1054 if (sta_id == IWL_INVALID_STATION)
1055 return IWL_INVALID_STATION;
1056
1057 spin_lock_irqsave(&priv->sta_lock, flags_spin);
1058 station = &priv->stations[sta_id];
1059
1060 station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
1061 station->sta.rate_n_flags = cpu_to_le16(tx_rate);
1062 station->current_rate.rate_n_flags = tx_rate;
1063 station->sta.mode = STA_CONTROL_MODIFY_MSK;
1064
1065 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
1066
1067 iwl3945_send_add_station(priv, &station->sta, flags);
1068 IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
1069 sta_id, tx_rate);
1070 return sta_id;
1071 }
1072
1073 static int iwl3945_nic_set_pwr_src(struct iwl3945_priv *priv, int pwr_max)
1074 {
1075 int rc;
1076 unsigned long flags;
1077
1078 spin_lock_irqsave(&priv->lock, flags);
1079 rc = iwl3945_grab_nic_access(priv);
1080 if (rc) {
1081 spin_unlock_irqrestore(&priv->lock, flags);
1082 return rc;
1083 }
1084
1085 if (!pwr_max) {
1086 u32 val;
1087
1088 rc = pci_read_config_dword(priv->pci_dev,
1089 PCI_POWER_SOURCE, &val);
1090 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
1091 iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1092 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
1093 ~APMG_PS_CTRL_MSK_PWR_SRC);
1094 iwl3945_release_nic_access(priv);
1095
1096 iwl3945_poll_bit(priv, CSR_GPIO_IN,
1097 CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
1098 CSR_GPIO_IN_BIT_AUX_POWER, 5000);
1099 } else
1100 iwl3945_release_nic_access(priv);
1101 } else {
1102 iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1103 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
1104 ~APMG_PS_CTRL_MSK_PWR_SRC);
1105
1106 iwl3945_release_nic_access(priv);
1107 iwl3945_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
1108 CSR_GPIO_IN_BIT_AUX_POWER, 5000); /* uS */
1109 }
1110 spin_unlock_irqrestore(&priv->lock, flags);
1111
1112 return rc;
1113 }
1114
1115 static int iwl3945_rx_init(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
1116 {
1117 int rc;
1118 unsigned long flags;
1119
1120 spin_lock_irqsave(&priv->lock, flags);
1121 rc = iwl3945_grab_nic_access(priv);
1122 if (rc) {
1123 spin_unlock_irqrestore(&priv->lock, flags);
1124 return rc;
1125 }
1126
1127 iwl3945_write_direct32(priv, FH_RCSR_RBD_BASE(0), rxq->dma_addr);
1128 iwl3945_write_direct32(priv, FH_RCSR_RPTR_ADDR(0),
1129 priv->hw_setting.shared_phys +
1130 offsetof(struct iwl3945_shared, rx_read_ptr[0]));
1131 iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), 0);
1132 iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0),
1133 ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
1134 ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
1135 ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
1136 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
1137 (RX_QUEUE_SIZE_LOG << ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
1138 ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
1139 (1 << ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
1140 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
1141
1142 /* fake read to flush all prev I/O */
1143 iwl3945_read_direct32(priv, FH_RSSR_CTRL);
1144
1145 iwl3945_release_nic_access(priv);
1146 spin_unlock_irqrestore(&priv->lock, flags);
1147
1148 return 0;
1149 }
1150
1151 static int iwl3945_tx_reset(struct iwl3945_priv *priv)
1152 {
1153 int rc;
1154 unsigned long flags;
1155
1156 spin_lock_irqsave(&priv->lock, flags);
1157 rc = iwl3945_grab_nic_access(priv);
1158 if (rc) {
1159 spin_unlock_irqrestore(&priv->lock, flags);
1160 return rc;
1161 }
1162
1163 /* bypass mode */
1164 iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0x2);
1165
1166 /* RA 0 is active */
1167 iwl3945_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01);
1168
1169 /* all 6 fifo are active */
1170 iwl3945_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f);
1171
1172 iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
1173 iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
1174 iwl3945_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004);
1175 iwl3945_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005);
1176
1177 iwl3945_write_direct32(priv, FH_TSSR_CBB_BASE,
1178 priv->hw_setting.shared_phys);
1179
1180 iwl3945_write_direct32(priv, FH_TSSR_MSG_CONFIG,
1181 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
1182 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
1183 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
1184 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
1185 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
1186 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
1187 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
1188
1189 iwl3945_release_nic_access(priv);
1190 spin_unlock_irqrestore(&priv->lock, flags);
1191
1192 return 0;
1193 }
1194
1195 /**
1196 * iwl3945_txq_ctx_reset - Reset TX queue context
1197 *
1198 * Destroys all DMA structures and initialize them again
1199 */
1200 static int iwl3945_txq_ctx_reset(struct iwl3945_priv *priv)
1201 {
1202 int rc;
1203 int txq_id, slots_num;
1204
1205 iwl3945_hw_txq_ctx_free(priv);
1206
1207 /* Tx CMD queue */
1208 rc = iwl3945_tx_reset(priv);
1209 if (rc)
1210 goto error;
1211
1212 /* Tx queue(s) */
1213 for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
1214 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
1215 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
1216 rc = iwl3945_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
1217 txq_id);
1218 if (rc) {
1219 IWL_ERROR("Tx %d queue init failed\n", txq_id);
1220 goto error;
1221 }
1222 }
1223
1224 return rc;
1225
1226 error:
1227 iwl3945_hw_txq_ctx_free(priv);
1228 return rc;
1229 }
1230
1231 int iwl3945_hw_nic_init(struct iwl3945_priv *priv)
1232 {
1233 u8 rev_id;
1234 int rc;
1235 unsigned long flags;
1236 struct iwl3945_rx_queue *rxq = &priv->rxq;
1237
1238 iwl3945_power_init_handle(priv);
1239
1240 spin_lock_irqsave(&priv->lock, flags);
1241 iwl3945_set_bit(priv, CSR_ANA_PLL_CFG, CSR39_ANA_PLL_CFG_VAL);
1242 iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1243 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1244
1245 iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1246 rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1247 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1248 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1249 if (rc < 0) {
1250 spin_unlock_irqrestore(&priv->lock, flags);
1251 IWL_DEBUG_INFO("Failed to init the card\n");
1252 return rc;
1253 }
1254
1255 rc = iwl3945_grab_nic_access(priv);
1256 if (rc) {
1257 spin_unlock_irqrestore(&priv->lock, flags);
1258 return rc;
1259 }
1260 iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1261 APMG_CLK_VAL_DMA_CLK_RQT |
1262 APMG_CLK_VAL_BSM_CLK_RQT);
1263 udelay(20);
1264 iwl3945_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1265 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1266 iwl3945_release_nic_access(priv);
1267 spin_unlock_irqrestore(&priv->lock, flags);
1268
1269 /* Determine HW type */
1270 rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
1271 if (rc)
1272 return rc;
1273 IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
1274
1275 iwl3945_nic_set_pwr_src(priv, 1);
1276 spin_lock_irqsave(&priv->lock, flags);
1277
1278 if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
1279 IWL_DEBUG_INFO("RTP type \n");
1280 else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
1281 IWL_DEBUG_INFO("3945 RADIO-MB type\n");
1282 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1283 CSR39_HW_IF_CONFIG_REG_BIT_3945_MB);
1284 } else {
1285 IWL_DEBUG_INFO("3945 RADIO-MM type\n");
1286 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1287 CSR39_HW_IF_CONFIG_REG_BIT_3945_MM);
1288 }
1289
1290 if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) {
1291 IWL_DEBUG_INFO("SKU OP mode is mrc\n");
1292 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1293 CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC);
1294 } else
1295 IWL_DEBUG_INFO("SKU OP mode is basic\n");
1296
1297 if ((priv->eeprom.board_revision & 0xF0) == 0xD0) {
1298 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1299 priv->eeprom.board_revision);
1300 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1301 CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1302 } else {
1303 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1304 priv->eeprom.board_revision);
1305 iwl3945_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
1306 CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1307 }
1308
1309 if (priv->eeprom.almgor_m_version <= 1) {
1310 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1311 CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
1312 IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
1313 priv->eeprom.almgor_m_version);
1314 } else {
1315 IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
1316 priv->eeprom.almgor_m_version);
1317 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1318 CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
1319 }
1320 spin_unlock_irqrestore(&priv->lock, flags);
1321
1322 if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
1323 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
1324
1325 if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
1326 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
1327
1328 /* Allocate the RX queue, or reset if it is already allocated */
1329 if (!rxq->bd) {
1330 rc = iwl3945_rx_queue_alloc(priv);
1331 if (rc) {
1332 IWL_ERROR("Unable to initialize Rx queue\n");
1333 return -ENOMEM;
1334 }
1335 } else
1336 iwl3945_rx_queue_reset(priv, rxq);
1337
1338 iwl3945_rx_replenish(priv);
1339
1340 iwl3945_rx_init(priv, rxq);
1341
1342 spin_lock_irqsave(&priv->lock, flags);
1343
1344 /* Look at using this instead:
1345 rxq->need_update = 1;
1346 iwl3945_rx_queue_update_write_ptr(priv, rxq);
1347 */
1348
1349 rc = iwl3945_grab_nic_access(priv);
1350 if (rc) {
1351 spin_unlock_irqrestore(&priv->lock, flags);
1352 return rc;
1353 }
1354 iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), rxq->write & ~7);
1355 iwl3945_release_nic_access(priv);
1356
1357 spin_unlock_irqrestore(&priv->lock, flags);
1358
1359 rc = iwl3945_txq_ctx_reset(priv);
1360 if (rc)
1361 return rc;
1362
1363 set_bit(STATUS_INIT, &priv->status);
1364
1365 return 0;
1366 }
1367
1368 /**
1369 * iwl3945_hw_txq_ctx_free - Free TXQ Context
1370 *
1371 * Destroy all TX DMA queues and structures
1372 */
1373 void iwl3945_hw_txq_ctx_free(struct iwl3945_priv *priv)
1374 {
1375 int txq_id;
1376
1377 /* Tx queues */
1378 for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
1379 iwl3945_tx_queue_free(priv, &priv->txq[txq_id]);
1380 }
1381
1382 void iwl3945_hw_txq_ctx_stop(struct iwl3945_priv *priv)
1383 {
1384 int queue;
1385 unsigned long flags;
1386
1387 spin_lock_irqsave(&priv->lock, flags);
1388 if (iwl3945_grab_nic_access(priv)) {
1389 spin_unlock_irqrestore(&priv->lock, flags);
1390 iwl3945_hw_txq_ctx_free(priv);
1391 return;
1392 }
1393
1394 /* stop SCD */
1395 iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0);
1396
1397 /* reset TFD queues */
1398 for (queue = TFD_QUEUE_MIN; queue < TFD_QUEUE_MAX; queue++) {
1399 iwl3945_write_direct32(priv, FH_TCSR_CONFIG(queue), 0x0);
1400 iwl3945_poll_direct_bit(priv, FH_TSSR_TX_STATUS,
1401 ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(queue),
1402 1000);
1403 }
1404
1405 iwl3945_release_nic_access(priv);
1406 spin_unlock_irqrestore(&priv->lock, flags);
1407
1408 iwl3945_hw_txq_ctx_free(priv);
1409 }
1410
1411 int iwl3945_hw_nic_stop_master(struct iwl3945_priv *priv)
1412 {
1413 int rc = 0;
1414 u32 reg_val;
1415 unsigned long flags;
1416
1417 spin_lock_irqsave(&priv->lock, flags);
1418
1419 /* set stop master bit */
1420 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1421
1422 reg_val = iwl3945_read32(priv, CSR_GP_CNTRL);
1423
1424 if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
1425 (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
1426 IWL_DEBUG_INFO("Card in power save, master is already "
1427 "stopped\n");
1428 else {
1429 rc = iwl3945_poll_bit(priv, CSR_RESET,
1430 CSR_RESET_REG_FLAG_MASTER_DISABLED,
1431 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1432 if (rc < 0) {
1433 spin_unlock_irqrestore(&priv->lock, flags);
1434 return rc;
1435 }
1436 }
1437
1438 spin_unlock_irqrestore(&priv->lock, flags);
1439 IWL_DEBUG_INFO("stop master\n");
1440
1441 return rc;
1442 }
1443
1444 int iwl3945_hw_nic_reset(struct iwl3945_priv *priv)
1445 {
1446 int rc;
1447 unsigned long flags;
1448
1449 iwl3945_hw_nic_stop_master(priv);
1450
1451 spin_lock_irqsave(&priv->lock, flags);
1452
1453 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1454
1455 rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1456 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1457 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1458
1459 rc = iwl3945_grab_nic_access(priv);
1460 if (!rc) {
1461 iwl3945_write_prph(priv, APMG_CLK_CTRL_REG,
1462 APMG_CLK_VAL_BSM_CLK_RQT);
1463
1464 udelay(10);
1465
1466 iwl3945_set_bit(priv, CSR_GP_CNTRL,
1467 CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1468
1469 iwl3945_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1470 iwl3945_write_prph(priv, APMG_RTC_INT_STT_REG,
1471 0xFFFFFFFF);
1472
1473 /* enable DMA */
1474 iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1475 APMG_CLK_VAL_DMA_CLK_RQT |
1476 APMG_CLK_VAL_BSM_CLK_RQT);
1477 udelay(10);
1478
1479 iwl3945_set_bits_prph(priv, APMG_PS_CTRL_REG,
1480 APMG_PS_CTRL_VAL_RESET_REQ);
1481 udelay(5);
1482 iwl3945_clear_bits_prph(priv, APMG_PS_CTRL_REG,
1483 APMG_PS_CTRL_VAL_RESET_REQ);
1484 iwl3945_release_nic_access(priv);
1485 }
1486
1487 /* Clear the 'host command active' bit... */
1488 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1489
1490 wake_up_interruptible(&priv->wait_command_queue);
1491 spin_unlock_irqrestore(&priv->lock, flags);
1492
1493 return rc;
1494 }
1495
1496 /**
1497 * iwl3945_hw_reg_adjust_power_by_temp
1498 * return index delta into power gain settings table
1499 */
1500 static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1501 {
1502 return (new_reading - old_reading) * (-11) / 100;
1503 }
1504
1505 /**
1506 * iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1507 */
1508 static inline int iwl3945_hw_reg_temp_out_of_range(int temperature)
1509 {
1510 return ((temperature < -260) || (temperature > 25)) ? 1 : 0;
1511 }
1512
1513 int iwl3945_hw_get_temperature(struct iwl3945_priv *priv)
1514 {
1515 return iwl3945_read32(priv, CSR_UCODE_DRV_GP2);
1516 }
1517
1518 /**
1519 * iwl3945_hw_reg_txpower_get_temperature
1520 * get the current temperature by reading from NIC
1521 */
1522 static int iwl3945_hw_reg_txpower_get_temperature(struct iwl3945_priv *priv)
1523 {
1524 int temperature;
1525
1526 temperature = iwl3945_hw_get_temperature(priv);
1527
1528 /* driver's okay range is -260 to +25.
1529 * human readable okay range is 0 to +285 */
1530 IWL_DEBUG_INFO("Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1531
1532 /* handle insane temp reading */
1533 if (iwl3945_hw_reg_temp_out_of_range(temperature)) {
1534 IWL_ERROR("Error bad temperature value %d\n", temperature);
1535
1536 /* if really really hot(?),
1537 * substitute the 3rd band/group's temp measured at factory */
1538 if (priv->last_temperature > 100)
1539 temperature = priv->eeprom.groups[2].temperature;
1540 else /* else use most recent "sane" value from driver */
1541 temperature = priv->last_temperature;
1542 }
1543
1544 return temperature; /* raw, not "human readable" */
1545 }
1546
1547 /* Adjust Txpower only if temperature variance is greater than threshold.
1548 *
1549 * Both are lower than older versions' 9 degrees */
1550 #define IWL_TEMPERATURE_LIMIT_TIMER 6
1551
1552 /**
1553 * is_temp_calib_needed - determines if new calibration is needed
1554 *
1555 * records new temperature in tx_mgr->temperature.
1556 * replaces tx_mgr->last_temperature *only* if calib needed
1557 * (assumes caller will actually do the calibration!). */
1558 static int is_temp_calib_needed(struct iwl3945_priv *priv)
1559 {
1560 int temp_diff;
1561
1562 priv->temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
1563 temp_diff = priv->temperature - priv->last_temperature;
1564
1565 /* get absolute value */
1566 if (temp_diff < 0) {
1567 IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff);
1568 temp_diff = -temp_diff;
1569 } else if (temp_diff == 0)
1570 IWL_DEBUG_POWER("Same temp,\n");
1571 else
1572 IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff);
1573
1574 /* if we don't need calibration, *don't* update last_temperature */
1575 if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1576 IWL_DEBUG_POWER("Timed thermal calib not needed\n");
1577 return 0;
1578 }
1579
1580 IWL_DEBUG_POWER("Timed thermal calib needed\n");
1581
1582 /* assume that caller will actually do calib ...
1583 * update the "last temperature" value */
1584 priv->last_temperature = priv->temperature;
1585 return 1;
1586 }
1587
1588 #define IWL_MAX_GAIN_ENTRIES 78
1589 #define IWL_CCK_FROM_OFDM_POWER_DIFF -5
1590 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1591
1592 /* radio and DSP power table, each step is 1/2 dB.
1593 * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1594 static struct iwl3945_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1595 {
1596 {251, 127}, /* 2.4 GHz, highest power */
1597 {251, 127},
1598 {251, 127},
1599 {251, 127},
1600 {251, 125},
1601 {251, 110},
1602 {251, 105},
1603 {251, 98},
1604 {187, 125},
1605 {187, 115},
1606 {187, 108},
1607 {187, 99},
1608 {243, 119},
1609 {243, 111},
1610 {243, 105},
1611 {243, 97},
1612 {243, 92},
1613 {211, 106},
1614 {211, 100},
1615 {179, 120},
1616 {179, 113},
1617 {179, 107},
1618 {147, 125},
1619 {147, 119},
1620 {147, 112},
1621 {147, 106},
1622 {147, 101},
1623 {147, 97},
1624 {147, 91},
1625 {115, 107},
1626 {235, 121},
1627 {235, 115},
1628 {235, 109},
1629 {203, 127},
1630 {203, 121},
1631 {203, 115},
1632 {203, 108},
1633 {203, 102},
1634 {203, 96},
1635 {203, 92},
1636 {171, 110},
1637 {171, 104},
1638 {171, 98},
1639 {139, 116},
1640 {227, 125},
1641 {227, 119},
1642 {227, 113},
1643 {227, 107},
1644 {227, 101},
1645 {227, 96},
1646 {195, 113},
1647 {195, 106},
1648 {195, 102},
1649 {195, 95},
1650 {163, 113},
1651 {163, 106},
1652 {163, 102},
1653 {163, 95},
1654 {131, 113},
1655 {131, 106},
1656 {131, 102},
1657 {131, 95},
1658 {99, 113},
1659 {99, 106},
1660 {99, 102},
1661 {99, 95},
1662 {67, 113},
1663 {67, 106},
1664 {67, 102},
1665 {67, 95},
1666 {35, 113},
1667 {35, 106},
1668 {35, 102},
1669 {35, 95},
1670 {3, 113},
1671 {3, 106},
1672 {3, 102},
1673 {3, 95} }, /* 2.4 GHz, lowest power */
1674 {
1675 {251, 127}, /* 5.x GHz, highest power */
1676 {251, 120},
1677 {251, 114},
1678 {219, 119},
1679 {219, 101},
1680 {187, 113},
1681 {187, 102},
1682 {155, 114},
1683 {155, 103},
1684 {123, 117},
1685 {123, 107},
1686 {123, 99},
1687 {123, 92},
1688 {91, 108},
1689 {59, 125},
1690 {59, 118},
1691 {59, 109},
1692 {59, 102},
1693 {59, 96},
1694 {59, 90},
1695 {27, 104},
1696 {27, 98},
1697 {27, 92},
1698 {115, 118},
1699 {115, 111},
1700 {115, 104},
1701 {83, 126},
1702 {83, 121},
1703 {83, 113},
1704 {83, 105},
1705 {83, 99},
1706 {51, 118},
1707 {51, 111},
1708 {51, 104},
1709 {51, 98},
1710 {19, 116},
1711 {19, 109},
1712 {19, 102},
1713 {19, 98},
1714 {19, 93},
1715 {171, 113},
1716 {171, 107},
1717 {171, 99},
1718 {139, 120},
1719 {139, 113},
1720 {139, 107},
1721 {139, 99},
1722 {107, 120},
1723 {107, 113},
1724 {107, 107},
1725 {107, 99},
1726 {75, 120},
1727 {75, 113},
1728 {75, 107},
1729 {75, 99},
1730 {43, 120},
1731 {43, 113},
1732 {43, 107},
1733 {43, 99},
1734 {11, 120},
1735 {11, 113},
1736 {11, 107},
1737 {11, 99},
1738 {131, 107},
1739 {131, 99},
1740 {99, 120},
1741 {99, 113},
1742 {99, 107},
1743 {99, 99},
1744 {67, 120},
1745 {67, 113},
1746 {67, 107},
1747 {67, 99},
1748 {35, 120},
1749 {35, 113},
1750 {35, 107},
1751 {35, 99},
1752 {3, 120} } /* 5.x GHz, lowest power */
1753 };
1754
1755 static inline u8 iwl3945_hw_reg_fix_power_index(int index)
1756 {
1757 if (index < 0)
1758 return 0;
1759 if (index >= IWL_MAX_GAIN_ENTRIES)
1760 return IWL_MAX_GAIN_ENTRIES - 1;
1761 return (u8) index;
1762 }
1763
1764 /* Kick off thermal recalibration check every 60 seconds */
1765 #define REG_RECALIB_PERIOD (60)
1766
1767 /**
1768 * iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1769 *
1770 * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1771 * or 6 Mbit (OFDM) rates.
1772 */
1773 static void iwl3945_hw_reg_set_scan_power(struct iwl3945_priv *priv, u32 scan_tbl_index,
1774 s32 rate_index, const s8 *clip_pwrs,
1775 struct iwl3945_channel_info *ch_info,
1776 int band_index)
1777 {
1778 struct iwl3945_scan_power_info *scan_power_info;
1779 s8 power;
1780 u8 power_index;
1781
1782 scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1783
1784 /* use this channel group's 6Mbit clipping/saturation pwr,
1785 * but cap at regulatory scan power restriction (set during init
1786 * based on eeprom channel data) for this channel. */
1787 power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX_TABLE]);
1788
1789 /* further limit to user's max power preference.
1790 * FIXME: Other spectrum management power limitations do not
1791 * seem to apply?? */
1792 power = min(power, priv->user_txpower_limit);
1793 scan_power_info->requested_power = power;
1794
1795 /* find difference between new scan *power* and current "normal"
1796 * Tx *power* for 6Mb. Use this difference (x2) to adjust the
1797 * current "normal" temperature-compensated Tx power *index* for
1798 * this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1799 * *index*. */
1800 power_index = ch_info->power_info[rate_index].power_table_index
1801 - (power - ch_info->power_info
1802 [IWL_RATE_6M_INDEX_TABLE].requested_power) * 2;
1803
1804 /* store reference index that we use when adjusting *all* scan
1805 * powers. So we can accommodate user (all channel) or spectrum
1806 * management (single channel) power changes "between" temperature
1807 * feedback compensation procedures.
1808 * don't force fit this reference index into gain table; it may be a
1809 * negative number. This will help avoid errors when we're at
1810 * the lower bounds (highest gains, for warmest temperatures)
1811 * of the table. */
1812
1813 /* don't exceed table bounds for "real" setting */
1814 power_index = iwl3945_hw_reg_fix_power_index(power_index);
1815
1816 scan_power_info->power_table_index = power_index;
1817 scan_power_info->tpc.tx_gain =
1818 power_gain_table[band_index][power_index].tx_gain;
1819 scan_power_info->tpc.dsp_atten =
1820 power_gain_table[band_index][power_index].dsp_atten;
1821 }
1822
1823 /**
1824 * iwl3945_hw_reg_send_txpower - fill in Tx Power command with gain settings
1825 *
1826 * Configures power settings for all rates for the current channel,
1827 * using values from channel info struct, and send to NIC
1828 */
1829 int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv)
1830 {
1831 int rate_idx, i;
1832 const struct iwl3945_channel_info *ch_info = NULL;
1833 struct iwl3945_txpowertable_cmd txpower = {
1834 .channel = priv->active_rxon.channel,
1835 };
1836
1837 txpower.band = (priv->band == IEEE80211_BAND_5GHZ) ? 0 : 1;
1838 ch_info = iwl3945_get_channel_info(priv,
1839 priv->band,
1840 le16_to_cpu(priv->active_rxon.channel));
1841 if (!ch_info) {
1842 IWL_ERROR
1843 ("Failed to get channel info for channel %d [%d]\n",
1844 le16_to_cpu(priv->active_rxon.channel), priv->band);
1845 return -EINVAL;
1846 }
1847
1848 if (!is_channel_valid(ch_info)) {
1849 IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
1850 "non-Tx channel.\n");
1851 return 0;
1852 }
1853
1854 /* fill cmd with power settings for all rates for current channel */
1855 /* Fill OFDM rate */
1856 for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0;
1857 rate_idx <= IWL_LAST_OFDM_RATE; rate_idx++, i++) {
1858
1859 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1860 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1861
1862 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1863 le16_to_cpu(txpower.channel),
1864 txpower.band,
1865 txpower.power[i].tpc.tx_gain,
1866 txpower.power[i].tpc.dsp_atten,
1867 txpower.power[i].rate);
1868 }
1869 /* Fill CCK rates */
1870 for (rate_idx = IWL_FIRST_CCK_RATE;
1871 rate_idx <= IWL_LAST_CCK_RATE; rate_idx++, i++) {
1872 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1873 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1874
1875 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1876 le16_to_cpu(txpower.channel),
1877 txpower.band,
1878 txpower.power[i].tpc.tx_gain,
1879 txpower.power[i].tpc.dsp_atten,
1880 txpower.power[i].rate);
1881 }
1882
1883 return iwl3945_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1884 sizeof(struct iwl3945_txpowertable_cmd), &txpower);
1885
1886 }
1887
1888 /**
1889 * iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1890 * @ch_info: Channel to update. Uses power_info.requested_power.
1891 *
1892 * Replace requested_power and base_power_index ch_info fields for
1893 * one channel.
1894 *
1895 * Called if user or spectrum management changes power preferences.
1896 * Takes into account h/w and modulation limitations (clip power).
1897 *
1898 * This does *not* send anything to NIC, just sets up ch_info for one channel.
1899 *
1900 * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1901 * properly fill out the scan powers, and actual h/w gain settings,
1902 * and send changes to NIC
1903 */
1904 static int iwl3945_hw_reg_set_new_power(struct iwl3945_priv *priv,
1905 struct iwl3945_channel_info *ch_info)
1906 {
1907 struct iwl3945_channel_power_info *power_info;
1908 int power_changed = 0;
1909 int i;
1910 const s8 *clip_pwrs;
1911 int power;
1912
1913 /* Get this chnlgrp's rate-to-max/clip-powers table */
1914 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1915
1916 /* Get this channel's rate-to-current-power settings table */
1917 power_info = ch_info->power_info;
1918
1919 /* update OFDM Txpower settings */
1920 for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE;
1921 i++, ++power_info) {
1922 int delta_idx;
1923
1924 /* limit new power to be no more than h/w capability */
1925 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1926 if (power == power_info->requested_power)
1927 continue;
1928
1929 /* find difference between old and new requested powers,
1930 * update base (non-temp-compensated) power index */
1931 delta_idx = (power - power_info->requested_power) * 2;
1932 power_info->base_power_index -= delta_idx;
1933
1934 /* save new requested power value */
1935 power_info->requested_power = power;
1936
1937 power_changed = 1;
1938 }
1939
1940 /* update CCK Txpower settings, based on OFDM 12M setting ...
1941 * ... all CCK power settings for a given channel are the *same*. */
1942 if (power_changed) {
1943 power =
1944 ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1945 requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1946
1947 /* do all CCK rates' iwl3945_channel_power_info structures */
1948 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++) {
1949 power_info->requested_power = power;
1950 power_info->base_power_index =
1951 ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1952 base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1953 ++power_info;
1954 }
1955 }
1956
1957 return 0;
1958 }
1959
1960 /**
1961 * iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1962 *
1963 * NOTE: Returned power limit may be less (but not more) than requested,
1964 * based strictly on regulatory (eeprom and spectrum mgt) limitations
1965 * (no consideration for h/w clipping limitations).
1966 */
1967 static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl3945_channel_info *ch_info)
1968 {
1969 s8 max_power;
1970
1971 #if 0
1972 /* if we're using TGd limits, use lower of TGd or EEPROM */
1973 if (ch_info->tgd_data.max_power != 0)
1974 max_power = min(ch_info->tgd_data.max_power,
1975 ch_info->eeprom.max_power_avg);
1976
1977 /* else just use EEPROM limits */
1978 else
1979 #endif
1980 max_power = ch_info->eeprom.max_power_avg;
1981
1982 return min(max_power, ch_info->max_power_avg);
1983 }
1984
1985 /**
1986 * iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1987 *
1988 * Compensate txpower settings of *all* channels for temperature.
1989 * This only accounts for the difference between current temperature
1990 * and the factory calibration temperatures, and bases the new settings
1991 * on the channel's base_power_index.
1992 *
1993 * If RxOn is "associated", this sends the new Txpower to NIC!
1994 */
1995 static int iwl3945_hw_reg_comp_txpower_temp(struct iwl3945_priv *priv)
1996 {
1997 struct iwl3945_channel_info *ch_info = NULL;
1998 int delta_index;
1999 const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
2000 u8 a_band;
2001 u8 rate_index;
2002 u8 scan_tbl_index;
2003 u8 i;
2004 int ref_temp;
2005 int temperature = priv->temperature;
2006
2007 /* set up new Tx power info for each and every channel, 2.4 and 5.x */
2008 for (i = 0; i < priv->channel_count; i++) {
2009 ch_info = &priv->channel_info[i];
2010 a_band = is_channel_a_band(ch_info);
2011
2012 /* Get this chnlgrp's factory calibration temperature */
2013 ref_temp = (s16)priv->eeprom.groups[ch_info->group_index].
2014 temperature;
2015
2016 /* get power index adjustment based on curr and factory
2017 * temps */
2018 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2019 ref_temp);
2020
2021 /* set tx power value for all rates, OFDM and CCK */
2022 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
2023 rate_index++) {
2024 int power_idx =
2025 ch_info->power_info[rate_index].base_power_index;
2026
2027 /* temperature compensate */
2028 power_idx += delta_index;
2029
2030 /* stay within table range */
2031 power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2032 ch_info->power_info[rate_index].
2033 power_table_index = (u8) power_idx;
2034 ch_info->power_info[rate_index].tpc =
2035 power_gain_table[a_band][power_idx];
2036 }
2037
2038 /* Get this chnlgrp's rate-to-max/clip-powers table */
2039 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
2040
2041 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2042 for (scan_tbl_index = 0;
2043 scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2044 s32 actual_index = (scan_tbl_index == 0) ?
2045 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2046 iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2047 actual_index, clip_pwrs,
2048 ch_info, a_band);
2049 }
2050 }
2051
2052 /* send Txpower command for current channel to ucode */
2053 return iwl3945_hw_reg_send_txpower(priv);
2054 }
2055
2056 int iwl3945_hw_reg_set_txpower(struct iwl3945_priv *priv, s8 power)
2057 {
2058 struct iwl3945_channel_info *ch_info;
2059 s8 max_power;
2060 u8 a_band;
2061 u8 i;
2062
2063 if (priv->user_txpower_limit == power) {
2064 IWL_DEBUG_POWER("Requested Tx power same as current "
2065 "limit: %ddBm.\n", power);
2066 return 0;
2067 }
2068
2069 IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power);
2070 priv->user_txpower_limit = power;
2071
2072 /* set up new Tx powers for each and every channel, 2.4 and 5.x */
2073
2074 for (i = 0; i < priv->channel_count; i++) {
2075 ch_info = &priv->channel_info[i];
2076 a_band = is_channel_a_band(ch_info);
2077
2078 /* find minimum power of all user and regulatory constraints
2079 * (does not consider h/w clipping limitations) */
2080 max_power = iwl3945_hw_reg_get_ch_txpower_limit(ch_info);
2081 max_power = min(power, max_power);
2082 if (max_power != ch_info->curr_txpow) {
2083 ch_info->curr_txpow = max_power;
2084
2085 /* this considers the h/w clipping limitations */
2086 iwl3945_hw_reg_set_new_power(priv, ch_info);
2087 }
2088 }
2089
2090 /* update txpower settings for all channels,
2091 * send to NIC if associated. */
2092 is_temp_calib_needed(priv);
2093 iwl3945_hw_reg_comp_txpower_temp(priv);
2094
2095 return 0;
2096 }
2097
2098 /* will add 3945 channel switch cmd handling later */
2099 int iwl3945_hw_channel_switch(struct iwl3945_priv *priv, u16 channel)
2100 {
2101 return 0;
2102 }
2103
2104 /**
2105 * iwl3945_reg_txpower_periodic - called when time to check our temperature.
2106 *
2107 * -- reset periodic timer
2108 * -- see if temp has changed enough to warrant re-calibration ... if so:
2109 * -- correct coeffs for temp (can reset temp timer)
2110 * -- save this temp as "last",
2111 * -- send new set of gain settings to NIC
2112 * NOTE: This should continue working, even when we're not associated,
2113 * so we can keep our internal table of scan powers current. */
2114 void iwl3945_reg_txpower_periodic(struct iwl3945_priv *priv)
2115 {
2116 /* This will kick in the "brute force"
2117 * iwl3945_hw_reg_comp_txpower_temp() below */
2118 if (!is_temp_calib_needed(priv))
2119 goto reschedule;
2120
2121 /* Set up a new set of temp-adjusted TxPowers, send to NIC.
2122 * This is based *only* on current temperature,
2123 * ignoring any previous power measurements */
2124 iwl3945_hw_reg_comp_txpower_temp(priv);
2125
2126 reschedule:
2127 queue_delayed_work(priv->workqueue,
2128 &priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
2129 }
2130
2131 static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
2132 {
2133 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv,
2134 thermal_periodic.work);
2135
2136 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2137 return;
2138
2139 mutex_lock(&priv->mutex);
2140 iwl3945_reg_txpower_periodic(priv);
2141 mutex_unlock(&priv->mutex);
2142 }
2143
2144 /**
2145 * iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
2146 * for the channel.
2147 *
2148 * This function is used when initializing channel-info structs.
2149 *
2150 * NOTE: These channel groups do *NOT* match the bands above!
2151 * These channel groups are based on factory-tested channels;
2152 * on A-band, EEPROM's "group frequency" entries represent the top
2153 * channel in each group 1-4. Group 5 All B/G channels are in group 0.
2154 */
2155 static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl3945_priv *priv,
2156 const struct iwl3945_channel_info *ch_info)
2157 {
2158 struct iwl3945_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0];
2159 u8 group;
2160 u16 group_index = 0; /* based on factory calib frequencies */
2161 u8 grp_channel;
2162
2163 /* Find the group index for the channel ... don't use index 1(?) */
2164 if (is_channel_a_band(ch_info)) {
2165 for (group = 1; group < 5; group++) {
2166 grp_channel = ch_grp[group].group_channel;
2167 if (ch_info->channel <= grp_channel) {
2168 group_index = group;
2169 break;
2170 }
2171 }
2172 /* group 4 has a few channels *above* its factory cal freq */
2173 if (group == 5)
2174 group_index = 4;
2175 } else
2176 group_index = 0; /* 2.4 GHz, group 0 */
2177
2178 IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
2179 group_index);
2180 return group_index;
2181 }
2182
2183 /**
2184 * iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
2185 *
2186 * Interpolate to get nominal (i.e. at factory calibration temperature) index
2187 * into radio/DSP gain settings table for requested power.
2188 */
2189 static int iwl3945_hw_reg_get_matched_power_index(struct iwl3945_priv *priv,
2190 s8 requested_power,
2191 s32 setting_index, s32 *new_index)
2192 {
2193 const struct iwl3945_eeprom_txpower_group *chnl_grp = NULL;
2194 s32 index0, index1;
2195 s32 power = 2 * requested_power;
2196 s32 i;
2197 const struct iwl3945_eeprom_txpower_sample *samples;
2198 s32 gains0, gains1;
2199 s32 res;
2200 s32 denominator;
2201
2202 chnl_grp = &priv->eeprom.groups[setting_index];
2203 samples = chnl_grp->samples;
2204 for (i = 0; i < 5; i++) {
2205 if (power == samples[i].power) {
2206 *new_index = samples[i].gain_index;
2207 return 0;
2208 }
2209 }
2210
2211 if (power > samples[1].power) {
2212 index0 = 0;
2213 index1 = 1;
2214 } else if (power > samples[2].power) {
2215 index0 = 1;
2216 index1 = 2;
2217 } else if (power > samples[3].power) {
2218 index0 = 2;
2219 index1 = 3;
2220 } else {
2221 index0 = 3;
2222 index1 = 4;
2223 }
2224
2225 denominator = (s32) samples[index1].power - (s32) samples[index0].power;
2226 if (denominator == 0)
2227 return -EINVAL;
2228 gains0 = (s32) samples[index0].gain_index * (1 << 19);
2229 gains1 = (s32) samples[index1].gain_index * (1 << 19);
2230 res = gains0 + (gains1 - gains0) *
2231 ((s32) power - (s32) samples[index0].power) / denominator +
2232 (1 << 18);
2233 *new_index = res >> 19;
2234 return 0;
2235 }
2236
2237 static void iwl3945_hw_reg_init_channel_groups(struct iwl3945_priv *priv)
2238 {
2239 u32 i;
2240 s32 rate_index;
2241 const struct iwl3945_eeprom_txpower_group *group;
2242
2243 IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
2244
2245 for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
2246 s8 *clip_pwrs; /* table of power levels for each rate */
2247 s8 satur_pwr; /* saturation power for each chnl group */
2248 group = &priv->eeprom.groups[i];
2249
2250 /* sanity check on factory saturation power value */
2251 if (group->saturation_power < 40) {
2252 IWL_WARNING("Error: saturation power is %d, "
2253 "less than minimum expected 40\n",
2254 group->saturation_power);
2255 return;
2256 }
2257
2258 /*
2259 * Derive requested power levels for each rate, based on
2260 * hardware capabilities (saturation power for band).
2261 * Basic value is 3dB down from saturation, with further
2262 * power reductions for highest 3 data rates. These
2263 * backoffs provide headroom for high rate modulation
2264 * power peaks, without too much distortion (clipping).
2265 */
2266 /* we'll fill in this array with h/w max power levels */
2267 clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers;
2268
2269 /* divide factory saturation power by 2 to find -3dB level */
2270 satur_pwr = (s8) (group->saturation_power >> 1);
2271
2272 /* fill in channel group's nominal powers for each rate */
2273 for (rate_index = 0;
2274 rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
2275 switch (rate_index) {
2276 case IWL_RATE_36M_INDEX_TABLE:
2277 if (i == 0) /* B/G */
2278 *clip_pwrs = satur_pwr;
2279 else /* A */
2280 *clip_pwrs = satur_pwr - 5;
2281 break;
2282 case IWL_RATE_48M_INDEX_TABLE:
2283 if (i == 0)
2284 *clip_pwrs = satur_pwr - 7;
2285 else
2286 *clip_pwrs = satur_pwr - 10;
2287 break;
2288 case IWL_RATE_54M_INDEX_TABLE:
2289 if (i == 0)
2290 *clip_pwrs = satur_pwr - 9;
2291 else
2292 *clip_pwrs = satur_pwr - 12;
2293 break;
2294 default:
2295 *clip_pwrs = satur_pwr;
2296 break;
2297 }
2298 }
2299 }
2300 }
2301
2302 /**
2303 * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2304 *
2305 * Second pass (during init) to set up priv->channel_info
2306 *
2307 * Set up Tx-power settings in our channel info database for each VALID
2308 * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2309 * and current temperature.
2310 *
2311 * Since this is based on current temperature (at init time), these values may
2312 * not be valid for very long, but it gives us a starting/default point,
2313 * and allows us to active (i.e. using Tx) scan.
2314 *
2315 * This does *not* write values to NIC, just sets up our internal table.
2316 */
2317 int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv)
2318 {
2319 struct iwl3945_channel_info *ch_info = NULL;
2320 struct iwl3945_channel_power_info *pwr_info;
2321 int delta_index;
2322 u8 rate_index;
2323 u8 scan_tbl_index;
2324 const s8 *clip_pwrs; /* array of power levels for each rate */
2325 u8 gain, dsp_atten;
2326 s8 power;
2327 u8 pwr_index, base_pwr_index, a_band;
2328 u8 i;
2329 int temperature;
2330
2331 /* save temperature reference,
2332 * so we can determine next time to calibrate */
2333 temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
2334 priv->last_temperature = temperature;
2335
2336 iwl3945_hw_reg_init_channel_groups(priv);
2337
2338 /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2339 for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
2340 i++, ch_info++) {
2341 a_band = is_channel_a_band(ch_info);
2342 if (!is_channel_valid(ch_info))
2343 continue;
2344
2345 /* find this channel's channel group (*not* "band") index */
2346 ch_info->group_index =
2347 iwl3945_hw_reg_get_ch_grp_index(priv, ch_info);
2348
2349 /* Get this chnlgrp's rate->max/clip-powers table */
2350 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
2351
2352 /* calculate power index *adjustment* value according to
2353 * diff between current temperature and factory temperature */
2354 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2355 priv->eeprom.groups[ch_info->group_index].
2356 temperature);
2357
2358 IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
2359 ch_info->channel, delta_index, temperature +
2360 IWL_TEMP_CONVERT);
2361
2362 /* set tx power value for all OFDM rates */
2363 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
2364 rate_index++) {
2365 s32 power_idx;
2366 int rc;
2367
2368 /* use channel group's clip-power table,
2369 * but don't exceed channel's max power */
2370 s8 pwr = min(ch_info->max_power_avg,
2371 clip_pwrs[rate_index]);
2372
2373 pwr_info = &ch_info->power_info[rate_index];
2374
2375 /* get base (i.e. at factory-measured temperature)
2376 * power table index for this rate's power */
2377 rc = iwl3945_hw_reg_get_matched_power_index(priv, pwr,
2378 ch_info->group_index,
2379 &power_idx);
2380 if (rc) {
2381 IWL_ERROR("Invalid power index\n");
2382 return rc;
2383 }
2384 pwr_info->base_power_index = (u8) power_idx;
2385
2386 /* temperature compensate */
2387 power_idx += delta_index;
2388
2389 /* stay within range of gain table */
2390 power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2391
2392 /* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2393 pwr_info->requested_power = pwr;
2394 pwr_info->power_table_index = (u8) power_idx;
2395 pwr_info->tpc.tx_gain =
2396 power_gain_table[a_band][power_idx].tx_gain;
2397 pwr_info->tpc.dsp_atten =
2398 power_gain_table[a_band][power_idx].dsp_atten;
2399 }
2400
2401 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2402 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX_TABLE];
2403 power = pwr_info->requested_power +
2404 IWL_CCK_FROM_OFDM_POWER_DIFF;
2405 pwr_index = pwr_info->power_table_index +
2406 IWL_CCK_FROM_OFDM_INDEX_DIFF;
2407 base_pwr_index = pwr_info->base_power_index +
2408 IWL_CCK_FROM_OFDM_INDEX_DIFF;
2409
2410 /* stay within table range */
2411 pwr_index = iwl3945_hw_reg_fix_power_index(pwr_index);
2412 gain = power_gain_table[a_band][pwr_index].tx_gain;
2413 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2414
2415 /* fill each CCK rate's iwl3945_channel_power_info structure
2416 * NOTE: All CCK-rate Txpwrs are the same for a given chnl!
2417 * NOTE: CCK rates start at end of OFDM rates! */
2418 for (rate_index = 0;
2419 rate_index < IWL_CCK_RATES; rate_index++) {
2420 pwr_info = &ch_info->power_info[rate_index+IWL_OFDM_RATES];
2421 pwr_info->requested_power = power;
2422 pwr_info->power_table_index = pwr_index;
2423 pwr_info->base_power_index = base_pwr_index;
2424 pwr_info->tpc.tx_gain = gain;
2425 pwr_info->tpc.dsp_atten = dsp_atten;
2426 }
2427
2428 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2429 for (scan_tbl_index = 0;
2430 scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2431 s32 actual_index = (scan_tbl_index == 0) ?
2432 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2433 iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2434 actual_index, clip_pwrs, ch_info, a_band);
2435 }
2436 }
2437
2438 return 0;
2439 }
2440
2441 int iwl3945_hw_rxq_stop(struct iwl3945_priv *priv)
2442 {
2443 int rc;
2444 unsigned long flags;
2445
2446 spin_lock_irqsave(&priv->lock, flags);
2447 rc = iwl3945_grab_nic_access(priv);
2448 if (rc) {
2449 spin_unlock_irqrestore(&priv->lock, flags);
2450 return rc;
2451 }
2452
2453 iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0), 0);
2454 rc = iwl3945_poll_direct_bit(priv, FH_RSSR_STATUS, (1 << 24), 1000);
2455 if (rc < 0)
2456 IWL_ERROR("Can't stop Rx DMA.\n");
2457
2458 iwl3945_release_nic_access(priv);
2459 spin_unlock_irqrestore(&priv->lock, flags);
2460
2461 return 0;
2462 }
2463
2464 int iwl3945_hw_tx_queue_init(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
2465 {
2466 int rc;
2467 unsigned long flags;
2468 int txq_id = txq->q.id;
2469
2470 struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2471
2472 shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2473
2474 spin_lock_irqsave(&priv->lock, flags);
2475 rc = iwl3945_grab_nic_access(priv);
2476 if (rc) {
2477 spin_unlock_irqrestore(&priv->lock, flags);
2478 return rc;
2479 }
2480 iwl3945_write_direct32(priv, FH_CBCC_CTRL(txq_id), 0);
2481 iwl3945_write_direct32(priv, FH_CBCC_BASE(txq_id), 0);
2482
2483 iwl3945_write_direct32(priv, FH_TCSR_CONFIG(txq_id),
2484 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2485 ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2486 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2487 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2488 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2489 iwl3945_release_nic_access(priv);
2490
2491 /* fake read to flush all prev. writes */
2492 iwl3945_read32(priv, FH_TSSR_CBB_BASE);
2493 spin_unlock_irqrestore(&priv->lock, flags);
2494
2495 return 0;
2496 }
2497
2498 int iwl3945_hw_get_rx_read(struct iwl3945_priv *priv)
2499 {
2500 struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2501
2502 return le32_to_cpu(shared_data->rx_read_ptr[0]);
2503 }
2504
2505 /**
2506 * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2507 */
2508 int iwl3945_init_hw_rate_table(struct iwl3945_priv *priv)
2509 {
2510 int rc, i, index, prev_index;
2511 struct iwl3945_rate_scaling_cmd rate_cmd = {
2512 .reserved = {0, 0, 0},
2513 };
2514 struct iwl3945_rate_scaling_info *table = rate_cmd.table;
2515
2516 for (i = 0; i < ARRAY_SIZE(iwl3945_rates); i++) {
2517 index = iwl3945_rates[i].table_rs_index;
2518
2519 table[index].rate_n_flags =
2520 iwl3945_hw_set_rate_n_flags(iwl3945_rates[i].plcp, 0);
2521 table[index].try_cnt = priv->retry_rate;
2522 prev_index = iwl3945_get_prev_ieee_rate(i);
2523 table[index].next_rate_index = iwl3945_rates[prev_index].table_rs_index;
2524 }
2525
2526 switch (priv->band) {
2527 case IEEE80211_BAND_5GHZ:
2528 IWL_DEBUG_RATE("Select A mode rate scale\n");
2529 /* If one of the following CCK rates is used,
2530 * have it fall back to the 6M OFDM rate */
2531 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++)
2532 table[i].next_rate_index = iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2533
2534 /* Don't fall back to CCK rates */
2535 table[IWL_RATE_12M_INDEX_TABLE].next_rate_index = IWL_RATE_9M_INDEX_TABLE;
2536
2537 /* Don't drop out of OFDM rates */
2538 table[IWL_RATE_6M_INDEX_TABLE].next_rate_index =
2539 iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2540 break;
2541
2542 case IEEE80211_BAND_2GHZ:
2543 IWL_DEBUG_RATE("Select B/G mode rate scale\n");
2544 /* If an OFDM rate is used, have it fall back to the
2545 * 1M CCK rates */
2546 for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE; i++)
2547 table[i].next_rate_index = iwl3945_rates[IWL_FIRST_CCK_RATE].table_rs_index;
2548
2549 /* CCK shouldn't fall back to OFDM... */
2550 table[IWL_RATE_11M_INDEX_TABLE].next_rate_index = IWL_RATE_5M_INDEX_TABLE;
2551 break;
2552
2553 default:
2554 WARN_ON(1);
2555 break;
2556 }
2557
2558 /* Update the rate scaling for control frame Tx */
2559 rate_cmd.table_id = 0;
2560 rc = iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2561 &rate_cmd);
2562 if (rc)
2563 return rc;
2564
2565 /* Update the rate scaling for data frame Tx */
2566 rate_cmd.table_id = 1;
2567 return iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2568 &rate_cmd);
2569 }
2570
2571 /* Called when initializing driver */
2572 int iwl3945_hw_set_hw_setting(struct iwl3945_priv *priv)
2573 {
2574 memset((void *)&priv->hw_setting, 0,
2575 sizeof(struct iwl3945_driver_hw_info));
2576
2577 priv->hw_setting.shared_virt =
2578 pci_alloc_consistent(priv->pci_dev,
2579 sizeof(struct iwl3945_shared),
2580 &priv->hw_setting.shared_phys);
2581
2582 if (!priv->hw_setting.shared_virt) {
2583 IWL_ERROR("failed to allocate pci memory\n");
2584 mutex_unlock(&priv->mutex);
2585 return -ENOMEM;
2586 }
2587
2588 priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE;
2589 priv->hw_setting.max_pkt_size = 2342;
2590 priv->hw_setting.tx_cmd_len = sizeof(struct iwl3945_tx_cmd);
2591 priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
2592 priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
2593 priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
2594 priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
2595
2596 priv->hw_setting.tx_ant_num = 2;
2597 return 0;
2598 }
2599
2600 unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv,
2601 struct iwl3945_frame *frame, u8 rate)
2602 {
2603 struct iwl3945_tx_beacon_cmd *tx_beacon_cmd;
2604 unsigned int frame_size;
2605
2606 tx_beacon_cmd = (struct iwl3945_tx_beacon_cmd *)&frame->u;
2607 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2608
2609 tx_beacon_cmd->tx.sta_id = priv->hw_setting.bcast_sta_id;
2610 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2611
2612 frame_size = iwl3945_fill_beacon_frame(priv,
2613 tx_beacon_cmd->frame,
2614 iwl3945_broadcast_addr,
2615 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2616
2617 BUG_ON(frame_size > MAX_MPDU_SIZE);
2618 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2619
2620 tx_beacon_cmd->tx.rate = rate;
2621 tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2622 TX_CMD_FLG_TSF_MSK);
2623
2624 /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2625 tx_beacon_cmd->tx.supp_rates[0] =
2626 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2627
2628 tx_beacon_cmd->tx.supp_rates[1] =
2629 (IWL_CCK_BASIC_RATES_MASK & 0xF);
2630
2631 return sizeof(struct iwl3945_tx_beacon_cmd) + frame_size;
2632 }
2633
2634 void iwl3945_hw_rx_handler_setup(struct iwl3945_priv *priv)
2635 {
2636 priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
2637 priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2638 }
2639
2640 void iwl3945_hw_setup_deferred_work(struct iwl3945_priv *priv)
2641 {
2642 INIT_DELAYED_WORK(&priv->thermal_periodic,
2643 iwl3945_bg_reg_txpower_periodic);
2644 }
2645
2646 void iwl3945_hw_cancel_deferred_work(struct iwl3945_priv *priv)
2647 {
2648 cancel_delayed_work(&priv->thermal_periodic);
2649 }
2650
2651 static struct iwl_3945_cfg iwl3945_bg_cfg = {
2652 .name = "3945BG",
2653 .fw_name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode",
2654 .sku = IWL_SKU_G,
2655 };
2656
2657 static struct iwl_3945_cfg iwl3945_abg_cfg = {
2658 .name = "3945ABG",
2659 .fw_name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode",
2660 .sku = IWL_SKU_A|IWL_SKU_G,
2661 };
2662
2663 struct pci_device_id iwl3945_hw_card_ids[] = {
2664 {IWL_PCI_DEVICE(0x4222, 0x1005, iwl3945_bg_cfg)},
2665 {IWL_PCI_DEVICE(0x4222, 0x1034, iwl3945_bg_cfg)},
2666 {IWL_PCI_DEVICE(0x4222, 0x1044, iwl3945_bg_cfg)},
2667 {IWL_PCI_DEVICE(0x4227, 0x1014, iwl3945_bg_cfg)},
2668 {IWL_PCI_DEVICE(0x4222, PCI_ANY_ID, iwl3945_abg_cfg)},
2669 {IWL_PCI_DEVICE(0x4227, PCI_ANY_ID, iwl3945_abg_cfg)},
2670 {0}
2671 };
2672
2673 MODULE_DEVICE_TABLE(pci, iwl3945_hw_card_ids);
Support for the Chinese Samsung S3C2440 based development boards