x86, smp: remove ->restore_NMI_vector()
[linux-2.6/mini2440.git] / arch / x86 / kernel / genx2apic_cluster.c
blob7c87156b641189e43ba79c435c180297fd3a4b36
1 #include <linux/threads.h>
2 #include <linux/cpumask.h>
3 #include <linux/string.h>
4 #include <linux/kernel.h>
5 #include <linux/ctype.h>
6 #include <linux/init.h>
7 #include <linux/dmar.h>
9 #include <asm/smp.h>
10 #include <asm/ipi.h>
11 #include <asm/genapic.h>
13 DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid);
15 static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
17 if (cpu_has_x2apic)
18 return 1;
20 return 0;
23 /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */
25 static const struct cpumask *x2apic_target_cpus(void)
27 return cpumask_of(0);
31 * for now each logical cpu is in its own vector allocation domain.
33 static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask)
35 cpumask_clear(retmask);
36 cpumask_set_cpu(cpu, retmask);
39 static void
40 __x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest)
42 unsigned long cfg;
44 cfg = __prepare_ICR(0, vector, dest);
47 * send the IPI.
49 x2apic_icr_write(cfg, apicid);
53 * for now, we send the IPI's one by one in the cpumask.
54 * TBD: Based on the cpu mask, we can send the IPI's to the cluster group
55 * at once. We have 16 cpu's in a cluster. This will minimize IPI register
56 * writes.
58 static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
60 unsigned long query_cpu;
61 unsigned long flags;
63 local_irq_save(flags);
64 for_each_cpu(query_cpu, mask) {
65 __x2apic_send_IPI_dest(
66 per_cpu(x86_cpu_to_logical_apicid, query_cpu),
67 vector, apic->dest_logical);
69 local_irq_restore(flags);
72 static void
73 x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
75 unsigned long this_cpu = smp_processor_id();
76 unsigned long query_cpu;
77 unsigned long flags;
79 local_irq_save(flags);
80 for_each_cpu(query_cpu, mask) {
81 if (query_cpu == this_cpu)
82 continue;
83 __x2apic_send_IPI_dest(
84 per_cpu(x86_cpu_to_logical_apicid, query_cpu),
85 vector, apic->dest_logical);
87 local_irq_restore(flags);
90 static void x2apic_send_IPI_allbutself(int vector)
92 unsigned long this_cpu = smp_processor_id();
93 unsigned long query_cpu;
94 unsigned long flags;
96 local_irq_save(flags);
97 for_each_online_cpu(query_cpu) {
98 if (query_cpu == this_cpu)
99 continue;
100 __x2apic_send_IPI_dest(
101 per_cpu(x86_cpu_to_logical_apicid, query_cpu),
102 vector, apic->dest_logical);
104 local_irq_restore(flags);
107 static void x2apic_send_IPI_all(int vector)
109 x2apic_send_IPI_mask(cpu_online_mask, vector);
112 static int x2apic_apic_id_registered(void)
114 return 1;
117 static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask)
120 * We're using fixed IRQ delivery, can only return one logical APIC ID.
121 * May as well be the first.
123 int cpu = cpumask_first(cpumask);
125 if ((unsigned)cpu < nr_cpu_ids)
126 return per_cpu(x86_cpu_to_logical_apicid, cpu);
127 else
128 return BAD_APICID;
131 static unsigned int
132 x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
133 const struct cpumask *andmask)
135 int cpu;
138 * We're using fixed IRQ delivery, can only return one logical APIC ID.
139 * May as well be the first.
141 for_each_cpu_and(cpu, cpumask, andmask) {
142 if (cpumask_test_cpu(cpu, cpu_online_mask))
143 break;
146 if (cpu < nr_cpu_ids)
147 return per_cpu(x86_cpu_to_logical_apicid, cpu);
149 return BAD_APICID;
152 static unsigned int x2apic_cluster_phys_get_apic_id(unsigned long x)
154 unsigned int id;
156 id = x;
157 return id;
160 static unsigned long set_apic_id(unsigned int id)
162 unsigned long x;
164 x = id;
165 return x;
168 static int x2apic_cluster_phys_pkg_id(int initial_apicid, int index_msb)
170 return current_cpu_data.initial_apicid >> index_msb;
173 static void x2apic_send_IPI_self(int vector)
175 apic_write(APIC_SELF_IPI, vector);
178 static void init_x2apic_ldr(void)
180 int cpu = smp_processor_id();
182 per_cpu(x86_cpu_to_logical_apicid, cpu) = apic_read(APIC_LDR);
185 struct genapic apic_x2apic_cluster = {
187 .name = "cluster x2apic",
188 .probe = NULL,
189 .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
190 .apic_id_registered = x2apic_apic_id_registered,
192 .irq_delivery_mode = dest_LowestPrio,
193 .irq_dest_mode = 1, /* logical */
195 .target_cpus = x2apic_target_cpus,
196 .disable_esr = 0,
197 .dest_logical = APIC_DEST_LOGICAL,
198 .check_apicid_used = NULL,
199 .check_apicid_present = NULL,
201 .vector_allocation_domain = x2apic_vector_allocation_domain,
202 .init_apic_ldr = init_x2apic_ldr,
204 .ioapic_phys_id_map = NULL,
205 .setup_apic_routing = NULL,
206 .multi_timer_check = NULL,
207 .apicid_to_node = NULL,
208 .cpu_to_logical_apicid = NULL,
209 .cpu_present_to_apicid = default_cpu_present_to_apicid,
210 .apicid_to_cpu_present = NULL,
211 .setup_portio_remap = NULL,
212 .check_phys_apicid_present = default_check_phys_apicid_present,
213 .enable_apic_mode = NULL,
214 .phys_pkg_id = x2apic_cluster_phys_pkg_id,
215 .mps_oem_check = NULL,
217 .get_apic_id = x2apic_cluster_phys_get_apic_id,
218 .set_apic_id = set_apic_id,
219 .apic_id_mask = 0xFFFFFFFFu,
221 .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,
222 .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and,
224 .send_IPI_mask = x2apic_send_IPI_mask,
225 .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
226 .send_IPI_allbutself = x2apic_send_IPI_allbutself,
227 .send_IPI_all = x2apic_send_IPI_all,
228 .send_IPI_self = x2apic_send_IPI_self,
230 .wakeup_cpu = NULL,
231 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
232 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
233 .wait_for_init_deassert = NULL,
234 .smp_callin_clear_local_apic = NULL,
235 .store_NMI_vector = NULL,
236 .inquire_remote_apic = NULL,