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[PATCH] e1000: Fix Wake-on-Lan with forced gigabit speed
[linux-2.6/mini2440.git] / drivers / net / e1000 / e1000_main.c
blobf772e4dc328fc4816bc136409544c9bfbe10a083
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30 #include <net/ip6_checksum.h>
31
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #ifndef CONFIG_E1000_NAPI
35 #define DRIVERNAPI
36 #else
37 #define DRIVERNAPI "-NAPI"
38 #endif
39 #define DRV_VERSION "7.3.15-k2"DRIVERNAPI
40 char e1000_driver_version[] = DRV_VERSION;
41 static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
42
43 /* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50 static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
76 INTEL_E1000_ETHERNET_DEVICE(0x1049),
77 INTEL_E1000_ETHERNET_DEVICE(0x104A),
78 INTEL_E1000_ETHERNET_DEVICE(0x104B),
79 INTEL_E1000_ETHERNET_DEVICE(0x104C),
80 INTEL_E1000_ETHERNET_DEVICE(0x104D),
81 INTEL_E1000_ETHERNET_DEVICE(0x105E),
82 INTEL_E1000_ETHERNET_DEVICE(0x105F),
83 INTEL_E1000_ETHERNET_DEVICE(0x1060),
84 INTEL_E1000_ETHERNET_DEVICE(0x1075),
85 INTEL_E1000_ETHERNET_DEVICE(0x1076),
86 INTEL_E1000_ETHERNET_DEVICE(0x1077),
87 INTEL_E1000_ETHERNET_DEVICE(0x1078),
88 INTEL_E1000_ETHERNET_DEVICE(0x1079),
89 INTEL_E1000_ETHERNET_DEVICE(0x107A),
90 INTEL_E1000_ETHERNET_DEVICE(0x107B),
91 INTEL_E1000_ETHERNET_DEVICE(0x107C),
92 INTEL_E1000_ETHERNET_DEVICE(0x107D),
93 INTEL_E1000_ETHERNET_DEVICE(0x107E),
94 INTEL_E1000_ETHERNET_DEVICE(0x107F),
95 INTEL_E1000_ETHERNET_DEVICE(0x108A),
96 INTEL_E1000_ETHERNET_DEVICE(0x108B),
97 INTEL_E1000_ETHERNET_DEVICE(0x108C),
98 INTEL_E1000_ETHERNET_DEVICE(0x1096),
99 INTEL_E1000_ETHERNET_DEVICE(0x1098),
100 INTEL_E1000_ETHERNET_DEVICE(0x1099),
101 INTEL_E1000_ETHERNET_DEVICE(0x109A),
102 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
103 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
104 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
105 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
106 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
107 INTEL_E1000_ETHERNET_DEVICE(0x10BC),
108 INTEL_E1000_ETHERNET_DEVICE(0x10C4),
109 INTEL_E1000_ETHERNET_DEVICE(0x10C5),
110 /* required last entry */
111 {0,}
112 };
113
114 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
115
116 int e1000_up(struct e1000_adapter *adapter);
117 void e1000_down(struct e1000_adapter *adapter);
118 void e1000_reinit_locked(struct e1000_adapter *adapter);
119 void e1000_reset(struct e1000_adapter *adapter);
120 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
121 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
122 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
123 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
124 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
125 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
126 struct e1000_tx_ring *txdr);
127 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
128 struct e1000_rx_ring *rxdr);
129 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
130 struct e1000_tx_ring *tx_ring);
131 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
132 struct e1000_rx_ring *rx_ring);
133 void e1000_update_stats(struct e1000_adapter *adapter);
134
135 static int e1000_init_module(void);
136 static void e1000_exit_module(void);
137 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
138 static void __devexit e1000_remove(struct pci_dev *pdev);
139 static int e1000_alloc_queues(struct e1000_adapter *adapter);
140 static int e1000_sw_init(struct e1000_adapter *adapter);
141 static int e1000_open(struct net_device *netdev);
142 static int e1000_close(struct net_device *netdev);
143 static void e1000_configure_tx(struct e1000_adapter *adapter);
144 static void e1000_configure_rx(struct e1000_adapter *adapter);
145 static void e1000_setup_rctl(struct e1000_adapter *adapter);
146 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
147 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
148 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
149 struct e1000_tx_ring *tx_ring);
150 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
151 struct e1000_rx_ring *rx_ring);
152 static void e1000_set_multi(struct net_device *netdev);
153 static void e1000_update_phy_info(unsigned long data);
154 static void e1000_watchdog(unsigned long data);
155 static void e1000_82547_tx_fifo_stall(unsigned long data);
156 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
157 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
158 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
159 static int e1000_set_mac(struct net_device *netdev, void *p);
160 static irqreturn_t e1000_intr(int irq, void *data);
161 #ifdef CONFIG_PCI_MSI
162 static irqreturn_t e1000_intr_msi(int irq, void *data);
163 #endif
164 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
165 struct e1000_tx_ring *tx_ring);
166 #ifdef CONFIG_E1000_NAPI
167 static int e1000_clean(struct net_device *poll_dev, int *budget);
168 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
169 struct e1000_rx_ring *rx_ring,
170 int *work_done, int work_to_do);
171 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
172 struct e1000_rx_ring *rx_ring,
173 int *work_done, int work_to_do);
174 #else
175 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
176 struct e1000_rx_ring *rx_ring);
177 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
178 struct e1000_rx_ring *rx_ring);
179 #endif
180 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
181 struct e1000_rx_ring *rx_ring,
182 int cleaned_count);
183 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
184 struct e1000_rx_ring *rx_ring,
185 int cleaned_count);
186 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
187 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
188 int cmd);
189 void e1000_set_ethtool_ops(struct net_device *netdev);
190 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
191 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
192 static void e1000_tx_timeout(struct net_device *dev);
193 static void e1000_reset_task(struct work_struct *work);
194 static void e1000_smartspeed(struct e1000_adapter *adapter);
195 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
196 struct sk_buff *skb);
197
198 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
199 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
200 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
201 static void e1000_restore_vlan(struct e1000_adapter *adapter);
202
203 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
204 #ifdef CONFIG_PM
205 static int e1000_resume(struct pci_dev *pdev);
206 #endif
207 static void e1000_shutdown(struct pci_dev *pdev);
208
209 #ifdef CONFIG_NET_POLL_CONTROLLER
210 /* for netdump / net console */
211 static void e1000_netpoll (struct net_device *netdev);
212 #endif
213
214 extern void e1000_check_options(struct e1000_adapter *adapter);
215
216 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
217 pci_channel_state_t state);
218 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
219 static void e1000_io_resume(struct pci_dev *pdev);
220
221 static struct pci_error_handlers e1000_err_handler = {
222 .error_detected = e1000_io_error_detected,
223 .slot_reset = e1000_io_slot_reset,
224 .resume = e1000_io_resume,
225 };
226
227 static struct pci_driver e1000_driver = {
228 .name = e1000_driver_name,
229 .id_table = e1000_pci_tbl,
230 .probe = e1000_probe,
231 .remove = __devexit_p(e1000_remove),
232 #ifdef CONFIG_PM
233 /* Power Managment Hooks */
234 .suspend = e1000_suspend,
235 .resume = e1000_resume,
236 #endif
237 .shutdown = e1000_shutdown,
238 .err_handler = &e1000_err_handler
239 };
240
241 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
242 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
243 MODULE_LICENSE("GPL");
244 MODULE_VERSION(DRV_VERSION);
245
246 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
247 module_param(debug, int, 0);
248 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
249
250 /**
251 * e1000_init_module - Driver Registration Routine
252 *
253 * e1000_init_module is the first routine called when the driver is
254 * loaded. All it does is register with the PCI subsystem.
255 **/
256
257 static int __init
258 e1000_init_module(void)
259 {
260 int ret;
261 printk(KERN_INFO "%s - version %s\n",
262 e1000_driver_string, e1000_driver_version);
263
264 printk(KERN_INFO "%s\n", e1000_copyright);
265
266 ret = pci_register_driver(&e1000_driver);
267
268 return ret;
269 }
270
271 module_init(e1000_init_module);
272
273 /**
274 * e1000_exit_module - Driver Exit Cleanup Routine
275 *
276 * e1000_exit_module is called just before the driver is removed
277 * from memory.
278 **/
279
280 static void __exit
281 e1000_exit_module(void)
282 {
283 pci_unregister_driver(&e1000_driver);
284 }
285
286 module_exit(e1000_exit_module);
287
288 static int e1000_request_irq(struct e1000_adapter *adapter)
289 {
290 struct net_device *netdev = adapter->netdev;
291 int flags, err = 0;
292
293 flags = IRQF_SHARED;
294 #ifdef CONFIG_PCI_MSI
295 if (adapter->hw.mac_type >= e1000_82571) {
296 adapter->have_msi = TRUE;
297 if ((err = pci_enable_msi(adapter->pdev))) {
298 DPRINTK(PROBE, ERR,
299 "Unable to allocate MSI interrupt Error: %d\n", err);
300 adapter->have_msi = FALSE;
301 }
302 }
303 if (adapter->have_msi) {
304 flags &= ~IRQF_SHARED;
305 err = request_irq(adapter->pdev->irq, &e1000_intr_msi, flags,
306 netdev->name, netdev);
307 if (err)
308 DPRINTK(PROBE, ERR,
309 "Unable to allocate interrupt Error: %d\n", err);
310 } else
311 #endif
312 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
313 netdev->name, netdev)))
314 DPRINTK(PROBE, ERR,
315 "Unable to allocate interrupt Error: %d\n", err);
316
317 return err;
318 }
319
320 static void e1000_free_irq(struct e1000_adapter *adapter)
321 {
322 struct net_device *netdev = adapter->netdev;
323
324 free_irq(adapter->pdev->irq, netdev);
325
326 #ifdef CONFIG_PCI_MSI
327 if (adapter->have_msi)
328 pci_disable_msi(adapter->pdev);
329 #endif
330 }
331
332 /**
333 * e1000_irq_disable - Mask off interrupt generation on the NIC
334 * @adapter: board private structure
335 **/
336
337 static void
338 e1000_irq_disable(struct e1000_adapter *adapter)
339 {
340 atomic_inc(&adapter->irq_sem);
341 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
342 E1000_WRITE_FLUSH(&adapter->hw);
343 synchronize_irq(adapter->pdev->irq);
344 }
345
346 /**
347 * e1000_irq_enable - Enable default interrupt generation settings
348 * @adapter: board private structure
349 **/
350
351 static void
352 e1000_irq_enable(struct e1000_adapter *adapter)
353 {
354 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
355 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
356 E1000_WRITE_FLUSH(&adapter->hw);
357 }
358 }
359
360 static void
361 e1000_update_mng_vlan(struct e1000_adapter *adapter)
362 {
363 struct net_device *netdev = adapter->netdev;
364 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
365 uint16_t old_vid = adapter->mng_vlan_id;
366 if (adapter->vlgrp) {
367 if (!adapter->vlgrp->vlan_devices[vid]) {
368 if (adapter->hw.mng_cookie.status &
369 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
370 e1000_vlan_rx_add_vid(netdev, vid);
371 adapter->mng_vlan_id = vid;
372 } else
373 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
374
375 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
376 (vid != old_vid) &&
377 !adapter->vlgrp->vlan_devices[old_vid])
378 e1000_vlan_rx_kill_vid(netdev, old_vid);
379 } else
380 adapter->mng_vlan_id = vid;
381 }
382 }
383
384 /**
385 * e1000_release_hw_control - release control of the h/w to f/w
386 * @adapter: address of board private structure
387 *
388 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
389 * For ASF and Pass Through versions of f/w this means that the
390 * driver is no longer loaded. For AMT version (only with 82573) i
391 * of the f/w this means that the network i/f is closed.
392 *
393 **/
394
395 static void
396 e1000_release_hw_control(struct e1000_adapter *adapter)
397 {
398 uint32_t ctrl_ext;
399 uint32_t swsm;
400 uint32_t extcnf;
401
402 /* Let firmware taken over control of h/w */
403 switch (adapter->hw.mac_type) {
404 case e1000_82571:
405 case e1000_82572:
406 case e1000_80003es2lan:
407 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
408 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
409 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
410 break;
411 case e1000_82573:
412 swsm = E1000_READ_REG(&adapter->hw, SWSM);
413 E1000_WRITE_REG(&adapter->hw, SWSM,
414 swsm & ~E1000_SWSM_DRV_LOAD);
415 case e1000_ich8lan:
416 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
417 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
418 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
419 break;
420 default:
421 break;
422 }
423 }
424
425 /**
426 * e1000_get_hw_control - get control of the h/w from f/w
427 * @adapter: address of board private structure
428 *
429 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
430 * For ASF and Pass Through versions of f/w this means that
431 * the driver is loaded. For AMT version (only with 82573)
432 * of the f/w this means that the network i/f is open.
433 *
434 **/
435
436 static void
437 e1000_get_hw_control(struct e1000_adapter *adapter)
438 {
439 uint32_t ctrl_ext;
440 uint32_t swsm;
441 uint32_t extcnf;
442
443 /* Let firmware know the driver has taken over */
444 switch (adapter->hw.mac_type) {
445 case e1000_82571:
446 case e1000_82572:
447 case e1000_80003es2lan:
448 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
449 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
450 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
451 break;
452 case e1000_82573:
453 swsm = E1000_READ_REG(&adapter->hw, SWSM);
454 E1000_WRITE_REG(&adapter->hw, SWSM,
455 swsm | E1000_SWSM_DRV_LOAD);
456 break;
457 case e1000_ich8lan:
458 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
459 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
460 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
461 break;
462 default:
463 break;
464 }
465 }
466
467 static void
468 e1000_init_manageability(struct e1000_adapter *adapter)
469 {
470 if (adapter->en_mng_pt) {
471 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
472
473 /* disable hardware interception of ARP */
474 manc &= ~(E1000_MANC_ARP_EN);
475
476 /* enable receiving management packets to the host */
477 /* this will probably generate destination unreachable messages
478 * from the host OS, but the packets will be handled on SMBUS */
479 if (adapter->hw.has_manc2h) {
480 uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
481
482 manc |= E1000_MANC_EN_MNG2HOST;
483 #define E1000_MNG2HOST_PORT_623 (1 << 5)
484 #define E1000_MNG2HOST_PORT_664 (1 << 6)
485 manc2h |= E1000_MNG2HOST_PORT_623;
486 manc2h |= E1000_MNG2HOST_PORT_664;
487 E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
488 }
489
490 E1000_WRITE_REG(&adapter->hw, MANC, manc);
491 }
492 }
493
494 static void
495 e1000_release_manageability(struct e1000_adapter *adapter)
496 {
497 if (adapter->en_mng_pt) {
498 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
499
500 /* re-enable hardware interception of ARP */
501 manc |= E1000_MANC_ARP_EN;
502
503 if (adapter->hw.has_manc2h)
504 manc &= ~E1000_MANC_EN_MNG2HOST;
505
506 /* don't explicitly have to mess with MANC2H since
507 * MANC has an enable disable that gates MANC2H */
508
509 E1000_WRITE_REG(&adapter->hw, MANC, manc);
510 }
511 }
512
513 int
514 e1000_up(struct e1000_adapter *adapter)
515 {
516 struct net_device *netdev = adapter->netdev;
517 int i;
518
519 /* hardware has been reset, we need to reload some things */
520
521 e1000_set_multi(netdev);
522
523 e1000_restore_vlan(adapter);
524 e1000_init_manageability(adapter);
525
526 e1000_configure_tx(adapter);
527 e1000_setup_rctl(adapter);
528 e1000_configure_rx(adapter);
529 /* call E1000_DESC_UNUSED which always leaves
530 * at least 1 descriptor unused to make sure
531 * next_to_use != next_to_clean */
532 for (i = 0; i < adapter->num_rx_queues; i++) {
533 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
534 adapter->alloc_rx_buf(adapter, ring,
535 E1000_DESC_UNUSED(ring));
536 }
537
538 adapter->tx_queue_len = netdev->tx_queue_len;
539
540 #ifdef CONFIG_E1000_NAPI
541 netif_poll_enable(netdev);
542 #endif
543 e1000_irq_enable(adapter);
544
545 clear_bit(__E1000_DOWN, &adapter->flags);
546
547 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
548 return 0;
549 }
550
551 /**
552 * e1000_power_up_phy - restore link in case the phy was powered down
553 * @adapter: address of board private structure
554 *
555 * The phy may be powered down to save power and turn off link when the
556 * driver is unloaded and wake on lan is not enabled (among others)
557 * *** this routine MUST be followed by a call to e1000_reset ***
558 *
559 **/
560
561 void e1000_power_up_phy(struct e1000_adapter *adapter)
562 {
563 uint16_t mii_reg = 0;
564
565 /* Just clear the power down bit to wake the phy back up */
566 if (adapter->hw.media_type == e1000_media_type_copper) {
567 /* according to the manual, the phy will retain its
568 * settings across a power-down/up cycle */
569 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
570 mii_reg &= ~MII_CR_POWER_DOWN;
571 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
572 }
573 }
574
575 static void e1000_power_down_phy(struct e1000_adapter *adapter)
576 {
577 /* Power down the PHY so no link is implied when interface is down *
578 * The PHY cannot be powered down if any of the following is TRUE *
579 * (a) WoL is enabled
580 * (b) AMT is active
581 * (c) SoL/IDER session is active */
582 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
583 adapter->hw.media_type == e1000_media_type_copper) {
584 uint16_t mii_reg = 0;
585
586 switch (adapter->hw.mac_type) {
587 case e1000_82540:
588 case e1000_82545:
589 case e1000_82545_rev_3:
590 case e1000_82546:
591 case e1000_82546_rev_3:
592 case e1000_82541:
593 case e1000_82541_rev_2:
594 case e1000_82547:
595 case e1000_82547_rev_2:
596 if (E1000_READ_REG(&adapter->hw, MANC) &
597 E1000_MANC_SMBUS_EN)
598 goto out;
599 break;
600 case e1000_82571:
601 case e1000_82572:
602 case e1000_82573:
603 case e1000_80003es2lan:
604 case e1000_ich8lan:
605 if (e1000_check_mng_mode(&adapter->hw) ||
606 e1000_check_phy_reset_block(&adapter->hw))
607 goto out;
608 break;
609 default:
610 goto out;
611 }
612 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
613 mii_reg |= MII_CR_POWER_DOWN;
614 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
615 mdelay(1);
616 }
617 out:
618 return;
619 }
620
621 void
622 e1000_down(struct e1000_adapter *adapter)
623 {
624 struct net_device *netdev = adapter->netdev;
625
626 /* signal that we're down so the interrupt handler does not
627 * reschedule our watchdog timer */
628 set_bit(__E1000_DOWN, &adapter->flags);
629
630 e1000_irq_disable(adapter);
631
632 del_timer_sync(&adapter->tx_fifo_stall_timer);
633 del_timer_sync(&adapter->watchdog_timer);
634 del_timer_sync(&adapter->phy_info_timer);
635
636 #ifdef CONFIG_E1000_NAPI
637 netif_poll_disable(netdev);
638 #endif
639 netdev->tx_queue_len = adapter->tx_queue_len;
640 adapter->link_speed = 0;
641 adapter->link_duplex = 0;
642 netif_carrier_off(netdev);
643 netif_stop_queue(netdev);
644
645 e1000_reset(adapter);
646 e1000_clean_all_tx_rings(adapter);
647 e1000_clean_all_rx_rings(adapter);
648 }
649
650 void
651 e1000_reinit_locked(struct e1000_adapter *adapter)
652 {
653 WARN_ON(in_interrupt());
654 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
655 msleep(1);
656 e1000_down(adapter);
657 e1000_up(adapter);
658 clear_bit(__E1000_RESETTING, &adapter->flags);
659 }
660
661 void
662 e1000_reset(struct e1000_adapter *adapter)
663 {
664 uint32_t pba;
665 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
666
667 /* Repartition Pba for greater than 9k mtu
668 * To take effect CTRL.RST is required.
669 */
670
671 switch (adapter->hw.mac_type) {
672 case e1000_82547:
673 case e1000_82547_rev_2:
674 pba = E1000_PBA_30K;
675 break;
676 case e1000_82571:
677 case e1000_82572:
678 case e1000_80003es2lan:
679 pba = E1000_PBA_38K;
680 break;
681 case e1000_82573:
682 pba = E1000_PBA_12K;
683 break;
684 case e1000_ich8lan:
685 pba = E1000_PBA_8K;
686 break;
687 default:
688 pba = E1000_PBA_48K;
689 break;
690 }
691
692 if ((adapter->hw.mac_type != e1000_82573) &&
693 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
694 pba -= 8; /* allocate more FIFO for Tx */
695
696
697 if (adapter->hw.mac_type == e1000_82547) {
698 adapter->tx_fifo_head = 0;
699 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
700 adapter->tx_fifo_size =
701 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
702 atomic_set(&adapter->tx_fifo_stall, 0);
703 }
704
705 E1000_WRITE_REG(&adapter->hw, PBA, pba);
706
707 /* flow control settings */
708 /* Set the FC high water mark to 90% of the FIFO size.
709 * Required to clear last 3 LSB */
710 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
711 /* We can't use 90% on small FIFOs because the remainder
712 * would be less than 1 full frame. In this case, we size
713 * it to allow at least a full frame above the high water
714 * mark. */
715 if (pba < E1000_PBA_16K)
716 fc_high_water_mark = (pba * 1024) - 1600;
717
718 adapter->hw.fc_high_water = fc_high_water_mark;
719 adapter->hw.fc_low_water = fc_high_water_mark - 8;
720 if (adapter->hw.mac_type == e1000_80003es2lan)
721 adapter->hw.fc_pause_time = 0xFFFF;
722 else
723 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
724 adapter->hw.fc_send_xon = 1;
725 adapter->hw.fc = adapter->hw.original_fc;
726
727 /* Allow time for pending master requests to run */
728 e1000_reset_hw(&adapter->hw);
729 if (adapter->hw.mac_type >= e1000_82544)
730 E1000_WRITE_REG(&adapter->hw, WUC, 0);
731
732 if (e1000_init_hw(&adapter->hw))
733 DPRINTK(PROBE, ERR, "Hardware Error\n");
734 e1000_update_mng_vlan(adapter);
735
736 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
737 if (adapter->hw.mac_type >= e1000_82544 &&
738 adapter->hw.mac_type <= e1000_82547_rev_2 &&
739 adapter->hw.autoneg == 1 &&
740 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
741 uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
742 /* clear phy power management bit if we are in gig only mode,
743 * which if enabled will attempt negotiation to 100Mb, which
744 * can cause a loss of link at power off or driver unload */
745 ctrl &= ~E1000_CTRL_SWDPIN3;
746 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
747 }
748
749 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
750 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
751
752 e1000_reset_adaptive(&adapter->hw);
753 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
754
755 if (!adapter->smart_power_down &&
756 (adapter->hw.mac_type == e1000_82571 ||
757 adapter->hw.mac_type == e1000_82572)) {
758 uint16_t phy_data = 0;
759 /* speed up time to link by disabling smart power down, ignore
760 * the return value of this function because there is nothing
761 * different we would do if it failed */
762 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
763 &phy_data);
764 phy_data &= ~IGP02E1000_PM_SPD;
765 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
766 phy_data);
767 }
768
769 e1000_release_manageability(adapter);
770 }
771
772 /**
773 * e1000_probe - Device Initialization Routine
774 * @pdev: PCI device information struct
775 * @ent: entry in e1000_pci_tbl
776 *
777 * Returns 0 on success, negative on failure
778 *
779 * e1000_probe initializes an adapter identified by a pci_dev structure.
780 * The OS initialization, configuring of the adapter private structure,
781 * and a hardware reset occur.
782 **/
783
784 static int __devinit
785 e1000_probe(struct pci_dev *pdev,
786 const struct pci_device_id *ent)
787 {
788 struct net_device *netdev;
789 struct e1000_adapter *adapter;
790 unsigned long mmio_start, mmio_len;
791 unsigned long flash_start, flash_len;
792
793 static int cards_found = 0;
794 static int global_quad_port_a = 0; /* global ksp3 port a indication */
795 int i, err, pci_using_dac;
796 uint16_t eeprom_data = 0;
797 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
798 if ((err = pci_enable_device(pdev)))
799 return err;
800
801 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
802 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
803 pci_using_dac = 1;
804 } else {
805 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
806 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
807 E1000_ERR("No usable DMA configuration, aborting\n");
808 goto err_dma;
809 }
810 pci_using_dac = 0;
811 }
812
813 if ((err = pci_request_regions(pdev, e1000_driver_name)))
814 goto err_pci_reg;
815
816 pci_set_master(pdev);
817
818 err = -ENOMEM;
819 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
820 if (!netdev)
821 goto err_alloc_etherdev;
822
823 SET_MODULE_OWNER(netdev);
824 SET_NETDEV_DEV(netdev, &pdev->dev);
825
826 pci_set_drvdata(pdev, netdev);
827 adapter = netdev_priv(netdev);
828 adapter->netdev = netdev;
829 adapter->pdev = pdev;
830 adapter->hw.back = adapter;
831 adapter->msg_enable = (1 << debug) - 1;
832
833 mmio_start = pci_resource_start(pdev, BAR_0);
834 mmio_len = pci_resource_len(pdev, BAR_0);
835
836 err = -EIO;
837 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
838 if (!adapter->hw.hw_addr)
839 goto err_ioremap;
840
841 for (i = BAR_1; i <= BAR_5; i++) {
842 if (pci_resource_len(pdev, i) == 0)
843 continue;
844 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
845 adapter->hw.io_base = pci_resource_start(pdev, i);
846 break;
847 }
848 }
849
850 netdev->open = &e1000_open;
851 netdev->stop = &e1000_close;
852 netdev->hard_start_xmit = &e1000_xmit_frame;
853 netdev->get_stats = &e1000_get_stats;
854 netdev->set_multicast_list = &e1000_set_multi;
855 netdev->set_mac_address = &e1000_set_mac;
856 netdev->change_mtu = &e1000_change_mtu;
857 netdev->do_ioctl = &e1000_ioctl;
858 e1000_set_ethtool_ops(netdev);
859 netdev->tx_timeout = &e1000_tx_timeout;
860 netdev->watchdog_timeo = 5 * HZ;
861 #ifdef CONFIG_E1000_NAPI
862 netdev->poll = &e1000_clean;
863 netdev->weight = 64;
864 #endif
865 netdev->vlan_rx_register = e1000_vlan_rx_register;
866 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
867 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
868 #ifdef CONFIG_NET_POLL_CONTROLLER
869 netdev->poll_controller = e1000_netpoll;
870 #endif
871 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
872
873 netdev->mem_start = mmio_start;
874 netdev->mem_end = mmio_start + mmio_len;
875 netdev->base_addr = adapter->hw.io_base;
876
877 adapter->bd_number = cards_found;
878
879 /* setup the private structure */
880
881 if ((err = e1000_sw_init(adapter)))
882 goto err_sw_init;
883
884 err = -EIO;
885 /* Flash BAR mapping must happen after e1000_sw_init
886 * because it depends on mac_type */
887 if ((adapter->hw.mac_type == e1000_ich8lan) &&
888 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
889 flash_start = pci_resource_start(pdev, 1);
890 flash_len = pci_resource_len(pdev, 1);
891 adapter->hw.flash_address = ioremap(flash_start, flash_len);
892 if (!adapter->hw.flash_address)
893 goto err_flashmap;
894 }
895
896 if (e1000_check_phy_reset_block(&adapter->hw))
897 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
898
899 if (adapter->hw.mac_type >= e1000_82543) {
900 netdev->features = NETIF_F_SG |
901 NETIF_F_HW_CSUM |
902 NETIF_F_HW_VLAN_TX |
903 NETIF_F_HW_VLAN_RX |
904 NETIF_F_HW_VLAN_FILTER;
905 if (adapter->hw.mac_type == e1000_ich8lan)
906 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
907 }
908
909 #ifdef NETIF_F_TSO
910 if ((adapter->hw.mac_type >= e1000_82544) &&
911 (adapter->hw.mac_type != e1000_82547))
912 netdev->features |= NETIF_F_TSO;
913
914 #ifdef NETIF_F_TSO6
915 if (adapter->hw.mac_type > e1000_82547_rev_2)
916 netdev->features |= NETIF_F_TSO6;
917 #endif
918 #endif
919 if (pci_using_dac)
920 netdev->features |= NETIF_F_HIGHDMA;
921
922 netdev->features |= NETIF_F_LLTX;
923
924 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
925
926 /* initialize eeprom parameters */
927
928 if (e1000_init_eeprom_params(&adapter->hw)) {
929 E1000_ERR("EEPROM initialization failed\n");
930 goto err_eeprom;
931 }
932
933 /* before reading the EEPROM, reset the controller to
934 * put the device in a known good starting state */
935
936 e1000_reset_hw(&adapter->hw);
937
938 /* make sure the EEPROM is good */
939
940 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
941 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
942 goto err_eeprom;
943 }
944
945 /* copy the MAC address out of the EEPROM */
946
947 if (e1000_read_mac_addr(&adapter->hw))
948 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
949 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
950 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
951
952 if (!is_valid_ether_addr(netdev->perm_addr)) {
953 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
954 goto err_eeprom;
955 }
956
957 e1000_get_bus_info(&adapter->hw);
958
959 init_timer(&adapter->tx_fifo_stall_timer);
960 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
961 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
962
963 init_timer(&adapter->watchdog_timer);
964 adapter->watchdog_timer.function = &e1000_watchdog;
965 adapter->watchdog_timer.data = (unsigned long) adapter;
966
967 init_timer(&adapter->phy_info_timer);
968 adapter->phy_info_timer.function = &e1000_update_phy_info;
969 adapter->phy_info_timer.data = (unsigned long) adapter;
970
971 INIT_WORK(&adapter->reset_task, e1000_reset_task);
972
973 e1000_check_options(adapter);
974
975 /* Initial Wake on LAN setting
976 * If APM wake is enabled in the EEPROM,
977 * enable the ACPI Magic Packet filter
978 */
979
980 switch (adapter->hw.mac_type) {
981 case e1000_82542_rev2_0:
982 case e1000_82542_rev2_1:
983 case e1000_82543:
984 break;
985 case e1000_82544:
986 e1000_read_eeprom(&adapter->hw,
987 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
988 eeprom_apme_mask = E1000_EEPROM_82544_APM;
989 break;
990 case e1000_ich8lan:
991 e1000_read_eeprom(&adapter->hw,
992 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
993 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
994 break;
995 case e1000_82546:
996 case e1000_82546_rev_3:
997 case e1000_82571:
998 case e1000_80003es2lan:
999 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1000 e1000_read_eeprom(&adapter->hw,
1001 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1002 break;
1003 }
1004 /* Fall Through */
1005 default:
1006 e1000_read_eeprom(&adapter->hw,
1007 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1008 break;
1009 }
1010 if (eeprom_data & eeprom_apme_mask)
1011 adapter->eeprom_wol |= E1000_WUFC_MAG;
1012
1013 /* now that we have the eeprom settings, apply the special cases
1014 * where the eeprom may be wrong or the board simply won't support
1015 * wake on lan on a particular port */
1016 switch (pdev->device) {
1017 case E1000_DEV_ID_82546GB_PCIE:
1018 adapter->eeprom_wol = 0;
1019 break;
1020 case E1000_DEV_ID_82546EB_FIBER:
1021 case E1000_DEV_ID_82546GB_FIBER:
1022 case E1000_DEV_ID_82571EB_FIBER:
1023 /* Wake events only supported on port A for dual fiber
1024 * regardless of eeprom setting */
1025 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
1026 adapter->eeprom_wol = 0;
1027 break;
1028 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1029 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1030 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1031 /* if quad port adapter, disable WoL on all but port A */
1032 if (global_quad_port_a != 0)
1033 adapter->eeprom_wol = 0;
1034 else
1035 adapter->quad_port_a = 1;
1036 /* Reset for multiple quad port adapters */
1037 if (++global_quad_port_a == 4)
1038 global_quad_port_a = 0;
1039 break;
1040 }
1041
1042 /* initialize the wol settings based on the eeprom settings */
1043 adapter->wol = adapter->eeprom_wol;
1044
1045 /* print bus type/speed/width info */
1046 {
1047 struct e1000_hw *hw = &adapter->hw;
1048 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1049 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1050 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1051 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1052 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1053 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1054 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1055 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1056 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1057 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1058 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1059 "32-bit"));
1060 }
1061
1062 for (i = 0; i < 6; i++)
1063 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1064
1065 /* reset the hardware with the new settings */
1066 e1000_reset(adapter);
1067
1068 /* If the controller is 82573 and f/w is AMT, do not set
1069 * DRV_LOAD until the interface is up. For all other cases,
1070 * let the f/w know that the h/w is now under the control
1071 * of the driver. */
1072 if (adapter->hw.mac_type != e1000_82573 ||
1073 !e1000_check_mng_mode(&adapter->hw))
1074 e1000_get_hw_control(adapter);
1075
1076 strcpy(netdev->name, "eth%d");
1077 if ((err = register_netdev(netdev)))
1078 goto err_register;
1079
1080 /* tell the stack to leave us alone until e1000_open() is called */
1081 netif_carrier_off(netdev);
1082 netif_stop_queue(netdev);
1083
1084 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1085
1086 cards_found++;
1087 return 0;
1088
1089 err_register:
1090 e1000_release_hw_control(adapter);
1091 err_eeprom:
1092 if (!e1000_check_phy_reset_block(&adapter->hw))
1093 e1000_phy_hw_reset(&adapter->hw);
1094
1095 if (adapter->hw.flash_address)
1096 iounmap(adapter->hw.flash_address);
1097 err_flashmap:
1098 #ifdef CONFIG_E1000_NAPI
1099 for (i = 0; i < adapter->num_rx_queues; i++)
1100 dev_put(&adapter->polling_netdev[i]);
1101 #endif
1102
1103 kfree(adapter->tx_ring);
1104 kfree(adapter->rx_ring);
1105 #ifdef CONFIG_E1000_NAPI
1106 kfree(adapter->polling_netdev);
1107 #endif
1108 err_sw_init:
1109 iounmap(adapter->hw.hw_addr);
1110 err_ioremap:
1111 free_netdev(netdev);
1112 err_alloc_etherdev:
1113 pci_release_regions(pdev);
1114 err_pci_reg:
1115 err_dma:
1116 pci_disable_device(pdev);
1117 return err;
1118 }
1119
1120 /**
1121 * e1000_remove - Device Removal Routine
1122 * @pdev: PCI device information struct
1123 *
1124 * e1000_remove is called by the PCI subsystem to alert the driver
1125 * that it should release a PCI device. The could be caused by a
1126 * Hot-Plug event, or because the driver is going to be removed from
1127 * memory.
1128 **/
1129
1130 static void __devexit
1131 e1000_remove(struct pci_dev *pdev)
1132 {
1133 struct net_device *netdev = pci_get_drvdata(pdev);
1134 struct e1000_adapter *adapter = netdev_priv(netdev);
1135 #ifdef CONFIG_E1000_NAPI
1136 int i;
1137 #endif
1138
1139 flush_scheduled_work();
1140
1141 e1000_release_manageability(adapter);
1142
1143 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1144 * would have already happened in close and is redundant. */
1145 e1000_release_hw_control(adapter);
1146
1147 unregister_netdev(netdev);
1148 #ifdef CONFIG_E1000_NAPI
1149 for (i = 0; i < adapter->num_rx_queues; i++)
1150 dev_put(&adapter->polling_netdev[i]);
1151 #endif
1152
1153 if (!e1000_check_phy_reset_block(&adapter->hw))
1154 e1000_phy_hw_reset(&adapter->hw);
1155
1156 kfree(adapter->tx_ring);
1157 kfree(adapter->rx_ring);
1158 #ifdef CONFIG_E1000_NAPI
1159 kfree(adapter->polling_netdev);
1160 #endif
1161
1162 iounmap(adapter->hw.hw_addr);
1163 if (adapter->hw.flash_address)
1164 iounmap(adapter->hw.flash_address);
1165 pci_release_regions(pdev);
1166
1167 free_netdev(netdev);
1168
1169 pci_disable_device(pdev);
1170 }
1171
1172 /**
1173 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1174 * @adapter: board private structure to initialize
1175 *
1176 * e1000_sw_init initializes the Adapter private data structure.
1177 * Fields are initialized based on PCI device information and
1178 * OS network device settings (MTU size).
1179 **/
1180
1181 static int __devinit
1182 e1000_sw_init(struct e1000_adapter *adapter)
1183 {
1184 struct e1000_hw *hw = &adapter->hw;
1185 struct net_device *netdev = adapter->netdev;
1186 struct pci_dev *pdev = adapter->pdev;
1187 #ifdef CONFIG_E1000_NAPI
1188 int i;
1189 #endif
1190
1191 /* PCI config space info */
1192
1193 hw->vendor_id = pdev->vendor;
1194 hw->device_id = pdev->device;
1195 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1196 hw->subsystem_id = pdev->subsystem_device;
1197
1198 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1199
1200 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1201
1202 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1203 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1204 hw->max_frame_size = netdev->mtu +
1205 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1206 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1207
1208 /* identify the MAC */
1209
1210 if (e1000_set_mac_type(hw)) {
1211 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1212 return -EIO;
1213 }
1214
1215 switch (hw->mac_type) {
1216 default:
1217 break;
1218 case e1000_82541:
1219 case e1000_82547:
1220 case e1000_82541_rev_2:
1221 case e1000_82547_rev_2:
1222 hw->phy_init_script = 1;
1223 break;
1224 }
1225
1226 e1000_set_media_type(hw);
1227
1228 hw->wait_autoneg_complete = FALSE;
1229 hw->tbi_compatibility_en = TRUE;
1230 hw->adaptive_ifs = TRUE;
1231
1232 /* Copper options */
1233
1234 if (hw->media_type == e1000_media_type_copper) {
1235 hw->mdix = AUTO_ALL_MODES;
1236 hw->disable_polarity_correction = FALSE;
1237 hw->master_slave = E1000_MASTER_SLAVE;
1238 }
1239
1240 adapter->num_tx_queues = 1;
1241 adapter->num_rx_queues = 1;
1242
1243 if (e1000_alloc_queues(adapter)) {
1244 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1245 return -ENOMEM;
1246 }
1247
1248 #ifdef CONFIG_E1000_NAPI
1249 for (i = 0; i < adapter->num_rx_queues; i++) {
1250 adapter->polling_netdev[i].priv = adapter;
1251 adapter->polling_netdev[i].poll = &e1000_clean;
1252 adapter->polling_netdev[i].weight = 64;
1253 dev_hold(&adapter->polling_netdev[i]);
1254 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1255 }
1256 spin_lock_init(&adapter->tx_queue_lock);
1257 #endif
1258
1259 atomic_set(&adapter->irq_sem, 1);
1260 spin_lock_init(&adapter->stats_lock);
1261
1262 set_bit(__E1000_DOWN, &adapter->flags);
1263
1264 return 0;
1265 }
1266
1267 /**
1268 * e1000_alloc_queues - Allocate memory for all rings
1269 * @adapter: board private structure to initialize
1270 *
1271 * We allocate one ring per queue at run-time since we don't know the
1272 * number of queues at compile-time. The polling_netdev array is
1273 * intended for Multiqueue, but should work fine with a single queue.
1274 **/
1275
1276 static int __devinit
1277 e1000_alloc_queues(struct e1000_adapter *adapter)
1278 {
1279 int size;
1280
1281 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
1282 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1283 if (!adapter->tx_ring)
1284 return -ENOMEM;
1285 memset(adapter->tx_ring, 0, size);
1286
1287 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
1288 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1289 if (!adapter->rx_ring) {
1290 kfree(adapter->tx_ring);
1291 return -ENOMEM;
1292 }
1293 memset(adapter->rx_ring, 0, size);
1294
1295 #ifdef CONFIG_E1000_NAPI
1296 size = sizeof(struct net_device) * adapter->num_rx_queues;
1297 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1298 if (!adapter->polling_netdev) {
1299 kfree(adapter->tx_ring);
1300 kfree(adapter->rx_ring);
1301 return -ENOMEM;
1302 }
1303 memset(adapter->polling_netdev, 0, size);
1304 #endif
1305
1306 return E1000_SUCCESS;
1307 }
1308
1309 /**
1310 * e1000_open - Called when a network interface is made active
1311 * @netdev: network interface device structure
1312 *
1313 * Returns 0 on success, negative value on failure
1314 *
1315 * The open entry point is called when a network interface is made
1316 * active by the system (IFF_UP). At this point all resources needed
1317 * for transmit and receive operations are allocated, the interrupt
1318 * handler is registered with the OS, the watchdog timer is started,
1319 * and the stack is notified that the interface is ready.
1320 **/
1321
1322 static int
1323 e1000_open(struct net_device *netdev)
1324 {
1325 struct e1000_adapter *adapter = netdev_priv(netdev);
1326 int err;
1327
1328 /* disallow open during test */
1329 if (test_bit(__E1000_TESTING, &adapter->flags))
1330 return -EBUSY;
1331
1332 /* allocate transmit descriptors */
1333 if ((err = e1000_setup_all_tx_resources(adapter)))
1334 goto err_setup_tx;
1335
1336 /* allocate receive descriptors */
1337 if ((err = e1000_setup_all_rx_resources(adapter)))
1338 goto err_setup_rx;
1339
1340 err = e1000_request_irq(adapter);
1341 if (err)
1342 goto err_req_irq;
1343
1344 e1000_power_up_phy(adapter);
1345
1346 if ((err = e1000_up(adapter)))
1347 goto err_up;
1348 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1349 if ((adapter->hw.mng_cookie.status &
1350 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1351 e1000_update_mng_vlan(adapter);
1352 }
1353
1354 /* If AMT is enabled, let the firmware know that the network
1355 * interface is now open */
1356 if (adapter->hw.mac_type == e1000_82573 &&
1357 e1000_check_mng_mode(&adapter->hw))
1358 e1000_get_hw_control(adapter);
1359
1360 return E1000_SUCCESS;
1361
1362 err_up:
1363 e1000_power_down_phy(adapter);
1364 e1000_free_irq(adapter);
1365 err_req_irq:
1366 e1000_free_all_rx_resources(adapter);
1367 err_setup_rx:
1368 e1000_free_all_tx_resources(adapter);
1369 err_setup_tx:
1370 e1000_reset(adapter);
1371
1372 return err;
1373 }
1374
1375 /**
1376 * e1000_close - Disables a network interface
1377 * @netdev: network interface device structure
1378 *
1379 * Returns 0, this is not allowed to fail
1380 *
1381 * The close entry point is called when an interface is de-activated
1382 * by the OS. The hardware is still under the drivers control, but
1383 * needs to be disabled. A global MAC reset is issued to stop the
1384 * hardware, and all transmit and receive resources are freed.
1385 **/
1386
1387 static int
1388 e1000_close(struct net_device *netdev)
1389 {
1390 struct e1000_adapter *adapter = netdev_priv(netdev);
1391
1392 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1393 e1000_down(adapter);
1394 e1000_power_down_phy(adapter);
1395 e1000_free_irq(adapter);
1396
1397 e1000_free_all_tx_resources(adapter);
1398 e1000_free_all_rx_resources(adapter);
1399
1400 /* kill manageability vlan ID if supported, but not if a vlan with
1401 * the same ID is registered on the host OS (let 8021q kill it) */
1402 if ((adapter->hw.mng_cookie.status &
1403 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1404 !(adapter->vlgrp &&
1405 adapter->vlgrp->vlan_devices[adapter->mng_vlan_id])) {
1406 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1407 }
1408
1409 /* If AMT is enabled, let the firmware know that the network
1410 * interface is now closed */
1411 if (adapter->hw.mac_type == e1000_82573 &&
1412 e1000_check_mng_mode(&adapter->hw))
1413 e1000_release_hw_control(adapter);
1414
1415 return 0;
1416 }
1417
1418 /**
1419 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1420 * @adapter: address of board private structure
1421 * @start: address of beginning of memory
1422 * @len: length of memory
1423 **/
1424 static boolean_t
1425 e1000_check_64k_bound(struct e1000_adapter *adapter,
1426 void *start, unsigned long len)
1427 {
1428 unsigned long begin = (unsigned long) start;
1429 unsigned long end = begin + len;
1430
1431 /* First rev 82545 and 82546 need to not allow any memory
1432 * write location to cross 64k boundary due to errata 23 */
1433 if (adapter->hw.mac_type == e1000_82545 ||
1434 adapter->hw.mac_type == e1000_82546) {
1435 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1436 }
1437
1438 return TRUE;
1439 }
1440
1441 /**
1442 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1443 * @adapter: board private structure
1444 * @txdr: tx descriptor ring (for a specific queue) to setup
1445 *
1446 * Return 0 on success, negative on failure
1447 **/
1448
1449 static int
1450 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1451 struct e1000_tx_ring *txdr)
1452 {
1453 struct pci_dev *pdev = adapter->pdev;
1454 int size;
1455
1456 size = sizeof(struct e1000_buffer) * txdr->count;
1457 txdr->buffer_info = vmalloc(size);
1458 if (!txdr->buffer_info) {
1459 DPRINTK(PROBE, ERR,
1460 "Unable to allocate memory for the transmit descriptor ring\n");
1461 return -ENOMEM;
1462 }
1463 memset(txdr->buffer_info, 0, size);
1464
1465 /* round up to nearest 4K */
1466
1467 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1468 E1000_ROUNDUP(txdr->size, 4096);
1469
1470 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1471 if (!txdr->desc) {
1472 setup_tx_desc_die:
1473 vfree(txdr->buffer_info);
1474 DPRINTK(PROBE, ERR,
1475 "Unable to allocate memory for the transmit descriptor ring\n");
1476 return -ENOMEM;
1477 }
1478
1479 /* Fix for errata 23, can't cross 64kB boundary */
1480 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1481 void *olddesc = txdr->desc;
1482 dma_addr_t olddma = txdr->dma;
1483 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1484 "at %p\n", txdr->size, txdr->desc);
1485 /* Try again, without freeing the previous */
1486 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1487 /* Failed allocation, critical failure */
1488 if (!txdr->desc) {
1489 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1490 goto setup_tx_desc_die;
1491 }
1492
1493 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1494 /* give up */
1495 pci_free_consistent(pdev, txdr->size, txdr->desc,
1496 txdr->dma);
1497 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1498 DPRINTK(PROBE, ERR,
1499 "Unable to allocate aligned memory "
1500 "for the transmit descriptor ring\n");
1501 vfree(txdr->buffer_info);
1502 return -ENOMEM;
1503 } else {
1504 /* Free old allocation, new allocation was successful */
1505 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1506 }
1507 }
1508 memset(txdr->desc, 0, txdr->size);
1509
1510 txdr->next_to_use = 0;
1511 txdr->next_to_clean = 0;
1512 spin_lock_init(&txdr->tx_lock);
1513
1514 return 0;
1515 }
1516
1517 /**
1518 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1519 * (Descriptors) for all queues
1520 * @adapter: board private structure
1521 *
1522 * Return 0 on success, negative on failure
1523 **/
1524
1525 int
1526 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1527 {
1528 int i, err = 0;
1529
1530 for (i = 0; i < adapter->num_tx_queues; i++) {
1531 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1532 if (err) {
1533 DPRINTK(PROBE, ERR,
1534 "Allocation for Tx Queue %u failed\n", i);
1535 for (i-- ; i >= 0; i--)
1536 e1000_free_tx_resources(adapter,
1537 &adapter->tx_ring[i]);
1538 break;
1539 }
1540 }
1541
1542 return err;
1543 }
1544
1545 /**
1546 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1547 * @adapter: board private structure
1548 *
1549 * Configure the Tx unit of the MAC after a reset.
1550 **/
1551
1552 static void
1553 e1000_configure_tx(struct e1000_adapter *adapter)
1554 {
1555 uint64_t tdba;
1556 struct e1000_hw *hw = &adapter->hw;
1557 uint32_t tdlen, tctl, tipg, tarc;
1558 uint32_t ipgr1, ipgr2;
1559
1560 /* Setup the HW Tx Head and Tail descriptor pointers */
1561
1562 switch (adapter->num_tx_queues) {
1563 case 1:
1564 default:
1565 tdba = adapter->tx_ring[0].dma;
1566 tdlen = adapter->tx_ring[0].count *
1567 sizeof(struct e1000_tx_desc);
1568 E1000_WRITE_REG(hw, TDLEN, tdlen);
1569 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1570 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1571 E1000_WRITE_REG(hw, TDT, 0);
1572 E1000_WRITE_REG(hw, TDH, 0);
1573 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1574 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1575 break;
1576 }
1577
1578 /* Set the default values for the Tx Inter Packet Gap timer */
1579
1580 if (hw->media_type == e1000_media_type_fiber ||
1581 hw->media_type == e1000_media_type_internal_serdes)
1582 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1583 else
1584 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1585
1586 switch (hw->mac_type) {
1587 case e1000_82542_rev2_0:
1588 case e1000_82542_rev2_1:
1589 tipg = DEFAULT_82542_TIPG_IPGT;
1590 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1591 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1592 break;
1593 case e1000_80003es2lan:
1594 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1595 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1596 break;
1597 default:
1598 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1599 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1600 break;
1601 }
1602 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1603 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1604 E1000_WRITE_REG(hw, TIPG, tipg);
1605
1606 /* Set the Tx Interrupt Delay register */
1607
1608 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1609 if (hw->mac_type >= e1000_82540)
1610 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1611
1612 /* Program the Transmit Control Register */
1613
1614 tctl = E1000_READ_REG(hw, TCTL);
1615 tctl &= ~E1000_TCTL_CT;
1616 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1617 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1618
1619 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1620 tarc = E1000_READ_REG(hw, TARC0);
1621 /* set the speed mode bit, we'll clear it if we're not at
1622 * gigabit link later */
1623 tarc |= (1 << 21);
1624 E1000_WRITE_REG(hw, TARC0, tarc);
1625 } else if (hw->mac_type == e1000_80003es2lan) {
1626 tarc = E1000_READ_REG(hw, TARC0);
1627 tarc |= 1;
1628 E1000_WRITE_REG(hw, TARC0, tarc);
1629 tarc = E1000_READ_REG(hw, TARC1);
1630 tarc |= 1;
1631 E1000_WRITE_REG(hw, TARC1, tarc);
1632 }
1633
1634 e1000_config_collision_dist(hw);
1635
1636 /* Setup Transmit Descriptor Settings for eop descriptor */
1637 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1638
1639 /* only set IDE if we are delaying interrupts using the timers */
1640 if (adapter->tx_int_delay)
1641 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1642
1643 if (hw->mac_type < e1000_82543)
1644 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1645 else
1646 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1647
1648 /* Cache if we're 82544 running in PCI-X because we'll
1649 * need this to apply a workaround later in the send path. */
1650 if (hw->mac_type == e1000_82544 &&
1651 hw->bus_type == e1000_bus_type_pcix)
1652 adapter->pcix_82544 = 1;
1653
1654 E1000_WRITE_REG(hw, TCTL, tctl);
1655
1656 }
1657
1658 /**
1659 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1660 * @adapter: board private structure
1661 * @rxdr: rx descriptor ring (for a specific queue) to setup
1662 *
1663 * Returns 0 on success, negative on failure
1664 **/
1665
1666 static int
1667 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1668 struct e1000_rx_ring *rxdr)
1669 {
1670 struct pci_dev *pdev = adapter->pdev;
1671 int size, desc_len;
1672
1673 size = sizeof(struct e1000_buffer) * rxdr->count;
1674 rxdr->buffer_info = vmalloc(size);
1675 if (!rxdr->buffer_info) {
1676 DPRINTK(PROBE, ERR,
1677 "Unable to allocate memory for the receive descriptor ring\n");
1678 return -ENOMEM;
1679 }
1680 memset(rxdr->buffer_info, 0, size);
1681
1682 size = sizeof(struct e1000_ps_page) * rxdr->count;
1683 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
1684 if (!rxdr->ps_page) {
1685 vfree(rxdr->buffer_info);
1686 DPRINTK(PROBE, ERR,
1687 "Unable to allocate memory for the receive descriptor ring\n");
1688 return -ENOMEM;
1689 }
1690 memset(rxdr->ps_page, 0, size);
1691
1692 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1693 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
1694 if (!rxdr->ps_page_dma) {
1695 vfree(rxdr->buffer_info);
1696 kfree(rxdr->ps_page);
1697 DPRINTK(PROBE, ERR,
1698 "Unable to allocate memory for the receive descriptor ring\n");
1699 return -ENOMEM;
1700 }
1701 memset(rxdr->ps_page_dma, 0, size);
1702
1703 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1704 desc_len = sizeof(struct e1000_rx_desc);
1705 else
1706 desc_len = sizeof(union e1000_rx_desc_packet_split);
1707
1708 /* Round up to nearest 4K */
1709
1710 rxdr->size = rxdr->count * desc_len;
1711 E1000_ROUNDUP(rxdr->size, 4096);
1712
1713 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1714
1715 if (!rxdr->desc) {
1716 DPRINTK(PROBE, ERR,
1717 "Unable to allocate memory for the receive descriptor ring\n");
1718 setup_rx_desc_die:
1719 vfree(rxdr->buffer_info);
1720 kfree(rxdr->ps_page);
1721 kfree(rxdr->ps_page_dma);
1722 return -ENOMEM;
1723 }
1724
1725 /* Fix for errata 23, can't cross 64kB boundary */
1726 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1727 void *olddesc = rxdr->desc;
1728 dma_addr_t olddma = rxdr->dma;
1729 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1730 "at %p\n", rxdr->size, rxdr->desc);
1731 /* Try again, without freeing the previous */
1732 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1733 /* Failed allocation, critical failure */
1734 if (!rxdr->desc) {
1735 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1736 DPRINTK(PROBE, ERR,
1737 "Unable to allocate memory "
1738 "for the receive descriptor ring\n");
1739 goto setup_rx_desc_die;
1740 }
1741
1742 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1743 /* give up */
1744 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1745 rxdr->dma);
1746 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1747 DPRINTK(PROBE, ERR,
1748 "Unable to allocate aligned memory "
1749 "for the receive descriptor ring\n");
1750 goto setup_rx_desc_die;
1751 } else {
1752 /* Free old allocation, new allocation was successful */
1753 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1754 }
1755 }
1756 memset(rxdr->desc, 0, rxdr->size);
1757
1758 rxdr->next_to_clean = 0;
1759 rxdr->next_to_use = 0;
1760
1761 return 0;
1762 }
1763
1764 /**
1765 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1766 * (Descriptors) for all queues
1767 * @adapter: board private structure
1768 *
1769 * Return 0 on success, negative on failure
1770 **/
1771
1772 int
1773 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1774 {
1775 int i, err = 0;
1776
1777 for (i = 0; i < adapter->num_rx_queues; i++) {
1778 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1779 if (err) {
1780 DPRINTK(PROBE, ERR,
1781 "Allocation for Rx Queue %u failed\n", i);
1782 for (i-- ; i >= 0; i--)
1783 e1000_free_rx_resources(adapter,
1784 &adapter->rx_ring[i]);
1785 break;
1786 }
1787 }
1788
1789 return err;
1790 }
1791
1792 /**
1793 * e1000_setup_rctl - configure the receive control registers
1794 * @adapter: Board private structure
1795 **/
1796 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1797 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1798 static void
1799 e1000_setup_rctl(struct e1000_adapter *adapter)
1800 {
1801 uint32_t rctl, rfctl;
1802 uint32_t psrctl = 0;
1803 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1804 uint32_t pages = 0;
1805 #endif
1806
1807 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1808
1809 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1810
1811 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1812 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1813 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1814
1815 if (adapter->hw.tbi_compatibility_on == 1)
1816 rctl |= E1000_RCTL_SBP;
1817 else
1818 rctl &= ~E1000_RCTL_SBP;
1819
1820 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1821 rctl &= ~E1000_RCTL_LPE;
1822 else
1823 rctl |= E1000_RCTL_LPE;
1824
1825 /* Setup buffer sizes */
1826 rctl &= ~E1000_RCTL_SZ_4096;
1827 rctl |= E1000_RCTL_BSEX;
1828 switch (adapter->rx_buffer_len) {
1829 case E1000_RXBUFFER_256:
1830 rctl |= E1000_RCTL_SZ_256;
1831 rctl &= ~E1000_RCTL_BSEX;
1832 break;
1833 case E1000_RXBUFFER_512:
1834 rctl |= E1000_RCTL_SZ_512;
1835 rctl &= ~E1000_RCTL_BSEX;
1836 break;
1837 case E1000_RXBUFFER_1024:
1838 rctl |= E1000_RCTL_SZ_1024;
1839 rctl &= ~E1000_RCTL_BSEX;
1840 break;
1841 case E1000_RXBUFFER_2048:
1842 default:
1843 rctl |= E1000_RCTL_SZ_2048;
1844 rctl &= ~E1000_RCTL_BSEX;
1845 break;
1846 case E1000_RXBUFFER_4096:
1847 rctl |= E1000_RCTL_SZ_4096;
1848 break;
1849 case E1000_RXBUFFER_8192:
1850 rctl |= E1000_RCTL_SZ_8192;
1851 break;
1852 case E1000_RXBUFFER_16384:
1853 rctl |= E1000_RCTL_SZ_16384;
1854 break;
1855 }
1856
1857 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1858 /* 82571 and greater support packet-split where the protocol
1859 * header is placed in skb->data and the packet data is
1860 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1861 * In the case of a non-split, skb->data is linearly filled,
1862 * followed by the page buffers. Therefore, skb->data is
1863 * sized to hold the largest protocol header.
1864 */
1865 /* allocations using alloc_page take too long for regular MTU
1866 * so only enable packet split for jumbo frames */
1867 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1868 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1869 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
1870 adapter->rx_ps_pages = pages;
1871 else
1872 adapter->rx_ps_pages = 0;
1873 #endif
1874 if (adapter->rx_ps_pages) {
1875 /* Configure extra packet-split registers */
1876 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1877 rfctl |= E1000_RFCTL_EXTEN;
1878 /* disable packet split support for IPv6 extension headers,
1879 * because some malformed IPv6 headers can hang the RX */
1880 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1881 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1882
1883 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1884
1885 rctl |= E1000_RCTL_DTYP_PS;
1886
1887 psrctl |= adapter->rx_ps_bsize0 >>
1888 E1000_PSRCTL_BSIZE0_SHIFT;
1889
1890 switch (adapter->rx_ps_pages) {
1891 case 3:
1892 psrctl |= PAGE_SIZE <<
1893 E1000_PSRCTL_BSIZE3_SHIFT;
1894 case 2:
1895 psrctl |= PAGE_SIZE <<
1896 E1000_PSRCTL_BSIZE2_SHIFT;
1897 case 1:
1898 psrctl |= PAGE_SIZE >>
1899 E1000_PSRCTL_BSIZE1_SHIFT;
1900 break;
1901 }
1902
1903 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1904 }
1905
1906 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1907 }
1908
1909 /**
1910 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1911 * @adapter: board private structure
1912 *
1913 * Configure the Rx unit of the MAC after a reset.
1914 **/
1915
1916 static void
1917 e1000_configure_rx(struct e1000_adapter *adapter)
1918 {
1919 uint64_t rdba;
1920 struct e1000_hw *hw = &adapter->hw;
1921 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
1922
1923 if (adapter->rx_ps_pages) {
1924 /* this is a 32 byte descriptor */
1925 rdlen = adapter->rx_ring[0].count *
1926 sizeof(union e1000_rx_desc_packet_split);
1927 adapter->clean_rx = e1000_clean_rx_irq_ps;
1928 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1929 } else {
1930 rdlen = adapter->rx_ring[0].count *
1931 sizeof(struct e1000_rx_desc);
1932 adapter->clean_rx = e1000_clean_rx_irq;
1933 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1934 }
1935
1936 /* disable receives while setting up the descriptors */
1937 rctl = E1000_READ_REG(hw, RCTL);
1938 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1939
1940 /* set the Receive Delay Timer Register */
1941 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1942
1943 if (hw->mac_type >= e1000_82540) {
1944 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
1945 if (adapter->itr_setting != 0)
1946 E1000_WRITE_REG(hw, ITR,
1947 1000000000 / (adapter->itr * 256));
1948 }
1949
1950 if (hw->mac_type >= e1000_82571) {
1951 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1952 /* Reset delay timers after every interrupt */
1953 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1954 #ifdef CONFIG_E1000_NAPI
1955 /* Auto-Mask interrupts upon ICR access */
1956 ctrl_ext |= E1000_CTRL_EXT_IAME;
1957 E1000_WRITE_REG(hw, IAM, 0xffffffff);
1958 #endif
1959 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1960 E1000_WRITE_FLUSH(hw);
1961 }
1962
1963 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1964 * the Base and Length of the Rx Descriptor Ring */
1965 switch (adapter->num_rx_queues) {
1966 case 1:
1967 default:
1968 rdba = adapter->rx_ring[0].dma;
1969 E1000_WRITE_REG(hw, RDLEN, rdlen);
1970 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1971 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1972 E1000_WRITE_REG(hw, RDT, 0);
1973 E1000_WRITE_REG(hw, RDH, 0);
1974 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1975 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
1976 break;
1977 }
1978
1979 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
1980 if (hw->mac_type >= e1000_82543) {
1981 rxcsum = E1000_READ_REG(hw, RXCSUM);
1982 if (adapter->rx_csum == TRUE) {
1983 rxcsum |= E1000_RXCSUM_TUOFL;
1984
1985 /* Enable 82571 IPv4 payload checksum for UDP fragments
1986 * Must be used in conjunction with packet-split. */
1987 if ((hw->mac_type >= e1000_82571) &&
1988 (adapter->rx_ps_pages)) {
1989 rxcsum |= E1000_RXCSUM_IPPCSE;
1990 }
1991 } else {
1992 rxcsum &= ~E1000_RXCSUM_TUOFL;
1993 /* don't need to clear IPPCSE as it defaults to 0 */
1994 }
1995 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1996 }
1997
1998 /* enable early receives on 82573, only takes effect if using > 2048
1999 * byte total frame size. for example only for jumbo frames */
2000 #define E1000_ERT_2048 0x100
2001 if (hw->mac_type == e1000_82573)
2002 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
2003
2004 /* Enable Receives */
2005 E1000_WRITE_REG(hw, RCTL, rctl);
2006 }
2007
2008 /**
2009 * e1000_free_tx_resources - Free Tx Resources per Queue
2010 * @adapter: board private structure
2011 * @tx_ring: Tx descriptor ring for a specific queue
2012 *
2013 * Free all transmit software resources
2014 **/
2015
2016 static void
2017 e1000_free_tx_resources(struct e1000_adapter *adapter,
2018 struct e1000_tx_ring *tx_ring)
2019 {
2020 struct pci_dev *pdev = adapter->pdev;
2021
2022 e1000_clean_tx_ring(adapter, tx_ring);
2023
2024 vfree(tx_ring->buffer_info);
2025 tx_ring->buffer_info = NULL;
2026
2027 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2028
2029 tx_ring->desc = NULL;
2030 }
2031
2032 /**
2033 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2034 * @adapter: board private structure
2035 *
2036 * Free all transmit software resources
2037 **/
2038
2039 void
2040 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2041 {
2042 int i;
2043
2044 for (i = 0; i < adapter->num_tx_queues; i++)
2045 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2046 }
2047
2048 static void
2049 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2050 struct e1000_buffer *buffer_info)
2051 {
2052 if (buffer_info->dma) {
2053 pci_unmap_page(adapter->pdev,
2054 buffer_info->dma,
2055 buffer_info->length,
2056 PCI_DMA_TODEVICE);
2057 buffer_info->dma = 0;
2058 }
2059 if (buffer_info->skb) {
2060 dev_kfree_skb_any(buffer_info->skb);
2061 buffer_info->skb = NULL;
2062 }
2063 /* buffer_info must be completely set up in the transmit path */
2064 }
2065
2066 /**
2067 * e1000_clean_tx_ring - Free Tx Buffers
2068 * @adapter: board private structure
2069 * @tx_ring: ring to be cleaned
2070 **/
2071
2072 static void
2073 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2074 struct e1000_tx_ring *tx_ring)
2075 {
2076 struct e1000_buffer *buffer_info;
2077 unsigned long size;
2078 unsigned int i;
2079
2080 /* Free all the Tx ring sk_buffs */
2081
2082 for (i = 0; i < tx_ring->count; i++) {
2083 buffer_info = &tx_ring->buffer_info[i];
2084 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2085 }
2086
2087 size = sizeof(struct e1000_buffer) * tx_ring->count;
2088 memset(tx_ring->buffer_info, 0, size);
2089
2090 /* Zero out the descriptor ring */
2091
2092 memset(tx_ring->desc, 0, tx_ring->size);
2093
2094 tx_ring->next_to_use = 0;
2095 tx_ring->next_to_clean = 0;
2096 tx_ring->last_tx_tso = 0;
2097
2098 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2099 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2100 }
2101
2102 /**
2103 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2104 * @adapter: board private structure
2105 **/
2106
2107 static void
2108 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2109 {
2110 int i;
2111
2112 for (i = 0; i < adapter->num_tx_queues; i++)
2113 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2114 }
2115
2116 /**
2117 * e1000_free_rx_resources - Free Rx Resources
2118 * @adapter: board private structure
2119 * @rx_ring: ring to clean the resources from
2120 *
2121 * Free all receive software resources
2122 **/
2123
2124 static void
2125 e1000_free_rx_resources(struct e1000_adapter *adapter,
2126 struct e1000_rx_ring *rx_ring)
2127 {
2128 struct pci_dev *pdev = adapter->pdev;
2129
2130 e1000_clean_rx_ring(adapter, rx_ring);
2131
2132 vfree(rx_ring->buffer_info);
2133 rx_ring->buffer_info = NULL;
2134 kfree(rx_ring->ps_page);
2135 rx_ring->ps_page = NULL;
2136 kfree(rx_ring->ps_page_dma);
2137 rx_ring->ps_page_dma = NULL;
2138
2139 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2140
2141 rx_ring->desc = NULL;
2142 }
2143
2144 /**
2145 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2146 * @adapter: board private structure
2147 *
2148 * Free all receive software resources
2149 **/
2150
2151 void
2152 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2153 {
2154 int i;
2155
2156 for (i = 0; i < adapter->num_rx_queues; i++)
2157 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2158 }
2159
2160 /**
2161 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2162 * @adapter: board private structure
2163 * @rx_ring: ring to free buffers from
2164 **/
2165
2166 static void
2167 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2168 struct e1000_rx_ring *rx_ring)
2169 {
2170 struct e1000_buffer *buffer_info;
2171 struct e1000_ps_page *ps_page;
2172 struct e1000_ps_page_dma *ps_page_dma;
2173 struct pci_dev *pdev = adapter->pdev;
2174 unsigned long size;
2175 unsigned int i, j;
2176
2177 /* Free all the Rx ring sk_buffs */
2178 for (i = 0; i < rx_ring->count; i++) {
2179 buffer_info = &rx_ring->buffer_info[i];
2180 if (buffer_info->skb) {
2181 pci_unmap_single(pdev,
2182 buffer_info->dma,
2183 buffer_info->length,
2184 PCI_DMA_FROMDEVICE);
2185
2186 dev_kfree_skb(buffer_info->skb);
2187 buffer_info->skb = NULL;
2188 }
2189 ps_page = &rx_ring->ps_page[i];
2190 ps_page_dma = &rx_ring->ps_page_dma[i];
2191 for (j = 0; j < adapter->rx_ps_pages; j++) {
2192 if (!ps_page->ps_page[j]) break;
2193 pci_unmap_page(pdev,
2194 ps_page_dma->ps_page_dma[j],
2195 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2196 ps_page_dma->ps_page_dma[j] = 0;
2197 put_page(ps_page->ps_page[j]);
2198 ps_page->ps_page[j] = NULL;
2199 }
2200 }
2201
2202 size = sizeof(struct e1000_buffer) * rx_ring->count;
2203 memset(rx_ring->buffer_info, 0, size);
2204 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2205 memset(rx_ring->ps_page, 0, size);
2206 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2207 memset(rx_ring->ps_page_dma, 0, size);
2208
2209 /* Zero out the descriptor ring */
2210
2211 memset(rx_ring->desc, 0, rx_ring->size);
2212
2213 rx_ring->next_to_clean = 0;
2214 rx_ring->next_to_use = 0;
2215
2216 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2217 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2218 }
2219
2220 /**
2221 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2222 * @adapter: board private structure
2223 **/
2224
2225 static void
2226 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2227 {
2228 int i;
2229
2230 for (i = 0; i < adapter->num_rx_queues; i++)
2231 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2232 }
2233
2234 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2235 * and memory write and invalidate disabled for certain operations
2236 */
2237 static void
2238 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2239 {
2240 struct net_device *netdev = adapter->netdev;
2241 uint32_t rctl;
2242
2243 e1000_pci_clear_mwi(&adapter->hw);
2244
2245 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2246 rctl |= E1000_RCTL_RST;
2247 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2248 E1000_WRITE_FLUSH(&adapter->hw);
2249 mdelay(5);
2250
2251 if (netif_running(netdev))
2252 e1000_clean_all_rx_rings(adapter);
2253 }
2254
2255 static void
2256 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2257 {
2258 struct net_device *netdev = adapter->netdev;
2259 uint32_t rctl;
2260
2261 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2262 rctl &= ~E1000_RCTL_RST;
2263 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2264 E1000_WRITE_FLUSH(&adapter->hw);
2265 mdelay(5);
2266
2267 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2268 e1000_pci_set_mwi(&adapter->hw);
2269
2270 if (netif_running(netdev)) {
2271 /* No need to loop, because 82542 supports only 1 queue */
2272 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2273 e1000_configure_rx(adapter);
2274 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2275 }
2276 }
2277
2278 /**
2279 * e1000_set_mac - Change the Ethernet Address of the NIC
2280 * @netdev: network interface device structure
2281 * @p: pointer to an address structure
2282 *
2283 * Returns 0 on success, negative on failure
2284 **/
2285
2286 static int
2287 e1000_set_mac(struct net_device *netdev, void *p)
2288 {
2289 struct e1000_adapter *adapter = netdev_priv(netdev);
2290 struct sockaddr *addr = p;
2291
2292 if (!is_valid_ether_addr(addr->sa_data))
2293 return -EADDRNOTAVAIL;
2294
2295 /* 82542 2.0 needs to be in reset to write receive address registers */
2296
2297 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2298 e1000_enter_82542_rst(adapter);
2299
2300 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2301 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2302
2303 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2304
2305 /* With 82571 controllers, LAA may be overwritten (with the default)
2306 * due to controller reset from the other port. */
2307 if (adapter->hw.mac_type == e1000_82571) {
2308 /* activate the work around */
2309 adapter->hw.laa_is_present = 1;
2310
2311 /* Hold a copy of the LAA in RAR[14] This is done so that
2312 * between the time RAR[0] gets clobbered and the time it
2313 * gets fixed (in e1000_watchdog), the actual LAA is in one
2314 * of the RARs and no incoming packets directed to this port
2315 * are dropped. Eventaully the LAA will be in RAR[0] and
2316 * RAR[14] */
2317 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2318 E1000_RAR_ENTRIES - 1);
2319 }
2320
2321 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2322 e1000_leave_82542_rst(adapter);
2323
2324 return 0;
2325 }
2326
2327 /**
2328 * e1000_set_multi - Multicast and Promiscuous mode set
2329 * @netdev: network interface device structure
2330 *
2331 * The set_multi entry point is called whenever the multicast address
2332 * list or the network interface flags are updated. This routine is
2333 * responsible for configuring the hardware for proper multicast,
2334 * promiscuous mode, and all-multi behavior.
2335 **/
2336
2337 static void
2338 e1000_set_multi(struct net_device *netdev)
2339 {
2340 struct e1000_adapter *adapter = netdev_priv(netdev);
2341 struct e1000_hw *hw = &adapter->hw;
2342 struct dev_mc_list *mc_ptr;
2343 uint32_t rctl;
2344 uint32_t hash_value;
2345 int i, rar_entries = E1000_RAR_ENTRIES;
2346 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2347 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2348 E1000_NUM_MTA_REGISTERS;
2349
2350 if (adapter->hw.mac_type == e1000_ich8lan)
2351 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2352
2353 /* reserve RAR[14] for LAA over-write work-around */
2354 if (adapter->hw.mac_type == e1000_82571)
2355 rar_entries--;
2356
2357 /* Check for Promiscuous and All Multicast modes */
2358
2359 rctl = E1000_READ_REG(hw, RCTL);
2360
2361 if (netdev->flags & IFF_PROMISC) {
2362 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2363 } else if (netdev->flags & IFF_ALLMULTI) {
2364 rctl |= E1000_RCTL_MPE;
2365 rctl &= ~E1000_RCTL_UPE;
2366 } else {
2367 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2368 }
2369
2370 E1000_WRITE_REG(hw, RCTL, rctl);
2371
2372 /* 82542 2.0 needs to be in reset to write receive address registers */
2373
2374 if (hw->mac_type == e1000_82542_rev2_0)
2375 e1000_enter_82542_rst(adapter);
2376
2377 /* load the first 14 multicast address into the exact filters 1-14
2378 * RAR 0 is used for the station MAC adddress
2379 * if there are not 14 addresses, go ahead and clear the filters
2380 * -- with 82571 controllers only 0-13 entries are filled here
2381 */
2382 mc_ptr = netdev->mc_list;
2383
2384 for (i = 1; i < rar_entries; i++) {
2385 if (mc_ptr) {
2386 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2387 mc_ptr = mc_ptr->next;
2388 } else {
2389 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2390 E1000_WRITE_FLUSH(hw);
2391 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2392 E1000_WRITE_FLUSH(hw);
2393 }
2394 }
2395
2396 /* clear the old settings from the multicast hash table */
2397
2398 for (i = 0; i < mta_reg_count; i++) {
2399 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2400 E1000_WRITE_FLUSH(hw);
2401 }
2402
2403 /* load any remaining addresses into the hash table */
2404
2405 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2406 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2407 e1000_mta_set(hw, hash_value);
2408 }
2409
2410 if (hw->mac_type == e1000_82542_rev2_0)
2411 e1000_leave_82542_rst(adapter);
2412 }
2413
2414 /* Need to wait a few seconds after link up to get diagnostic information from
2415 * the phy */
2416
2417 static void
2418 e1000_update_phy_info(unsigned long data)
2419 {
2420 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2421 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2422 }
2423
2424 /**
2425 * e1000_82547_tx_fifo_stall - Timer Call-back
2426 * @data: pointer to adapter cast into an unsigned long
2427 **/
2428
2429 static void
2430 e1000_82547_tx_fifo_stall(unsigned long data)
2431 {
2432 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2433 struct net_device *netdev = adapter->netdev;
2434 uint32_t tctl;
2435
2436 if (atomic_read(&adapter->tx_fifo_stall)) {
2437 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2438 E1000_READ_REG(&adapter->hw, TDH)) &&
2439 (E1000_READ_REG(&adapter->hw, TDFT) ==
2440 E1000_READ_REG(&adapter->hw, TDFH)) &&
2441 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2442 E1000_READ_REG(&adapter->hw, TDFHS))) {
2443 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2444 E1000_WRITE_REG(&adapter->hw, TCTL,
2445 tctl & ~E1000_TCTL_EN);
2446 E1000_WRITE_REG(&adapter->hw, TDFT,
2447 adapter->tx_head_addr);
2448 E1000_WRITE_REG(&adapter->hw, TDFH,
2449 adapter->tx_head_addr);
2450 E1000_WRITE_REG(&adapter->hw, TDFTS,
2451 adapter->tx_head_addr);
2452 E1000_WRITE_REG(&adapter->hw, TDFHS,
2453 adapter->tx_head_addr);
2454 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2455 E1000_WRITE_FLUSH(&adapter->hw);
2456
2457 adapter->tx_fifo_head = 0;
2458 atomic_set(&adapter->tx_fifo_stall, 0);
2459 netif_wake_queue(netdev);
2460 } else {
2461 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2462 }
2463 }
2464 }
2465
2466 /**
2467 * e1000_watchdog - Timer Call-back
2468 * @data: pointer to adapter cast into an unsigned long
2469 **/
2470 static void
2471 e1000_watchdog(unsigned long data)
2472 {
2473 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2474 struct net_device *netdev = adapter->netdev;
2475 struct e1000_tx_ring *txdr = adapter->tx_ring;
2476 uint32_t link, tctl;
2477 int32_t ret_val;
2478
2479 ret_val = e1000_check_for_link(&adapter->hw);
2480 if ((ret_val == E1000_ERR_PHY) &&
2481 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2482 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2483 /* See e1000_kumeran_lock_loss_workaround() */
2484 DPRINTK(LINK, INFO,
2485 "Gigabit has been disabled, downgrading speed\n");
2486 }
2487
2488 if (adapter->hw.mac_type == e1000_82573) {
2489 e1000_enable_tx_pkt_filtering(&adapter->hw);
2490 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2491 e1000_update_mng_vlan(adapter);
2492 }
2493
2494 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2495 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2496 link = !adapter->hw.serdes_link_down;
2497 else
2498 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2499
2500 if (link) {
2501 if (!netif_carrier_ok(netdev)) {
2502 boolean_t txb2b = 1;
2503 e1000_get_speed_and_duplex(&adapter->hw,
2504 &adapter->link_speed,
2505 &adapter->link_duplex);
2506
2507 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2508 adapter->link_speed,
2509 adapter->link_duplex == FULL_DUPLEX ?
2510 "Full Duplex" : "Half Duplex");
2511
2512 /* tweak tx_queue_len according to speed/duplex
2513 * and adjust the timeout factor */
2514 netdev->tx_queue_len = adapter->tx_queue_len;
2515 adapter->tx_timeout_factor = 1;
2516 switch (adapter->link_speed) {
2517 case SPEED_10:
2518 txb2b = 0;
2519 netdev->tx_queue_len = 10;
2520 adapter->tx_timeout_factor = 8;
2521 break;
2522 case SPEED_100:
2523 txb2b = 0;
2524 netdev->tx_queue_len = 100;
2525 /* maybe add some timeout factor ? */
2526 break;
2527 }
2528
2529 if ((adapter->hw.mac_type == e1000_82571 ||
2530 adapter->hw.mac_type == e1000_82572) &&
2531 txb2b == 0) {
2532 uint32_t tarc0;
2533 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2534 tarc0 &= ~(1 << 21);
2535 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2536 }
2537
2538 #ifdef NETIF_F_TSO
2539 /* disable TSO for pcie and 10/100 speeds, to avoid
2540 * some hardware issues */
2541 if (!adapter->tso_force &&
2542 adapter->hw.bus_type == e1000_bus_type_pci_express){
2543 switch (adapter->link_speed) {
2544 case SPEED_10:
2545 case SPEED_100:
2546 DPRINTK(PROBE,INFO,
2547 "10/100 speed: disabling TSO\n");
2548 netdev->features &= ~NETIF_F_TSO;
2549 #ifdef NETIF_F_TSO6
2550 netdev->features &= ~NETIF_F_TSO6;
2551 #endif
2552 break;
2553 case SPEED_1000:
2554 netdev->features |= NETIF_F_TSO;
2555 #ifdef NETIF_F_TSO6
2556 netdev->features |= NETIF_F_TSO6;
2557 #endif
2558 break;
2559 default:
2560 /* oops */
2561 break;
2562 }
2563 }
2564 #endif
2565
2566 /* enable transmits in the hardware, need to do this
2567 * after setting TARC0 */
2568 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2569 tctl |= E1000_TCTL_EN;
2570 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2571
2572 netif_carrier_on(netdev);
2573 netif_wake_queue(netdev);
2574 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2575 adapter->smartspeed = 0;
2576 }
2577 } else {
2578 if (netif_carrier_ok(netdev)) {
2579 adapter->link_speed = 0;
2580 adapter->link_duplex = 0;
2581 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2582 netif_carrier_off(netdev);
2583 netif_stop_queue(netdev);
2584 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2585
2586 /* 80003ES2LAN workaround--
2587 * For packet buffer work-around on link down event;
2588 * disable receives in the ISR and
2589 * reset device here in the watchdog
2590 */
2591 if (adapter->hw.mac_type == e1000_80003es2lan)
2592 /* reset device */
2593 schedule_work(&adapter->reset_task);
2594 }
2595
2596 e1000_smartspeed(adapter);
2597 }
2598
2599 e1000_update_stats(adapter);
2600
2601 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2602 adapter->tpt_old = adapter->stats.tpt;
2603 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2604 adapter->colc_old = adapter->stats.colc;
2605
2606 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2607 adapter->gorcl_old = adapter->stats.gorcl;
2608 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2609 adapter->gotcl_old = adapter->stats.gotcl;
2610
2611 e1000_update_adaptive(&adapter->hw);
2612
2613 if (!netif_carrier_ok(netdev)) {
2614 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2615 /* We've lost link, so the controller stops DMA,
2616 * but we've got queued Tx work that's never going
2617 * to get done, so reset controller to flush Tx.
2618 * (Do the reset outside of interrupt context). */
2619 adapter->tx_timeout_count++;
2620 schedule_work(&adapter->reset_task);
2621 }
2622 }
2623
2624 /* Cause software interrupt to ensure rx ring is cleaned */
2625 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2626
2627 /* Force detection of hung controller every watchdog period */
2628 adapter->detect_tx_hung = TRUE;
2629
2630 /* With 82571 controllers, LAA may be overwritten due to controller
2631 * reset from the other port. Set the appropriate LAA in RAR[0] */
2632 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2633 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2634
2635 /* Reset the timer */
2636 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2637 }
2638
2639 enum latency_range {
2640 lowest_latency = 0,
2641 low_latency = 1,
2642 bulk_latency = 2,
2643 latency_invalid = 255
2644 };
2645
2646 /**
2647 * e1000_update_itr - update the dynamic ITR value based on statistics
2648 * Stores a new ITR value based on packets and byte
2649 * counts during the last interrupt. The advantage of per interrupt
2650 * computation is faster updates and more accurate ITR for the current
2651 * traffic pattern. Constants in this function were computed
2652 * based on theoretical maximum wire speed and thresholds were set based
2653 * on testing data as well as attempting to minimize response time
2654 * while increasing bulk throughput.
2655 * this functionality is controlled by the InterruptThrottleRate module
2656 * parameter (see e1000_param.c)
2657 * @adapter: pointer to adapter
2658 * @itr_setting: current adapter->itr
2659 * @packets: the number of packets during this measurement interval
2660 * @bytes: the number of bytes during this measurement interval
2661 **/
2662 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2663 uint16_t itr_setting,
2664 int packets,
2665 int bytes)
2666 {
2667 unsigned int retval = itr_setting;
2668 struct e1000_hw *hw = &adapter->hw;
2669
2670 if (unlikely(hw->mac_type < e1000_82540))
2671 goto update_itr_done;
2672
2673 if (packets == 0)
2674 goto update_itr_done;
2675
2676 switch (itr_setting) {
2677 case lowest_latency:
2678 /* jumbo frames get bulk treatment*/
2679 if (bytes/packets > 8000)
2680 retval = bulk_latency;
2681 else if ((packets < 5) && (bytes > 512))
2682 retval = low_latency;
2683 break;
2684 case low_latency: /* 50 usec aka 20000 ints/s */
2685 if (bytes > 10000) {
2686 /* jumbo frames need bulk latency setting */
2687 if (bytes/packets > 8000)
2688 retval = bulk_latency;
2689 else if ((packets < 10) || ((bytes/packets) > 1200))
2690 retval = bulk_latency;
2691 else if ((packets > 35))
2692 retval = lowest_latency;
2693 } else if (bytes/packets > 2000)
2694 retval = bulk_latency;
2695 else if (packets <= 2 && bytes < 512)
2696 retval = lowest_latency;
2697 break;
2698 case bulk_latency: /* 250 usec aka 4000 ints/s */
2699 if (bytes > 25000) {
2700 if (packets > 35)
2701 retval = low_latency;
2702 } else if (bytes < 6000) {
2703 retval = low_latency;
2704 }
2705 break;
2706 }
2707
2708 update_itr_done:
2709 return retval;
2710 }
2711
2712 static void e1000_set_itr(struct e1000_adapter *adapter)
2713 {
2714 struct e1000_hw *hw = &adapter->hw;
2715 uint16_t current_itr;
2716 uint32_t new_itr = adapter->itr;
2717
2718 if (unlikely(hw->mac_type < e1000_82540))
2719 return;
2720
2721 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2722 if (unlikely(adapter->link_speed != SPEED_1000)) {
2723 current_itr = 0;
2724 new_itr = 4000;
2725 goto set_itr_now;
2726 }
2727
2728 adapter->tx_itr = e1000_update_itr(adapter,
2729 adapter->tx_itr,
2730 adapter->total_tx_packets,
2731 adapter->total_tx_bytes);
2732 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2733 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2734 adapter->tx_itr = low_latency;
2735
2736 adapter->rx_itr = e1000_update_itr(adapter,
2737 adapter->rx_itr,
2738 adapter->total_rx_packets,
2739 adapter->total_rx_bytes);
2740 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2741 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2742 adapter->rx_itr = low_latency;
2743
2744 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2745
2746 switch (current_itr) {
2747 /* counts and packets in update_itr are dependent on these numbers */
2748 case lowest_latency:
2749 new_itr = 70000;
2750 break;
2751 case low_latency:
2752 new_itr = 20000; /* aka hwitr = ~200 */
2753 break;
2754 case bulk_latency:
2755 new_itr = 4000;
2756 break;
2757 default:
2758 break;
2759 }
2760
2761 set_itr_now:
2762 if (new_itr != adapter->itr) {
2763 /* this attempts to bias the interrupt rate towards Bulk
2764 * by adding intermediate steps when interrupt rate is
2765 * increasing */
2766 new_itr = new_itr > adapter->itr ?
2767 min(adapter->itr + (new_itr >> 2), new_itr) :
2768 new_itr;
2769 adapter->itr = new_itr;
2770 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2771 }
2772
2773 return;
2774 }
2775
2776 #define E1000_TX_FLAGS_CSUM 0x00000001
2777 #define E1000_TX_FLAGS_VLAN 0x00000002
2778 #define E1000_TX_FLAGS_TSO 0x00000004
2779 #define E1000_TX_FLAGS_IPV4 0x00000008
2780 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2781 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2782
2783 static int
2784 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2785 struct sk_buff *skb)
2786 {
2787 #ifdef NETIF_F_TSO
2788 struct e1000_context_desc *context_desc;
2789 struct e1000_buffer *buffer_info;
2790 unsigned int i;
2791 uint32_t cmd_length = 0;
2792 uint16_t ipcse = 0, tucse, mss;
2793 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2794 int err;
2795
2796 if (skb_is_gso(skb)) {
2797 if (skb_header_cloned(skb)) {
2798 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2799 if (err)
2800 return err;
2801 }
2802
2803 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2804 mss = skb_shinfo(skb)->gso_size;
2805 if (skb->protocol == htons(ETH_P_IP)) {
2806 skb->nh.iph->tot_len = 0;
2807 skb->nh.iph->check = 0;
2808 skb->h.th->check =
2809 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2810 skb->nh.iph->daddr,
2811 0,
2812 IPPROTO_TCP,
2813 0);
2814 cmd_length = E1000_TXD_CMD_IP;
2815 ipcse = skb->h.raw - skb->data - 1;
2816 #ifdef NETIF_F_TSO6
2817 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2818 skb->nh.ipv6h->payload_len = 0;
2819 skb->h.th->check =
2820 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2821 &skb->nh.ipv6h->daddr,
2822 0,
2823 IPPROTO_TCP,
2824 0);
2825 ipcse = 0;
2826 #endif
2827 }
2828 ipcss = skb->nh.raw - skb->data;
2829 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
2830 tucss = skb->h.raw - skb->data;
2831 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2832 tucse = 0;
2833
2834 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2835 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2836
2837 i = tx_ring->next_to_use;
2838 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2839 buffer_info = &tx_ring->buffer_info[i];
2840
2841 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2842 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2843 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2844 context_desc->upper_setup.tcp_fields.tucss = tucss;
2845 context_desc->upper_setup.tcp_fields.tucso = tucso;
2846 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2847 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2848 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2849 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2850
2851 buffer_info->time_stamp = jiffies;
2852 buffer_info->next_to_watch = i;
2853
2854 if (++i == tx_ring->count) i = 0;
2855 tx_ring->next_to_use = i;
2856
2857 return TRUE;
2858 }
2859 #endif
2860
2861 return FALSE;
2862 }
2863
2864 static boolean_t
2865 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2866 struct sk_buff *skb)
2867 {
2868 struct e1000_context_desc *context_desc;
2869 struct e1000_buffer *buffer_info;
2870 unsigned int i;
2871 uint8_t css;
2872
2873 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2874 css = skb->h.raw - skb->data;
2875
2876 i = tx_ring->next_to_use;
2877 buffer_info = &tx_ring->buffer_info[i];
2878 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2879
2880 context_desc->upper_setup.tcp_fields.tucss = css;
2881 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
2882 context_desc->upper_setup.tcp_fields.tucse = 0;
2883 context_desc->tcp_seg_setup.data = 0;
2884 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2885
2886 buffer_info->time_stamp = jiffies;
2887 buffer_info->next_to_watch = i;
2888
2889 if (unlikely(++i == tx_ring->count)) i = 0;
2890 tx_ring->next_to_use = i;
2891
2892 return TRUE;
2893 }
2894
2895 return FALSE;
2896 }
2897
2898 #define E1000_MAX_TXD_PWR 12
2899 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2900
2901 static int
2902 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2903 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2904 unsigned int nr_frags, unsigned int mss)
2905 {
2906 struct e1000_buffer *buffer_info;
2907 unsigned int len = skb->len;
2908 unsigned int offset = 0, size, count = 0, i;
2909 unsigned int f;
2910 len -= skb->data_len;
2911
2912 i = tx_ring->next_to_use;
2913
2914 while (len) {
2915 buffer_info = &tx_ring->buffer_info[i];
2916 size = min(len, max_per_txd);
2917 #ifdef NETIF_F_TSO
2918 /* Workaround for Controller erratum --
2919 * descriptor for non-tso packet in a linear SKB that follows a
2920 * tso gets written back prematurely before the data is fully
2921 * DMA'd to the controller */
2922 if (!skb->data_len && tx_ring->last_tx_tso &&
2923 !skb_is_gso(skb)) {
2924 tx_ring->last_tx_tso = 0;
2925 size -= 4;
2926 }
2927
2928 /* Workaround for premature desc write-backs
2929 * in TSO mode. Append 4-byte sentinel desc */
2930 if (unlikely(mss && !nr_frags && size == len && size > 8))
2931 size -= 4;
2932 #endif
2933 /* work-around for errata 10 and it applies
2934 * to all controllers in PCI-X mode
2935 * The fix is to make sure that the first descriptor of a
2936 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2937 */
2938 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2939 (size > 2015) && count == 0))
2940 size = 2015;
2941
2942 /* Workaround for potential 82544 hang in PCI-X. Avoid
2943 * terminating buffers within evenly-aligned dwords. */
2944 if (unlikely(adapter->pcix_82544 &&
2945 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2946 size > 4))
2947 size -= 4;
2948
2949 buffer_info->length = size;
2950 buffer_info->dma =
2951 pci_map_single(adapter->pdev,
2952 skb->data + offset,
2953 size,
2954 PCI_DMA_TODEVICE);
2955 buffer_info->time_stamp = jiffies;
2956 buffer_info->next_to_watch = i;
2957
2958 len -= size;
2959 offset += size;
2960 count++;
2961 if (unlikely(++i == tx_ring->count)) i = 0;
2962 }
2963
2964 for (f = 0; f < nr_frags; f++) {
2965 struct skb_frag_struct *frag;
2966
2967 frag = &skb_shinfo(skb)->frags[f];
2968 len = frag->size;
2969 offset = frag->page_offset;
2970
2971 while (len) {
2972 buffer_info = &tx_ring->buffer_info[i];
2973 size = min(len, max_per_txd);
2974 #ifdef NETIF_F_TSO
2975 /* Workaround for premature desc write-backs
2976 * in TSO mode. Append 4-byte sentinel desc */
2977 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
2978 size -= 4;
2979 #endif
2980 /* Workaround for potential 82544 hang in PCI-X.
2981 * Avoid terminating buffers within evenly-aligned
2982 * dwords. */
2983 if (unlikely(adapter->pcix_82544 &&
2984 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2985 size > 4))
2986 size -= 4;
2987
2988 buffer_info->length = size;
2989 buffer_info->dma =
2990 pci_map_page(adapter->pdev,
2991 frag->page,
2992 offset,
2993 size,
2994 PCI_DMA_TODEVICE);
2995 buffer_info->time_stamp = jiffies;
2996 buffer_info->next_to_watch = i;
2997
2998 len -= size;
2999 offset += size;
3000 count++;
3001 if (unlikely(++i == tx_ring->count)) i = 0;
3002 }
3003 }
3004
3005 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3006 tx_ring->buffer_info[i].skb = skb;
3007 tx_ring->buffer_info[first].next_to_watch = i;
3008
3009 return count;
3010 }
3011
3012 static void
3013 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3014 int tx_flags, int count)
3015 {
3016 struct e1000_tx_desc *tx_desc = NULL;
3017 struct e1000_buffer *buffer_info;
3018 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3019 unsigned int i;
3020
3021 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
3022 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3023 E1000_TXD_CMD_TSE;
3024 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3025
3026 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
3027 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3028 }
3029
3030 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
3031 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3032 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3033 }
3034
3035 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
3036 txd_lower |= E1000_TXD_CMD_VLE;
3037 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3038 }
3039
3040 i = tx_ring->next_to_use;
3041
3042 while (count--) {
3043 buffer_info = &tx_ring->buffer_info[i];
3044 tx_desc = E1000_TX_DESC(*tx_ring, i);
3045 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3046 tx_desc->lower.data =
3047 cpu_to_le32(txd_lower | buffer_info->length);
3048 tx_desc->upper.data = cpu_to_le32(txd_upper);
3049 if (unlikely(++i == tx_ring->count)) i = 0;
3050 }
3051
3052 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3053
3054 /* Force memory writes to complete before letting h/w
3055 * know there are new descriptors to fetch. (Only
3056 * applicable for weak-ordered memory model archs,
3057 * such as IA-64). */
3058 wmb();
3059
3060 tx_ring->next_to_use = i;
3061 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
3062 /* we need this if more than one processor can write to our tail
3063 * at a time, it syncronizes IO on IA64/Altix systems */
3064 mmiowb();
3065 }
3066
3067 /**
3068 * 82547 workaround to avoid controller hang in half-duplex environment.
3069 * The workaround is to avoid queuing a large packet that would span
3070 * the internal Tx FIFO ring boundary by notifying the stack to resend
3071 * the packet at a later time. This gives the Tx FIFO an opportunity to
3072 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3073 * to the beginning of the Tx FIFO.
3074 **/
3075
3076 #define E1000_FIFO_HDR 0x10
3077 #define E1000_82547_PAD_LEN 0x3E0
3078
3079 static int
3080 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3081 {
3082 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3083 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3084
3085 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
3086
3087 if (adapter->link_duplex != HALF_DUPLEX)
3088 goto no_fifo_stall_required;
3089
3090 if (atomic_read(&adapter->tx_fifo_stall))
3091 return 1;
3092
3093 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3094 atomic_set(&adapter->tx_fifo_stall, 1);
3095 return 1;
3096 }
3097
3098 no_fifo_stall_required:
3099 adapter->tx_fifo_head += skb_fifo_len;
3100 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3101 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3102 return 0;
3103 }
3104
3105 #define MINIMUM_DHCP_PACKET_SIZE 282
3106 static int
3107 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3108 {
3109 struct e1000_hw *hw = &adapter->hw;
3110 uint16_t length, offset;
3111 if (vlan_tx_tag_present(skb)) {
3112 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
3113 ( adapter->hw.mng_cookie.status &
3114 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3115 return 0;
3116 }
3117 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3118 struct ethhdr *eth = (struct ethhdr *) skb->data;
3119 if ((htons(ETH_P_IP) == eth->h_proto)) {
3120 const struct iphdr *ip =
3121 (struct iphdr *)((uint8_t *)skb->data+14);
3122 if (IPPROTO_UDP == ip->protocol) {
3123 struct udphdr *udp =
3124 (struct udphdr *)((uint8_t *)ip +
3125 (ip->ihl << 2));
3126 if (ntohs(udp->dest) == 67) {
3127 offset = (uint8_t *)udp + 8 - skb->data;
3128 length = skb->len - offset;
3129
3130 return e1000_mng_write_dhcp_info(hw,
3131 (uint8_t *)udp + 8,
3132 length);
3133 }
3134 }
3135 }
3136 }
3137 return 0;
3138 }
3139
3140 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3141 {
3142 struct e1000_adapter *adapter = netdev_priv(netdev);
3143 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3144
3145 netif_stop_queue(netdev);
3146 /* Herbert's original patch had:
3147 * smp_mb__after_netif_stop_queue();
3148 * but since that doesn't exist yet, just open code it. */
3149 smp_mb();
3150
3151 /* We need to check again in a case another CPU has just
3152 * made room available. */
3153 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3154 return -EBUSY;
3155
3156 /* A reprieve! */
3157 netif_start_queue(netdev);
3158 ++adapter->restart_queue;
3159 return 0;
3160 }
3161
3162 static int e1000_maybe_stop_tx(struct net_device *netdev,
3163 struct e1000_tx_ring *tx_ring, int size)
3164 {
3165 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3166 return 0;
3167 return __e1000_maybe_stop_tx(netdev, size);
3168 }
3169
3170 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3171 static int
3172 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3173 {
3174 struct e1000_adapter *adapter = netdev_priv(netdev);
3175 struct e1000_tx_ring *tx_ring;
3176 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3177 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3178 unsigned int tx_flags = 0;
3179 unsigned int len = skb->len;
3180 unsigned long flags;
3181 unsigned int nr_frags = 0;
3182 unsigned int mss = 0;
3183 int count = 0;
3184 int tso;
3185 unsigned int f;
3186 len -= skb->data_len;
3187
3188 /* This goes back to the question of how to logically map a tx queue
3189 * to a flow. Right now, performance is impacted slightly negatively
3190 * if using multiple tx queues. If the stack breaks away from a
3191 * single qdisc implementation, we can look at this again. */
3192 tx_ring = adapter->tx_ring;
3193
3194 if (unlikely(skb->len <= 0)) {
3195 dev_kfree_skb_any(skb);
3196 return NETDEV_TX_OK;
3197 }
3198
3199 /* 82571 and newer doesn't need the workaround that limited descriptor
3200 * length to 4kB */
3201 if (adapter->hw.mac_type >= e1000_82571)
3202 max_per_txd = 8192;
3203
3204 #ifdef NETIF_F_TSO
3205 mss = skb_shinfo(skb)->gso_size;
3206 /* The controller does a simple calculation to
3207 * make sure there is enough room in the FIFO before
3208 * initiating the DMA for each buffer. The calc is:
3209 * 4 = ceil(buffer len/mss). To make sure we don't
3210 * overrun the FIFO, adjust the max buffer len if mss
3211 * drops. */
3212 if (mss) {
3213 uint8_t hdr_len;
3214 max_per_txd = min(mss << 2, max_per_txd);
3215 max_txd_pwr = fls(max_per_txd) - 1;
3216
3217 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3218 * points to just header, pull a few bytes of payload from
3219 * frags into skb->data */
3220 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
3221 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3222 switch (adapter->hw.mac_type) {
3223 unsigned int pull_size;
3224 case e1000_82571:
3225 case e1000_82572:
3226 case e1000_82573:
3227 case e1000_ich8lan:
3228 pull_size = min((unsigned int)4, skb->data_len);
3229 if (!__pskb_pull_tail(skb, pull_size)) {
3230 DPRINTK(DRV, ERR,
3231 "__pskb_pull_tail failed.\n");
3232 dev_kfree_skb_any(skb);
3233 return NETDEV_TX_OK;
3234 }
3235 len = skb->len - skb->data_len;
3236 break;
3237 default:
3238 /* do nothing */
3239 break;
3240 }
3241 }
3242 }
3243
3244 /* reserve a descriptor for the offload context */
3245 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3246 count++;
3247 count++;
3248 #else
3249 if (skb->ip_summed == CHECKSUM_PARTIAL)
3250 count++;
3251 #endif
3252
3253 #ifdef NETIF_F_TSO
3254 /* Controller Erratum workaround */
3255 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3256 count++;
3257 #endif
3258
3259 count += TXD_USE_COUNT(len, max_txd_pwr);
3260
3261 if (adapter->pcix_82544)
3262 count++;
3263
3264 /* work-around for errata 10 and it applies to all controllers
3265 * in PCI-X mode, so add one more descriptor to the count
3266 */
3267 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3268 (len > 2015)))
3269 count++;
3270
3271 nr_frags = skb_shinfo(skb)->nr_frags;
3272 for (f = 0; f < nr_frags; f++)
3273 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3274 max_txd_pwr);
3275 if (adapter->pcix_82544)
3276 count += nr_frags;
3277
3278
3279 if (adapter->hw.tx_pkt_filtering &&
3280 (adapter->hw.mac_type == e1000_82573))
3281 e1000_transfer_dhcp_info(adapter, skb);
3282
3283 local_irq_save(flags);
3284 if (!spin_trylock(&tx_ring->tx_lock)) {
3285 /* Collision - tell upper layer to requeue */
3286 local_irq_restore(flags);
3287 return NETDEV_TX_LOCKED;
3288 }
3289
3290 /* need: count + 2 desc gap to keep tail from touching
3291 * head, otherwise try next time */
3292 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3293 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3294 return NETDEV_TX_BUSY;
3295 }
3296
3297 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3298 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3299 netif_stop_queue(netdev);
3300 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3301 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3302 return NETDEV_TX_BUSY;
3303 }
3304 }
3305
3306 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3307 tx_flags |= E1000_TX_FLAGS_VLAN;
3308 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3309 }
3310
3311 first = tx_ring->next_to_use;
3312
3313 tso = e1000_tso(adapter, tx_ring, skb);
3314 if (tso < 0) {
3315 dev_kfree_skb_any(skb);
3316 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3317 return NETDEV_TX_OK;
3318 }
3319
3320 if (likely(tso)) {
3321 tx_ring->last_tx_tso = 1;
3322 tx_flags |= E1000_TX_FLAGS_TSO;
3323 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3324 tx_flags |= E1000_TX_FLAGS_CSUM;
3325
3326 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3327 * 82571 hardware supports TSO capabilities for IPv6 as well...
3328 * no longer assume, we must. */
3329 if (likely(skb->protocol == htons(ETH_P_IP)))
3330 tx_flags |= E1000_TX_FLAGS_IPV4;
3331
3332 e1000_tx_queue(adapter, tx_ring, tx_flags,
3333 e1000_tx_map(adapter, tx_ring, skb, first,
3334 max_per_txd, nr_frags, mss));
3335
3336 netdev->trans_start = jiffies;
3337
3338 /* Make sure there is space in the ring for the next send. */
3339 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3340
3341 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3342 return NETDEV_TX_OK;
3343 }
3344
3345 /**
3346 * e1000_tx_timeout - Respond to a Tx Hang
3347 * @netdev: network interface device structure
3348 **/
3349
3350 static void
3351 e1000_tx_timeout(struct net_device *netdev)
3352 {
3353 struct e1000_adapter *adapter = netdev_priv(netdev);
3354
3355 /* Do the reset outside of interrupt context */
3356 adapter->tx_timeout_count++;
3357 schedule_work(&adapter->reset_task);
3358 }
3359
3360 static void
3361 e1000_reset_task(struct work_struct *work)
3362 {
3363 struct e1000_adapter *adapter =
3364 container_of(work, struct e1000_adapter, reset_task);
3365
3366 e1000_reinit_locked(adapter);
3367 }
3368
3369 /**
3370 * e1000_get_stats - Get System Network Statistics
3371 * @netdev: network interface device structure
3372 *
3373 * Returns the address of the device statistics structure.
3374 * The statistics are actually updated from the timer callback.
3375 **/
3376
3377 static struct net_device_stats *
3378 e1000_get_stats(struct net_device *netdev)
3379 {
3380 struct e1000_adapter *adapter = netdev_priv(netdev);
3381
3382 /* only return the current stats */
3383 return &adapter->net_stats;
3384 }
3385
3386 /**
3387 * e1000_change_mtu - Change the Maximum Transfer Unit
3388 * @netdev: network interface device structure
3389 * @new_mtu: new value for maximum frame size
3390 *
3391 * Returns 0 on success, negative on failure
3392 **/
3393
3394 static int
3395 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3396 {
3397 struct e1000_adapter *adapter = netdev_priv(netdev);
3398 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3399 uint16_t eeprom_data = 0;
3400
3401 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3402 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3403 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3404 return -EINVAL;
3405 }
3406
3407 /* Adapter-specific max frame size limits. */
3408 switch (adapter->hw.mac_type) {
3409 case e1000_undefined ... e1000_82542_rev2_1:
3410 case e1000_ich8lan:
3411 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3412 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3413 return -EINVAL;
3414 }
3415 break;
3416 case e1000_82573:
3417 /* Jumbo Frames not supported if:
3418 * - this is not an 82573L device
3419 * - ASPM is enabled in any way (0x1A bits 3:2) */
3420 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3421 &eeprom_data);
3422 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3423 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3424 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3425 DPRINTK(PROBE, ERR,
3426 "Jumbo Frames not supported.\n");
3427 return -EINVAL;
3428 }
3429 break;
3430 }
3431 /* ERT will be enabled later to enable wire speed receives */
3432
3433 /* fall through to get support */
3434 case e1000_82571:
3435 case e1000_82572:
3436 case e1000_80003es2lan:
3437 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3438 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3439 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3440 return -EINVAL;
3441 }
3442 break;
3443 default:
3444 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3445 break;
3446 }
3447
3448 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3449 * means we reserve 2 more, this pushes us to allocate from the next
3450 * larger slab size
3451 * i.e. RXBUFFER_2048 --> size-4096 slab */
3452
3453 if (max_frame <= E1000_RXBUFFER_256)
3454 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3455 else if (max_frame <= E1000_RXBUFFER_512)
3456 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3457 else if (max_frame <= E1000_RXBUFFER_1024)
3458 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3459 else if (max_frame <= E1000_RXBUFFER_2048)
3460 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3461 else if (max_frame <= E1000_RXBUFFER_4096)
3462 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3463 else if (max_frame <= E1000_RXBUFFER_8192)
3464 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3465 else if (max_frame <= E1000_RXBUFFER_16384)
3466 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3467
3468 /* adjust allocation if LPE protects us, and we aren't using SBP */
3469 if (!adapter->hw.tbi_compatibility_on &&
3470 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3471 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3472 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3473
3474 netdev->mtu = new_mtu;
3475
3476 if (netif_running(netdev))
3477 e1000_reinit_locked(adapter);
3478
3479 adapter->hw.max_frame_size = max_frame;
3480
3481 return 0;
3482 }
3483
3484 /**
3485 * e1000_update_stats - Update the board statistics counters
3486 * @adapter: board private structure
3487 **/
3488
3489 void
3490 e1000_update_stats(struct e1000_adapter *adapter)
3491 {
3492 struct e1000_hw *hw = &adapter->hw;
3493 struct pci_dev *pdev = adapter->pdev;
3494 unsigned long flags;
3495 uint16_t phy_tmp;
3496
3497 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3498
3499 /*
3500 * Prevent stats update while adapter is being reset, or if the pci
3501 * connection is down.
3502 */
3503 if (adapter->link_speed == 0)
3504 return;
3505 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
3506 return;
3507
3508 spin_lock_irqsave(&adapter->stats_lock, flags);
3509
3510 /* these counters are modified from e1000_adjust_tbi_stats,
3511 * called from the interrupt context, so they must only
3512 * be written while holding adapter->stats_lock
3513 */
3514
3515 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3516 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3517 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3518 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3519 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3520 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3521 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3522
3523 if (adapter->hw.mac_type != e1000_ich8lan) {
3524 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3525 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3526 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3527 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3528 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3529 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3530 }
3531
3532 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3533 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3534 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3535 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3536 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3537 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3538 adapter->stats.dc += E1000_READ_REG(hw, DC);
3539 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3540 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3541 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3542 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3543 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3544 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3545 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3546 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3547 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3548 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3549 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3550 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3551 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3552 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3553 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3554 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3555 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3556 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3557 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3558
3559 if (adapter->hw.mac_type != e1000_ich8lan) {
3560 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3561 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3562 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3563 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3564 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3565 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3566 }
3567
3568 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3569 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3570
3571 /* used for adaptive IFS */
3572
3573 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3574 adapter->stats.tpt += hw->tx_packet_delta;
3575 hw->collision_delta = E1000_READ_REG(hw, COLC);
3576 adapter->stats.colc += hw->collision_delta;
3577
3578 if (hw->mac_type >= e1000_82543) {
3579 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3580 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3581 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3582 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3583 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3584 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3585 }
3586 if (hw->mac_type > e1000_82547_rev_2) {
3587 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3588 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3589
3590 if (adapter->hw.mac_type != e1000_ich8lan) {
3591 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3592 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3593 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3594 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3595 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3596 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3597 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3598 }
3599 }
3600
3601 /* Fill out the OS statistics structure */
3602 adapter->net_stats.rx_packets = adapter->stats.gprc;
3603 adapter->net_stats.tx_packets = adapter->stats.gptc;
3604 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3605 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3606 adapter->net_stats.multicast = adapter->stats.mprc;
3607 adapter->net_stats.collisions = adapter->stats.colc;
3608
3609 /* Rx Errors */
3610
3611 /* RLEC on some newer hardware can be incorrect so build
3612 * our own version based on RUC and ROC */
3613 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3614 adapter->stats.crcerrs + adapter->stats.algnerrc +
3615 adapter->stats.ruc + adapter->stats.roc +
3616 adapter->stats.cexterr;
3617 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3618 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3619 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3620 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3621 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3622
3623 /* Tx Errors */
3624 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3625 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3626 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3627 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3628 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3629 if (adapter->hw.bad_tx_carr_stats_fd &&
3630 adapter->link_duplex == FULL_DUPLEX) {
3631 adapter->net_stats.tx_carrier_errors = 0;
3632 adapter->stats.tncrs = 0;
3633 }
3634
3635 /* Tx Dropped needs to be maintained elsewhere */
3636
3637 /* Phy Stats */
3638 if (hw->media_type == e1000_media_type_copper) {
3639 if ((adapter->link_speed == SPEED_1000) &&
3640 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3641 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3642 adapter->phy_stats.idle_errors += phy_tmp;
3643 }
3644
3645 if ((hw->mac_type <= e1000_82546) &&
3646 (hw->phy_type == e1000_phy_m88) &&
3647 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3648 adapter->phy_stats.receive_errors += phy_tmp;
3649 }
3650
3651 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3652 }
3653 #ifdef CONFIG_PCI_MSI
3654
3655 /**
3656 * e1000_intr_msi - Interrupt Handler
3657 * @irq: interrupt number
3658 * @data: pointer to a network interface device structure
3659 **/
3660
3661 static
3662 irqreturn_t e1000_intr_msi(int irq, void *data)
3663 {
3664 struct net_device *netdev = data;
3665 struct e1000_adapter *adapter = netdev_priv(netdev);
3666 struct e1000_hw *hw = &adapter->hw;
3667 #ifndef CONFIG_E1000_NAPI
3668 int i;
3669 #endif
3670
3671 /* this code avoids the read of ICR but has to get 1000 interrupts
3672 * at every link change event before it will notice the change */
3673 if (++adapter->detect_link >= 1000) {
3674 uint32_t icr = E1000_READ_REG(hw, ICR);
3675 #ifdef CONFIG_E1000_NAPI
3676 /* read ICR disables interrupts using IAM, so keep up with our
3677 * enable/disable accounting */
3678 atomic_inc(&adapter->irq_sem);
3679 #endif
3680 adapter->detect_link = 0;
3681 if ((icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) &&
3682 (icr & E1000_ICR_INT_ASSERTED)) {
3683 hw->get_link_status = 1;
3684 /* 80003ES2LAN workaround--
3685 * For packet buffer work-around on link down event;
3686 * disable receives here in the ISR and
3687 * reset adapter in watchdog
3688 */
3689 if (netif_carrier_ok(netdev) &&
3690 (adapter->hw.mac_type == e1000_80003es2lan)) {
3691 /* disable receives */
3692 uint32_t rctl = E1000_READ_REG(hw, RCTL);
3693 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3694 }
3695 /* guard against interrupt when we're going down */
3696 if (!test_bit(__E1000_DOWN, &adapter->flags))
3697 mod_timer(&adapter->watchdog_timer,
3698 jiffies + 1);
3699 }
3700 } else {
3701 E1000_WRITE_REG(hw, ICR, (0xffffffff & ~(E1000_ICR_RXSEQ |
3702 E1000_ICR_LSC)));
3703 /* bummer we have to flush here, but things break otherwise as
3704 * some event appears to be lost or delayed and throughput
3705 * drops. In almost all tests this flush is un-necessary */
3706 E1000_WRITE_FLUSH(hw);
3707 #ifdef CONFIG_E1000_NAPI
3708 /* Interrupt Auto-Mask (IAM)...upon writing ICR, interrupts are
3709 * masked. No need for the IMC write, but it does mean we
3710 * should account for it ASAP. */
3711 atomic_inc(&adapter->irq_sem);
3712 #endif
3713 }
3714
3715 #ifdef CONFIG_E1000_NAPI
3716 if (likely(netif_rx_schedule_prep(netdev))) {
3717 adapter->total_tx_bytes = 0;
3718 adapter->total_tx_packets = 0;
3719 adapter->total_rx_bytes = 0;
3720 adapter->total_rx_packets = 0;
3721 __netif_rx_schedule(netdev);
3722 } else
3723 e1000_irq_enable(adapter);
3724 #else
3725 adapter->total_tx_bytes = 0;
3726 adapter->total_rx_bytes = 0;
3727 adapter->total_tx_packets = 0;
3728 adapter->total_rx_packets = 0;
3729
3730 for (i = 0; i < E1000_MAX_INTR; i++)
3731 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3732 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3733 break;
3734
3735 if (likely(adapter->itr_setting & 3))
3736 e1000_set_itr(adapter);
3737 #endif
3738
3739 return IRQ_HANDLED;
3740 }
3741 #endif
3742
3743 /**
3744 * e1000_intr - Interrupt Handler
3745 * @irq: interrupt number
3746 * @data: pointer to a network interface device structure
3747 **/
3748
3749 static irqreturn_t
3750 e1000_intr(int irq, void *data)
3751 {
3752 struct net_device *netdev = data;
3753 struct e1000_adapter *adapter = netdev_priv(netdev);
3754 struct e1000_hw *hw = &adapter->hw;
3755 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3756 #ifndef CONFIG_E1000_NAPI
3757 int i;
3758 #endif
3759 if (unlikely(!icr))
3760 return IRQ_NONE; /* Not our interrupt */
3761
3762 #ifdef CONFIG_E1000_NAPI
3763 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3764 * not set, then the adapter didn't send an interrupt */
3765 if (unlikely(hw->mac_type >= e1000_82571 &&
3766 !(icr & E1000_ICR_INT_ASSERTED)))
3767 return IRQ_NONE;
3768
3769 /* Interrupt Auto-Mask...upon reading ICR,
3770 * interrupts are masked. No need for the
3771 * IMC write, but it does mean we should
3772 * account for it ASAP. */
3773 if (likely(hw->mac_type >= e1000_82571))
3774 atomic_inc(&adapter->irq_sem);
3775 #endif
3776
3777 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3778 hw->get_link_status = 1;
3779 /* 80003ES2LAN workaround--
3780 * For packet buffer work-around on link down event;
3781 * disable receives here in the ISR and
3782 * reset adapter in watchdog
3783 */
3784 if (netif_carrier_ok(netdev) &&
3785 (adapter->hw.mac_type == e1000_80003es2lan)) {
3786 /* disable receives */
3787 rctl = E1000_READ_REG(hw, RCTL);
3788 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3789 }
3790 /* guard against interrupt when we're going down */
3791 if (!test_bit(__E1000_DOWN, &adapter->flags))
3792 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3793 }
3794
3795 #ifdef CONFIG_E1000_NAPI
3796 if (unlikely(hw->mac_type < e1000_82571)) {
3797 /* disable interrupts, without the synchronize_irq bit */
3798 atomic_inc(&adapter->irq_sem);
3799 E1000_WRITE_REG(hw, IMC, ~0);
3800 E1000_WRITE_FLUSH(hw);
3801 }
3802 if (likely(netif_rx_schedule_prep(netdev))) {
3803 adapter->total_tx_bytes = 0;
3804 adapter->total_tx_packets = 0;
3805 adapter->total_rx_bytes = 0;
3806 adapter->total_rx_packets = 0;
3807 __netif_rx_schedule(netdev);
3808 } else
3809 /* this really should not happen! if it does it is basically a
3810 * bug, but not a hard error, so enable ints and continue */
3811 e1000_irq_enable(adapter);
3812 #else
3813 /* Writing IMC and IMS is needed for 82547.
3814 * Due to Hub Link bus being occupied, an interrupt
3815 * de-assertion message is not able to be sent.
3816 * When an interrupt assertion message is generated later,
3817 * two messages are re-ordered and sent out.
3818 * That causes APIC to think 82547 is in de-assertion
3819 * state, while 82547 is in assertion state, resulting
3820 * in dead lock. Writing IMC forces 82547 into
3821 * de-assertion state.
3822 */
3823 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3824 atomic_inc(&adapter->irq_sem);
3825 E1000_WRITE_REG(hw, IMC, ~0);
3826 }
3827
3828 adapter->total_tx_bytes = 0;
3829 adapter->total_rx_bytes = 0;
3830 adapter->total_tx_packets = 0;
3831 adapter->total_rx_packets = 0;
3832
3833 for (i = 0; i < E1000_MAX_INTR; i++)
3834 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3835 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3836 break;
3837
3838 if (likely(adapter->itr_setting & 3))
3839 e1000_set_itr(adapter);
3840
3841 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3842 e1000_irq_enable(adapter);
3843
3844 #endif
3845 return IRQ_HANDLED;
3846 }
3847
3848 #ifdef CONFIG_E1000_NAPI
3849 /**
3850 * e1000_clean - NAPI Rx polling callback
3851 * @adapter: board private structure
3852 **/
3853
3854 static int
3855 e1000_clean(struct net_device *poll_dev, int *budget)
3856 {
3857 struct e1000_adapter *adapter;
3858 int work_to_do = min(*budget, poll_dev->quota);
3859 int tx_cleaned = 0, work_done = 0;
3860
3861 /* Must NOT use netdev_priv macro here. */
3862 adapter = poll_dev->priv;
3863
3864 /* Keep link state information with original netdev */
3865 if (!netif_carrier_ok(poll_dev))
3866 goto quit_polling;
3867
3868 /* e1000_clean is called per-cpu. This lock protects
3869 * tx_ring[0] from being cleaned by multiple cpus
3870 * simultaneously. A failure obtaining the lock means
3871 * tx_ring[0] is currently being cleaned anyway. */
3872 if (spin_trylock(&adapter->tx_queue_lock)) {
3873 tx_cleaned = e1000_clean_tx_irq(adapter,
3874 &adapter->tx_ring[0]);
3875 spin_unlock(&adapter->tx_queue_lock);
3876 }
3877
3878 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3879 &work_done, work_to_do);
3880
3881 *budget -= work_done;
3882 poll_dev->quota -= work_done;
3883
3884 /* If no Tx and not enough Rx work done, exit the polling mode */
3885 if ((!tx_cleaned && (work_done == 0)) ||
3886 !netif_running(poll_dev)) {
3887 quit_polling:
3888 if (likely(adapter->itr_setting & 3))
3889 e1000_set_itr(adapter);
3890 netif_rx_complete(poll_dev);
3891 e1000_irq_enable(adapter);
3892 return 0;
3893 }
3894
3895 return 1;
3896 }
3897
3898 #endif
3899 /**
3900 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3901 * @adapter: board private structure
3902 **/
3903
3904 static boolean_t
3905 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3906 struct e1000_tx_ring *tx_ring)
3907 {
3908 struct net_device *netdev = adapter->netdev;
3909 struct e1000_tx_desc *tx_desc, *eop_desc;
3910 struct e1000_buffer *buffer_info;
3911 unsigned int i, eop;
3912 #ifdef CONFIG_E1000_NAPI
3913 unsigned int count = 0;
3914 #endif
3915 boolean_t cleaned = FALSE;
3916 unsigned int total_tx_bytes=0, total_tx_packets=0;
3917
3918 i = tx_ring->next_to_clean;
3919 eop = tx_ring->buffer_info[i].next_to_watch;
3920 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3921
3922 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3923 for (cleaned = FALSE; !cleaned; ) {
3924 tx_desc = E1000_TX_DESC(*tx_ring, i);
3925 buffer_info = &tx_ring->buffer_info[i];
3926 cleaned = (i == eop);
3927
3928 if (cleaned) {
3929 struct sk_buff *skb = buffer_info->skb;
3930 unsigned int segs = skb_shinfo(skb)->gso_segs;
3931 total_tx_packets += segs;
3932 total_tx_packets++;
3933 total_tx_bytes += skb->len;
3934 }
3935 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
3936 tx_desc->upper.data = 0;
3937
3938 if (unlikely(++i == tx_ring->count)) i = 0;
3939 }
3940
3941 eop = tx_ring->buffer_info[i].next_to_watch;
3942 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3943 #ifdef CONFIG_E1000_NAPI
3944 #define E1000_TX_WEIGHT 64
3945 /* weight of a sort for tx, to avoid endless transmit cleanup */
3946 if (count++ == E1000_TX_WEIGHT) break;
3947 #endif
3948 }
3949
3950 tx_ring->next_to_clean = i;
3951
3952 #define TX_WAKE_THRESHOLD 32
3953 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
3954 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3955 /* Make sure that anybody stopping the queue after this
3956 * sees the new next_to_clean.
3957 */
3958 smp_mb();
3959 if (netif_queue_stopped(netdev)) {
3960 netif_wake_queue(netdev);
3961 ++adapter->restart_queue;
3962 }
3963 }
3964
3965 if (adapter->detect_tx_hung) {
3966 /* Detect a transmit hang in hardware, this serializes the
3967 * check with the clearing of time_stamp and movement of i */
3968 adapter->detect_tx_hung = FALSE;
3969 if (tx_ring->buffer_info[eop].dma &&
3970 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
3971 (adapter->tx_timeout_factor * HZ))
3972 && !(E1000_READ_REG(&adapter->hw, STATUS) &
3973 E1000_STATUS_TXOFF)) {
3974
3975 /* detected Tx unit hang */
3976 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
3977 " Tx Queue <%lu>\n"
3978 " TDH <%x>\n"
3979 " TDT <%x>\n"
3980 " next_to_use <%x>\n"
3981 " next_to_clean <%x>\n"
3982 "buffer_info[next_to_clean]\n"
3983 " time_stamp <%lx>\n"
3984 " next_to_watch <%x>\n"
3985 " jiffies <%lx>\n"
3986 " next_to_watch.status <%x>\n",
3987 (unsigned long)((tx_ring - adapter->tx_ring) /
3988 sizeof(struct e1000_tx_ring)),
3989 readl(adapter->hw.hw_addr + tx_ring->tdh),
3990 readl(adapter->hw.hw_addr + tx_ring->tdt),
3991 tx_ring->next_to_use,
3992 tx_ring->next_to_clean,
3993 tx_ring->buffer_info[eop].time_stamp,
3994 eop,
3995 jiffies,
3996 eop_desc->upper.fields.status);
3997 netif_stop_queue(netdev);
3998 }
3999 }
4000 adapter->total_tx_bytes += total_tx_bytes;
4001 adapter->total_tx_packets += total_tx_packets;
4002 return cleaned;
4003 }
4004
4005 /**
4006 * e1000_rx_checksum - Receive Checksum Offload for 82543
4007 * @adapter: board private structure
4008 * @status_err: receive descriptor status and error fields
4009 * @csum: receive descriptor csum field
4010 * @sk_buff: socket buffer with received data
4011 **/
4012
4013 static void
4014 e1000_rx_checksum(struct e1000_adapter *adapter,
4015 uint32_t status_err, uint32_t csum,
4016 struct sk_buff *skb)
4017 {
4018 uint16_t status = (uint16_t)status_err;
4019 uint8_t errors = (uint8_t)(status_err >> 24);
4020 skb->ip_summed = CHECKSUM_NONE;
4021
4022 /* 82543 or newer only */
4023 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
4024 /* Ignore Checksum bit is set */
4025 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
4026 /* TCP/UDP checksum error bit is set */
4027 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
4028 /* let the stack verify checksum errors */
4029 adapter->hw_csum_err++;
4030 return;
4031 }
4032 /* TCP/UDP Checksum has not been calculated */
4033 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
4034 if (!(status & E1000_RXD_STAT_TCPCS))
4035 return;
4036 } else {
4037 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
4038 return;
4039 }
4040 /* It must be a TCP or UDP packet with a valid checksum */
4041 if (likely(status & E1000_RXD_STAT_TCPCS)) {
4042 /* TCP checksum is good */
4043 skb->ip_summed = CHECKSUM_UNNECESSARY;
4044 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
4045 /* IP fragment with UDP payload */
4046 /* Hardware complements the payload checksum, so we undo it
4047 * and then put the value in host order for further stack use.
4048 */
4049 csum = ntohl(csum ^ 0xFFFF);
4050 skb->csum = csum;
4051 skb->ip_summed = CHECKSUM_COMPLETE;
4052 }
4053 adapter->hw_csum_good++;
4054 }
4055
4056 /**
4057 * e1000_clean_rx_irq - Send received data up the network stack; legacy
4058 * @adapter: board private structure
4059 **/
4060
4061 static boolean_t
4062 #ifdef CONFIG_E1000_NAPI
4063 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4064 struct e1000_rx_ring *rx_ring,
4065 int *work_done, int work_to_do)
4066 #else
4067 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4068 struct e1000_rx_ring *rx_ring)
4069 #endif
4070 {
4071 struct net_device *netdev = adapter->netdev;
4072 struct pci_dev *pdev = adapter->pdev;
4073 struct e1000_rx_desc *rx_desc, *next_rxd;
4074 struct e1000_buffer *buffer_info, *next_buffer;
4075 unsigned long flags;
4076 uint32_t length;
4077 uint8_t last_byte;
4078 unsigned int i;
4079 int cleaned_count = 0;
4080 boolean_t cleaned = FALSE;
4081 unsigned int total_rx_bytes=0, total_rx_packets=0;
4082
4083 i = rx_ring->next_to_clean;
4084 rx_desc = E1000_RX_DESC(*rx_ring, i);
4085 buffer_info = &rx_ring->buffer_info[i];
4086
4087 while (rx_desc->status & E1000_RXD_STAT_DD) {
4088 struct sk_buff *skb;
4089 u8 status;
4090
4091 #ifdef CONFIG_E1000_NAPI
4092 if (*work_done >= work_to_do)
4093 break;
4094 (*work_done)++;
4095 #endif
4096 status = rx_desc->status;
4097 skb = buffer_info->skb;
4098 buffer_info->skb = NULL;
4099
4100 prefetch(skb->data - NET_IP_ALIGN);
4101
4102 if (++i == rx_ring->count) i = 0;
4103 next_rxd = E1000_RX_DESC(*rx_ring, i);
4104 prefetch(next_rxd);
4105
4106 next_buffer = &rx_ring->buffer_info[i];
4107
4108 cleaned = TRUE;
4109 cleaned_count++;
4110 pci_unmap_single(pdev,
4111 buffer_info->dma,
4112 buffer_info->length,
4113 PCI_DMA_FROMDEVICE);
4114
4115 length = le16_to_cpu(rx_desc->length);
4116
4117 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4118 /* All receives must fit into a single buffer */
4119 E1000_DBG("%s: Receive packet consumed multiple"
4120 " buffers\n", netdev->name);
4121 /* recycle */
4122 buffer_info->skb = skb;
4123 goto next_desc;
4124 }
4125
4126 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4127 last_byte = *(skb->data + length - 1);
4128 if (TBI_ACCEPT(&adapter->hw, status,
4129 rx_desc->errors, length, last_byte)) {
4130 spin_lock_irqsave(&adapter->stats_lock, flags);
4131 e1000_tbi_adjust_stats(&adapter->hw,
4132 &adapter->stats,
4133 length, skb->data);
4134 spin_unlock_irqrestore(&adapter->stats_lock,
4135 flags);
4136 length--;
4137 } else {
4138 /* recycle */
4139 buffer_info->skb = skb;
4140 goto next_desc;
4141 }
4142 }
4143
4144 /* adjust length to remove Ethernet CRC, this must be
4145 * done after the TBI_ACCEPT workaround above */
4146 length -= 4;
4147
4148 /* probably a little skewed due to removing CRC */
4149 total_rx_bytes += length;
4150 total_rx_packets++;
4151
4152 /* code added for copybreak, this should improve
4153 * performance for small packets with large amounts
4154 * of reassembly being done in the stack */
4155 #define E1000_CB_LENGTH 256
4156 if (length < E1000_CB_LENGTH) {
4157 struct sk_buff *new_skb =
4158 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4159 if (new_skb) {
4160 skb_reserve(new_skb, NET_IP_ALIGN);
4161 memcpy(new_skb->data - NET_IP_ALIGN,
4162 skb->data - NET_IP_ALIGN,
4163 length + NET_IP_ALIGN);
4164 /* save the skb in buffer_info as good */
4165 buffer_info->skb = skb;
4166 skb = new_skb;
4167 }
4168 /* else just continue with the old one */
4169 }
4170 /* end copybreak code */
4171 skb_put(skb, length);
4172
4173 /* Receive Checksum Offload */
4174 e1000_rx_checksum(adapter,
4175 (uint32_t)(status) |
4176 ((uint32_t)(rx_desc->errors) << 24),
4177 le16_to_cpu(rx_desc->csum), skb);
4178
4179 skb->protocol = eth_type_trans(skb, netdev);
4180 #ifdef CONFIG_E1000_NAPI
4181 if (unlikely(adapter->vlgrp &&
4182 (status & E1000_RXD_STAT_VP))) {
4183 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4184 le16_to_cpu(rx_desc->special) &
4185 E1000_RXD_SPC_VLAN_MASK);
4186 } else {
4187 netif_receive_skb(skb);
4188 }
4189 #else /* CONFIG_E1000_NAPI */
4190 if (unlikely(adapter->vlgrp &&
4191 (status & E1000_RXD_STAT_VP))) {
4192 vlan_hwaccel_rx(skb, adapter->vlgrp,
4193 le16_to_cpu(rx_desc->special) &
4194 E1000_RXD_SPC_VLAN_MASK);
4195 } else {
4196 netif_rx(skb);
4197 }
4198 #endif /* CONFIG_E1000_NAPI */
4199 netdev->last_rx = jiffies;
4200
4201 next_desc:
4202 rx_desc->status = 0;
4203
4204 /* return some buffers to hardware, one at a time is too slow */
4205 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4206 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4207 cleaned_count = 0;
4208 }
4209
4210 /* use prefetched values */
4211 rx_desc = next_rxd;
4212 buffer_info = next_buffer;
4213 }
4214 rx_ring->next_to_clean = i;
4215
4216 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4217 if (cleaned_count)
4218 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4219
4220 adapter->total_rx_packets += total_rx_packets;
4221 adapter->total_rx_bytes += total_rx_bytes;
4222 return cleaned;
4223 }
4224
4225 /**
4226 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4227 * @adapter: board private structure
4228 **/
4229
4230 static boolean_t
4231 #ifdef CONFIG_E1000_NAPI
4232 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4233 struct e1000_rx_ring *rx_ring,
4234 int *work_done, int work_to_do)
4235 #else
4236 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4237 struct e1000_rx_ring *rx_ring)
4238 #endif
4239 {
4240 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
4241 struct net_device *netdev = adapter->netdev;
4242 struct pci_dev *pdev = adapter->pdev;
4243 struct e1000_buffer *buffer_info, *next_buffer;
4244 struct e1000_ps_page *ps_page;
4245 struct e1000_ps_page_dma *ps_page_dma;
4246 struct sk_buff *skb;
4247 unsigned int i, j;
4248 uint32_t length, staterr;
4249 int cleaned_count = 0;
4250 boolean_t cleaned = FALSE;
4251 unsigned int total_rx_bytes=0, total_rx_packets=0;
4252
4253 i = rx_ring->next_to_clean;
4254 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4255 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4256 buffer_info = &rx_ring->buffer_info[i];
4257
4258 while (staterr & E1000_RXD_STAT_DD) {
4259 ps_page = &rx_ring->ps_page[i];
4260 ps_page_dma = &rx_ring->ps_page_dma[i];
4261 #ifdef CONFIG_E1000_NAPI
4262 if (unlikely(*work_done >= work_to_do))
4263 break;
4264 (*work_done)++;
4265 #endif
4266 skb = buffer_info->skb;
4267
4268 /* in the packet split case this is header only */
4269 prefetch(skb->data - NET_IP_ALIGN);
4270
4271 if (++i == rx_ring->count) i = 0;
4272 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
4273 prefetch(next_rxd);
4274
4275 next_buffer = &rx_ring->buffer_info[i];
4276
4277 cleaned = TRUE;
4278 cleaned_count++;
4279 pci_unmap_single(pdev, buffer_info->dma,
4280 buffer_info->length,
4281 PCI_DMA_FROMDEVICE);
4282
4283 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
4284 E1000_DBG("%s: Packet Split buffers didn't pick up"
4285 " the full packet\n", netdev->name);
4286 dev_kfree_skb_irq(skb);
4287 goto next_desc;
4288 }
4289
4290 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
4291 dev_kfree_skb_irq(skb);
4292 goto next_desc;
4293 }
4294
4295 length = le16_to_cpu(rx_desc->wb.middle.length0);
4296
4297 if (unlikely(!length)) {
4298 E1000_DBG("%s: Last part of the packet spanning"
4299 " multiple descriptors\n", netdev->name);
4300 dev_kfree_skb_irq(skb);
4301 goto next_desc;
4302 }
4303
4304 /* Good Receive */
4305 skb_put(skb, length);
4306
4307 {
4308 /* this looks ugly, but it seems compiler issues make it
4309 more efficient than reusing j */
4310 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4311
4312 /* page alloc/put takes too long and effects small packet
4313 * throughput, so unsplit small packets and save the alloc/put*/
4314 if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
4315 u8 *vaddr;
4316 /* there is no documentation about how to call
4317 * kmap_atomic, so we can't hold the mapping
4318 * very long */
4319 pci_dma_sync_single_for_cpu(pdev,
4320 ps_page_dma->ps_page_dma[0],
4321 PAGE_SIZE,
4322 PCI_DMA_FROMDEVICE);
4323 vaddr = kmap_atomic(ps_page->ps_page[0],
4324 KM_SKB_DATA_SOFTIRQ);
4325 memcpy(skb->tail, vaddr, l1);
4326 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4327 pci_dma_sync_single_for_device(pdev,
4328 ps_page_dma->ps_page_dma[0],
4329 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4330 /* remove the CRC */
4331 l1 -= 4;
4332 skb_put(skb, l1);
4333 goto copydone;
4334 } /* if */
4335 }
4336
4337 for (j = 0; j < adapter->rx_ps_pages; j++) {
4338 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
4339 break;
4340 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4341 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4342 ps_page_dma->ps_page_dma[j] = 0;
4343 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4344 length);
4345 ps_page->ps_page[j] = NULL;
4346 skb->len += length;
4347 skb->data_len += length;
4348 skb->truesize += length;
4349 }
4350
4351 /* strip the ethernet crc, problem is we're using pages now so
4352 * this whole operation can get a little cpu intensive */
4353 pskb_trim(skb, skb->len - 4);
4354
4355 copydone:
4356 total_rx_bytes += skb->len;
4357 total_rx_packets++;
4358
4359 e1000_rx_checksum(adapter, staterr,
4360 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4361 skb->protocol = eth_type_trans(skb, netdev);
4362
4363 if (likely(rx_desc->wb.upper.header_status &
4364 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4365 adapter->rx_hdr_split++;
4366 #ifdef CONFIG_E1000_NAPI
4367 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4368 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4369 le16_to_cpu(rx_desc->wb.middle.vlan) &
4370 E1000_RXD_SPC_VLAN_MASK);
4371 } else {
4372 netif_receive_skb(skb);
4373 }
4374 #else /* CONFIG_E1000_NAPI */
4375 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4376 vlan_hwaccel_rx(skb, adapter->vlgrp,
4377 le16_to_cpu(rx_desc->wb.middle.vlan) &
4378 E1000_RXD_SPC_VLAN_MASK);
4379 } else {
4380 netif_rx(skb);
4381 }
4382 #endif /* CONFIG_E1000_NAPI */
4383 netdev->last_rx = jiffies;
4384
4385 next_desc:
4386 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4387 buffer_info->skb = NULL;
4388
4389 /* return some buffers to hardware, one at a time is too slow */
4390 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4391 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4392 cleaned_count = 0;
4393 }
4394
4395 /* use prefetched values */
4396 rx_desc = next_rxd;
4397 buffer_info = next_buffer;
4398
4399 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4400 }
4401 rx_ring->next_to_clean = i;
4402
4403 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4404 if (cleaned_count)
4405 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4406
4407 adapter->total_rx_packets += total_rx_packets;
4408 adapter->total_rx_bytes += total_rx_bytes;
4409 return cleaned;
4410 }
4411
4412 /**
4413 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4414 * @adapter: address of board private structure
4415 **/
4416
4417 static void
4418 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4419 struct e1000_rx_ring *rx_ring,
4420 int cleaned_count)
4421 {
4422 struct net_device *netdev = adapter->netdev;
4423 struct pci_dev *pdev = adapter->pdev;
4424 struct e1000_rx_desc *rx_desc;
4425 struct e1000_buffer *buffer_info;
4426 struct sk_buff *skb;
4427 unsigned int i;
4428 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4429
4430 i = rx_ring->next_to_use;
4431 buffer_info = &rx_ring->buffer_info[i];
4432
4433 while (cleaned_count--) {
4434 skb = buffer_info->skb;
4435 if (skb) {
4436 skb_trim(skb, 0);
4437 goto map_skb;
4438 }
4439
4440 skb = netdev_alloc_skb(netdev, bufsz);
4441 if (unlikely(!skb)) {
4442 /* Better luck next round */
4443 adapter->alloc_rx_buff_failed++;
4444 break;
4445 }
4446
4447 /* Fix for errata 23, can't cross 64kB boundary */
4448 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4449 struct sk_buff *oldskb = skb;
4450 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4451 "at %p\n", bufsz, skb->data);
4452 /* Try again, without freeing the previous */
4453 skb = netdev_alloc_skb(netdev, bufsz);
4454 /* Failed allocation, critical failure */
4455 if (!skb) {
4456 dev_kfree_skb(oldskb);
4457 break;
4458 }
4459
4460 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4461 /* give up */
4462 dev_kfree_skb(skb);
4463 dev_kfree_skb(oldskb);
4464 break; /* while !buffer_info->skb */
4465 }
4466
4467 /* Use new allocation */
4468 dev_kfree_skb(oldskb);
4469 }
4470 /* Make buffer alignment 2 beyond a 16 byte boundary
4471 * this will result in a 16 byte aligned IP header after
4472 * the 14 byte MAC header is removed
4473 */
4474 skb_reserve(skb, NET_IP_ALIGN);
4475
4476 buffer_info->skb = skb;
4477 buffer_info->length = adapter->rx_buffer_len;
4478 map_skb:
4479 buffer_info->dma = pci_map_single(pdev,
4480 skb->data,
4481 adapter->rx_buffer_len,
4482 PCI_DMA_FROMDEVICE);
4483
4484 /* Fix for errata 23, can't cross 64kB boundary */
4485 if (!e1000_check_64k_bound(adapter,
4486 (void *)(unsigned long)buffer_info->dma,
4487 adapter->rx_buffer_len)) {
4488 DPRINTK(RX_ERR, ERR,
4489 "dma align check failed: %u bytes at %p\n",
4490 adapter->rx_buffer_len,
4491 (void *)(unsigned long)buffer_info->dma);
4492 dev_kfree_skb(skb);
4493 buffer_info->skb = NULL;
4494
4495 pci_unmap_single(pdev, buffer_info->dma,
4496 adapter->rx_buffer_len,
4497 PCI_DMA_FROMDEVICE);
4498
4499 break; /* while !buffer_info->skb */
4500 }
4501 rx_desc = E1000_RX_DESC(*rx_ring, i);
4502 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4503
4504 if (unlikely(++i == rx_ring->count))
4505 i = 0;
4506 buffer_info = &rx_ring->buffer_info[i];
4507 }
4508
4509 if (likely(rx_ring->next_to_use != i)) {
4510 rx_ring->next_to_use = i;
4511 if (unlikely(i-- == 0))
4512 i = (rx_ring->count - 1);
4513
4514 /* Force memory writes to complete before letting h/w
4515 * know there are new descriptors to fetch. (Only
4516 * applicable for weak-ordered memory model archs,
4517 * such as IA-64). */
4518 wmb();
4519 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4520 }
4521 }
4522
4523 /**
4524 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4525 * @adapter: address of board private structure
4526 **/
4527
4528 static void
4529 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4530 struct e1000_rx_ring *rx_ring,
4531 int cleaned_count)
4532 {
4533 struct net_device *netdev = adapter->netdev;
4534 struct pci_dev *pdev = adapter->pdev;
4535 union e1000_rx_desc_packet_split *rx_desc;
4536 struct e1000_buffer *buffer_info;
4537 struct e1000_ps_page *ps_page;
4538 struct e1000_ps_page_dma *ps_page_dma;
4539 struct sk_buff *skb;
4540 unsigned int i, j;
4541
4542 i = rx_ring->next_to_use;
4543 buffer_info = &rx_ring->buffer_info[i];
4544 ps_page = &rx_ring->ps_page[i];
4545 ps_page_dma = &rx_ring->ps_page_dma[i];
4546
4547 while (cleaned_count--) {
4548 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4549
4550 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4551 if (j < adapter->rx_ps_pages) {
4552 if (likely(!ps_page->ps_page[j])) {
4553 ps_page->ps_page[j] =
4554 alloc_page(GFP_ATOMIC);
4555 if (unlikely(!ps_page->ps_page[j])) {
4556 adapter->alloc_rx_buff_failed++;
4557 goto no_buffers;
4558 }
4559 ps_page_dma->ps_page_dma[j] =
4560 pci_map_page(pdev,
4561 ps_page->ps_page[j],
4562 0, PAGE_SIZE,
4563 PCI_DMA_FROMDEVICE);
4564 }
4565 /* Refresh the desc even if buffer_addrs didn't
4566 * change because each write-back erases
4567 * this info.
4568 */
4569 rx_desc->read.buffer_addr[j+1] =
4570 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4571 } else
4572 rx_desc->read.buffer_addr[j+1] = ~0;
4573 }
4574
4575 skb = netdev_alloc_skb(netdev,
4576 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4577
4578 if (unlikely(!skb)) {
4579 adapter->alloc_rx_buff_failed++;
4580 break;
4581 }
4582
4583 /* Make buffer alignment 2 beyond a 16 byte boundary
4584 * this will result in a 16 byte aligned IP header after
4585 * the 14 byte MAC header is removed
4586 */
4587 skb_reserve(skb, NET_IP_ALIGN);
4588
4589 buffer_info->skb = skb;
4590 buffer_info->length = adapter->rx_ps_bsize0;
4591 buffer_info->dma = pci_map_single(pdev, skb->data,
4592 adapter->rx_ps_bsize0,
4593 PCI_DMA_FROMDEVICE);
4594
4595 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4596
4597 if (unlikely(++i == rx_ring->count)) i = 0;
4598 buffer_info = &rx_ring->buffer_info[i];
4599 ps_page = &rx_ring->ps_page[i];
4600 ps_page_dma = &rx_ring->ps_page_dma[i];
4601 }
4602
4603 no_buffers:
4604 if (likely(rx_ring->next_to_use != i)) {
4605 rx_ring->next_to_use = i;
4606 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4607
4608 /* Force memory writes to complete before letting h/w
4609 * know there are new descriptors to fetch. (Only
4610 * applicable for weak-ordered memory model archs,
4611 * such as IA-64). */
4612 wmb();
4613 /* Hardware increments by 16 bytes, but packet split
4614 * descriptors are 32 bytes...so we increment tail
4615 * twice as much.
4616 */
4617 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4618 }
4619 }
4620
4621 /**
4622 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4623 * @adapter:
4624 **/
4625
4626 static void
4627 e1000_smartspeed(struct e1000_adapter *adapter)
4628 {
4629 uint16_t phy_status;
4630 uint16_t phy_ctrl;
4631
4632 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4633 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4634 return;
4635
4636 if (adapter->smartspeed == 0) {
4637 /* If Master/Slave config fault is asserted twice,
4638 * we assume back-to-back */
4639 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4640 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4641 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4642 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4643 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4644 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4645 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4646 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4647 phy_ctrl);
4648 adapter->smartspeed++;
4649 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4650 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4651 &phy_ctrl)) {
4652 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4653 MII_CR_RESTART_AUTO_NEG);
4654 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4655 phy_ctrl);
4656 }
4657 }
4658 return;
4659 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4660 /* If still no link, perhaps using 2/3 pair cable */
4661 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4662 phy_ctrl |= CR_1000T_MS_ENABLE;
4663 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4664 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4665 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4666 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4667 MII_CR_RESTART_AUTO_NEG);
4668 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4669 }
4670 }
4671 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4672 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4673 adapter->smartspeed = 0;
4674 }
4675
4676 /**
4677 * e1000_ioctl -
4678 * @netdev:
4679 * @ifreq:
4680 * @cmd:
4681 **/
4682
4683 static int
4684 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4685 {
4686 switch (cmd) {
4687 case SIOCGMIIPHY:
4688 case SIOCGMIIREG:
4689 case SIOCSMIIREG:
4690 return e1000_mii_ioctl(netdev, ifr, cmd);
4691 default:
4692 return -EOPNOTSUPP;
4693 }
4694 }
4695
4696 /**
4697 * e1000_mii_ioctl -
4698 * @netdev:
4699 * @ifreq:
4700 * @cmd:
4701 **/
4702
4703 static int
4704 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4705 {
4706 struct e1000_adapter *adapter = netdev_priv(netdev);
4707 struct mii_ioctl_data *data = if_mii(ifr);
4708 int retval;
4709 uint16_t mii_reg;
4710 uint16_t spddplx;
4711 unsigned long flags;
4712
4713 if (adapter->hw.media_type != e1000_media_type_copper)
4714 return -EOPNOTSUPP;
4715
4716 switch (cmd) {
4717 case SIOCGMIIPHY:
4718 data->phy_id = adapter->hw.phy_addr;
4719 break;
4720 case SIOCGMIIREG:
4721 if (!capable(CAP_NET_ADMIN))
4722 return -EPERM;
4723 spin_lock_irqsave(&adapter->stats_lock, flags);
4724 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4725 &data->val_out)) {
4726 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4727 return -EIO;
4728 }
4729 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4730 break;
4731 case SIOCSMIIREG:
4732 if (!capable(CAP_NET_ADMIN))
4733 return -EPERM;
4734 if (data->reg_num & ~(0x1F))
4735 return -EFAULT;
4736 mii_reg = data->val_in;
4737 spin_lock_irqsave(&adapter->stats_lock, flags);
4738 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4739 mii_reg)) {
4740 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4741 return -EIO;
4742 }
4743 if (adapter->hw.media_type == e1000_media_type_copper) {
4744 switch (data->reg_num) {
4745 case PHY_CTRL:
4746 if (mii_reg & MII_CR_POWER_DOWN)
4747 break;
4748 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4749 adapter->hw.autoneg = 1;
4750 adapter->hw.autoneg_advertised = 0x2F;
4751 } else {
4752 if (mii_reg & 0x40)
4753 spddplx = SPEED_1000;
4754 else if (mii_reg & 0x2000)
4755 spddplx = SPEED_100;
4756 else
4757 spddplx = SPEED_10;
4758 spddplx += (mii_reg & 0x100)
4759 ? DUPLEX_FULL :
4760 DUPLEX_HALF;
4761 retval = e1000_set_spd_dplx(adapter,
4762 spddplx);
4763 if (retval) {
4764 spin_unlock_irqrestore(
4765 &adapter->stats_lock,
4766 flags);
4767 return retval;
4768 }
4769 }
4770 if (netif_running(adapter->netdev))
4771 e1000_reinit_locked(adapter);
4772 else
4773 e1000_reset(adapter);
4774 break;
4775 case M88E1000_PHY_SPEC_CTRL:
4776 case M88E1000_EXT_PHY_SPEC_CTRL:
4777 if (e1000_phy_reset(&adapter->hw)) {
4778 spin_unlock_irqrestore(
4779 &adapter->stats_lock, flags);
4780 return -EIO;
4781 }
4782 break;
4783 }
4784 } else {
4785 switch (data->reg_num) {
4786 case PHY_CTRL:
4787 if (mii_reg & MII_CR_POWER_DOWN)
4788 break;
4789 if (netif_running(adapter->netdev))
4790 e1000_reinit_locked(adapter);
4791 else
4792 e1000_reset(adapter);
4793 break;
4794 }
4795 }
4796 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4797 break;
4798 default:
4799 return -EOPNOTSUPP;
4800 }
4801 return E1000_SUCCESS;
4802 }
4803
4804 void
4805 e1000_pci_set_mwi(struct e1000_hw *hw)
4806 {
4807 struct e1000_adapter *adapter = hw->back;
4808 int ret_val = pci_set_mwi(adapter->pdev);
4809
4810 if (ret_val)
4811 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4812 }
4813
4814 void
4815 e1000_pci_clear_mwi(struct e1000_hw *hw)
4816 {
4817 struct e1000_adapter *adapter = hw->back;
4818
4819 pci_clear_mwi(adapter->pdev);
4820 }
4821
4822 void
4823 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4824 {
4825 struct e1000_adapter *adapter = hw->back;
4826
4827 pci_read_config_word(adapter->pdev, reg, value);
4828 }
4829
4830 void
4831 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4832 {
4833 struct e1000_adapter *adapter = hw->back;
4834
4835 pci_write_config_word(adapter->pdev, reg, *value);
4836 }
4837
4838 int32_t
4839 e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4840 {
4841 struct e1000_adapter *adapter = hw->back;
4842 uint16_t cap_offset;
4843
4844 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4845 if (!cap_offset)
4846 return -E1000_ERR_CONFIG;
4847
4848 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4849
4850 return E1000_SUCCESS;
4851 }
4852
4853 void
4854 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4855 {
4856 outl(value, port);
4857 }
4858
4859 static void
4860 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4861 {
4862 struct e1000_adapter *adapter = netdev_priv(netdev);
4863 uint32_t ctrl, rctl;
4864
4865 e1000_irq_disable(adapter);
4866 adapter->vlgrp = grp;
4867
4868 if (grp) {
4869 /* enable VLAN tag insert/strip */
4870 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4871 ctrl |= E1000_CTRL_VME;
4872 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4873
4874 if (adapter->hw.mac_type != e1000_ich8lan) {
4875 /* enable VLAN receive filtering */
4876 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4877 rctl |= E1000_RCTL_VFE;
4878 rctl &= ~E1000_RCTL_CFIEN;
4879 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4880 e1000_update_mng_vlan(adapter);
4881 }
4882 } else {
4883 /* disable VLAN tag insert/strip */
4884 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4885 ctrl &= ~E1000_CTRL_VME;
4886 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4887
4888 if (adapter->hw.mac_type != e1000_ich8lan) {
4889 /* disable VLAN filtering */
4890 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4891 rctl &= ~E1000_RCTL_VFE;
4892 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4893 if (adapter->mng_vlan_id !=
4894 (uint16_t)E1000_MNG_VLAN_NONE) {
4895 e1000_vlan_rx_kill_vid(netdev,
4896 adapter->mng_vlan_id);
4897 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4898 }
4899 }
4900 }
4901
4902 e1000_irq_enable(adapter);
4903 }
4904
4905 static void
4906 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4907 {
4908 struct e1000_adapter *adapter = netdev_priv(netdev);
4909 uint32_t vfta, index;
4910
4911 if ((adapter->hw.mng_cookie.status &
4912 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4913 (vid == adapter->mng_vlan_id))
4914 return;
4915 /* add VID to filter table */
4916 index = (vid >> 5) & 0x7F;
4917 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4918 vfta |= (1 << (vid & 0x1F));
4919 e1000_write_vfta(&adapter->hw, index, vfta);
4920 }
4921
4922 static void
4923 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4924 {
4925 struct e1000_adapter *adapter = netdev_priv(netdev);
4926 uint32_t vfta, index;
4927
4928 e1000_irq_disable(adapter);
4929
4930 if (adapter->vlgrp)
4931 adapter->vlgrp->vlan_devices[vid] = NULL;
4932
4933 e1000_irq_enable(adapter);
4934
4935 if ((adapter->hw.mng_cookie.status &
4936 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4937 (vid == adapter->mng_vlan_id)) {
4938 /* release control to f/w */
4939 e1000_release_hw_control(adapter);
4940 return;
4941 }
4942
4943 /* remove VID from filter table */
4944 index = (vid >> 5) & 0x7F;
4945 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4946 vfta &= ~(1 << (vid & 0x1F));
4947 e1000_write_vfta(&adapter->hw, index, vfta);
4948 }
4949
4950 static void
4951 e1000_restore_vlan(struct e1000_adapter *adapter)
4952 {
4953 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4954
4955 if (adapter->vlgrp) {
4956 uint16_t vid;
4957 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4958 if (!adapter->vlgrp->vlan_devices[vid])
4959 continue;
4960 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4961 }
4962 }
4963 }
4964
4965 int
4966 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4967 {
4968 adapter->hw.autoneg = 0;
4969
4970 /* Fiber NICs only allow 1000 gbps Full duplex */
4971 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
4972 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4973 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4974 return -EINVAL;
4975 }
4976
4977 switch (spddplx) {
4978 case SPEED_10 + DUPLEX_HALF:
4979 adapter->hw.forced_speed_duplex = e1000_10_half;
4980 break;
4981 case SPEED_10 + DUPLEX_FULL:
4982 adapter->hw.forced_speed_duplex = e1000_10_full;
4983 break;
4984 case SPEED_100 + DUPLEX_HALF:
4985 adapter->hw.forced_speed_duplex = e1000_100_half;
4986 break;
4987 case SPEED_100 + DUPLEX_FULL:
4988 adapter->hw.forced_speed_duplex = e1000_100_full;
4989 break;
4990 case SPEED_1000 + DUPLEX_FULL:
4991 adapter->hw.autoneg = 1;
4992 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4993 break;
4994 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4995 default:
4996 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4997 return -EINVAL;
4998 }
4999 return 0;
5000 }
5001
5002 #ifdef CONFIG_PM
5003 /* Save/restore 16 or 64 dwords of PCI config space depending on which
5004 * bus we're on (PCI(X) vs. PCI-E)
5005 */
5006 #define PCIE_CONFIG_SPACE_LEN 256
5007 #define PCI_CONFIG_SPACE_LEN 64
5008 static int
5009 e1000_pci_save_state(struct e1000_adapter *adapter)
5010 {
5011 struct pci_dev *dev = adapter->pdev;
5012 int size;
5013 int i;
5014
5015 if (adapter->hw.mac_type >= e1000_82571)
5016 size = PCIE_CONFIG_SPACE_LEN;
5017 else
5018 size = PCI_CONFIG_SPACE_LEN;
5019
5020 WARN_ON(adapter->config_space != NULL);
5021
5022 adapter->config_space = kmalloc(size, GFP_KERNEL);
5023 if (!adapter->config_space) {
5024 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
5025 return -ENOMEM;
5026 }
5027 for (i = 0; i < (size / 4); i++)
5028 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
5029 return 0;
5030 }
5031
5032 static void
5033 e1000_pci_restore_state(struct e1000_adapter *adapter)
5034 {
5035 struct pci_dev *dev = adapter->pdev;
5036 int size;
5037 int i;
5038
5039 if (adapter->config_space == NULL)
5040 return;
5041
5042 if (adapter->hw.mac_type >= e1000_82571)
5043 size = PCIE_CONFIG_SPACE_LEN;
5044 else
5045 size = PCI_CONFIG_SPACE_LEN;
5046 for (i = 0; i < (size / 4); i++)
5047 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
5048 kfree(adapter->config_space);
5049 adapter->config_space = NULL;
5050 return;
5051 }
5052 #endif /* CONFIG_PM */
5053
5054 static int
5055 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5056 {
5057 struct net_device *netdev = pci_get_drvdata(pdev);
5058 struct e1000_adapter *adapter = netdev_priv(netdev);
5059 uint32_t ctrl, ctrl_ext, rctl, status;
5060 uint32_t wufc = adapter->wol;
5061 #ifdef CONFIG_PM
5062 int retval = 0;
5063 #endif
5064
5065 netif_device_detach(netdev);
5066
5067 if (netif_running(netdev)) {
5068 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
5069 e1000_down(adapter);
5070 }
5071
5072 #ifdef CONFIG_PM
5073 /* Implement our own version of pci_save_state(pdev) because pci-
5074 * express adapters have 256-byte config spaces. */
5075 retval = e1000_pci_save_state(adapter);
5076 if (retval)
5077 return retval;
5078 #endif
5079
5080 status = E1000_READ_REG(&adapter->hw, STATUS);
5081 if (status & E1000_STATUS_LU)
5082 wufc &= ~E1000_WUFC_LNKC;
5083
5084 if (wufc) {
5085 e1000_setup_rctl(adapter);
5086 e1000_set_multi(netdev);
5087
5088 /* turn on all-multi mode if wake on multicast is enabled */
5089 if (wufc & E1000_WUFC_MC) {
5090 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5091 rctl |= E1000_RCTL_MPE;
5092 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5093 }
5094
5095 if (adapter->hw.mac_type >= e1000_82540) {
5096 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5097 /* advertise wake from D3Cold */
5098 #define E1000_CTRL_ADVD3WUC 0x00100000
5099 /* phy power management enable */
5100 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5101 ctrl |= E1000_CTRL_ADVD3WUC |
5102 E1000_CTRL_EN_PHY_PWR_MGMT;
5103 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5104 }
5105
5106 if (adapter->hw.media_type == e1000_media_type_fiber ||
5107 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5108 /* keep the laser running in D3 */
5109 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5110 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5111 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5112 }
5113
5114 /* Allow time for pending master requests to run */
5115 e1000_disable_pciex_master(&adapter->hw);
5116
5117 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5118 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
5119 pci_enable_wake(pdev, PCI_D3hot, 1);
5120 pci_enable_wake(pdev, PCI_D3cold, 1);
5121 } else {
5122 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5123 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
5124 pci_enable_wake(pdev, PCI_D3hot, 0);
5125 pci_enable_wake(pdev, PCI_D3cold, 0);
5126 }
5127
5128 e1000_release_manageability(adapter);
5129
5130 /* make sure adapter isn't asleep if manageability is enabled */
5131 if (adapter->en_mng_pt) {
5132 pci_enable_wake(pdev, PCI_D3hot, 1);
5133 pci_enable_wake(pdev, PCI_D3cold, 1);
5134 }
5135
5136 if (adapter->hw.phy_type == e1000_phy_igp_3)
5137 e1000_phy_powerdown_workaround(&adapter->hw);
5138
5139 if (netif_running(netdev))
5140 e1000_free_irq(adapter);
5141
5142 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5143 * would have already happened in close and is redundant. */
5144 e1000_release_hw_control(adapter);
5145
5146 pci_disable_device(pdev);
5147
5148 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5149
5150 return 0;
5151 }
5152
5153 #ifdef CONFIG_PM
5154 static int
5155 e1000_resume(struct pci_dev *pdev)
5156 {
5157 struct net_device *netdev = pci_get_drvdata(pdev);
5158 struct e1000_adapter *adapter = netdev_priv(netdev);
5159 uint32_t err;
5160
5161 pci_set_power_state(pdev, PCI_D0);
5162 e1000_pci_restore_state(adapter);
5163 if ((err = pci_enable_device(pdev))) {
5164 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5165 return err;
5166 }
5167 pci_set_master(pdev);
5168
5169 pci_enable_wake(pdev, PCI_D3hot, 0);
5170 pci_enable_wake(pdev, PCI_D3cold, 0);
5171
5172 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5173 return err;
5174
5175 e1000_power_up_phy(adapter);
5176 e1000_reset(adapter);
5177 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5178
5179 e1000_init_manageability(adapter);
5180
5181 if (netif_running(netdev))
5182 e1000_up(adapter);
5183
5184 netif_device_attach(netdev);
5185
5186 /* If the controller is 82573 and f/w is AMT, do not set
5187 * DRV_LOAD until the interface is up. For all other cases,
5188 * let the f/w know that the h/w is now under the control
5189 * of the driver. */
5190 if (adapter->hw.mac_type != e1000_82573 ||
5191 !e1000_check_mng_mode(&adapter->hw))
5192 e1000_get_hw_control(adapter);
5193
5194 return 0;
5195 }
5196 #endif
5197
5198 static void e1000_shutdown(struct pci_dev *pdev)
5199 {
5200 e1000_suspend(pdev, PMSG_SUSPEND);
5201 }
5202
5203 #ifdef CONFIG_NET_POLL_CONTROLLER
5204 /*
5205 * Polling 'interrupt' - used by things like netconsole to send skbs
5206 * without having to re-enable interrupts. It's not called while
5207 * the interrupt routine is executing.
5208 */
5209 static void
5210 e1000_netpoll(struct net_device *netdev)
5211 {
5212 struct e1000_adapter *adapter = netdev_priv(netdev);
5213
5214 disable_irq(adapter->pdev->irq);
5215 e1000_intr(adapter->pdev->irq, netdev);
5216 e1000_clean_tx_irq(adapter, adapter->tx_ring);
5217 #ifndef CONFIG_E1000_NAPI
5218 adapter->clean_rx(adapter, adapter->rx_ring);
5219 #endif
5220 enable_irq(adapter->pdev->irq);
5221 }
5222 #endif
5223
5224 /**
5225 * e1000_io_error_detected - called when PCI error is detected
5226 * @pdev: Pointer to PCI device
5227 * @state: The current pci conneection state
5228 *
5229 * This function is called after a PCI bus error affecting
5230 * this device has been detected.
5231 */
5232 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5233 {
5234 struct net_device *netdev = pci_get_drvdata(pdev);
5235 struct e1000_adapter *adapter = netdev->priv;
5236
5237 netif_device_detach(netdev);
5238
5239 if (netif_running(netdev))
5240 e1000_down(adapter);
5241 pci_disable_device(pdev);
5242
5243 /* Request a slot slot reset. */
5244 return PCI_ERS_RESULT_NEED_RESET;
5245 }
5246
5247 /**
5248 * e1000_io_slot_reset - called after the pci bus has been reset.
5249 * @pdev: Pointer to PCI device
5250 *
5251 * Restart the card from scratch, as if from a cold-boot. Implementation
5252 * resembles the first-half of the e1000_resume routine.
5253 */
5254 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5255 {
5256 struct net_device *netdev = pci_get_drvdata(pdev);
5257 struct e1000_adapter *adapter = netdev->priv;
5258
5259 if (pci_enable_device(pdev)) {
5260 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5261 return PCI_ERS_RESULT_DISCONNECT;
5262 }
5263 pci_set_master(pdev);
5264
5265 pci_enable_wake(pdev, PCI_D3hot, 0);
5266 pci_enable_wake(pdev, PCI_D3cold, 0);
5267
5268 e1000_reset(adapter);
5269 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5270
5271 return PCI_ERS_RESULT_RECOVERED;
5272 }
5273
5274 /**
5275 * e1000_io_resume - called when traffic can start flowing again.
5276 * @pdev: Pointer to PCI device
5277 *
5278 * This callback is called when the error recovery driver tells us that
5279 * its OK to resume normal operation. Implementation resembles the
5280 * second-half of the e1000_resume routine.
5281 */
5282 static void e1000_io_resume(struct pci_dev *pdev)
5283 {
5284 struct net_device *netdev = pci_get_drvdata(pdev);
5285 struct e1000_adapter *adapter = netdev->priv;
5286
5287 e1000_init_manageability(adapter);
5288
5289 if (netif_running(netdev)) {
5290 if (e1000_up(adapter)) {
5291 printk("e1000: can't bring device back up after reset\n");
5292 return;
5293 }
5294 }
5295
5296 netif_device_attach(netdev);
5297
5298 /* If the controller is 82573 and f/w is AMT, do not set
5299 * DRV_LOAD until the interface is up. For all other cases,
5300 * let the f/w know that the h/w is now under the control
5301 * of the driver. */
5302 if (adapter->hw.mac_type != e1000_82573 ||
5303 !e1000_check_mng_mode(&adapter->hw))
5304 e1000_get_hw_control(adapter);
5305
5306 }
5307
5308 /* e1000_main.c */
Support for the Chinese Samsung S3C2440 based development boards