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[PATCH] e1000: Fix Wake-on-Lan with forced gigabit speed
[linux-2.6/mini2440.git] / drivers / ieee1394 / video1394.c
blob598b19fc5989da426d87510031cd6e4bb105d5d4
1 /*
2 * video1394.c - video driver for OHCI 1394 boards
3 * Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>
4 * Peter Schlaile <udbz@rz.uni-karlsruhe.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software Foundation,
18 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 *
20 * NOTES:
21 *
22 * ioctl return codes:
23 * EFAULT is only for invalid address for the argp
24 * EINVAL for out of range values
25 * EBUSY when trying to use an already used resource
26 * ESRCH when trying to free/stop a not used resource
27 * EAGAIN for resource allocation failure that could perhaps succeed later
28 * ENOTTY for unsupported ioctl request
29 *
30 */
31 #include <linux/kernel.h>
32 #include <linux/list.h>
33 #include <linux/slab.h>
34 #include <linux/interrupt.h>
35 #include <linux/wait.h>
36 #include <linux/errno.h>
37 #include <linux/module.h>
38 #include <linux/init.h>
39 #include <linux/pci.h>
40 #include <linux/fs.h>
41 #include <linux/poll.h>
42 #include <linux/smp_lock.h>
43 #include <linux/delay.h>
44 #include <linux/bitops.h>
45 #include <linux/types.h>
46 #include <linux/vmalloc.h>
47 #include <linux/timex.h>
48 #include <linux/mm.h>
49 #include <linux/compat.h>
50 #include <linux/cdev.h>
51
52 #include "dma.h"
53 #include "highlevel.h"
54 #include "hosts.h"
55 #include "ieee1394.h"
56 #include "ieee1394_core.h"
57 #include "ieee1394_hotplug.h"
58 #include "ieee1394_types.h"
59 #include "nodemgr.h"
60 #include "ohci1394.h"
61 #include "video1394.h"
62
63 #define ISO_CHANNELS 64
64
65 struct it_dma_prg {
66 struct dma_cmd begin;
67 quadlet_t data[4];
68 struct dma_cmd end;
69 quadlet_t pad[4]; /* FIXME: quick hack for memory alignment */
70 };
71
72 struct dma_iso_ctx {
73 struct ti_ohci *ohci;
74 int type; /* OHCI_ISO_TRANSMIT or OHCI_ISO_RECEIVE */
75 struct ohci1394_iso_tasklet iso_tasklet;
76 int channel;
77 int ctx;
78 int last_buffer;
79 int * next_buffer; /* For ISO Transmit of video packets
80 to write the correct SYT field
81 into the next block */
82 unsigned int num_desc;
83 unsigned int buf_size;
84 unsigned int frame_size;
85 unsigned int packet_size;
86 unsigned int left_size;
87 unsigned int nb_cmd;
88
89 struct dma_region dma;
90
91 struct dma_prog_region *prg_reg;
92
93 struct dma_cmd **ir_prg;
94 struct it_dma_prg **it_prg;
95
96 unsigned int *buffer_status;
97 unsigned int *buffer_prg_assignment;
98 struct timeval *buffer_time; /* time when the buffer was received */
99 unsigned int *last_used_cmd; /* For ISO Transmit with
100 variable sized packets only ! */
101 int ctrlClear;
102 int ctrlSet;
103 int cmdPtr;
104 int ctxMatch;
105 wait_queue_head_t waitq;
106 spinlock_t lock;
107 unsigned int syt_offset;
108 int flags;
109
110 struct list_head link;
111 };
112
113
114 struct file_ctx {
115 struct ti_ohci *ohci;
116 struct list_head context_list;
117 struct dma_iso_ctx *current_ctx;
118 };
119
120 #ifdef CONFIG_IEEE1394_VERBOSEDEBUG
121 #define VIDEO1394_DEBUG
122 #endif
123
124 #ifdef DBGMSG
125 #undef DBGMSG
126 #endif
127
128 #ifdef VIDEO1394_DEBUG
129 #define DBGMSG(card, fmt, args...) \
130 printk(KERN_INFO "video1394_%d: " fmt "\n" , card , ## args)
131 #else
132 #define DBGMSG(card, fmt, args...) do {} while (0)
133 #endif
134
135 /* print general (card independent) information */
136 #define PRINT_G(level, fmt, args...) \
137 printk(level "video1394: " fmt "\n" , ## args)
138
139 /* print card specific information */
140 #define PRINT(level, card, fmt, args...) \
141 printk(level "video1394_%d: " fmt "\n" , card , ## args)
142
143 static void wakeup_dma_ir_ctx(unsigned long l);
144 static void wakeup_dma_it_ctx(unsigned long l);
145
146 static struct hpsb_highlevel video1394_highlevel;
147
148 static int free_dma_iso_ctx(struct dma_iso_ctx *d)
149 {
150 int i;
151
152 DBGMSG(d->ohci->host->id, "Freeing dma_iso_ctx %d", d->ctx);
153
154 ohci1394_stop_context(d->ohci, d->ctrlClear, NULL);
155 if (d->iso_tasklet.link.next != NULL)
156 ohci1394_unregister_iso_tasklet(d->ohci, &d->iso_tasklet);
157
158 dma_region_free(&d->dma);
159
160 if (d->prg_reg) {
161 for (i = 0; i < d->num_desc; i++)
162 dma_prog_region_free(&d->prg_reg[i]);
163 kfree(d->prg_reg);
164 }
165
166 kfree(d->ir_prg);
167 kfree(d->it_prg);
168 kfree(d->buffer_status);
169 kfree(d->buffer_prg_assignment);
170 kfree(d->buffer_time);
171 kfree(d->last_used_cmd);
172 kfree(d->next_buffer);
173 list_del(&d->link);
174 kfree(d);
175
176 return 0;
177 }
178
179 static struct dma_iso_ctx *
180 alloc_dma_iso_ctx(struct ti_ohci *ohci, int type, int num_desc,
181 int buf_size, int channel, unsigned int packet_size)
182 {
183 struct dma_iso_ctx *d;
184 int i;
185
186 d = kzalloc(sizeof(*d), GFP_KERNEL);
187 if (!d) {
188 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma_iso_ctx");
189 return NULL;
190 }
191
192 d->ohci = ohci;
193 d->type = type;
194 d->channel = channel;
195 d->num_desc = num_desc;
196 d->frame_size = buf_size;
197 d->buf_size = PAGE_ALIGN(buf_size);
198 d->last_buffer = -1;
199 INIT_LIST_HEAD(&d->link);
200 init_waitqueue_head(&d->waitq);
201
202 /* Init the regions for easy cleanup */
203 dma_region_init(&d->dma);
204
205 if (dma_region_alloc(&d->dma, (d->num_desc - 1) * d->buf_size, ohci->dev,
206 PCI_DMA_BIDIRECTIONAL)) {
207 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma buffer");
208 free_dma_iso_ctx(d);
209 return NULL;
210 }
211
212 if (type == OHCI_ISO_RECEIVE)
213 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
214 wakeup_dma_ir_ctx,
215 (unsigned long) d);
216 else
217 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
218 wakeup_dma_it_ctx,
219 (unsigned long) d);
220
221 if (ohci1394_register_iso_tasklet(ohci, &d->iso_tasklet) < 0) {
222 PRINT(KERN_ERR, ohci->host->id, "no free iso %s contexts",
223 type == OHCI_ISO_RECEIVE ? "receive" : "transmit");
224 free_dma_iso_ctx(d);
225 return NULL;
226 }
227 d->ctx = d->iso_tasklet.context;
228
229 d->prg_reg = kmalloc(d->num_desc * sizeof(*d->prg_reg), GFP_KERNEL);
230 if (!d->prg_reg) {
231 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate ir prg regs");
232 free_dma_iso_ctx(d);
233 return NULL;
234 }
235 /* Makes for easier cleanup */
236 for (i = 0; i < d->num_desc; i++)
237 dma_prog_region_init(&d->prg_reg[i]);
238
239 if (type == OHCI_ISO_RECEIVE) {
240 d->ctrlSet = OHCI1394_IsoRcvContextControlSet+32*d->ctx;
241 d->ctrlClear = OHCI1394_IsoRcvContextControlClear+32*d->ctx;
242 d->cmdPtr = OHCI1394_IsoRcvCommandPtr+32*d->ctx;
243 d->ctxMatch = OHCI1394_IsoRcvContextMatch+32*d->ctx;
244
245 d->ir_prg = kzalloc(d->num_desc * sizeof(*d->ir_prg),
246 GFP_KERNEL);
247
248 if (!d->ir_prg) {
249 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
250 free_dma_iso_ctx(d);
251 return NULL;
252 }
253
254 d->nb_cmd = d->buf_size / PAGE_SIZE + 1;
255 d->left_size = (d->frame_size % PAGE_SIZE) ?
256 d->frame_size % PAGE_SIZE : PAGE_SIZE;
257
258 for (i = 0;i < d->num_desc; i++) {
259 if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
260 sizeof(struct dma_cmd), ohci->dev)) {
261 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
262 free_dma_iso_ctx(d);
263 return NULL;
264 }
265 d->ir_prg[i] = (struct dma_cmd *)d->prg_reg[i].kvirt;
266 }
267
268 } else { /* OHCI_ISO_TRANSMIT */
269 d->ctrlSet = OHCI1394_IsoXmitContextControlSet+16*d->ctx;
270 d->ctrlClear = OHCI1394_IsoXmitContextControlClear+16*d->ctx;
271 d->cmdPtr = OHCI1394_IsoXmitCommandPtr+16*d->ctx;
272
273 d->it_prg = kzalloc(d->num_desc * sizeof(*d->it_prg),
274 GFP_KERNEL);
275
276 if (!d->it_prg) {
277 PRINT(KERN_ERR, ohci->host->id,
278 "Failed to allocate dma it prg");
279 free_dma_iso_ctx(d);
280 return NULL;
281 }
282
283 d->packet_size = packet_size;
284
285 if (PAGE_SIZE % packet_size || packet_size>4096) {
286 PRINT(KERN_ERR, ohci->host->id,
287 "Packet size %d (page_size: %ld) "
288 "not yet supported\n",
289 packet_size, PAGE_SIZE);
290 free_dma_iso_ctx(d);
291 return NULL;
292 }
293
294 d->nb_cmd = d->frame_size / d->packet_size;
295 if (d->frame_size % d->packet_size) {
296 d->nb_cmd++;
297 d->left_size = d->frame_size % d->packet_size;
298 } else
299 d->left_size = d->packet_size;
300
301 for (i = 0; i < d->num_desc; i++) {
302 if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
303 sizeof(struct it_dma_prg), ohci->dev)) {
304 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma it prg");
305 free_dma_iso_ctx(d);
306 return NULL;
307 }
308 d->it_prg[i] = (struct it_dma_prg *)d->prg_reg[i].kvirt;
309 }
310 }
311
312 d->buffer_status =
313 kzalloc(d->num_desc * sizeof(*d->buffer_status), GFP_KERNEL);
314 d->buffer_prg_assignment =
315 kzalloc(d->num_desc * sizeof(*d->buffer_prg_assignment), GFP_KERNEL);
316 d->buffer_time =
317 kzalloc(d->num_desc * sizeof(*d->buffer_time), GFP_KERNEL);
318 d->last_used_cmd =
319 kzalloc(d->num_desc * sizeof(*d->last_used_cmd), GFP_KERNEL);
320 d->next_buffer =
321 kzalloc(d->num_desc * sizeof(*d->next_buffer), GFP_KERNEL);
322
323 if (!d->buffer_status || !d->buffer_prg_assignment || !d->buffer_time ||
324 !d->last_used_cmd || !d->next_buffer) {
325 PRINT(KERN_ERR, ohci->host->id,
326 "Failed to allocate dma_iso_ctx member");
327 free_dma_iso_ctx(d);
328 return NULL;
329 }
330
331 spin_lock_init(&d->lock);
332
333 DBGMSG(ohci->host->id, "Iso %s DMA: %d buffers "
334 "of size %d allocated for a frame size %d, each with %d prgs",
335 (type == OHCI_ISO_RECEIVE) ? "receive" : "transmit",
336 d->num_desc - 1, d->buf_size, d->frame_size, d->nb_cmd);
337
338 return d;
339 }
340
341 static void reset_ir_status(struct dma_iso_ctx *d, int n)
342 {
343 int i;
344 d->ir_prg[n][0].status = cpu_to_le32(4);
345 d->ir_prg[n][1].status = cpu_to_le32(PAGE_SIZE-4);
346 for (i = 2; i < d->nb_cmd - 1; i++)
347 d->ir_prg[n][i].status = cpu_to_le32(PAGE_SIZE);
348 d->ir_prg[n][i].status = cpu_to_le32(d->left_size);
349 }
350
351 static void reprogram_dma_ir_prg(struct dma_iso_ctx *d, int n, int buffer, int flags)
352 {
353 struct dma_cmd *ir_prg = d->ir_prg[n];
354 unsigned long buf = (unsigned long)d->dma.kvirt + buffer * d->buf_size;
355 int i;
356
357 d->buffer_prg_assignment[n] = buffer;
358
359 ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
360 (unsigned long)d->dma.kvirt));
361 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
362 (buf + 4) - (unsigned long)d->dma.kvirt));
363
364 for (i=2;i<d->nb_cmd-1;i++) {
365 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
366 (buf+(i-1)*PAGE_SIZE) -
367 (unsigned long)d->dma.kvirt));
368 }
369
370 ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
371 DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
372 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
373 (buf+(i-1)*PAGE_SIZE) - (unsigned long)d->dma.kvirt));
374 }
375
376 static void initialize_dma_ir_prg(struct dma_iso_ctx *d, int n, int flags)
377 {
378 struct dma_cmd *ir_prg = d->ir_prg[n];
379 struct dma_prog_region *ir_reg = &d->prg_reg[n];
380 unsigned long buf = (unsigned long)d->dma.kvirt;
381 int i;
382
383 /* the first descriptor will read only 4 bytes */
384 ir_prg[0].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
385 DMA_CTL_BRANCH | 4);
386
387 /* set the sync flag */
388 if (flags & VIDEO1394_SYNC_FRAMES)
389 ir_prg[0].control |= cpu_to_le32(DMA_CTL_WAIT);
390
391 ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
392 (unsigned long)d->dma.kvirt));
393 ir_prg[0].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
394 1 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
395
396 /* If there is *not* only one DMA page per frame (hence, d->nb_cmd==2) */
397 if (d->nb_cmd > 2) {
398 /* The second descriptor will read PAGE_SIZE-4 bytes */
399 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
400 DMA_CTL_BRANCH | (PAGE_SIZE-4));
401 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf + 4) -
402 (unsigned long)d->dma.kvirt));
403 ir_prg[1].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
404 2 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
405
406 for (i = 2; i < d->nb_cmd - 1; i++) {
407 ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
408 DMA_CTL_BRANCH | PAGE_SIZE);
409 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
410 (buf+(i-1)*PAGE_SIZE) -
411 (unsigned long)d->dma.kvirt));
412
413 ir_prg[i].branchAddress =
414 cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
415 (i + 1) * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
416 }
417
418 /* The last descriptor will generate an interrupt */
419 ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
420 DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
421 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
422 (buf+(i-1)*PAGE_SIZE) -
423 (unsigned long)d->dma.kvirt));
424 } else {
425 /* Only one DMA page is used. Read d->left_size immediately and */
426 /* generate an interrupt as this is also the last page. */
427 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
428 DMA_CTL_IRQ | DMA_CTL_BRANCH | (d->left_size-4));
429 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
430 (buf + 4) - (unsigned long)d->dma.kvirt));
431 }
432 }
433
434 static void initialize_dma_ir_ctx(struct dma_iso_ctx *d, int tag, int flags)
435 {
436 struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
437 int i;
438
439 d->flags = flags;
440
441 ohci1394_stop_context(ohci, d->ctrlClear, NULL);
442
443 for (i=0;i<d->num_desc;i++) {
444 initialize_dma_ir_prg(d, i, flags);
445 reset_ir_status(d, i);
446 }
447
448 /* reset the ctrl register */
449 reg_write(ohci, d->ctrlClear, 0xf0000000);
450
451 /* Set bufferFill */
452 reg_write(ohci, d->ctrlSet, 0x80000000);
453
454 /* Set isoch header */
455 if (flags & VIDEO1394_INCLUDE_ISO_HEADERS)
456 reg_write(ohci, d->ctrlSet, 0x40000000);
457
458 /* Set the context match register to match on all tags,
459 sync for sync tag, and listen to d->channel */
460 reg_write(ohci, d->ctxMatch, 0xf0000000|((tag&0xf)<<8)|d->channel);
461
462 /* Set up isoRecvIntMask to generate interrupts */
463 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1<<d->ctx);
464 }
465
466 /* find which context is listening to this channel */
467 static struct dma_iso_ctx *
468 find_ctx(struct list_head *list, int type, int channel)
469 {
470 struct dma_iso_ctx *ctx;
471
472 list_for_each_entry(ctx, list, link) {
473 if (ctx->type == type && ctx->channel == channel)
474 return ctx;
475 }
476
477 return NULL;
478 }
479
480 static void wakeup_dma_ir_ctx(unsigned long l)
481 {
482 struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
483 int i;
484
485 spin_lock(&d->lock);
486
487 for (i = 0; i < d->num_desc; i++) {
488 if (d->ir_prg[i][d->nb_cmd-1].status & cpu_to_le32(0xFFFF0000)) {
489 reset_ir_status(d, i);
490 d->buffer_status[d->buffer_prg_assignment[i]] = VIDEO1394_BUFFER_READY;
491 do_gettimeofday(&d->buffer_time[d->buffer_prg_assignment[i]]);
492 }
493 }
494
495 spin_unlock(&d->lock);
496
497 if (waitqueue_active(&d->waitq))
498 wake_up_interruptible(&d->waitq);
499 }
500
501 static inline void put_timestamp(struct ti_ohci *ohci, struct dma_iso_ctx * d,
502 int n)
503 {
504 unsigned char* buf = d->dma.kvirt + n * d->buf_size;
505 u32 cycleTimer;
506 u32 timeStamp;
507
508 if (n == -1) {
509 return;
510 }
511
512 cycleTimer = reg_read(ohci, OHCI1394_IsochronousCycleTimer);
513
514 timeStamp = ((cycleTimer & 0x0fff) + d->syt_offset); /* 11059 = 450 us */
515 timeStamp = (timeStamp % 3072 + ((timeStamp / 3072) << 12)
516 + (cycleTimer & 0xf000)) & 0xffff;
517
518 buf[6] = timeStamp >> 8;
519 buf[7] = timeStamp & 0xff;
520
521 /* if first packet is empty packet, then put timestamp into the next full one too */
522 if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
523 buf += d->packet_size;
524 buf[6] = timeStamp >> 8;
525 buf[7] = timeStamp & 0xff;
526 }
527
528 /* do the next buffer frame too in case of irq latency */
529 n = d->next_buffer[n];
530 if (n == -1) {
531 return;
532 }
533 buf = d->dma.kvirt + n * d->buf_size;
534
535 timeStamp += (d->last_used_cmd[n] << 12) & 0xffff;
536
537 buf[6] = timeStamp >> 8;
538 buf[7] = timeStamp & 0xff;
539
540 /* if first packet is empty packet, then put timestamp into the next full one too */
541 if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
542 buf += d->packet_size;
543 buf[6] = timeStamp >> 8;
544 buf[7] = timeStamp & 0xff;
545 }
546
547 #if 0
548 printk("curr: %d, next: %d, cycleTimer: %08x timeStamp: %08x\n",
549 curr, n, cycleTimer, timeStamp);
550 #endif
551 }
552
553 static void wakeup_dma_it_ctx(unsigned long l)
554 {
555 struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
556 struct ti_ohci *ohci = d->ohci;
557 int i;
558
559 spin_lock(&d->lock);
560
561 for (i = 0; i < d->num_desc; i++) {
562 if (d->it_prg[i][d->last_used_cmd[i]].end.status &
563 cpu_to_le32(0xFFFF0000)) {
564 int next = d->next_buffer[i];
565 put_timestamp(ohci, d, next);
566 d->it_prg[i][d->last_used_cmd[i]].end.status = 0;
567 d->buffer_status[d->buffer_prg_assignment[i]] = VIDEO1394_BUFFER_READY;
568 }
569 }
570
571 spin_unlock(&d->lock);
572
573 if (waitqueue_active(&d->waitq))
574 wake_up_interruptible(&d->waitq);
575 }
576
577 static void reprogram_dma_it_prg(struct dma_iso_ctx *d, int n, int buffer)
578 {
579 struct it_dma_prg *it_prg = d->it_prg[n];
580 unsigned long buf = (unsigned long)d->dma.kvirt + buffer * d->buf_size;
581 int i;
582
583 d->buffer_prg_assignment[n] = buffer;
584 for (i=0;i<d->nb_cmd;i++) {
585 it_prg[i].end.address =
586 cpu_to_le32(dma_region_offset_to_bus(&d->dma,
587 (buf+i*d->packet_size) - (unsigned long)d->dma.kvirt));
588 }
589 }
590
591 static void initialize_dma_it_prg(struct dma_iso_ctx *d, int n, int sync_tag)
592 {
593 struct it_dma_prg *it_prg = d->it_prg[n];
594 struct dma_prog_region *it_reg = &d->prg_reg[n];
595 unsigned long buf = (unsigned long)d->dma.kvirt;
596 int i;
597 d->last_used_cmd[n] = d->nb_cmd - 1;
598 for (i=0;i<d->nb_cmd;i++) {
599
600 it_prg[i].begin.control = cpu_to_le32(DMA_CTL_OUTPUT_MORE |
601 DMA_CTL_IMMEDIATE | 8) ;
602 it_prg[i].begin.address = 0;
603
604 it_prg[i].begin.status = 0;
605
606 it_prg[i].data[0] = cpu_to_le32(
607 (IEEE1394_SPEED_100 << 16)
608 | (/* tag */ 1 << 14)
609 | (d->channel << 8)
610 | (TCODE_ISO_DATA << 4));
611 if (i==0) it_prg[i].data[0] |= cpu_to_le32(sync_tag);
612 it_prg[i].data[1] = cpu_to_le32(d->packet_size << 16);
613 it_prg[i].data[2] = 0;
614 it_prg[i].data[3] = 0;
615
616 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST |
617 DMA_CTL_BRANCH);
618 it_prg[i].end.address =
619 cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf+i*d->packet_size) -
620 (unsigned long)d->dma.kvirt));
621
622 if (i<d->nb_cmd-1) {
623 it_prg[i].end.control |= cpu_to_le32(d->packet_size);
624 it_prg[i].begin.branchAddress =
625 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
626 sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
627 it_prg[i].end.branchAddress =
628 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
629 sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
630 } else {
631 /* the last prg generates an interrupt */
632 it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
633 DMA_CTL_IRQ | d->left_size);
634 /* the last prg doesn't branch */
635 it_prg[i].begin.branchAddress = 0;
636 it_prg[i].end.branchAddress = 0;
637 }
638 it_prg[i].end.status = 0;
639 }
640 }
641
642 static void initialize_dma_it_prg_var_packet_queue(
643 struct dma_iso_ctx *d, int n, unsigned int * packet_sizes,
644 struct ti_ohci *ohci)
645 {
646 struct it_dma_prg *it_prg = d->it_prg[n];
647 struct dma_prog_region *it_reg = &d->prg_reg[n];
648 int i;
649
650 #if 0
651 if (n != -1) {
652 put_timestamp(ohci, d, n);
653 }
654 #endif
655 d->last_used_cmd[n] = d->nb_cmd - 1;
656
657 for (i = 0; i < d->nb_cmd; i++) {
658 unsigned int size;
659 if (packet_sizes[i] > d->packet_size) {
660 size = d->packet_size;
661 } else {
662 size = packet_sizes[i];
663 }
664 it_prg[i].data[1] = cpu_to_le32(size << 16);
665 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST | DMA_CTL_BRANCH);
666
667 if (i < d->nb_cmd-1 && packet_sizes[i+1] != 0) {
668 it_prg[i].end.control |= cpu_to_le32(size);
669 it_prg[i].begin.branchAddress =
670 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
671 sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
672 it_prg[i].end.branchAddress =
673 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
674 sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
675 } else {
676 /* the last prg generates an interrupt */
677 it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
678 DMA_CTL_IRQ | size);
679 /* the last prg doesn't branch */
680 it_prg[i].begin.branchAddress = 0;
681 it_prg[i].end.branchAddress = 0;
682 d->last_used_cmd[n] = i;
683 break;
684 }
685 }
686 }
687
688 static void initialize_dma_it_ctx(struct dma_iso_ctx *d, int sync_tag,
689 unsigned int syt_offset, int flags)
690 {
691 struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
692 int i;
693
694 d->flags = flags;
695 d->syt_offset = (syt_offset == 0 ? 11000 : syt_offset);
696
697 ohci1394_stop_context(ohci, d->ctrlClear, NULL);
698
699 for (i=0;i<d->num_desc;i++)
700 initialize_dma_it_prg(d, i, sync_tag);
701
702 /* Set up isoRecvIntMask to generate interrupts */
703 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1<<d->ctx);
704 }
705
706 static inline unsigned video1394_buffer_state(struct dma_iso_ctx *d,
707 unsigned int buffer)
708 {
709 unsigned long flags;
710 unsigned int ret;
711 spin_lock_irqsave(&d->lock, flags);
712 ret = d->buffer_status[buffer];
713 spin_unlock_irqrestore(&d->lock, flags);
714 return ret;
715 }
716
717 static long video1394_ioctl(struct file *file,
718 unsigned int cmd, unsigned long arg)
719 {
720 struct file_ctx *ctx = (struct file_ctx *)file->private_data;
721 struct ti_ohci *ohci = ctx->ohci;
722 unsigned long flags;
723 void __user *argp = (void __user *)arg;
724
725 switch(cmd)
726 {
727 case VIDEO1394_IOC_LISTEN_CHANNEL:
728 case VIDEO1394_IOC_TALK_CHANNEL:
729 {
730 struct video1394_mmap v;
731 u64 mask;
732 struct dma_iso_ctx *d;
733 int i;
734
735 if (copy_from_user(&v, argp, sizeof(v)))
736 return -EFAULT;
737
738 /* if channel < 0, find lowest available one */
739 if (v.channel < 0) {
740 mask = (u64)0x1;
741 for (i=0; ; i++) {
742 if (i == ISO_CHANNELS) {
743 PRINT(KERN_ERR, ohci->host->id,
744 "No free channel found");
745 return -EAGAIN;
746 }
747 if (!(ohci->ISO_channel_usage & mask)) {
748 v.channel = i;
749 PRINT(KERN_INFO, ohci->host->id, "Found free channel %d", i);
750 break;
751 }
752 mask = mask << 1;
753 }
754 } else if (v.channel >= ISO_CHANNELS) {
755 PRINT(KERN_ERR, ohci->host->id,
756 "Iso channel %d out of bounds", v.channel);
757 return -EINVAL;
758 } else {
759 mask = (u64)0x1<<v.channel;
760 }
761 DBGMSG(ohci->host->id, "mask: %08X%08X usage: %08X%08X\n",
762 (u32)(mask>>32),(u32)(mask&0xffffffff),
763 (u32)(ohci->ISO_channel_usage>>32),
764 (u32)(ohci->ISO_channel_usage&0xffffffff));
765 if (ohci->ISO_channel_usage & mask) {
766 PRINT(KERN_ERR, ohci->host->id,
767 "Channel %d is already taken", v.channel);
768 return -EBUSY;
769 }
770
771 if (v.buf_size == 0 || v.buf_size > VIDEO1394_MAX_SIZE) {
772 PRINT(KERN_ERR, ohci->host->id,
773 "Invalid %d length buffer requested",v.buf_size);
774 return -EINVAL;
775 }
776
777 if (v.nb_buffers == 0 || v.nb_buffers > VIDEO1394_MAX_SIZE) {
778 PRINT(KERN_ERR, ohci->host->id,
779 "Invalid %d buffers requested",v.nb_buffers);
780 return -EINVAL;
781 }
782
783 if (v.nb_buffers * v.buf_size > VIDEO1394_MAX_SIZE) {
784 PRINT(KERN_ERR, ohci->host->id,
785 "%d buffers of size %d bytes is too big",
786 v.nb_buffers, v.buf_size);
787 return -EINVAL;
788 }
789
790 if (cmd == VIDEO1394_IOC_LISTEN_CHANNEL) {
791 d = alloc_dma_iso_ctx(ohci, OHCI_ISO_RECEIVE,
792 v.nb_buffers + 1, v.buf_size,
793 v.channel, 0);
794
795 if (d == NULL) {
796 PRINT(KERN_ERR, ohci->host->id,
797 "Couldn't allocate ir context");
798 return -EAGAIN;
799 }
800 initialize_dma_ir_ctx(d, v.sync_tag, v.flags);
801
802 ctx->current_ctx = d;
803
804 v.buf_size = d->buf_size;
805 list_add_tail(&d->link, &ctx->context_list);
806
807 DBGMSG(ohci->host->id,
808 "iso context %d listen on channel %d",
809 d->ctx, v.channel);
810 }
811 else {
812 d = alloc_dma_iso_ctx(ohci, OHCI_ISO_TRANSMIT,
813 v.nb_buffers + 1, v.buf_size,
814 v.channel, v.packet_size);
815
816 if (d == NULL) {
817 PRINT(KERN_ERR, ohci->host->id,
818 "Couldn't allocate it context");
819 return -EAGAIN;
820 }
821 initialize_dma_it_ctx(d, v.sync_tag,
822 v.syt_offset, v.flags);
823
824 ctx->current_ctx = d;
825
826 v.buf_size = d->buf_size;
827
828 list_add_tail(&d->link, &ctx->context_list);
829
830 DBGMSG(ohci->host->id,
831 "Iso context %d talk on channel %d", d->ctx,
832 v.channel);
833 }
834
835 if (copy_to_user(argp, &v, sizeof(v))) {
836 /* FIXME : free allocated dma resources */
837 return -EFAULT;
838 }
839
840 ohci->ISO_channel_usage |= mask;
841
842 return 0;
843 }
844 case VIDEO1394_IOC_UNLISTEN_CHANNEL:
845 case VIDEO1394_IOC_UNTALK_CHANNEL:
846 {
847 int channel;
848 u64 mask;
849 struct dma_iso_ctx *d;
850
851 if (copy_from_user(&channel, argp, sizeof(int)))
852 return -EFAULT;
853
854 if (channel < 0 || channel >= ISO_CHANNELS) {
855 PRINT(KERN_ERR, ohci->host->id,
856 "Iso channel %d out of bound", channel);
857 return -EINVAL;
858 }
859 mask = (u64)0x1<<channel;
860 if (!(ohci->ISO_channel_usage & mask)) {
861 PRINT(KERN_ERR, ohci->host->id,
862 "Channel %d is not being used", channel);
863 return -ESRCH;
864 }
865
866 /* Mark this channel as unused */
867 ohci->ISO_channel_usage &= ~mask;
868
869 if (cmd == VIDEO1394_IOC_UNLISTEN_CHANNEL)
870 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, channel);
871 else
872 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, channel);
873
874 if (d == NULL) return -ESRCH;
875 DBGMSG(ohci->host->id, "Iso context %d "
876 "stop talking on channel %d", d->ctx, channel);
877 free_dma_iso_ctx(d);
878
879 return 0;
880 }
881 case VIDEO1394_IOC_LISTEN_QUEUE_BUFFER:
882 {
883 struct video1394_wait v;
884 struct dma_iso_ctx *d;
885 int next_prg;
886
887 if (unlikely(copy_from_user(&v, argp, sizeof(v))))
888 return -EFAULT;
889
890 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
891 if (unlikely(d == NULL))
892 return -EFAULT;
893
894 if (unlikely((v.buffer<0) || (v.buffer>=d->num_desc - 1))) {
895 PRINT(KERN_ERR, ohci->host->id,
896 "Buffer %d out of range",v.buffer);
897 return -EINVAL;
898 }
899
900 spin_lock_irqsave(&d->lock,flags);
901
902 if (unlikely(d->buffer_status[v.buffer]==VIDEO1394_BUFFER_QUEUED)) {
903 PRINT(KERN_ERR, ohci->host->id,
904 "Buffer %d is already used",v.buffer);
905 spin_unlock_irqrestore(&d->lock,flags);
906 return -EBUSY;
907 }
908
909 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
910
911 next_prg = (d->last_buffer + 1) % d->num_desc;
912 if (d->last_buffer>=0)
913 d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress =
914 cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg], 0)
915 & 0xfffffff0) | 0x1);
916
917 d->last_buffer = next_prg;
918 reprogram_dma_ir_prg(d, d->last_buffer, v.buffer, d->flags);
919
920 d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress = 0;
921
922 spin_unlock_irqrestore(&d->lock,flags);
923
924 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
925 {
926 DBGMSG(ohci->host->id, "Starting iso DMA ctx=%d",d->ctx);
927
928 /* Tell the controller where the first program is */
929 reg_write(ohci, d->cmdPtr,
930 dma_prog_region_offset_to_bus(&d->prg_reg[d->last_buffer], 0) | 0x1);
931
932 /* Run IR context */
933 reg_write(ohci, d->ctrlSet, 0x8000);
934 }
935 else {
936 /* Wake up dma context if necessary */
937 if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
938 DBGMSG(ohci->host->id,
939 "Waking up iso dma ctx=%d", d->ctx);
940 reg_write(ohci, d->ctrlSet, 0x1000);
941 }
942 }
943 return 0;
944
945 }
946 case VIDEO1394_IOC_LISTEN_WAIT_BUFFER:
947 case VIDEO1394_IOC_LISTEN_POLL_BUFFER:
948 {
949 struct video1394_wait v;
950 struct dma_iso_ctx *d;
951 int i = 0;
952
953 if (unlikely(copy_from_user(&v, argp, sizeof(v))))
954 return -EFAULT;
955
956 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
957 if (unlikely(d == NULL))
958 return -EFAULT;
959
960 if (unlikely((v.buffer<0) || (v.buffer>d->num_desc - 1))) {
961 PRINT(KERN_ERR, ohci->host->id,
962 "Buffer %d out of range",v.buffer);
963 return -EINVAL;
964 }
965
966 /*
967 * I change the way it works so that it returns
968 * the last received frame.
969 */
970 spin_lock_irqsave(&d->lock, flags);
971 switch(d->buffer_status[v.buffer]) {
972 case VIDEO1394_BUFFER_READY:
973 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
974 break;
975 case VIDEO1394_BUFFER_QUEUED:
976 if (cmd == VIDEO1394_IOC_LISTEN_POLL_BUFFER) {
977 /* for polling, return error code EINTR */
978 spin_unlock_irqrestore(&d->lock, flags);
979 return -EINTR;
980 }
981
982 spin_unlock_irqrestore(&d->lock, flags);
983 wait_event_interruptible(d->waitq,
984 video1394_buffer_state(d, v.buffer) ==
985 VIDEO1394_BUFFER_READY);
986 if (signal_pending(current))
987 return -EINTR;
988 spin_lock_irqsave(&d->lock, flags);
989 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
990 break;
991 default:
992 PRINT(KERN_ERR, ohci->host->id,
993 "Buffer %d is not queued",v.buffer);
994 spin_unlock_irqrestore(&d->lock, flags);
995 return -ESRCH;
996 }
997
998 /* set time of buffer */
999 v.filltime = d->buffer_time[v.buffer];
1000
1001 /*
1002 * Look ahead to see how many more buffers have been received
1003 */
1004 i=0;
1005 while (d->buffer_status[(v.buffer+1)%(d->num_desc - 1)]==
1006 VIDEO1394_BUFFER_READY) {
1007 v.buffer=(v.buffer+1)%(d->num_desc - 1);
1008 i++;
1009 }
1010 spin_unlock_irqrestore(&d->lock, flags);
1011
1012 v.buffer=i;
1013 if (unlikely(copy_to_user(argp, &v, sizeof(v))))
1014 return -EFAULT;
1015
1016 return 0;
1017 }
1018 case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1019 {
1020 struct video1394_wait v;
1021 unsigned int *psizes = NULL;
1022 struct dma_iso_ctx *d;
1023 int next_prg;
1024
1025 if (copy_from_user(&v, argp, sizeof(v)))
1026 return -EFAULT;
1027
1028 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1029 if (d == NULL) return -EFAULT;
1030
1031 if ((v.buffer<0) || (v.buffer>=d->num_desc - 1)) {
1032 PRINT(KERN_ERR, ohci->host->id,
1033 "Buffer %d out of range",v.buffer);
1034 return -EINVAL;
1035 }
1036
1037 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1038 int buf_size = d->nb_cmd * sizeof(*psizes);
1039 struct video1394_queue_variable __user *p = argp;
1040 unsigned int __user *qv;
1041
1042 if (get_user(qv, &p->packet_sizes))
1043 return -EFAULT;
1044
1045 psizes = kmalloc(buf_size, GFP_KERNEL);
1046 if (!psizes)
1047 return -ENOMEM;
1048
1049 if (copy_from_user(psizes, qv, buf_size)) {
1050 kfree(psizes);
1051 return -EFAULT;
1052 }
1053 }
1054
1055 spin_lock_irqsave(&d->lock,flags);
1056
1057 /* last_buffer is last_prg */
1058 next_prg = (d->last_buffer + 1) % d->num_desc;
1059 if (d->buffer_status[v.buffer]!=VIDEO1394_BUFFER_FREE) {
1060 PRINT(KERN_ERR, ohci->host->id,
1061 "Buffer %d is already used",v.buffer);
1062 spin_unlock_irqrestore(&d->lock,flags);
1063 kfree(psizes);
1064 return -EBUSY;
1065 }
1066
1067 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1068 initialize_dma_it_prg_var_packet_queue(
1069 d, next_prg, psizes, ohci);
1070 }
1071
1072 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
1073
1074 if (d->last_buffer >= 0) {
1075 d->it_prg[d->last_buffer]
1076 [ d->last_used_cmd[d->last_buffer] ].end.branchAddress =
1077 cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg],
1078 0) & 0xfffffff0) | 0x3);
1079
1080 d->it_prg[d->last_buffer]
1081 [ d->last_used_cmd[d->last_buffer] ].begin.branchAddress =
1082 cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg],
1083 0) & 0xfffffff0) | 0x3);
1084 d->next_buffer[d->last_buffer] = (v.buffer + 1) % (d->num_desc - 1);
1085 }
1086 d->last_buffer = next_prg;
1087 reprogram_dma_it_prg(d, d->last_buffer, v.buffer);
1088 d->next_buffer[d->last_buffer] = -1;
1089
1090 d->it_prg[d->last_buffer][d->last_used_cmd[d->last_buffer]].end.branchAddress = 0;
1091
1092 spin_unlock_irqrestore(&d->lock,flags);
1093
1094 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
1095 {
1096 DBGMSG(ohci->host->id, "Starting iso transmit DMA ctx=%d",
1097 d->ctx);
1098 put_timestamp(ohci, d, d->last_buffer);
1099
1100 /* Tell the controller where the first program is */
1101 reg_write(ohci, d->cmdPtr,
1102 dma_prog_region_offset_to_bus(&d->prg_reg[next_prg], 0) | 0x3);
1103
1104 /* Run IT context */
1105 reg_write(ohci, d->ctrlSet, 0x8000);
1106 }
1107 else {
1108 /* Wake up dma context if necessary */
1109 if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
1110 DBGMSG(ohci->host->id,
1111 "Waking up iso transmit dma ctx=%d",
1112 d->ctx);
1113 put_timestamp(ohci, d, d->last_buffer);
1114 reg_write(ohci, d->ctrlSet, 0x1000);
1115 }
1116 }
1117
1118 kfree(psizes);
1119 return 0;
1120
1121 }
1122 case VIDEO1394_IOC_TALK_WAIT_BUFFER:
1123 {
1124 struct video1394_wait v;
1125 struct dma_iso_ctx *d;
1126
1127 if (copy_from_user(&v, argp, sizeof(v)))
1128 return -EFAULT;
1129
1130 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1131 if (d == NULL) return -EFAULT;
1132
1133 if ((v.buffer<0) || (v.buffer>=d->num_desc-1)) {
1134 PRINT(KERN_ERR, ohci->host->id,
1135 "Buffer %d out of range",v.buffer);
1136 return -EINVAL;
1137 }
1138
1139 switch(d->buffer_status[v.buffer]) {
1140 case VIDEO1394_BUFFER_READY:
1141 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1142 return 0;
1143 case VIDEO1394_BUFFER_QUEUED:
1144 wait_event_interruptible(d->waitq,
1145 (d->buffer_status[v.buffer] == VIDEO1394_BUFFER_READY));
1146 if (signal_pending(current))
1147 return -EINTR;
1148 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1149 return 0;
1150 default:
1151 PRINT(KERN_ERR, ohci->host->id,
1152 "Buffer %d is not queued",v.buffer);
1153 return -ESRCH;
1154 }
1155 }
1156 default:
1157 return -ENOTTY;
1158 }
1159 }
1160
1161 /*
1162 * This maps the vmalloced and reserved buffer to user space.
1163 *
1164 * FIXME:
1165 * - PAGE_READONLY should suffice!?
1166 * - remap_pfn_range is kind of inefficient for page by page remapping.
1167 * But e.g. pte_alloc() does not work in modules ... :-(
1168 */
1169
1170 static int video1394_mmap(struct file *file, struct vm_area_struct *vma)
1171 {
1172 struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1173
1174 if (ctx->current_ctx == NULL) {
1175 PRINT(KERN_ERR, ctx->ohci->host->id,
1176 "Current iso context not set");
1177 return -EINVAL;
1178 }
1179
1180 return dma_region_mmap(&ctx->current_ctx->dma, file, vma);
1181 }
1182
1183 static unsigned int video1394_poll(struct file *file, poll_table *pt)
1184 {
1185 struct file_ctx *ctx;
1186 unsigned int mask = 0;
1187 unsigned long flags;
1188 struct dma_iso_ctx *d;
1189 int i;
1190
1191 ctx = file->private_data;
1192 d = ctx->current_ctx;
1193 if (d == NULL) {
1194 PRINT(KERN_ERR, ctx->ohci->host->id,
1195 "Current iso context not set");
1196 return POLLERR;
1197 }
1198
1199 poll_wait(file, &d->waitq, pt);
1200
1201 spin_lock_irqsave(&d->lock, flags);
1202 for (i = 0; i < d->num_desc; i++) {
1203 if (d->buffer_status[i] == VIDEO1394_BUFFER_READY) {
1204 mask |= POLLIN | POLLRDNORM;
1205 break;
1206 }
1207 }
1208 spin_unlock_irqrestore(&d->lock, flags);
1209
1210 return mask;
1211 }
1212
1213 static int video1394_open(struct inode *inode, struct file *file)
1214 {
1215 int i = ieee1394_file_to_instance(file);
1216 struct ti_ohci *ohci;
1217 struct file_ctx *ctx;
1218
1219 ohci = hpsb_get_hostinfo_bykey(&video1394_highlevel, i);
1220 if (ohci == NULL)
1221 return -EIO;
1222
1223 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
1224 if (!ctx) {
1225 PRINT(KERN_ERR, ohci->host->id, "Cannot malloc file_ctx");
1226 return -ENOMEM;
1227 }
1228
1229 ctx->ohci = ohci;
1230 INIT_LIST_HEAD(&ctx->context_list);
1231 ctx->current_ctx = NULL;
1232 file->private_data = ctx;
1233
1234 return 0;
1235 }
1236
1237 static int video1394_release(struct inode *inode, struct file *file)
1238 {
1239 struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1240 struct ti_ohci *ohci = ctx->ohci;
1241 struct list_head *lh, *next;
1242 u64 mask;
1243
1244 list_for_each_safe(lh, next, &ctx->context_list) {
1245 struct dma_iso_ctx *d;
1246 d = list_entry(lh, struct dma_iso_ctx, link);
1247 mask = (u64) 1 << d->channel;
1248
1249 if (!(ohci->ISO_channel_usage & mask))
1250 PRINT(KERN_ERR, ohci->host->id, "On release: Channel %d "
1251 "is not being used", d->channel);
1252 else
1253 ohci->ISO_channel_usage &= ~mask;
1254 DBGMSG(ohci->host->id, "On release: Iso %s context "
1255 "%d stop listening on channel %d",
1256 d->type == OHCI_ISO_RECEIVE ? "receive" : "transmit",
1257 d->ctx, d->channel);
1258 free_dma_iso_ctx(d);
1259 }
1260
1261 kfree(ctx);
1262 file->private_data = NULL;
1263
1264 return 0;
1265 }
1266
1267 #ifdef CONFIG_COMPAT
1268 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg);
1269 #endif
1270
1271 static struct cdev video1394_cdev;
1272 static struct file_operations video1394_fops=
1273 {
1274 .owner = THIS_MODULE,
1275 .unlocked_ioctl = video1394_ioctl,
1276 #ifdef CONFIG_COMPAT
1277 .compat_ioctl = video1394_compat_ioctl,
1278 #endif
1279 .poll = video1394_poll,
1280 .mmap = video1394_mmap,
1281 .open = video1394_open,
1282 .release = video1394_release
1283 };
1284
1285 /*** HOTPLUG STUFF **********************************************************/
1286 /*
1287 * Export information about protocols/devices supported by this driver.
1288 */
1289 static struct ieee1394_device_id video1394_id_table[] = {
1290 {
1291 .match_flags = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1292 .specifier_id = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1293 .version = CAMERA_SW_VERSION_ENTRY & 0xffffff
1294 },
1295 {
1296 .match_flags = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1297 .specifier_id = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1298 .version = (CAMERA_SW_VERSION_ENTRY + 1) & 0xffffff
1299 },
1300 {
1301 .match_flags = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1302 .specifier_id = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1303 .version = (CAMERA_SW_VERSION_ENTRY + 2) & 0xffffff
1304 },
1305 { }
1306 };
1307
1308 MODULE_DEVICE_TABLE(ieee1394, video1394_id_table);
1309
1310 static struct hpsb_protocol_driver video1394_driver = {
1311 .name = VIDEO1394_DRIVER_NAME,
1312 .id_table = video1394_id_table,
1313 };
1314
1315
1316 static void video1394_add_host (struct hpsb_host *host)
1317 {
1318 struct ti_ohci *ohci;
1319 int minor;
1320
1321 /* We only work with the OHCI-1394 driver */
1322 if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
1323 return;
1324
1325 ohci = (struct ti_ohci *)host->hostdata;
1326
1327 if (!hpsb_create_hostinfo(&video1394_highlevel, host, 0)) {
1328 PRINT(KERN_ERR, ohci->host->id, "Cannot allocate hostinfo");
1329 return;
1330 }
1331
1332 hpsb_set_hostinfo(&video1394_highlevel, host, ohci);
1333 hpsb_set_hostinfo_key(&video1394_highlevel, host, ohci->host->id);
1334
1335 minor = IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id;
1336 class_device_create(hpsb_protocol_class, NULL, MKDEV(
1337 IEEE1394_MAJOR, minor),
1338 NULL, "%s-%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1339 }
1340
1341
1342 static void video1394_remove_host (struct hpsb_host *host)
1343 {
1344 struct ti_ohci *ohci = hpsb_get_hostinfo(&video1394_highlevel, host);
1345
1346 if (ohci)
1347 class_device_destroy(hpsb_protocol_class, MKDEV(IEEE1394_MAJOR,
1348 IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id));
1349 return;
1350 }
1351
1352
1353 static struct hpsb_highlevel video1394_highlevel = {
1354 .name = VIDEO1394_DRIVER_NAME,
1355 .add_host = video1394_add_host,
1356 .remove_host = video1394_remove_host,
1357 };
1358
1359 MODULE_AUTHOR("Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>");
1360 MODULE_DESCRIPTION("driver for digital video on OHCI board");
1361 MODULE_SUPPORTED_DEVICE(VIDEO1394_DRIVER_NAME);
1362 MODULE_LICENSE("GPL");
1363
1364 #ifdef CONFIG_COMPAT
1365
1366 #define VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER \
1367 _IOW ('#', 0x12, struct video1394_wait32)
1368 #define VIDEO1394_IOC32_LISTEN_WAIT_BUFFER \
1369 _IOWR('#', 0x13, struct video1394_wait32)
1370 #define VIDEO1394_IOC32_TALK_WAIT_BUFFER \
1371 _IOW ('#', 0x17, struct video1394_wait32)
1372 #define VIDEO1394_IOC32_LISTEN_POLL_BUFFER \
1373 _IOWR('#', 0x18, struct video1394_wait32)
1374
1375 struct video1394_wait32 {
1376 u32 channel;
1377 u32 buffer;
1378 struct compat_timeval filltime;
1379 };
1380
1381 static int video1394_wr_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1382 {
1383 struct video1394_wait32 __user *argp = (void __user *)arg;
1384 struct video1394_wait32 wait32;
1385 struct video1394_wait wait;
1386 mm_segment_t old_fs;
1387 int ret;
1388
1389 if (copy_from_user(&wait32, argp, sizeof(wait32)))
1390 return -EFAULT;
1391
1392 wait.channel = wait32.channel;
1393 wait.buffer = wait32.buffer;
1394 wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1395 wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1396
1397 old_fs = get_fs();
1398 set_fs(KERNEL_DS);
1399 if (cmd == VIDEO1394_IOC32_LISTEN_WAIT_BUFFER)
1400 ret = video1394_ioctl(file,
1401 VIDEO1394_IOC_LISTEN_WAIT_BUFFER,
1402 (unsigned long) &wait);
1403 else
1404 ret = video1394_ioctl(file,
1405 VIDEO1394_IOC_LISTEN_POLL_BUFFER,
1406 (unsigned long) &wait);
1407 set_fs(old_fs);
1408
1409 if (!ret) {
1410 wait32.channel = wait.channel;
1411 wait32.buffer = wait.buffer;
1412 wait32.filltime.tv_sec = (int)wait.filltime.tv_sec;
1413 wait32.filltime.tv_usec = (int)wait.filltime.tv_usec;
1414
1415 if (copy_to_user(argp, &wait32, sizeof(wait32)))
1416 ret = -EFAULT;
1417 }
1418
1419 return ret;
1420 }
1421
1422 static int video1394_w_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1423 {
1424 struct video1394_wait32 wait32;
1425 struct video1394_wait wait;
1426 mm_segment_t old_fs;
1427 int ret;
1428
1429 if (copy_from_user(&wait32, (void __user *)arg, sizeof(wait32)))
1430 return -EFAULT;
1431
1432 wait.channel = wait32.channel;
1433 wait.buffer = wait32.buffer;
1434 wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1435 wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1436
1437 old_fs = get_fs();
1438 set_fs(KERNEL_DS);
1439 if (cmd == VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER)
1440 ret = video1394_ioctl(file,
1441 VIDEO1394_IOC_LISTEN_QUEUE_BUFFER,
1442 (unsigned long) &wait);
1443 else
1444 ret = video1394_ioctl(file,
1445 VIDEO1394_IOC_TALK_WAIT_BUFFER,
1446 (unsigned long) &wait);
1447 set_fs(old_fs);
1448
1449 return ret;
1450 }
1451
1452 static int video1394_queue_buf32(struct file *file, unsigned int cmd, unsigned long arg)
1453 {
1454 return -EFAULT; /* ??? was there before. */
1455
1456 return video1394_ioctl(file,
1457 VIDEO1394_IOC_TALK_QUEUE_BUFFER, arg);
1458 }
1459
1460 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg)
1461 {
1462 switch (cmd) {
1463 case VIDEO1394_IOC_LISTEN_CHANNEL:
1464 case VIDEO1394_IOC_UNLISTEN_CHANNEL:
1465 case VIDEO1394_IOC_TALK_CHANNEL:
1466 case VIDEO1394_IOC_UNTALK_CHANNEL:
1467 return video1394_ioctl(f, cmd, arg);
1468
1469 case VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER:
1470 return video1394_w_wait32(f, cmd, arg);
1471 case VIDEO1394_IOC32_LISTEN_WAIT_BUFFER:
1472 return video1394_wr_wait32(f, cmd, arg);
1473 case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1474 return video1394_queue_buf32(f, cmd, arg);
1475 case VIDEO1394_IOC32_TALK_WAIT_BUFFER:
1476 return video1394_w_wait32(f, cmd, arg);
1477 case VIDEO1394_IOC32_LISTEN_POLL_BUFFER:
1478 return video1394_wr_wait32(f, cmd, arg);
1479 default:
1480 return -ENOIOCTLCMD;
1481 }
1482 }
1483
1484 #endif /* CONFIG_COMPAT */
1485
1486 static void __exit video1394_exit_module (void)
1487 {
1488 hpsb_unregister_protocol(&video1394_driver);
1489 hpsb_unregister_highlevel(&video1394_highlevel);
1490 cdev_del(&video1394_cdev);
1491 PRINT_G(KERN_INFO, "Removed " VIDEO1394_DRIVER_NAME " module");
1492 }
1493
1494 static int __init video1394_init_module (void)
1495 {
1496 int ret;
1497
1498 cdev_init(&video1394_cdev, &video1394_fops);
1499 video1394_cdev.owner = THIS_MODULE;
1500 kobject_set_name(&video1394_cdev.kobj, VIDEO1394_DRIVER_NAME);
1501 ret = cdev_add(&video1394_cdev, IEEE1394_VIDEO1394_DEV, 16);
1502 if (ret) {
1503 PRINT_G(KERN_ERR, "video1394: unable to get minor device block");
1504 return ret;
1505 }
1506
1507 hpsb_register_highlevel(&video1394_highlevel);
1508
1509 ret = hpsb_register_protocol(&video1394_driver);
1510 if (ret) {
1511 PRINT_G(KERN_ERR, "video1394: failed to register protocol");
1512 hpsb_unregister_highlevel(&video1394_highlevel);
1513 cdev_del(&video1394_cdev);
1514 return ret;
1515 }
1516
1517 PRINT_G(KERN_INFO, "Installed " VIDEO1394_DRIVER_NAME " module");
1518 return 0;
1519 }
1520
1521
1522 module_init(video1394_init_module);
1523 module_exit(video1394_exit_module);
Support for the Chinese Samsung S3C2440 based development boards