OMAP3: Add support for DPLL3 divisor values higher than 2
[linux-2.6/mini2440.git] / arch / arm / plat-omap / include / mach / clockdomain.h
blobb9d0dd2da89b4f4f47378e31157e895639e30d29
1 /*
2 * arch/arm/plat-omap/include/mach/clockdomain.h
4 * OMAP2/3 clockdomain framework functions
6 * Copyright (C) 2008 Texas Instruments, Inc.
7 * Copyright (C) 2008 Nokia Corporation
9 * Written by Paul Walmsley
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #ifndef __ASM_ARM_ARCH_OMAP_CLOCKDOMAIN_H
17 #define __ASM_ARM_ARCH_OMAP_CLOCKDOMAIN_H
19 #include <mach/powerdomain.h>
20 #include <mach/clock.h>
21 #include <mach/cpu.h>
23 /* Clockdomain capability flags */
24 #define CLKDM_CAN_FORCE_SLEEP (1 << 0)
25 #define CLKDM_CAN_FORCE_WAKEUP (1 << 1)
26 #define CLKDM_CAN_ENABLE_AUTO (1 << 2)
27 #define CLKDM_CAN_DISABLE_AUTO (1 << 3)
29 #define CLKDM_CAN_HWSUP (CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_DISABLE_AUTO)
30 #define CLKDM_CAN_SWSUP (CLKDM_CAN_FORCE_SLEEP | CLKDM_CAN_FORCE_WAKEUP)
31 #define CLKDM_CAN_HWSUP_SWSUP (CLKDM_CAN_SWSUP | CLKDM_CAN_HWSUP)
33 /* OMAP24XX CM_CLKSTCTRL_*.AUTOSTATE_* register bit values */
34 #define OMAP24XX_CLKSTCTRL_DISABLE_AUTO 0x0
35 #define OMAP24XX_CLKSTCTRL_ENABLE_AUTO 0x1
37 /* OMAP3XXX CM_CLKSTCTRL_*.CLKTRCTRL_* register bit values */
38 #define OMAP34XX_CLKSTCTRL_DISABLE_AUTO 0x0
39 #define OMAP34XX_CLKSTCTRL_FORCE_SLEEP 0x1
40 #define OMAP34XX_CLKSTCTRL_FORCE_WAKEUP 0x2
41 #define OMAP34XX_CLKSTCTRL_ENABLE_AUTO 0x3
44 * struct clkdm_pwrdm_autodep - a powerdomain that should have wkdeps
45 * and sleepdeps added when a powerdomain should stay active in hwsup mode;
46 * and conversely, removed when the powerdomain should be allowed to go
47 * inactive in hwsup mode.
49 struct clkdm_pwrdm_autodep {
51 union {
52 /* Name of the powerdomain to add a wkdep/sleepdep on */
53 const char *name;
55 /* Powerdomain pointer (looked up at clkdm_init() time) */
56 struct powerdomain *ptr;
57 } pwrdm;
59 /* OMAP chip types that this clockdomain dep is valid on */
60 const struct omap_chip_id omap_chip;
64 struct clockdomain {
66 /* Clockdomain name */
67 const char *name;
69 union {
70 /* Powerdomain enclosing this clockdomain */
71 const char *name;
73 /* Powerdomain pointer assigned at clkdm_register() */
74 struct powerdomain *ptr;
75 } pwrdm;
77 /* CLKTRCTRL/AUTOSTATE field mask in CM_CLKSTCTRL reg */
78 const u16 clktrctrl_mask;
80 /* Clockdomain capability flags */
81 const u8 flags;
83 /* OMAP chip types that this clockdomain is valid on */
84 const struct omap_chip_id omap_chip;
86 /* Usecount tracking */
87 atomic_t usecount;
89 struct list_head node;
93 void clkdm_init(struct clockdomain **clkdms, struct clkdm_pwrdm_autodep *autodeps);
94 int clkdm_register(struct clockdomain *clkdm);
95 int clkdm_unregister(struct clockdomain *clkdm);
96 struct clockdomain *clkdm_lookup(const char *name);
98 int clkdm_for_each(int (*fn)(struct clockdomain *clkdm));
99 struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm);
101 void omap2_clkdm_allow_idle(struct clockdomain *clkdm);
102 void omap2_clkdm_deny_idle(struct clockdomain *clkdm);
104 int omap2_clkdm_wakeup(struct clockdomain *clkdm);
105 int omap2_clkdm_sleep(struct clockdomain *clkdm);
107 int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk);
108 int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk);
110 #endif