1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2007 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
37 #include <linux/tcp.h>
38 #include <linux/ipv6.h>
39 #include <net/checksum.h>
40 #include <net/ip6_checksum.h>
41 #include <linux/ethtool.h>
42 #include <linux/if_vlan.h>
45 #include "ixgbe_common.h"
47 char ixgbe_driver_name
[] = "ixgbe";
48 static const char ixgbe_driver_string
[] =
49 "Intel(R) 10 Gigabit PCI Express Network Driver";
51 #define DRV_VERSION "1.3.18-k4"
52 const char ixgbe_driver_version
[] = DRV_VERSION
;
53 static const char ixgbe_copyright
[] =
54 "Copyright (c) 1999-2007 Intel Corporation.";
56 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
57 [board_82598
] = &ixgbe_82598_info
,
60 /* ixgbe_pci_tbl - PCI Device ID Table
62 * Wildcard entries (PCI_ANY_ID) should come last
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static struct pci_device_id ixgbe_pci_tbl
[] = {
69 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
),
71 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
),
73 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
),
75 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
),
78 /* required last entry */
81 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
84 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
86 static struct notifier_block dca_notifier
= {
87 .notifier_call
= ixgbe_notify_dca
,
93 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
94 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
95 MODULE_LICENSE("GPL");
96 MODULE_VERSION(DRV_VERSION
);
98 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
100 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
104 /* Let firmware take over control of h/w */
105 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
106 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
107 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
110 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
114 /* Let firmware know the driver has taken over */
115 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
116 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
117 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
122 * ixgbe_get_hw_dev_name - return device name string
123 * used by hardware layer to print debugging information
125 char *ixgbe_get_hw_dev_name(struct ixgbe_hw
*hw
)
127 struct ixgbe_adapter
*adapter
= hw
->back
;
128 struct net_device
*netdev
= adapter
->netdev
;
133 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, u16 int_alloc_entry
,
138 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
139 index
= (int_alloc_entry
>> 2) & 0x1F;
140 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR(index
));
141 ivar
&= ~(0xFF << (8 * (int_alloc_entry
& 0x3)));
142 ivar
|= (msix_vector
<< (8 * (int_alloc_entry
& 0x3)));
143 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR(index
), ivar
);
146 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter
*adapter
,
147 struct ixgbe_tx_buffer
150 if (tx_buffer_info
->dma
) {
151 pci_unmap_page(adapter
->pdev
,
153 tx_buffer_info
->length
, PCI_DMA_TODEVICE
);
154 tx_buffer_info
->dma
= 0;
156 if (tx_buffer_info
->skb
) {
157 dev_kfree_skb_any(tx_buffer_info
->skb
);
158 tx_buffer_info
->skb
= NULL
;
160 /* tx_buffer_info must be completely set up in the transmit path */
163 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter
*adapter
,
164 struct ixgbe_ring
*tx_ring
,
166 union ixgbe_adv_tx_desc
*eop_desc
)
168 /* Detect a transmit hang in hardware, this serializes the
169 * check with the clearing of time_stamp and movement of i */
170 adapter
->detect_tx_hung
= false;
171 if (tx_ring
->tx_buffer_info
[eop
].dma
&&
172 time_after(jiffies
, tx_ring
->tx_buffer_info
[eop
].time_stamp
+ HZ
) &&
173 !(IXGBE_READ_REG(&adapter
->hw
, IXGBE_TFCS
) & IXGBE_TFCS_TXOFF
)) {
174 /* detected Tx unit hang */
175 DPRINTK(DRV
, ERR
, "Detected Tx Unit Hang\n"
178 " next_to_use <%x>\n"
179 " next_to_clean <%x>\n"
180 "tx_buffer_info[next_to_clean]\n"
181 " time_stamp <%lx>\n"
182 " next_to_watch <%x>\n"
184 " next_to_watch.status <%x>\n",
185 readl(adapter
->hw
.hw_addr
+ tx_ring
->head
),
186 readl(adapter
->hw
.hw_addr
+ tx_ring
->tail
),
187 tx_ring
->next_to_use
,
188 tx_ring
->next_to_clean
,
189 tx_ring
->tx_buffer_info
[eop
].time_stamp
,
190 eop
, jiffies
, eop_desc
->wb
.status
);
197 #define IXGBE_MAX_TXD_PWR 14
198 #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
200 /* Tx Descriptors needed, worst case */
201 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
202 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
203 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
204 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
207 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
208 * @adapter: board private structure
210 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter
*adapter
,
211 struct ixgbe_ring
*tx_ring
)
213 struct net_device
*netdev
= adapter
->netdev
;
214 union ixgbe_adv_tx_desc
*tx_desc
, *eop_desc
;
215 struct ixgbe_tx_buffer
*tx_buffer_info
;
217 bool cleaned
= false;
218 unsigned int total_tx_bytes
= 0, total_tx_packets
= 0;
220 i
= tx_ring
->next_to_clean
;
221 eop
= tx_ring
->tx_buffer_info
[i
].next_to_watch
;
222 eop_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, eop
);
223 while (eop_desc
->wb
.status
& cpu_to_le32(IXGBE_TXD_STAT_DD
)) {
226 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, i
);
227 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
228 cleaned
= (i
== eop
);
230 tx_ring
->stats
.bytes
+= tx_buffer_info
->length
;
232 struct sk_buff
*skb
= tx_buffer_info
->skb
;
233 unsigned int segs
, bytecount
;
234 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
235 /* multiply data chunks by size of headers */
236 bytecount
= ((segs
- 1) * skb_headlen(skb
)) +
238 total_tx_packets
+= segs
;
239 total_tx_bytes
+= bytecount
;
241 ixgbe_unmap_and_free_tx_resource(adapter
,
243 tx_desc
->wb
.status
= 0;
246 if (i
== tx_ring
->count
)
250 tx_ring
->stats
.packets
++;
252 eop
= tx_ring
->tx_buffer_info
[i
].next_to_watch
;
253 eop_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, eop
);
255 /* weight of a sort for tx, avoid endless transmit cleanup */
256 if (total_tx_packets
>= tx_ring
->work_limit
)
260 tx_ring
->next_to_clean
= i
;
262 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
263 if (total_tx_packets
&& netif_carrier_ok(netdev
) &&
264 (IXGBE_DESC_UNUSED(tx_ring
) >= TX_WAKE_THRESHOLD
)) {
265 /* Make sure that anybody stopping the queue after this
266 * sees the new next_to_clean.
269 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
270 !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
271 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
272 adapter
->restart_queue
++;
276 if (adapter
->detect_tx_hung
)
277 if (ixgbe_check_tx_hang(adapter
, tx_ring
, eop
, eop_desc
))
278 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
280 if (total_tx_packets
>= tx_ring
->work_limit
)
281 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, tx_ring
->eims_value
);
283 tx_ring
->total_bytes
+= total_tx_bytes
;
284 tx_ring
->total_packets
+= total_tx_packets
;
285 adapter
->net_stats
.tx_bytes
+= total_tx_bytes
;
286 adapter
->net_stats
.tx_packets
+= total_tx_packets
;
287 cleaned
= total_tx_packets
? true : false;
292 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
293 struct ixgbe_ring
*rx_ring
)
297 int q
= rx_ring
- adapter
->rx_ring
;
299 if (rx_ring
->cpu
!= cpu
) {
300 rxctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
));
301 rxctrl
&= ~IXGBE_DCA_RXCTRL_CPUID_MASK
;
302 rxctrl
|= dca_get_tag(cpu
);
303 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
304 rxctrl
|= IXGBE_DCA_RXCTRL_HEAD_DCA_EN
;
305 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
), rxctrl
);
311 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
312 struct ixgbe_ring
*tx_ring
)
316 int q
= tx_ring
- adapter
->tx_ring
;
318 if (tx_ring
->cpu
!= cpu
) {
319 txctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_DCA_TXCTRL(q
));
320 txctrl
&= ~IXGBE_DCA_TXCTRL_CPUID_MASK
;
321 txctrl
|= dca_get_tag(cpu
);
322 txctrl
|= IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
323 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_TXCTRL(q
), txctrl
);
329 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
333 if (!(adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
))
336 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
337 adapter
->tx_ring
[i
].cpu
= -1;
338 ixgbe_update_tx_dca(adapter
, &adapter
->tx_ring
[i
]);
340 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
341 adapter
->rx_ring
[i
].cpu
= -1;
342 ixgbe_update_rx_dca(adapter
, &adapter
->rx_ring
[i
]);
346 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
348 struct net_device
*netdev
= dev_get_drvdata(dev
);
349 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
350 unsigned long event
= *(unsigned long *)data
;
353 case DCA_PROVIDER_ADD
:
354 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
355 /* Always use CB2 mode, difference is masked
356 * in the CB driver. */
357 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 2);
358 if (dca_add_requester(dev
) == 0) {
359 ixgbe_setup_dca(adapter
);
362 /* Fall Through since DCA is disabled. */
363 case DCA_PROVIDER_REMOVE
:
364 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
365 dca_remove_requester(dev
);
366 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
367 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
375 #endif /* CONFIG_DCA */
377 * ixgbe_receive_skb - Send a completed packet up the stack
378 * @adapter: board private structure
379 * @skb: packet to send up
380 * @status: hardware indication of status of receive
381 * @rx_ring: rx descriptor ring (for a specific queue) to setup
382 * @rx_desc: rx descriptor
384 static void ixgbe_receive_skb(struct ixgbe_adapter
*adapter
,
385 struct sk_buff
*skb
, u8 status
,
386 struct ixgbe_ring
*ring
,
387 union ixgbe_adv_rx_desc
*rx_desc
)
389 bool is_vlan
= (status
& IXGBE_RXD_STAT_VP
);
390 u16 tag
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
392 if (adapter
->netdev
->features
& NETIF_F_LRO
&&
393 skb
->ip_summed
== CHECKSUM_UNNECESSARY
) {
394 if (adapter
->vlgrp
&& is_vlan
)
395 lro_vlan_hwaccel_receive_skb(&ring
->lro_mgr
, skb
,
399 lro_receive_skb(&ring
->lro_mgr
, skb
, rx_desc
);
400 ring
->lro_used
= true;
402 if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
)) {
403 if (adapter
->vlgrp
&& is_vlan
)
404 vlan_hwaccel_receive_skb(skb
, adapter
->vlgrp
, tag
);
406 netif_receive_skb(skb
);
408 if (adapter
->vlgrp
&& is_vlan
)
409 vlan_hwaccel_rx(skb
, adapter
->vlgrp
, tag
);
417 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
418 * @adapter: address of board private structure
419 * @status_err: hardware indication of status of receive
420 * @skb: skb currently being received and modified
422 static inline void ixgbe_rx_checksum(struct ixgbe_adapter
*adapter
,
423 u32 status_err
, struct sk_buff
*skb
)
425 skb
->ip_summed
= CHECKSUM_NONE
;
427 /* Rx csum disabled */
428 if (!(adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
))
431 /* if IP and error */
432 if ((status_err
& IXGBE_RXD_STAT_IPCS
) &&
433 (status_err
& IXGBE_RXDADV_ERR_IPE
)) {
434 adapter
->hw_csum_rx_error
++;
438 if (!(status_err
& IXGBE_RXD_STAT_L4CS
))
441 if (status_err
& IXGBE_RXDADV_ERR_TCPE
) {
442 adapter
->hw_csum_rx_error
++;
446 /* It must be a TCP or UDP packet with a valid checksum */
447 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
448 adapter
->hw_csum_rx_good
++;
452 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
453 * @adapter: address of board private structure
455 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter
*adapter
,
456 struct ixgbe_ring
*rx_ring
,
459 struct net_device
*netdev
= adapter
->netdev
;
460 struct pci_dev
*pdev
= adapter
->pdev
;
461 union ixgbe_adv_rx_desc
*rx_desc
;
462 struct ixgbe_rx_buffer
*bi
;
464 unsigned int bufsz
= adapter
->rx_buf_len
+ NET_IP_ALIGN
;
466 i
= rx_ring
->next_to_use
;
467 bi
= &rx_ring
->rx_buffer_info
[i
];
469 while (cleaned_count
--) {
470 rx_desc
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
473 (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
)) {
474 bi
->page
= alloc_page(GFP_ATOMIC
);
476 adapter
->alloc_rx_page_failed
++;
479 bi
->page_dma
= pci_map_page(pdev
, bi
->page
, 0,
485 struct sk_buff
*skb
= netdev_alloc_skb(netdev
, bufsz
);
488 adapter
->alloc_rx_buff_failed
++;
493 * Make buffer alignment 2 beyond a 16 byte boundary
494 * this will result in a 16 byte aligned IP header after
495 * the 14 byte MAC header is removed
497 skb_reserve(skb
, NET_IP_ALIGN
);
500 bi
->dma
= pci_map_single(pdev
, skb
->data
, bufsz
,
503 /* Refresh the desc even if buffer_addrs didn't change because
504 * each write-back erases this info. */
505 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
506 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->page_dma
);
507 rx_desc
->read
.hdr_addr
= cpu_to_le64(bi
->dma
);
509 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
);
513 if (i
== rx_ring
->count
)
515 bi
= &rx_ring
->rx_buffer_info
[i
];
518 if (rx_ring
->next_to_use
!= i
) {
519 rx_ring
->next_to_use
= i
;
521 i
= (rx_ring
->count
- 1);
524 * Force memory writes to complete before letting h/w
525 * know there are new descriptors to fetch. (Only
526 * applicable for weak-ordered memory model archs,
530 writel(i
, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
534 static bool ixgbe_clean_rx_irq(struct ixgbe_adapter
*adapter
,
535 struct ixgbe_ring
*rx_ring
,
536 int *work_done
, int work_to_do
)
538 struct net_device
*netdev
= adapter
->netdev
;
539 struct pci_dev
*pdev
= adapter
->pdev
;
540 union ixgbe_adv_rx_desc
*rx_desc
, *next_rxd
;
541 struct ixgbe_rx_buffer
*rx_buffer_info
, *next_buffer
;
544 u32 upper_len
, len
, staterr
;
546 bool cleaned
= false;
547 int cleaned_count
= 0;
548 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
550 i
= rx_ring
->next_to_clean
;
552 rx_desc
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
553 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
554 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
556 while (staterr
& IXGBE_RXD_STAT_DD
) {
557 if (*work_done
>= work_to_do
)
561 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
563 le16_to_cpu(rx_desc
->wb
.lower
.lo_dword
.hdr_info
);
565 ((hdr_info
& IXGBE_RXDADV_HDRBUFLEN_MASK
) >>
566 IXGBE_RXDADV_HDRBUFLEN_SHIFT
);
567 if (hdr_info
& IXGBE_RXDADV_SPH
)
568 adapter
->rx_hdr_split
++;
569 if (len
> IXGBE_RX_HDR_SIZE
)
570 len
= IXGBE_RX_HDR_SIZE
;
571 upper_len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
573 len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
576 skb
= rx_buffer_info
->skb
;
577 prefetch(skb
->data
- NET_IP_ALIGN
);
578 rx_buffer_info
->skb
= NULL
;
580 if (len
&& !skb_shinfo(skb
)->nr_frags
) {
581 pci_unmap_single(pdev
, rx_buffer_info
->dma
,
582 adapter
->rx_buf_len
+ NET_IP_ALIGN
,
588 pci_unmap_page(pdev
, rx_buffer_info
->page_dma
,
589 PAGE_SIZE
, PCI_DMA_FROMDEVICE
);
590 rx_buffer_info
->page_dma
= 0;
591 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
,
592 rx_buffer_info
->page
, 0, upper_len
);
593 rx_buffer_info
->page
= NULL
;
595 skb
->len
+= upper_len
;
596 skb
->data_len
+= upper_len
;
597 skb
->truesize
+= upper_len
;
601 if (i
== rx_ring
->count
)
603 next_buffer
= &rx_ring
->rx_buffer_info
[i
];
605 next_rxd
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
609 if (staterr
& IXGBE_RXD_STAT_EOP
) {
610 rx_ring
->stats
.packets
++;
611 rx_ring
->stats
.bytes
+= skb
->len
;
613 rx_buffer_info
->skb
= next_buffer
->skb
;
614 rx_buffer_info
->dma
= next_buffer
->dma
;
615 next_buffer
->skb
= skb
;
616 adapter
->non_eop_descs
++;
620 if (staterr
& IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) {
621 dev_kfree_skb_irq(skb
);
625 ixgbe_rx_checksum(adapter
, staterr
, skb
);
627 /* probably a little skewed due to removing CRC */
628 total_rx_bytes
+= skb
->len
;
631 skb
->protocol
= eth_type_trans(skb
, netdev
);
632 ixgbe_receive_skb(adapter
, skb
, staterr
, rx_ring
, rx_desc
);
633 netdev
->last_rx
= jiffies
;
636 rx_desc
->wb
.upper
.status_error
= 0;
638 /* return some buffers to hardware, one at a time is too slow */
639 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
640 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
644 /* use prefetched values */
646 rx_buffer_info
= next_buffer
;
648 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
651 if (rx_ring
->lro_used
) {
652 lro_flush_all(&rx_ring
->lro_mgr
);
653 rx_ring
->lro_used
= false;
656 rx_ring
->next_to_clean
= i
;
657 cleaned_count
= IXGBE_DESC_UNUSED(rx_ring
);
660 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
662 rx_ring
->total_packets
+= total_rx_packets
;
663 rx_ring
->total_bytes
+= total_rx_bytes
;
664 adapter
->net_stats
.rx_bytes
+= total_rx_bytes
;
665 adapter
->net_stats
.rx_packets
+= total_rx_packets
;
670 static int ixgbe_clean_rxonly(struct napi_struct
*, int);
672 * ixgbe_configure_msix - Configure MSI-X hardware
673 * @adapter: board private structure
675 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
678 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
680 struct ixgbe_q_vector
*q_vector
;
681 int i
, j
, q_vectors
, v_idx
, r_idx
;
684 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
686 /* Populate the IVAR table and set the ITR values to the
687 * corresponding register.
689 for (v_idx
= 0; v_idx
< q_vectors
; v_idx
++) {
690 q_vector
= &adapter
->q_vector
[v_idx
];
691 /* XXX for_each_bit(...) */
692 r_idx
= find_first_bit(q_vector
->rxr_idx
,
693 adapter
->num_rx_queues
);
695 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
696 j
= adapter
->rx_ring
[r_idx
].reg_idx
;
697 ixgbe_set_ivar(adapter
, IXGBE_IVAR_RX_QUEUE(j
), v_idx
);
698 r_idx
= find_next_bit(q_vector
->rxr_idx
,
699 adapter
->num_rx_queues
,
702 r_idx
= find_first_bit(q_vector
->txr_idx
,
703 adapter
->num_tx_queues
);
705 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
706 j
= adapter
->tx_ring
[r_idx
].reg_idx
;
707 ixgbe_set_ivar(adapter
, IXGBE_IVAR_TX_QUEUE(j
), v_idx
);
708 r_idx
= find_next_bit(q_vector
->txr_idx
,
709 adapter
->num_tx_queues
,
713 /* if this is a tx only vector use half the irq (tx) rate */
714 if (q_vector
->txr_count
&& !q_vector
->rxr_count
)
715 q_vector
->eitr
= adapter
->tx_eitr
;
717 /* rx only or mixed */
718 q_vector
->eitr
= adapter
->rx_eitr
;
720 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
),
721 EITR_INTS_PER_SEC_TO_REG(q_vector
->eitr
));
724 ixgbe_set_ivar(adapter
, IXGBE_IVAR_OTHER_CAUSES_INDEX
, v_idx
);
725 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
727 /* set up to autoclear timer, lsc, and the vectors */
728 mask
= IXGBE_EIMS_ENABLE_MASK
;
729 mask
&= ~IXGBE_EIMS_OTHER
;
730 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
737 latency_invalid
= 255
741 * ixgbe_update_itr - update the dynamic ITR value based on statistics
742 * @adapter: pointer to adapter
743 * @eitr: eitr setting (ints per sec) to give last timeslice
744 * @itr_setting: current throttle rate in ints/second
745 * @packets: the number of packets during this measurement interval
746 * @bytes: the number of bytes during this measurement interval
748 * Stores a new ITR value based on packets and byte
749 * counts during the last interrupt. The advantage of per interrupt
750 * computation is faster updates and more accurate ITR for the current
751 * traffic pattern. Constants in this function were computed
752 * based on theoretical maximum wire speed and thresholds were set based
753 * on testing data as well as attempting to minimize response time
754 * while increasing bulk throughput.
755 * this functionality is controlled by the InterruptThrottleRate module
756 * parameter (see ixgbe_param.c)
758 static u8
ixgbe_update_itr(struct ixgbe_adapter
*adapter
,
759 u32 eitr
, u8 itr_setting
,
760 int packets
, int bytes
)
762 unsigned int retval
= itr_setting
;
767 goto update_itr_done
;
770 /* simple throttlerate management
771 * 0-20MB/s lowest (100000 ints/s)
772 * 20-100MB/s low (20000 ints/s)
773 * 100-1249MB/s bulk (8000 ints/s)
775 /* what was last interrupt timeslice? */
776 timepassed_us
= 1000000/eitr
;
777 bytes_perint
= bytes
/ timepassed_us
; /* bytes/usec */
779 switch (itr_setting
) {
781 if (bytes_perint
> adapter
->eitr_low
)
782 retval
= low_latency
;
785 if (bytes_perint
> adapter
->eitr_high
)
786 retval
= bulk_latency
;
787 else if (bytes_perint
<= adapter
->eitr_low
)
788 retval
= lowest_latency
;
791 if (bytes_perint
<= adapter
->eitr_high
)
792 retval
= low_latency
;
800 static void ixgbe_set_itr_msix(struct ixgbe_q_vector
*q_vector
)
802 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
803 struct ixgbe_hw
*hw
= &adapter
->hw
;
805 u8 current_itr
, ret_itr
;
806 int i
, r_idx
, v_idx
= ((void *)q_vector
- (void *)(adapter
->q_vector
)) /
807 sizeof(struct ixgbe_q_vector
);
808 struct ixgbe_ring
*rx_ring
, *tx_ring
;
810 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
811 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
812 tx_ring
= &(adapter
->tx_ring
[r_idx
]);
813 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
815 tx_ring
->total_packets
,
816 tx_ring
->total_bytes
);
817 /* if the result for this queue would decrease interrupt
818 * rate for this vector then use that result */
819 q_vector
->tx_eitr
= ((q_vector
->tx_eitr
> ret_itr
) ?
820 q_vector
->tx_eitr
- 1 : ret_itr
);
821 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
825 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
826 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
827 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
828 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
830 rx_ring
->total_packets
,
831 rx_ring
->total_bytes
);
832 /* if the result for this queue would decrease interrupt
833 * rate for this vector then use that result */
834 q_vector
->rx_eitr
= ((q_vector
->rx_eitr
> ret_itr
) ?
835 q_vector
->rx_eitr
- 1 : ret_itr
);
836 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
840 current_itr
= max(q_vector
->rx_eitr
, q_vector
->tx_eitr
);
842 switch (current_itr
) {
843 /* counts and packets in update_itr are dependent on these numbers */
848 new_itr
= 20000; /* aka hwitr = ~200 */
856 if (new_itr
!= q_vector
->eitr
) {
858 /* do an exponential smoothing */
859 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
860 q_vector
->eitr
= new_itr
;
861 itr_reg
= EITR_INTS_PER_SEC_TO_REG(new_itr
);
862 /* must write high and low 16 bits to reset counter */
863 DPRINTK(TX_ERR
, DEBUG
, "writing eitr(%d): %08X\n", v_idx
,
865 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
| (itr_reg
)<<16);
871 static irqreturn_t
ixgbe_msix_lsc(int irq
, void *data
)
873 struct net_device
*netdev
= data
;
874 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
875 struct ixgbe_hw
*hw
= &adapter
->hw
;
876 u32 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
878 if (eicr
& IXGBE_EICR_LSC
) {
880 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
881 mod_timer(&adapter
->watchdog_timer
, jiffies
);
884 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
885 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_OTHER
);
890 static irqreturn_t
ixgbe_msix_clean_tx(int irq
, void *data
)
892 struct ixgbe_q_vector
*q_vector
= data
;
893 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
894 struct ixgbe_ring
*tx_ring
;
897 if (!q_vector
->txr_count
)
900 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
901 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
902 tx_ring
= &(adapter
->tx_ring
[r_idx
]);
904 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
905 ixgbe_update_tx_dca(adapter
, tx_ring
);
907 tx_ring
->total_bytes
= 0;
908 tx_ring
->total_packets
= 0;
909 ixgbe_clean_tx_irq(adapter
, tx_ring
);
910 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
918 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
920 * @data: pointer to our q_vector struct for this interrupt vector
922 static irqreturn_t
ixgbe_msix_clean_rx(int irq
, void *data
)
924 struct ixgbe_q_vector
*q_vector
= data
;
925 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
926 struct ixgbe_ring
*rx_ring
;
929 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
930 if (!q_vector
->rxr_count
)
933 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
934 /* disable interrupts on this vector only */
935 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, rx_ring
->v_idx
);
936 rx_ring
->total_bytes
= 0;
937 rx_ring
->total_packets
= 0;
938 netif_rx_schedule(adapter
->netdev
, &q_vector
->napi
);
943 static irqreturn_t
ixgbe_msix_clean_many(int irq
, void *data
)
945 ixgbe_msix_clean_rx(irq
, data
);
946 ixgbe_msix_clean_tx(irq
, data
);
952 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
953 * @napi: napi struct with our devices info in it
954 * @budget: amount of work driver is allowed to do this pass, in packets
957 static int ixgbe_clean_rxonly(struct napi_struct
*napi
, int budget
)
959 struct ixgbe_q_vector
*q_vector
=
960 container_of(napi
, struct ixgbe_q_vector
, napi
);
961 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
962 struct ixgbe_ring
*rx_ring
;
966 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
967 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
969 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
970 ixgbe_update_rx_dca(adapter
, rx_ring
);
973 ixgbe_clean_rx_irq(adapter
, rx_ring
, &work_done
, budget
);
975 /* If all Rx work done, exit the polling mode */
976 if (work_done
< budget
) {
977 netif_rx_complete(adapter
->netdev
, napi
);
978 if (adapter
->rx_eitr
< IXGBE_MIN_ITR_USECS
)
979 ixgbe_set_itr_msix(q_vector
);
980 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
981 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, rx_ring
->v_idx
);
987 static inline void map_vector_to_rxq(struct ixgbe_adapter
*a
, int v_idx
,
990 a
->q_vector
[v_idx
].adapter
= a
;
991 set_bit(r_idx
, a
->q_vector
[v_idx
].rxr_idx
);
992 a
->q_vector
[v_idx
].rxr_count
++;
993 a
->rx_ring
[r_idx
].v_idx
= 1 << v_idx
;
996 static inline void map_vector_to_txq(struct ixgbe_adapter
*a
, int v_idx
,
999 a
->q_vector
[v_idx
].adapter
= a
;
1000 set_bit(r_idx
, a
->q_vector
[v_idx
].txr_idx
);
1001 a
->q_vector
[v_idx
].txr_count
++;
1002 a
->tx_ring
[r_idx
].v_idx
= 1 << v_idx
;
1006 * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1007 * @adapter: board private structure to initialize
1008 * @vectors: allotted vector count for descriptor rings
1010 * This function maps descriptor rings to the queue-specific vectors
1011 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1012 * one vector per ring/queue, but on a constrained vector budget, we
1013 * group the rings as "efficiently" as possible. You would add new
1014 * mapping configurations in here.
1016 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter
*adapter
,
1020 int rxr_idx
= 0, txr_idx
= 0;
1021 int rxr_remaining
= adapter
->num_rx_queues
;
1022 int txr_remaining
= adapter
->num_tx_queues
;
1027 /* No mapping required if MSI-X is disabled. */
1028 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
1032 * The ideal configuration...
1033 * We have enough vectors to map one per queue.
1035 if (vectors
== adapter
->num_rx_queues
+ adapter
->num_tx_queues
) {
1036 for (; rxr_idx
< rxr_remaining
; v_start
++, rxr_idx
++)
1037 map_vector_to_rxq(adapter
, v_start
, rxr_idx
);
1039 for (; txr_idx
< txr_remaining
; v_start
++, txr_idx
++)
1040 map_vector_to_txq(adapter
, v_start
, txr_idx
);
1046 * If we don't have enough vectors for a 1-to-1
1047 * mapping, we'll have to group them so there are
1048 * multiple queues per vector.
1050 /* Re-adjusting *qpv takes care of the remainder. */
1051 for (i
= v_start
; i
< vectors
; i
++) {
1052 rqpv
= DIV_ROUND_UP(rxr_remaining
, vectors
- i
);
1053 for (j
= 0; j
< rqpv
; j
++) {
1054 map_vector_to_rxq(adapter
, i
, rxr_idx
);
1059 for (i
= v_start
; i
< vectors
; i
++) {
1060 tqpv
= DIV_ROUND_UP(txr_remaining
, vectors
- i
);
1061 for (j
= 0; j
< tqpv
; j
++) {
1062 map_vector_to_txq(adapter
, i
, txr_idx
);
1073 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1074 * @adapter: board private structure
1076 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1077 * interrupts from the kernel.
1079 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
1081 struct net_device
*netdev
= adapter
->netdev
;
1082 irqreturn_t (*handler
)(int, void *);
1083 int i
, vector
, q_vectors
, err
;
1085 /* Decrement for Other and TCP Timer vectors */
1086 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1088 /* Map the Tx/Rx rings to the vectors we were allotted. */
1089 err
= ixgbe_map_rings_to_vectors(adapter
, q_vectors
);
1093 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1094 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1095 &ixgbe_msix_clean_many)
1096 for (vector
= 0; vector
< q_vectors
; vector
++) {
1097 handler
= SET_HANDLER(&adapter
->q_vector
[vector
]);
1098 sprintf(adapter
->name
[vector
], "%s:v%d-%s",
1099 netdev
->name
, vector
,
1100 (handler
== &ixgbe_msix_clean_rx
) ? "Rx" :
1101 ((handler
== &ixgbe_msix_clean_tx
) ? "Tx" : "TxRx"));
1102 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
1103 handler
, 0, adapter
->name
[vector
],
1104 &(adapter
->q_vector
[vector
]));
1107 "request_irq failed for MSIX interrupt "
1108 "Error: %d\n", err
);
1109 goto free_queue_irqs
;
1113 sprintf(adapter
->name
[vector
], "%s:lsc", netdev
->name
);
1114 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
1115 &ixgbe_msix_lsc
, 0, adapter
->name
[vector
], netdev
);
1118 "request_irq for msix_lsc failed: %d\n", err
);
1119 goto free_queue_irqs
;
1125 for (i
= vector
- 1; i
>= 0; i
--)
1126 free_irq(adapter
->msix_entries
[--vector
].vector
,
1127 &(adapter
->q_vector
[i
]));
1128 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
1129 pci_disable_msix(adapter
->pdev
);
1130 kfree(adapter
->msix_entries
);
1131 adapter
->msix_entries
= NULL
;
1136 static void ixgbe_set_itr(struct ixgbe_adapter
*adapter
)
1138 struct ixgbe_hw
*hw
= &adapter
->hw
;
1139 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
;
1141 u32 new_itr
= q_vector
->eitr
;
1142 struct ixgbe_ring
*rx_ring
= &adapter
->rx_ring
[0];
1143 struct ixgbe_ring
*tx_ring
= &adapter
->tx_ring
[0];
1145 q_vector
->tx_eitr
= ixgbe_update_itr(adapter
, new_itr
,
1147 tx_ring
->total_packets
,
1148 tx_ring
->total_bytes
);
1149 q_vector
->rx_eitr
= ixgbe_update_itr(adapter
, new_itr
,
1151 rx_ring
->total_packets
,
1152 rx_ring
->total_bytes
);
1154 current_itr
= max(q_vector
->rx_eitr
, q_vector
->tx_eitr
);
1156 switch (current_itr
) {
1157 /* counts and packets in update_itr are dependent on these numbers */
1158 case lowest_latency
:
1162 new_itr
= 20000; /* aka hwitr = ~200 */
1171 if (new_itr
!= q_vector
->eitr
) {
1173 /* do an exponential smoothing */
1174 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
1175 q_vector
->eitr
= new_itr
;
1176 itr_reg
= EITR_INTS_PER_SEC_TO_REG(new_itr
);
1177 /* must write high and low 16 bits to reset counter */
1178 IXGBE_WRITE_REG(hw
, IXGBE_EITR(0), itr_reg
| (itr_reg
)<<16);
1184 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
);
1187 * ixgbe_intr - legacy mode Interrupt Handler
1188 * @irq: interrupt number
1189 * @data: pointer to a network interface device structure
1190 * @pt_regs: CPU registers structure
1192 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
1194 struct net_device
*netdev
= data
;
1195 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1196 struct ixgbe_hw
*hw
= &adapter
->hw
;
1200 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1201 * therefore no explict interrupt disable is necessary */
1202 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
1204 return IRQ_NONE
; /* Not our interrupt */
1206 if (eicr
& IXGBE_EICR_LSC
) {
1208 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1209 mod_timer(&adapter
->watchdog_timer
, jiffies
);
1213 if (netif_rx_schedule_prep(netdev
, &adapter
->q_vector
[0].napi
)) {
1214 adapter
->tx_ring
[0].total_packets
= 0;
1215 adapter
->tx_ring
[0].total_bytes
= 0;
1216 adapter
->rx_ring
[0].total_packets
= 0;
1217 adapter
->rx_ring
[0].total_bytes
= 0;
1218 /* would disable interrupts here but EIAM disabled it */
1219 __netif_rx_schedule(netdev
, &adapter
->q_vector
[0].napi
);
1225 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter
*adapter
)
1227 int i
, q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1229 for (i
= 0; i
< q_vectors
; i
++) {
1230 struct ixgbe_q_vector
*q_vector
= &adapter
->q_vector
[i
];
1231 bitmap_zero(q_vector
->rxr_idx
, MAX_RX_QUEUES
);
1232 bitmap_zero(q_vector
->txr_idx
, MAX_TX_QUEUES
);
1233 q_vector
->rxr_count
= 0;
1234 q_vector
->txr_count
= 0;
1239 * ixgbe_request_irq - initialize interrupts
1240 * @adapter: board private structure
1242 * Attempts to configure interrupts using the best available
1243 * capabilities of the hardware and kernel.
1245 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
1247 struct net_device
*netdev
= adapter
->netdev
;
1250 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1251 err
= ixgbe_request_msix_irqs(adapter
);
1252 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
1253 err
= request_irq(adapter
->pdev
->irq
, &ixgbe_intr
, 0,
1254 netdev
->name
, netdev
);
1256 err
= request_irq(adapter
->pdev
->irq
, &ixgbe_intr
, IRQF_SHARED
,
1257 netdev
->name
, netdev
);
1261 DPRINTK(PROBE
, ERR
, "request_irq failed, Error %d\n", err
);
1266 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
1268 struct net_device
*netdev
= adapter
->netdev
;
1270 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1273 q_vectors
= adapter
->num_msix_vectors
;
1276 free_irq(adapter
->msix_entries
[i
].vector
, netdev
);
1279 for (; i
>= 0; i
--) {
1280 free_irq(adapter
->msix_entries
[i
].vector
,
1281 &(adapter
->q_vector
[i
]));
1284 ixgbe_reset_q_vectors(adapter
);
1286 free_irq(adapter
->pdev
->irq
, netdev
);
1291 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1292 * @adapter: board private structure
1294 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
1296 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
1297 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1298 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1300 for (i
= 0; i
< adapter
->num_msix_vectors
; i
++)
1301 synchronize_irq(adapter
->msix_entries
[i
].vector
);
1303 synchronize_irq(adapter
->pdev
->irq
);
1308 * ixgbe_irq_enable - Enable default interrupt generation settings
1309 * @adapter: board private structure
1311 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
)
1314 mask
= IXGBE_EIMS_ENABLE_MASK
;
1315 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
1316 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1320 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1323 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
1325 struct ixgbe_hw
*hw
= &adapter
->hw
;
1327 IXGBE_WRITE_REG(hw
, IXGBE_EITR(0),
1328 EITR_INTS_PER_SEC_TO_REG(adapter
->rx_eitr
));
1330 ixgbe_set_ivar(adapter
, IXGBE_IVAR_RX_QUEUE(0), 0);
1331 ixgbe_set_ivar(adapter
, IXGBE_IVAR_TX_QUEUE(0), 0);
1333 map_vector_to_rxq(adapter
, 0, 0);
1334 map_vector_to_txq(adapter
, 0, 0);
1336 DPRINTK(HW
, INFO
, "Legacy interrupt IVAR setup done\n");
1340 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1341 * @adapter: board private structure
1343 * Configure the Tx unit of the MAC after a reset.
1345 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
1348 struct ixgbe_hw
*hw
= &adapter
->hw
;
1349 u32 i
, j
, tdlen
, txctrl
;
1351 /* Setup the HW Tx Head and Tail descriptor pointers */
1352 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1353 j
= adapter
->tx_ring
[i
].reg_idx
;
1354 tdba
= adapter
->tx_ring
[i
].dma
;
1355 tdlen
= adapter
->tx_ring
[i
].count
*
1356 sizeof(union ixgbe_adv_tx_desc
);
1357 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(j
),
1358 (tdba
& DMA_32BIT_MASK
));
1359 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(j
), (tdba
>> 32));
1360 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(j
), tdlen
);
1361 IXGBE_WRITE_REG(hw
, IXGBE_TDH(j
), 0);
1362 IXGBE_WRITE_REG(hw
, IXGBE_TDT(j
), 0);
1363 adapter
->tx_ring
[i
].head
= IXGBE_TDH(j
);
1364 adapter
->tx_ring
[i
].tail
= IXGBE_TDT(j
);
1365 /* Disable Tx Head Writeback RO bit, since this hoses
1366 * bookkeeping if things aren't delivered in order.
1368 txctrl
= IXGBE_READ_REG(hw
, IXGBE_DCA_TXCTRL(i
));
1369 txctrl
&= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN
;
1370 IXGBE_WRITE_REG(hw
, IXGBE_DCA_TXCTRL(i
), txctrl
);
1374 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1375 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1377 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1379 * ixgbe_get_skb_hdr - helper function for LRO header processing
1380 * @skb: pointer to sk_buff to be added to LRO packet
1381 * @iphdr: pointer to tcp header structure
1382 * @tcph: pointer to tcp header structure
1383 * @hdr_flags: pointer to header flags
1384 * @priv: private data
1386 static int ixgbe_get_skb_hdr(struct sk_buff
*skb
, void **iphdr
, void **tcph
,
1387 u64
*hdr_flags
, void *priv
)
1389 union ixgbe_adv_rx_desc
*rx_desc
= priv
;
1391 /* Verify that this is a valid IPv4 TCP packet */
1392 if (!(rx_desc
->wb
.lower
.lo_dword
.pkt_info
&
1393 (IXGBE_RXDADV_PKTTYPE_IPV4
| IXGBE_RXDADV_PKTTYPE_TCP
)))
1396 /* Set network headers */
1397 skb_reset_network_header(skb
);
1398 skb_set_transport_header(skb
, ip_hdrlen(skb
));
1399 *iphdr
= ip_hdr(skb
);
1400 *tcph
= tcp_hdr(skb
);
1401 *hdr_flags
= LRO_IPV4
| LRO_TCP
;
1406 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1407 * @adapter: board private structure
1409 * Configure the Rx unit of the MAC after a reset.
1411 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
1414 struct ixgbe_hw
*hw
= &adapter
->hw
;
1415 struct net_device
*netdev
= adapter
->netdev
;
1416 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1418 u32 rdlen
, rxctrl
, rxcsum
;
1422 u32 reta
= 0, mrqc
, srrctl
;
1424 /* Decide whether to use packet split mode or not */
1425 if (netdev
->mtu
> ETH_DATA_LEN
)
1426 adapter
->flags
|= IXGBE_FLAG_RX_PS_ENABLED
;
1428 adapter
->flags
&= ~IXGBE_FLAG_RX_PS_ENABLED
;
1430 /* Set the RX buffer length according to the mode */
1431 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
1432 adapter
->rx_buf_len
= IXGBE_RX_HDR_SIZE
;
1434 if (netdev
->mtu
<= ETH_DATA_LEN
)
1435 adapter
->rx_buf_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
1437 adapter
->rx_buf_len
= ALIGN(max_frame
, 1024);
1440 fctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_FCTRL
);
1441 fctrl
|= IXGBE_FCTRL_BAM
;
1442 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
1443 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_FCTRL
, fctrl
);
1445 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
1446 if (adapter
->netdev
->mtu
<= ETH_DATA_LEN
)
1447 hlreg0
&= ~IXGBE_HLREG0_JUMBOEN
;
1449 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
1450 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
1452 pages
= PAGE_USE_COUNT(adapter
->netdev
->mtu
);
1454 srrctl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SRRCTL(0));
1455 srrctl
&= ~IXGBE_SRRCTL_BSIZEHDR_MASK
;
1456 srrctl
&= ~IXGBE_SRRCTL_BSIZEPKT_MASK
;
1458 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
1459 srrctl
|= PAGE_SIZE
>> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1460 srrctl
|= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
1461 srrctl
|= ((IXGBE_RX_HDR_SIZE
<<
1462 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
) &
1463 IXGBE_SRRCTL_BSIZEHDR_MASK
);
1465 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
1467 if (adapter
->rx_buf_len
== MAXIMUM_ETHERNET_VLAN_SIZE
)
1469 IXGBE_RXBUFFER_2048
>> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1472 adapter
->rx_buf_len
>> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1474 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_SRRCTL(0), srrctl
);
1476 rdlen
= adapter
->rx_ring
[0].count
* sizeof(union ixgbe_adv_rx_desc
);
1477 /* disable receives while setting up the descriptors */
1478 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
1479 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
1481 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1482 * the Base and Length of the Rx Descriptor Ring */
1483 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1484 rdba
= adapter
->rx_ring
[i
].dma
;
1485 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(i
), (rdba
& DMA_32BIT_MASK
));
1486 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(i
), (rdba
>> 32));
1487 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(i
), rdlen
);
1488 IXGBE_WRITE_REG(hw
, IXGBE_RDH(i
), 0);
1489 IXGBE_WRITE_REG(hw
, IXGBE_RDT(i
), 0);
1490 adapter
->rx_ring
[i
].head
= IXGBE_RDH(i
);
1491 adapter
->rx_ring
[i
].tail
= IXGBE_RDT(i
);
1494 /* Intitial LRO Settings */
1495 adapter
->rx_ring
[i
].lro_mgr
.max_aggr
= IXGBE_MAX_LRO_AGGREGATE
;
1496 adapter
->rx_ring
[i
].lro_mgr
.max_desc
= IXGBE_MAX_LRO_DESCRIPTORS
;
1497 adapter
->rx_ring
[i
].lro_mgr
.get_skb_header
= ixgbe_get_skb_hdr
;
1498 adapter
->rx_ring
[i
].lro_mgr
.features
= LRO_F_EXTRACT_VLAN_ID
;
1499 if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
))
1500 adapter
->rx_ring
[i
].lro_mgr
.features
|= LRO_F_NAPI
;
1501 adapter
->rx_ring
[i
].lro_mgr
.dev
= adapter
->netdev
;
1502 adapter
->rx_ring
[i
].lro_mgr
.ip_summed
= CHECKSUM_UNNECESSARY
;
1503 adapter
->rx_ring
[i
].lro_mgr
.ip_summed_aggr
= CHECKSUM_UNNECESSARY
;
1505 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
1506 /* Fill out redirection table */
1507 for (i
= 0, j
= 0; i
< 128; i
++, j
++) {
1508 if (j
== adapter
->ring_feature
[RING_F_RSS
].indices
)
1510 /* reta = 4-byte sliding window of
1511 * 0x00..(indices-1)(indices-1)00..etc. */
1512 reta
= (reta
<< 8) | (j
* 0x11);
1514 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
1517 /* Fill out hash function seeds */
1518 /* XXX use a random constant here to glue certain flows */
1519 get_random_bytes(&random
[0], 40);
1520 for (i
= 0; i
< 10; i
++)
1521 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), random
[i
]);
1523 mrqc
= IXGBE_MRQC_RSSEN
1524 /* Perform hash on these packet types */
1525 | IXGBE_MRQC_RSS_FIELD_IPV4
1526 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1527 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1528 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1529 | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1530 | IXGBE_MRQC_RSS_FIELD_IPV6
1531 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1532 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1533 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP
;
1534 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
1537 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
1539 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
||
1540 adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
) {
1541 /* Disable indicating checksum in descriptor, enables
1543 rxcsum
|= IXGBE_RXCSUM_PCSD
;
1545 if (!(rxcsum
& IXGBE_RXCSUM_PCSD
)) {
1546 /* Enable IPv4 payload checksum for UDP fragments
1547 * if PCSD is not set */
1548 rxcsum
|= IXGBE_RXCSUM_IPPCSE
;
1551 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
1554 static void ixgbe_vlan_rx_register(struct net_device
*netdev
,
1555 struct vlan_group
*grp
)
1557 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1560 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1561 ixgbe_irq_disable(adapter
);
1562 adapter
->vlgrp
= grp
;
1565 /* enable VLAN tag insert/strip */
1566 ctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_VLNCTRL
);
1567 ctrl
|= IXGBE_VLNCTRL_VME
;
1568 ctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
1569 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_VLNCTRL
, ctrl
);
1572 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1573 ixgbe_irq_enable(adapter
);
1576 static void ixgbe_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
1578 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1580 /* add VID to filter table */
1581 ixgbe_set_vfta(&adapter
->hw
, vid
, 0, true);
1584 static void ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
1586 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1588 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1589 ixgbe_irq_disable(adapter
);
1591 vlan_group_set_device(adapter
->vlgrp
, vid
, NULL
);
1593 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1594 ixgbe_irq_enable(adapter
);
1596 /* remove VID from filter table */
1597 ixgbe_set_vfta(&adapter
->hw
, vid
, 0, false);
1600 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
1602 ixgbe_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
1604 if (adapter
->vlgrp
) {
1606 for (vid
= 0; vid
< VLAN_GROUP_ARRAY_LEN
; vid
++) {
1607 if (!vlan_group_get_device(adapter
->vlgrp
, vid
))
1609 ixgbe_vlan_rx_add_vid(adapter
->netdev
, vid
);
1614 static u8
*ixgbe_addr_list_itr(struct ixgbe_hw
*hw
, u8
**mc_addr_ptr
, u32
*vmdq
)
1616 struct dev_mc_list
*mc_ptr
;
1617 u8
*addr
= *mc_addr_ptr
;
1620 mc_ptr
= container_of(addr
, struct dev_mc_list
, dmi_addr
[0]);
1622 *mc_addr_ptr
= mc_ptr
->next
->dmi_addr
;
1624 *mc_addr_ptr
= NULL
;
1630 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1631 * @netdev: network interface device structure
1633 * The set_rx_method entry point is called whenever the unicast/multicast
1634 * address list or the network interface flags are updated. This routine is
1635 * responsible for configuring the hardware for proper unicast, multicast and
1638 static void ixgbe_set_rx_mode(struct net_device
*netdev
)
1640 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1641 struct ixgbe_hw
*hw
= &adapter
->hw
;
1643 u8
*addr_list
= NULL
;
1646 /* Check for Promiscuous and All Multicast modes */
1648 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
1649 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
1651 if (netdev
->flags
& IFF_PROMISC
) {
1652 hw
->addr_ctrl
.user_set_promisc
= 1;
1653 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
1654 vlnctrl
&= ~IXGBE_VLNCTRL_VFE
;
1656 if (netdev
->flags
& IFF_ALLMULTI
) {
1657 fctrl
|= IXGBE_FCTRL_MPE
;
1658 fctrl
&= ~IXGBE_FCTRL_UPE
;
1660 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
1662 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
1663 hw
->addr_ctrl
.user_set_promisc
= 0;
1666 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
1667 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
1669 /* reprogram secondary unicast list */
1670 addr_count
= netdev
->uc_count
;
1672 addr_list
= netdev
->uc_list
->dmi_addr
;
1673 ixgbe_update_uc_addr_list(hw
, addr_list
, addr_count
,
1674 ixgbe_addr_list_itr
);
1676 /* reprogram multicast list */
1677 addr_count
= netdev
->mc_count
;
1679 addr_list
= netdev
->mc_list
->dmi_addr
;
1680 ixgbe_update_mc_addr_list(hw
, addr_list
, addr_count
,
1681 ixgbe_addr_list_itr
);
1684 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
1687 struct ixgbe_q_vector
*q_vector
;
1688 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1690 /* legacy and MSI only use one vector */
1691 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
1694 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
1695 q_vector
= &adapter
->q_vector
[q_idx
];
1696 if (!q_vector
->rxr_count
)
1698 napi_enable(&q_vector
->napi
);
1702 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
1705 struct ixgbe_q_vector
*q_vector
;
1706 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1708 /* legacy and MSI only use one vector */
1709 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
1712 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
1713 q_vector
= &adapter
->q_vector
[q_idx
];
1714 if (!q_vector
->rxr_count
)
1716 napi_disable(&q_vector
->napi
);
1720 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
1722 struct net_device
*netdev
= adapter
->netdev
;
1725 ixgbe_set_rx_mode(netdev
);
1727 ixgbe_restore_vlan(adapter
);
1729 ixgbe_configure_tx(adapter
);
1730 ixgbe_configure_rx(adapter
);
1731 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1732 ixgbe_alloc_rx_buffers(adapter
, &adapter
->rx_ring
[i
],
1733 (adapter
->rx_ring
[i
].count
- 1));
1736 static int ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
1738 struct net_device
*netdev
= adapter
->netdev
;
1739 struct ixgbe_hw
*hw
= &adapter
->hw
;
1741 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1742 u32 txdctl
, rxdctl
, mhadd
;
1745 ixgbe_get_hw_control(adapter
);
1747 if ((adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) ||
1748 (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
)) {
1749 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1750 gpie
= (IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_EIAME
|
1751 IXGBE_GPIE_PBA_SUPPORT
| IXGBE_GPIE_OCD
);
1756 /* XXX: to interrupt immediately for EICS writes, enable this */
1757 /* gpie |= IXGBE_GPIE_EIMEN; */
1758 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
1761 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
1762 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
1763 * specifically only auto mask tx and rx interrupts */
1764 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
1767 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
1768 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
1769 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
1770 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
1772 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
1775 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1776 j
= adapter
->tx_ring
[i
].reg_idx
;
1777 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
1778 txdctl
|= IXGBE_TXDCTL_ENABLE
;
1779 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
1782 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1783 j
= adapter
->rx_ring
[i
].reg_idx
;
1784 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
1785 /* enable PTHRESH=32 descriptors (half the internal cache)
1786 * and HTHRESH=0 descriptors (to minimize latency on fetch),
1787 * this also removes a pesky rx_no_buffer_count increment */
1789 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
1790 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), rxdctl
);
1792 /* enable all receives */
1793 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
1794 rxdctl
|= (IXGBE_RXCTRL_DMBYPS
| IXGBE_RXCTRL_RXEN
);
1795 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxdctl
);
1797 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
1798 ixgbe_configure_msix(adapter
);
1800 ixgbe_configure_msi_and_legacy(adapter
);
1802 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
1803 ixgbe_napi_enable_all(adapter
);
1805 /* clear any pending interrupts, may auto mask */
1806 IXGBE_READ_REG(hw
, IXGBE_EICR
);
1808 ixgbe_irq_enable(adapter
);
1810 /* bring the link up in the watchdog, this could race with our first
1811 * link up interrupt but shouldn't be a problem */
1812 mod_timer(&adapter
->watchdog_timer
, jiffies
);
1816 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
1818 WARN_ON(in_interrupt());
1819 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
1821 ixgbe_down(adapter
);
1823 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
1826 int ixgbe_up(struct ixgbe_adapter
*adapter
)
1828 /* hardware has been reset, we need to reload some things */
1829 ixgbe_configure(adapter
);
1831 return ixgbe_up_complete(adapter
);
1834 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
1836 if (ixgbe_init_hw(&adapter
->hw
))
1837 DPRINTK(PROBE
, ERR
, "Hardware Error\n");
1839 /* reprogram the RAR[0] in case user changed it. */
1840 ixgbe_set_rar(&adapter
->hw
, 0, adapter
->hw
.mac
.addr
, 0, IXGBE_RAH_AV
);
1845 static int ixgbe_resume(struct pci_dev
*pdev
)
1847 struct net_device
*netdev
= pci_get_drvdata(pdev
);
1848 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1851 pci_set_power_state(pdev
, PCI_D0
);
1852 pci_restore_state(pdev
);
1853 err
= pci_enable_device(pdev
);
1855 printk(KERN_ERR
"ixgbe: Cannot enable PCI device from " \
1859 pci_set_master(pdev
);
1861 pci_enable_wake(pdev
, PCI_D3hot
, 0);
1862 pci_enable_wake(pdev
, PCI_D3cold
, 0);
1864 if (netif_running(netdev
)) {
1865 err
= ixgbe_request_irq(adapter
);
1870 ixgbe_reset(adapter
);
1872 if (netif_running(netdev
))
1875 netif_device_attach(netdev
);
1882 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
1883 * @adapter: board private structure
1884 * @rx_ring: ring to free buffers from
1886 static void ixgbe_clean_rx_ring(struct ixgbe_adapter
*adapter
,
1887 struct ixgbe_ring
*rx_ring
)
1889 struct pci_dev
*pdev
= adapter
->pdev
;
1893 /* Free all the Rx ring sk_buffs */
1895 for (i
= 0; i
< rx_ring
->count
; i
++) {
1896 struct ixgbe_rx_buffer
*rx_buffer_info
;
1898 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
1899 if (rx_buffer_info
->dma
) {
1900 pci_unmap_single(pdev
, rx_buffer_info
->dma
,
1901 adapter
->rx_buf_len
,
1902 PCI_DMA_FROMDEVICE
);
1903 rx_buffer_info
->dma
= 0;
1905 if (rx_buffer_info
->skb
) {
1906 dev_kfree_skb(rx_buffer_info
->skb
);
1907 rx_buffer_info
->skb
= NULL
;
1909 if (!rx_buffer_info
->page
)
1911 pci_unmap_page(pdev
, rx_buffer_info
->page_dma
, PAGE_SIZE
,
1912 PCI_DMA_FROMDEVICE
);
1913 rx_buffer_info
->page_dma
= 0;
1915 put_page(rx_buffer_info
->page
);
1916 rx_buffer_info
->page
= NULL
;
1919 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
1920 memset(rx_ring
->rx_buffer_info
, 0, size
);
1922 /* Zero out the descriptor ring */
1923 memset(rx_ring
->desc
, 0, rx_ring
->size
);
1925 rx_ring
->next_to_clean
= 0;
1926 rx_ring
->next_to_use
= 0;
1928 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
1929 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
1933 * ixgbe_clean_tx_ring - Free Tx Buffers
1934 * @adapter: board private structure
1935 * @tx_ring: ring to be cleaned
1937 static void ixgbe_clean_tx_ring(struct ixgbe_adapter
*adapter
,
1938 struct ixgbe_ring
*tx_ring
)
1940 struct ixgbe_tx_buffer
*tx_buffer_info
;
1944 /* Free all the Tx ring sk_buffs */
1946 for (i
= 0; i
< tx_ring
->count
; i
++) {
1947 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
1948 ixgbe_unmap_and_free_tx_resource(adapter
, tx_buffer_info
);
1951 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
1952 memset(tx_ring
->tx_buffer_info
, 0, size
);
1954 /* Zero out the descriptor ring */
1955 memset(tx_ring
->desc
, 0, tx_ring
->size
);
1957 tx_ring
->next_to_use
= 0;
1958 tx_ring
->next_to_clean
= 0;
1960 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
1961 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
1965 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
1966 * @adapter: board private structure
1968 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
1972 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1973 ixgbe_clean_rx_ring(adapter
, &adapter
->rx_ring
[i
]);
1977 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
1978 * @adapter: board private structure
1980 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
1984 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
1985 ixgbe_clean_tx_ring(adapter
, &adapter
->tx_ring
[i
]);
1988 void ixgbe_down(struct ixgbe_adapter
*adapter
)
1990 struct net_device
*netdev
= adapter
->netdev
;
1993 /* signal that we are down to the interrupt handler */
1994 set_bit(__IXGBE_DOWN
, &adapter
->state
);
1996 /* disable receives */
1997 rxctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_RXCTRL
);
1998 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_RXCTRL
,
1999 rxctrl
& ~IXGBE_RXCTRL_RXEN
);
2001 netif_tx_disable(netdev
);
2003 /* disable transmits in the hardware */
2005 /* flush both disables */
2006 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2009 ixgbe_irq_disable(adapter
);
2011 ixgbe_napi_disable_all(adapter
);
2012 del_timer_sync(&adapter
->watchdog_timer
);
2014 netif_carrier_off(netdev
);
2015 netif_tx_stop_all_queues(netdev
);
2017 if (!pci_channel_offline(adapter
->pdev
))
2018 ixgbe_reset(adapter
);
2019 ixgbe_clean_all_tx_rings(adapter
);
2020 ixgbe_clean_all_rx_rings(adapter
);
2024 static int ixgbe_suspend(struct pci_dev
*pdev
, pm_message_t state
)
2026 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2027 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2032 netif_device_detach(netdev
);
2034 if (netif_running(netdev
)) {
2035 ixgbe_down(adapter
);
2036 ixgbe_free_irq(adapter
);
2040 retval
= pci_save_state(pdev
);
2045 pci_enable_wake(pdev
, PCI_D3hot
, 0);
2046 pci_enable_wake(pdev
, PCI_D3cold
, 0);
2048 ixgbe_release_hw_control(adapter
);
2050 pci_disable_device(pdev
);
2052 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
2057 static void ixgbe_shutdown(struct pci_dev
*pdev
)
2059 ixgbe_suspend(pdev
, PMSG_SUSPEND
);
2063 * ixgbe_poll - NAPI Rx polling callback
2064 * @napi: structure for representing this polling device
2065 * @budget: how many packets driver is allowed to clean
2067 * This function is used for legacy and MSI, NAPI mode
2069 static int ixgbe_poll(struct napi_struct
*napi
, int budget
)
2071 struct ixgbe_q_vector
*q_vector
= container_of(napi
,
2072 struct ixgbe_q_vector
, napi
);
2073 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2074 int tx_cleaned
= 0, work_done
= 0;
2077 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
2078 ixgbe_update_tx_dca(adapter
, adapter
->tx_ring
);
2079 ixgbe_update_rx_dca(adapter
, adapter
->rx_ring
);
2083 tx_cleaned
= ixgbe_clean_tx_irq(adapter
, adapter
->tx_ring
);
2084 ixgbe_clean_rx_irq(adapter
, adapter
->rx_ring
, &work_done
, budget
);
2089 /* If budget not fully consumed, exit the polling mode */
2090 if (work_done
< budget
) {
2091 netif_rx_complete(adapter
->netdev
, napi
);
2092 if (adapter
->rx_eitr
< IXGBE_MIN_ITR_USECS
)
2093 ixgbe_set_itr(adapter
);
2094 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2095 ixgbe_irq_enable(adapter
);
2102 * ixgbe_tx_timeout - Respond to a Tx Hang
2103 * @netdev: network interface device structure
2105 static void ixgbe_tx_timeout(struct net_device
*netdev
)
2107 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2109 /* Do the reset outside of interrupt context */
2110 schedule_work(&adapter
->reset_task
);
2113 static void ixgbe_reset_task(struct work_struct
*work
)
2115 struct ixgbe_adapter
*adapter
;
2116 adapter
= container_of(work
, struct ixgbe_adapter
, reset_task
);
2118 adapter
->tx_timeout_count
++;
2120 ixgbe_reinit_locked(adapter
);
2123 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter
*adapter
,
2126 int err
, vector_threshold
;
2128 /* We'll want at least 3 (vector_threshold):
2131 * 3) Other (Link Status Change, etc.)
2132 * 4) TCP Timer (optional)
2134 vector_threshold
= MIN_MSIX_COUNT
;
2136 /* The more we get, the more we will assign to Tx/Rx Cleanup
2137 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2138 * Right now, we simply care about how many we'll get; we'll
2139 * set them up later while requesting irq's.
2141 while (vectors
>= vector_threshold
) {
2142 err
= pci_enable_msix(adapter
->pdev
, adapter
->msix_entries
,
2144 if (!err
) /* Success in acquiring all requested vectors. */
2147 vectors
= 0; /* Nasty failure, quit now */
2148 else /* err == number of vectors we should try again with */
2152 if (vectors
< vector_threshold
) {
2153 /* Can't allocate enough MSI-X interrupts? Oh well.
2154 * This just means we'll go with either a single MSI
2155 * vector or fall back to legacy interrupts.
2157 DPRINTK(HW
, DEBUG
, "Unable to allocate MSI-X interrupts\n");
2158 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2159 kfree(adapter
->msix_entries
);
2160 adapter
->msix_entries
= NULL
;
2161 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
2162 adapter
->num_tx_queues
= 1;
2163 adapter
->num_rx_queues
= 1;
2165 adapter
->flags
|= IXGBE_FLAG_MSIX_ENABLED
; /* Woot! */
2166 adapter
->num_msix_vectors
= vectors
;
2170 static void __devinit
ixgbe_set_num_queues(struct ixgbe_adapter
*adapter
)
2173 int feature_mask
= 0, rss_i
, rss_m
;
2175 /* Number of supported queues */
2176 switch (adapter
->hw
.mac
.type
) {
2177 case ixgbe_mac_82598EB
:
2178 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
2180 feature_mask
|= IXGBE_FLAG_RSS_ENABLED
;
2182 switch (adapter
->flags
& feature_mask
) {
2183 case (IXGBE_FLAG_RSS_ENABLED
):
2197 adapter
->ring_feature
[RING_F_RSS
].indices
= rss_i
;
2198 adapter
->ring_feature
[RING_F_RSS
].mask
= rss_m
;
2206 adapter
->num_rx_queues
= nrq
;
2207 adapter
->num_tx_queues
= ntq
;
2211 * ixgbe_cache_ring_register - Descriptor ring to register mapping
2212 * @adapter: board private structure to initialize
2214 * Once we know the feature-set enabled for the device, we'll cache
2215 * the register offset the descriptor ring is assigned to.
2217 static void __devinit
ixgbe_cache_ring_register(struct ixgbe_adapter
*adapter
)
2219 /* TODO: Remove all uses of the indices in the cases where multiple
2220 * features are OR'd together, if the feature set makes sense.
2222 int feature_mask
= 0, rss_i
;
2223 int i
, txr_idx
, rxr_idx
;
2225 /* Number of supported queues */
2226 switch (adapter
->hw
.mac
.type
) {
2227 case ixgbe_mac_82598EB
:
2228 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
2231 feature_mask
|= IXGBE_FLAG_RSS_ENABLED
;
2232 switch (adapter
->flags
& feature_mask
) {
2233 case (IXGBE_FLAG_RSS_ENABLED
):
2234 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2235 adapter
->rx_ring
[i
].reg_idx
= i
;
2236 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2237 adapter
->tx_ring
[i
].reg_idx
= i
;
2250 * ixgbe_alloc_queues - Allocate memory for all rings
2251 * @adapter: board private structure to initialize
2253 * We allocate one ring per queue at run-time since we don't know the
2254 * number of queues at compile-time. The polling_netdev array is
2255 * intended for Multiqueue, but should work fine with a single queue.
2257 static int __devinit
ixgbe_alloc_queues(struct ixgbe_adapter
*adapter
)
2261 adapter
->tx_ring
= kcalloc(adapter
->num_tx_queues
,
2262 sizeof(struct ixgbe_ring
), GFP_KERNEL
);
2263 if (!adapter
->tx_ring
)
2264 goto err_tx_ring_allocation
;
2266 adapter
->rx_ring
= kcalloc(adapter
->num_rx_queues
,
2267 sizeof(struct ixgbe_ring
), GFP_KERNEL
);
2268 if (!adapter
->rx_ring
)
2269 goto err_rx_ring_allocation
;
2271 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2272 adapter
->tx_ring
[i
].count
= IXGBE_DEFAULT_TXD
;
2273 adapter
->tx_ring
[i
].queue_index
= i
;
2275 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2276 adapter
->rx_ring
[i
].count
= IXGBE_DEFAULT_RXD
;
2277 adapter
->rx_ring
[i
].queue_index
= i
;
2280 ixgbe_cache_ring_register(adapter
);
2284 err_rx_ring_allocation
:
2285 kfree(adapter
->tx_ring
);
2286 err_tx_ring_allocation
:
2291 * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2292 * @adapter: board private structure to initialize
2294 * Attempt to configure the interrupts using the best available
2295 * capabilities of the hardware and the kernel.
2297 static int __devinit
ixgbe_set_interrupt_capability(struct ixgbe_adapter
2301 int vector
, v_budget
;
2304 * It's easy to be greedy for MSI-X vectors, but it really
2305 * doesn't do us much good if we have a lot more vectors
2306 * than CPU's. So let's be conservative and only ask for
2307 * (roughly) twice the number of vectors as there are CPU's.
2309 v_budget
= min(adapter
->num_rx_queues
+ adapter
->num_tx_queues
,
2310 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS
;
2313 * At the same time, hardware can only support a maximum of
2314 * MAX_MSIX_COUNT vectors. With features such as RSS and VMDq,
2315 * we can easily reach upwards of 64 Rx descriptor queues and
2316 * 32 Tx queues. Thus, we cap it off in those rare cases where
2317 * the cpu count also exceeds our vector limit.
2319 v_budget
= min(v_budget
, MAX_MSIX_COUNT
);
2321 /* A failure in MSI-X entry allocation isn't fatal, but it does
2322 * mean we disable MSI-X capabilities of the adapter. */
2323 adapter
->msix_entries
= kcalloc(v_budget
,
2324 sizeof(struct msix_entry
), GFP_KERNEL
);
2325 if (!adapter
->msix_entries
) {
2326 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
2327 ixgbe_set_num_queues(adapter
);
2328 kfree(adapter
->tx_ring
);
2329 kfree(adapter
->rx_ring
);
2330 err
= ixgbe_alloc_queues(adapter
);
2332 DPRINTK(PROBE
, ERR
, "Unable to allocate memory "
2340 for (vector
= 0; vector
< v_budget
; vector
++)
2341 adapter
->msix_entries
[vector
].entry
= vector
;
2343 ixgbe_acquire_msix_vectors(adapter
, v_budget
);
2345 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
2349 err
= pci_enable_msi(adapter
->pdev
);
2351 adapter
->flags
|= IXGBE_FLAG_MSI_ENABLED
;
2353 DPRINTK(HW
, DEBUG
, "Unable to allocate MSI interrupt, "
2354 "falling back to legacy. Error: %d\n", err
);
2360 /* Notify the stack of the (possibly) reduced Tx Queue count. */
2361 adapter
->netdev
->real_num_tx_queues
= adapter
->num_tx_queues
;
2366 static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter
*adapter
)
2368 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2369 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2370 pci_disable_msix(adapter
->pdev
);
2371 kfree(adapter
->msix_entries
);
2372 adapter
->msix_entries
= NULL
;
2373 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
2374 adapter
->flags
&= ~IXGBE_FLAG_MSI_ENABLED
;
2375 pci_disable_msi(adapter
->pdev
);
2381 * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2382 * @adapter: board private structure to initialize
2384 * We determine which interrupt scheme to use based on...
2385 * - Kernel support (MSI, MSI-X)
2386 * - which can be user-defined (via MODULE_PARAM)
2387 * - Hardware queue count (num_*_queues)
2388 * - defined by miscellaneous hardware support/features (RSS, etc.)
2390 static int __devinit
ixgbe_init_interrupt_scheme(struct ixgbe_adapter
*adapter
)
2394 /* Number of supported queues */
2395 ixgbe_set_num_queues(adapter
);
2397 err
= ixgbe_alloc_queues(adapter
);
2399 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for queues\n");
2400 goto err_alloc_queues
;
2403 err
= ixgbe_set_interrupt_capability(adapter
);
2405 DPRINTK(PROBE
, ERR
, "Unable to setup interrupt capabilities\n");
2406 goto err_set_interrupt
;
2409 DPRINTK(DRV
, INFO
, "Multiqueue %s: Rx Queue count = %u, "
2410 "Tx Queue count = %u\n",
2411 (adapter
->num_rx_queues
> 1) ? "Enabled" :
2412 "Disabled", adapter
->num_rx_queues
, adapter
->num_tx_queues
);
2414 set_bit(__IXGBE_DOWN
, &adapter
->state
);
2419 kfree(adapter
->tx_ring
);
2420 kfree(adapter
->rx_ring
);
2426 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
2427 * @adapter: board private structure to initialize
2429 * ixgbe_sw_init initializes the Adapter private data structure.
2430 * Fields are initialized based on PCI device information and
2431 * OS network device settings (MTU size).
2433 static int __devinit
ixgbe_sw_init(struct ixgbe_adapter
*adapter
)
2435 struct ixgbe_hw
*hw
= &adapter
->hw
;
2436 struct pci_dev
*pdev
= adapter
->pdev
;
2439 /* Set capability flags */
2440 rss
= min(IXGBE_MAX_RSS_INDICES
, (int)num_online_cpus());
2441 adapter
->ring_feature
[RING_F_RSS
].indices
= rss
;
2442 adapter
->flags
|= IXGBE_FLAG_RSS_ENABLED
;
2444 /* Enable Dynamic interrupt throttling by default */
2445 adapter
->rx_eitr
= 1;
2446 adapter
->tx_eitr
= 1;
2448 /* default flow control settings */
2449 hw
->fc
.original_type
= ixgbe_fc_full
;
2450 hw
->fc
.type
= ixgbe_fc_full
;
2452 /* select 10G link by default */
2453 hw
->mac
.link_mode_select
= IXGBE_AUTOC_LMS_10G_LINK_NO_AN
;
2454 if (hw
->mac
.ops
.reset(hw
)) {
2455 dev_err(&pdev
->dev
, "HW Init failed\n");
2458 if (hw
->mac
.ops
.setup_link_speed(hw
, IXGBE_LINK_SPEED_10GB_FULL
, true,
2460 dev_err(&pdev
->dev
, "Link Speed setup failed\n");
2464 /* initialize eeprom parameters */
2465 if (ixgbe_init_eeprom(hw
)) {
2466 dev_err(&pdev
->dev
, "EEPROM initialization failed\n");
2470 /* enable rx csum by default */
2471 adapter
->flags
|= IXGBE_FLAG_RX_CSUM_ENABLED
;
2473 set_bit(__IXGBE_DOWN
, &adapter
->state
);
2479 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2480 * @adapter: board private structure
2481 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2483 * Return 0 on success, negative on failure
2485 int ixgbe_setup_tx_resources(struct ixgbe_adapter
*adapter
,
2486 struct ixgbe_ring
*tx_ring
)
2488 struct pci_dev
*pdev
= adapter
->pdev
;
2491 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
2492 tx_ring
->tx_buffer_info
= vmalloc(size
);
2493 if (!tx_ring
->tx_buffer_info
) {
2495 "Unable to allocate memory for the transmit descriptor ring\n");
2498 memset(tx_ring
->tx_buffer_info
, 0, size
);
2500 /* round up to nearest 4K */
2501 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
2502 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
2504 tx_ring
->desc
= pci_alloc_consistent(pdev
, tx_ring
->size
,
2506 if (!tx_ring
->desc
) {
2507 vfree(tx_ring
->tx_buffer_info
);
2509 "Memory allocation failed for the tx desc ring\n");
2513 tx_ring
->next_to_use
= 0;
2514 tx_ring
->next_to_clean
= 0;
2515 tx_ring
->work_limit
= tx_ring
->count
;
2521 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2522 * @adapter: board private structure
2523 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2525 * Returns 0 on success, negative on failure
2527 int ixgbe_setup_rx_resources(struct ixgbe_adapter
*adapter
,
2528 struct ixgbe_ring
*rx_ring
)
2530 struct pci_dev
*pdev
= adapter
->pdev
;
2533 size
= sizeof(struct net_lro_desc
) * IXGBE_MAX_LRO_DESCRIPTORS
;
2534 rx_ring
->lro_mgr
.lro_arr
= vmalloc(size
);
2535 if (!rx_ring
->lro_mgr
.lro_arr
)
2537 memset(rx_ring
->lro_mgr
.lro_arr
, 0, size
);
2539 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
2540 rx_ring
->rx_buffer_info
= vmalloc(size
);
2541 if (!rx_ring
->rx_buffer_info
) {
2543 "vmalloc allocation failed for the rx desc ring\n");
2546 memset(rx_ring
->rx_buffer_info
, 0, size
);
2548 /* Round up to nearest 4K */
2549 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
2550 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
2552 rx_ring
->desc
= pci_alloc_consistent(pdev
, rx_ring
->size
, &rx_ring
->dma
);
2554 if (!rx_ring
->desc
) {
2556 "Memory allocation failed for the rx desc ring\n");
2557 vfree(rx_ring
->rx_buffer_info
);
2561 rx_ring
->next_to_clean
= 0;
2562 rx_ring
->next_to_use
= 0;
2567 vfree(rx_ring
->lro_mgr
.lro_arr
);
2568 rx_ring
->lro_mgr
.lro_arr
= NULL
;
2573 * ixgbe_free_tx_resources - Free Tx Resources per Queue
2574 * @adapter: board private structure
2575 * @tx_ring: Tx descriptor ring for a specific queue
2577 * Free all transmit software resources
2579 static void ixgbe_free_tx_resources(struct ixgbe_adapter
*adapter
,
2580 struct ixgbe_ring
*tx_ring
)
2582 struct pci_dev
*pdev
= adapter
->pdev
;
2584 ixgbe_clean_tx_ring(adapter
, tx_ring
);
2586 vfree(tx_ring
->tx_buffer_info
);
2587 tx_ring
->tx_buffer_info
= NULL
;
2589 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
, tx_ring
->dma
);
2591 tx_ring
->desc
= NULL
;
2595 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
2596 * @adapter: board private structure
2598 * Free all transmit software resources
2600 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
2604 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2605 ixgbe_free_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
2609 * ixgbe_free_rx_resources - Free Rx Resources
2610 * @adapter: board private structure
2611 * @rx_ring: ring to clean the resources from
2613 * Free all receive software resources
2615 static void ixgbe_free_rx_resources(struct ixgbe_adapter
*adapter
,
2616 struct ixgbe_ring
*rx_ring
)
2618 struct pci_dev
*pdev
= adapter
->pdev
;
2620 vfree(rx_ring
->lro_mgr
.lro_arr
);
2621 rx_ring
->lro_mgr
.lro_arr
= NULL
;
2623 ixgbe_clean_rx_ring(adapter
, rx_ring
);
2625 vfree(rx_ring
->rx_buffer_info
);
2626 rx_ring
->rx_buffer_info
= NULL
;
2628 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
, rx_ring
->dma
);
2630 rx_ring
->desc
= NULL
;
2634 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
2635 * @adapter: board private structure
2637 * Free all receive software resources
2639 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
2643 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2644 ixgbe_free_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
2648 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2649 * @adapter: board private structure
2651 * If this function returns with an error, then it's possible one or
2652 * more of the rings is populated (while the rest are not). It is the
2653 * callers duty to clean those orphaned rings.
2655 * Return 0 on success, negative on failure
2657 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
2661 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2662 err
= ixgbe_setup_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
2665 "Allocation for Tx Queue %u failed\n", i
);
2674 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2675 * @adapter: board private structure
2677 * If this function returns with an error, then it's possible one or
2678 * more of the rings is populated (while the rest are not). It is the
2679 * callers duty to clean those orphaned rings.
2681 * Return 0 on success, negative on failure
2684 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
2688 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2689 err
= ixgbe_setup_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
2692 "Allocation for Rx Queue %u failed\n", i
);
2701 * ixgbe_change_mtu - Change the Maximum Transfer Unit
2702 * @netdev: network interface device structure
2703 * @new_mtu: new value for maximum frame size
2705 * Returns 0 on success, negative on failure
2707 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
2709 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2710 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
2712 if ((max_frame
< (ETH_ZLEN
+ ETH_FCS_LEN
)) ||
2713 (max_frame
> IXGBE_MAX_JUMBO_FRAME_SIZE
))
2716 DPRINTK(PROBE
, INFO
, "changing MTU from %d to %d\n",
2717 netdev
->mtu
, new_mtu
);
2718 /* must set new MTU before calling down or up */
2719 netdev
->mtu
= new_mtu
;
2721 if (netif_running(netdev
))
2722 ixgbe_reinit_locked(adapter
);
2728 * ixgbe_open - Called when a network interface is made active
2729 * @netdev: network interface device structure
2731 * Returns 0 on success, negative value on failure
2733 * The open entry point is called when a network interface is made
2734 * active by the system (IFF_UP). At this point all resources needed
2735 * for transmit and receive operations are allocated, the interrupt
2736 * handler is registered with the OS, the watchdog timer is started,
2737 * and the stack is notified that the interface is ready.
2739 static int ixgbe_open(struct net_device
*netdev
)
2741 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2744 /* disallow open during test */
2745 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
2748 /* allocate transmit descriptors */
2749 err
= ixgbe_setup_all_tx_resources(adapter
);
2753 /* allocate receive descriptors */
2754 err
= ixgbe_setup_all_rx_resources(adapter
);
2758 ixgbe_configure(adapter
);
2760 err
= ixgbe_request_irq(adapter
);
2764 err
= ixgbe_up_complete(adapter
);
2768 netif_tx_start_all_queues(netdev
);
2773 ixgbe_release_hw_control(adapter
);
2774 ixgbe_free_irq(adapter
);
2776 ixgbe_free_all_rx_resources(adapter
);
2778 ixgbe_free_all_tx_resources(adapter
);
2780 ixgbe_reset(adapter
);
2786 * ixgbe_close - Disables a network interface
2787 * @netdev: network interface device structure
2789 * Returns 0, this is not allowed to fail
2791 * The close entry point is called when an interface is de-activated
2792 * by the OS. The hardware is still under the drivers control, but
2793 * needs to be disabled. A global MAC reset is issued to stop the
2794 * hardware, and all transmit and receive resources are freed.
2796 static int ixgbe_close(struct net_device
*netdev
)
2798 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2800 ixgbe_down(adapter
);
2801 ixgbe_free_irq(adapter
);
2803 ixgbe_free_all_tx_resources(adapter
);
2804 ixgbe_free_all_rx_resources(adapter
);
2806 ixgbe_release_hw_control(adapter
);
2812 * ixgbe_update_stats - Update the board statistics counters.
2813 * @adapter: board private structure
2815 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
2817 struct ixgbe_hw
*hw
= &adapter
->hw
;
2819 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
2821 adapter
->stats
.crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
2822 for (i
= 0; i
< 8; i
++) {
2823 /* for packet buffers not used, the register should read 0 */
2824 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
2826 adapter
->stats
.mpc
[i
] += mpc
;
2827 total_mpc
+= adapter
->stats
.mpc
[i
];
2828 adapter
->stats
.rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
2830 adapter
->stats
.gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
2831 /* work around hardware counting issue */
2832 adapter
->stats
.gprc
-= missed_rx
;
2834 /* 82598 hardware only has a 32 bit counter in the high register */
2835 adapter
->stats
.gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
2836 adapter
->stats
.gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
2837 adapter
->stats
.tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
2838 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
2839 adapter
->stats
.bprc
+= bprc
;
2840 adapter
->stats
.mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
2841 adapter
->stats
.mprc
-= bprc
;
2842 adapter
->stats
.roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
2843 adapter
->stats
.prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
2844 adapter
->stats
.prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
2845 adapter
->stats
.prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
2846 adapter
->stats
.prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
2847 adapter
->stats
.prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
2848 adapter
->stats
.prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
2849 adapter
->stats
.rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
2850 adapter
->stats
.lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
2851 adapter
->stats
.lxoffrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
2852 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
2853 adapter
->stats
.lxontxc
+= lxon
;
2854 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
2855 adapter
->stats
.lxofftxc
+= lxoff
;
2856 adapter
->stats
.ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
2857 adapter
->stats
.gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
2858 adapter
->stats
.mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
2860 * 82598 errata - tx of flow control packets is included in tx counters
2862 xon_off_tot
= lxon
+ lxoff
;
2863 adapter
->stats
.gptc
-= xon_off_tot
;
2864 adapter
->stats
.mptc
-= xon_off_tot
;
2865 adapter
->stats
.gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
2866 adapter
->stats
.ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
2867 adapter
->stats
.rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
2868 adapter
->stats
.rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
2869 adapter
->stats
.tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
2870 adapter
->stats
.ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
2871 adapter
->stats
.ptc64
-= xon_off_tot
;
2872 adapter
->stats
.ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
2873 adapter
->stats
.ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
2874 adapter
->stats
.ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
2875 adapter
->stats
.ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
2876 adapter
->stats
.ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
2877 adapter
->stats
.bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
2879 /* Fill out the OS statistics structure */
2880 adapter
->net_stats
.multicast
= adapter
->stats
.mprc
;
2883 adapter
->net_stats
.rx_errors
= adapter
->stats
.crcerrs
+
2884 adapter
->stats
.rlec
;
2885 adapter
->net_stats
.rx_dropped
= 0;
2886 adapter
->net_stats
.rx_length_errors
= adapter
->stats
.rlec
;
2887 adapter
->net_stats
.rx_crc_errors
= adapter
->stats
.crcerrs
;
2888 adapter
->net_stats
.rx_missed_errors
= total_mpc
;
2892 * ixgbe_watchdog - Timer Call-back
2893 * @data: pointer to adapter cast into an unsigned long
2895 static void ixgbe_watchdog(unsigned long data
)
2897 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
2898 struct net_device
*netdev
= adapter
->netdev
;
2902 adapter
->hw
.mac
.ops
.check_link(&adapter
->hw
, &(link_speed
), &link_up
);
2905 if (!netif_carrier_ok(netdev
)) {
2906 u32 frctl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_FCTRL
);
2907 u32 rmcs
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_RMCS
);
2908 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
2909 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
2910 DPRINTK(LINK
, INFO
, "NIC Link is Up %s, "
2911 "Flow Control: %s\n",
2912 (link_speed
== IXGBE_LINK_SPEED_10GB_FULL
?
2914 (link_speed
== IXGBE_LINK_SPEED_1GB_FULL
?
2915 "1 Gbps" : "unknown speed")),
2916 ((FLOW_RX
&& FLOW_TX
) ? "RX/TX" :
2918 (FLOW_TX
? "TX" : "None"))));
2920 netif_carrier_on(netdev
);
2921 netif_tx_wake_all_queues(netdev
);
2923 /* Force detection of hung controller */
2924 adapter
->detect_tx_hung
= true;
2927 if (netif_carrier_ok(netdev
)) {
2928 DPRINTK(LINK
, INFO
, "NIC Link is Down\n");
2929 netif_carrier_off(netdev
);
2930 netif_tx_stop_all_queues(netdev
);
2934 ixgbe_update_stats(adapter
);
2936 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2937 /* Cause software interrupt to ensure rx rings are cleaned */
2938 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2940 (1 << (adapter
->num_msix_vectors
- NON_Q_VECTORS
)) - 1;
2941 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, eics
);
2943 /* for legacy and MSI interrupts don't set any bits that
2944 * are enabled for EIAM, because this operation would
2945 * set *both* EIMS and EICS for any bit in EIAM */
2946 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
,
2947 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
2949 /* Reset the timer */
2950 mod_timer(&adapter
->watchdog_timer
,
2951 round_jiffies(jiffies
+ 2 * HZ
));
2955 static int ixgbe_tso(struct ixgbe_adapter
*adapter
,
2956 struct ixgbe_ring
*tx_ring
, struct sk_buff
*skb
,
2957 u32 tx_flags
, u8
*hdr_len
)
2959 struct ixgbe_adv_tx_context_desc
*context_desc
;
2962 struct ixgbe_tx_buffer
*tx_buffer_info
;
2963 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
= 0;
2964 u32 mss_l4len_idx
= 0, l4len
;
2966 if (skb_is_gso(skb
)) {
2967 if (skb_header_cloned(skb
)) {
2968 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
2972 l4len
= tcp_hdrlen(skb
);
2975 if (skb
->protocol
== htons(ETH_P_IP
)) {
2976 struct iphdr
*iph
= ip_hdr(skb
);
2979 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
2983 adapter
->hw_tso_ctxt
++;
2984 } else if (skb_shinfo(skb
)->gso_type
== SKB_GSO_TCPV6
) {
2985 ipv6_hdr(skb
)->payload_len
= 0;
2986 tcp_hdr(skb
)->check
=
2987 ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
2988 &ipv6_hdr(skb
)->daddr
,
2990 adapter
->hw_tso6_ctxt
++;
2993 i
= tx_ring
->next_to_use
;
2995 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
2996 context_desc
= IXGBE_TX_CTXTDESC_ADV(*tx_ring
, i
);
2998 /* VLAN MACLEN IPLEN */
2999 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
3001 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
3002 vlan_macip_lens
|= ((skb_network_offset(skb
)) <<
3003 IXGBE_ADVTXD_MACLEN_SHIFT
);
3004 *hdr_len
+= skb_network_offset(skb
);
3006 (skb_transport_header(skb
) - skb_network_header(skb
));
3008 (skb_transport_header(skb
) - skb_network_header(skb
));
3009 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
3010 context_desc
->seqnum_seed
= 0;
3012 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3013 type_tucmd_mlhl
|= (IXGBE_TXD_CMD_DEXT
|
3014 IXGBE_ADVTXD_DTYP_CTXT
);
3016 if (skb
->protocol
== htons(ETH_P_IP
))
3017 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
3018 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
3019 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
3023 (skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
);
3024 mss_l4len_idx
|= (l4len
<< IXGBE_ADVTXD_L4LEN_SHIFT
);
3025 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
3027 tx_buffer_info
->time_stamp
= jiffies
;
3028 tx_buffer_info
->next_to_watch
= i
;
3031 if (i
== tx_ring
->count
)
3033 tx_ring
->next_to_use
= i
;
3040 static bool ixgbe_tx_csum(struct ixgbe_adapter
*adapter
,
3041 struct ixgbe_ring
*tx_ring
,
3042 struct sk_buff
*skb
, u32 tx_flags
)
3044 struct ixgbe_adv_tx_context_desc
*context_desc
;
3046 struct ixgbe_tx_buffer
*tx_buffer_info
;
3047 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
= 0;
3049 if (skb
->ip_summed
== CHECKSUM_PARTIAL
||
3050 (tx_flags
& IXGBE_TX_FLAGS_VLAN
)) {
3051 i
= tx_ring
->next_to_use
;
3052 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3053 context_desc
= IXGBE_TX_CTXTDESC_ADV(*tx_ring
, i
);
3055 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
3057 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
3058 vlan_macip_lens
|= (skb_network_offset(skb
) <<
3059 IXGBE_ADVTXD_MACLEN_SHIFT
);
3060 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
3061 vlan_macip_lens
|= (skb_transport_header(skb
) -
3062 skb_network_header(skb
));
3064 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
3065 context_desc
->seqnum_seed
= 0;
3067 type_tucmd_mlhl
|= (IXGBE_TXD_CMD_DEXT
|
3068 IXGBE_ADVTXD_DTYP_CTXT
);
3070 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
3071 switch (skb
->protocol
) {
3072 case __constant_htons(ETH_P_IP
):
3073 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
3074 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
)
3076 IXGBE_ADVTXD_TUCMD_L4T_TCP
;
3079 case __constant_htons(ETH_P_IPV6
):
3080 /* XXX what about other V6 headers?? */
3081 if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_TCP
)
3083 IXGBE_ADVTXD_TUCMD_L4T_TCP
;
3087 if (unlikely(net_ratelimit())) {
3088 DPRINTK(PROBE
, WARNING
,
3089 "partial checksum but proto=%x!\n",
3096 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
3097 context_desc
->mss_l4len_idx
= 0;
3099 tx_buffer_info
->time_stamp
= jiffies
;
3100 tx_buffer_info
->next_to_watch
= i
;
3101 adapter
->hw_csum_tx_good
++;
3103 if (i
== tx_ring
->count
)
3105 tx_ring
->next_to_use
= i
;
3112 static int ixgbe_tx_map(struct ixgbe_adapter
*adapter
,
3113 struct ixgbe_ring
*tx_ring
,
3114 struct sk_buff
*skb
, unsigned int first
)
3116 struct ixgbe_tx_buffer
*tx_buffer_info
;
3117 unsigned int len
= skb
->len
;
3118 unsigned int offset
= 0, size
, count
= 0, i
;
3119 unsigned int nr_frags
= skb_shinfo(skb
)->nr_frags
;
3122 len
-= skb
->data_len
;
3124 i
= tx_ring
->next_to_use
;
3127 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3128 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
3130 tx_buffer_info
->length
= size
;
3131 tx_buffer_info
->dma
= pci_map_single(adapter
->pdev
,
3133 size
, PCI_DMA_TODEVICE
);
3134 tx_buffer_info
->time_stamp
= jiffies
;
3135 tx_buffer_info
->next_to_watch
= i
;
3141 if (i
== tx_ring
->count
)
3145 for (f
= 0; f
< nr_frags
; f
++) {
3146 struct skb_frag_struct
*frag
;
3148 frag
= &skb_shinfo(skb
)->frags
[f
];
3150 offset
= frag
->page_offset
;
3153 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3154 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
3156 tx_buffer_info
->length
= size
;
3157 tx_buffer_info
->dma
= pci_map_page(adapter
->pdev
,
3160 size
, PCI_DMA_TODEVICE
);
3161 tx_buffer_info
->time_stamp
= jiffies
;
3162 tx_buffer_info
->next_to_watch
= i
;
3168 if (i
== tx_ring
->count
)
3173 i
= tx_ring
->count
- 1;
3176 tx_ring
->tx_buffer_info
[i
].skb
= skb
;
3177 tx_ring
->tx_buffer_info
[first
].next_to_watch
= i
;
3182 static void ixgbe_tx_queue(struct ixgbe_adapter
*adapter
,
3183 struct ixgbe_ring
*tx_ring
,
3184 int tx_flags
, int count
, u32 paylen
, u8 hdr_len
)
3186 union ixgbe_adv_tx_desc
*tx_desc
= NULL
;
3187 struct ixgbe_tx_buffer
*tx_buffer_info
;
3188 u32 olinfo_status
= 0, cmd_type_len
= 0;
3190 u32 txd_cmd
= IXGBE_TXD_CMD_EOP
| IXGBE_TXD_CMD_RS
| IXGBE_TXD_CMD_IFCS
;
3192 cmd_type_len
|= IXGBE_ADVTXD_DTYP_DATA
;
3194 cmd_type_len
|= IXGBE_ADVTXD_DCMD_IFCS
| IXGBE_ADVTXD_DCMD_DEXT
;
3196 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
3197 cmd_type_len
|= IXGBE_ADVTXD_DCMD_VLE
;
3199 if (tx_flags
& IXGBE_TX_FLAGS_TSO
) {
3200 cmd_type_len
|= IXGBE_ADVTXD_DCMD_TSE
;
3202 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
3203 IXGBE_ADVTXD_POPTS_SHIFT
;
3205 if (tx_flags
& IXGBE_TX_FLAGS_IPV4
)
3206 olinfo_status
|= IXGBE_TXD_POPTS_IXSM
<<
3207 IXGBE_ADVTXD_POPTS_SHIFT
;
3209 } else if (tx_flags
& IXGBE_TX_FLAGS_CSUM
)
3210 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
3211 IXGBE_ADVTXD_POPTS_SHIFT
;
3213 olinfo_status
|= ((paylen
- hdr_len
) << IXGBE_ADVTXD_PAYLEN_SHIFT
);
3215 i
= tx_ring
->next_to_use
;
3217 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3218 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, i
);
3219 tx_desc
->read
.buffer_addr
= cpu_to_le64(tx_buffer_info
->dma
);
3220 tx_desc
->read
.cmd_type_len
=
3221 cpu_to_le32(cmd_type_len
| tx_buffer_info
->length
);
3222 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
3225 if (i
== tx_ring
->count
)
3229 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(txd_cmd
);
3232 * Force memory writes to complete before letting h/w
3233 * know there are new descriptors to fetch. (Only
3234 * applicable for weak-ordered memory model archs,
3239 tx_ring
->next_to_use
= i
;
3240 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
3243 static int __ixgbe_maybe_stop_tx(struct net_device
*netdev
,
3244 struct ixgbe_ring
*tx_ring
, int size
)
3246 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3248 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
3249 /* Herbert's original patch had:
3250 * smp_mb__after_netif_stop_queue();
3251 * but since that doesn't exist yet, just open code it. */
3254 /* We need to check again in a case another CPU has just
3255 * made room available. */
3256 if (likely(IXGBE_DESC_UNUSED(tx_ring
) < size
))
3259 /* A reprieve! - use start_queue because it doesn't call schedule */
3260 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
3261 ++adapter
->restart_queue
;
3265 static int ixgbe_maybe_stop_tx(struct net_device
*netdev
,
3266 struct ixgbe_ring
*tx_ring
, int size
)
3268 if (likely(IXGBE_DESC_UNUSED(tx_ring
) >= size
))
3270 return __ixgbe_maybe_stop_tx(netdev
, tx_ring
, size
);
3274 static int ixgbe_xmit_frame(struct sk_buff
*skb
, struct net_device
*netdev
)
3276 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3277 struct ixgbe_ring
*tx_ring
;
3278 unsigned int len
= skb
->len
;
3280 unsigned int tx_flags
= 0;
3283 unsigned int mss
= 0;
3286 unsigned int nr_frags
= skb_shinfo(skb
)->nr_frags
;
3287 len
-= skb
->data_len
;
3288 r_idx
= (adapter
->num_tx_queues
- 1) & skb
->queue_mapping
;
3289 tx_ring
= &adapter
->tx_ring
[r_idx
];
3292 if (skb
->len
<= 0) {
3294 return NETDEV_TX_OK
;
3296 mss
= skb_shinfo(skb
)->gso_size
;
3300 else if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
3303 count
+= TXD_USE_COUNT(len
);
3304 for (f
= 0; f
< nr_frags
; f
++)
3305 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
3307 if (ixgbe_maybe_stop_tx(netdev
, tx_ring
, count
)) {
3309 return NETDEV_TX_BUSY
;
3311 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
3312 tx_flags
|= IXGBE_TX_FLAGS_VLAN
;
3313 tx_flags
|= (vlan_tx_tag_get(skb
) << IXGBE_TX_FLAGS_VLAN_SHIFT
);
3316 if (skb
->protocol
== htons(ETH_P_IP
))
3317 tx_flags
|= IXGBE_TX_FLAGS_IPV4
;
3318 first
= tx_ring
->next_to_use
;
3319 tso
= ixgbe_tso(adapter
, tx_ring
, skb
, tx_flags
, &hdr_len
);
3321 dev_kfree_skb_any(skb
);
3322 return NETDEV_TX_OK
;
3326 tx_flags
|= IXGBE_TX_FLAGS_TSO
;
3327 else if (ixgbe_tx_csum(adapter
, tx_ring
, skb
, tx_flags
) &&
3328 (skb
->ip_summed
== CHECKSUM_PARTIAL
))
3329 tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
3331 ixgbe_tx_queue(adapter
, tx_ring
, tx_flags
,
3332 ixgbe_tx_map(adapter
, tx_ring
, skb
, first
),
3335 netdev
->trans_start
= jiffies
;
3337 ixgbe_maybe_stop_tx(netdev
, tx_ring
, DESC_NEEDED
);
3339 return NETDEV_TX_OK
;
3343 * ixgbe_get_stats - Get System Network Statistics
3344 * @netdev: network interface device structure
3346 * Returns the address of the device statistics structure.
3347 * The statistics are actually updated from the timer callback.
3349 static struct net_device_stats
*ixgbe_get_stats(struct net_device
*netdev
)
3351 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3353 /* only return the current stats */
3354 return &adapter
->net_stats
;
3358 * ixgbe_set_mac - Change the Ethernet Address of the NIC
3359 * @netdev: network interface device structure
3360 * @p: pointer to an address structure
3362 * Returns 0 on success, negative on failure
3364 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
3366 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3367 struct sockaddr
*addr
= p
;
3369 if (!is_valid_ether_addr(addr
->sa_data
))
3370 return -EADDRNOTAVAIL
;
3372 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
3373 memcpy(adapter
->hw
.mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
3375 ixgbe_set_rar(&adapter
->hw
, 0, adapter
->hw
.mac
.addr
, 0, IXGBE_RAH_AV
);
3380 #ifdef CONFIG_NET_POLL_CONTROLLER
3382 * Polling 'interrupt' - used by things like netconsole to send skbs
3383 * without having to re-enable interrupts. It's not called while
3384 * the interrupt routine is executing.
3386 static void ixgbe_netpoll(struct net_device
*netdev
)
3388 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3390 disable_irq(adapter
->pdev
->irq
);
3391 adapter
->flags
|= IXGBE_FLAG_IN_NETPOLL
;
3392 ixgbe_intr(adapter
->pdev
->irq
, netdev
);
3393 adapter
->flags
&= ~IXGBE_FLAG_IN_NETPOLL
;
3394 enable_irq(adapter
->pdev
->irq
);
3399 * ixgbe_napi_add_all - prep napi structs for use
3400 * @adapter: private struct
3401 * helper function to napi_add each possible q_vector->napi
3403 static void ixgbe_napi_add_all(struct ixgbe_adapter
*adapter
)
3405 int i
, q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
3406 int (*poll
)(struct napi_struct
*, int);
3408 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3409 poll
= &ixgbe_clean_rxonly
;
3412 /* only one q_vector for legacy modes */
3416 for (i
= 0; i
< q_vectors
; i
++) {
3417 struct ixgbe_q_vector
*q_vector
= &adapter
->q_vector
[i
];
3418 netif_napi_add(adapter
->netdev
, &q_vector
->napi
,
3424 * ixgbe_probe - Device Initialization Routine
3425 * @pdev: PCI device information struct
3426 * @ent: entry in ixgbe_pci_tbl
3428 * Returns 0 on success, negative on failure
3430 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
3431 * The OS initialization, configuring of the adapter private structure,
3432 * and a hardware reset occur.
3434 static int __devinit
ixgbe_probe(struct pci_dev
*pdev
,
3435 const struct pci_device_id
*ent
)
3437 struct net_device
*netdev
;
3438 struct ixgbe_adapter
*adapter
= NULL
;
3439 struct ixgbe_hw
*hw
;
3440 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
3441 unsigned long mmio_start
, mmio_len
;
3442 static int cards_found
;
3443 int i
, err
, pci_using_dac
;
3444 u16 link_status
, link_speed
, link_width
;
3447 err
= pci_enable_device(pdev
);
3451 if (!pci_set_dma_mask(pdev
, DMA_64BIT_MASK
) &&
3452 !pci_set_consistent_dma_mask(pdev
, DMA_64BIT_MASK
)) {
3455 err
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
3457 err
= pci_set_consistent_dma_mask(pdev
, DMA_32BIT_MASK
);
3459 dev_err(&pdev
->dev
, "No usable DMA "
3460 "configuration, aborting\n");
3467 err
= pci_request_regions(pdev
, ixgbe_driver_name
);
3469 dev_err(&pdev
->dev
, "pci_request_regions failed 0x%x\n", err
);
3473 pci_set_master(pdev
);
3474 pci_save_state(pdev
);
3476 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), MAX_TX_QUEUES
);
3479 goto err_alloc_etherdev
;
3482 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
3484 pci_set_drvdata(pdev
, netdev
);
3485 adapter
= netdev_priv(netdev
);
3487 adapter
->netdev
= netdev
;
3488 adapter
->pdev
= pdev
;
3491 adapter
->msg_enable
= (1 << DEFAULT_DEBUG_LEVEL_SHIFT
) - 1;
3493 mmio_start
= pci_resource_start(pdev
, 0);
3494 mmio_len
= pci_resource_len(pdev
, 0);
3496 hw
->hw_addr
= ioremap(mmio_start
, mmio_len
);
3502 for (i
= 1; i
<= 5; i
++) {
3503 if (pci_resource_len(pdev
, i
) == 0)
3507 netdev
->open
= &ixgbe_open
;
3508 netdev
->stop
= &ixgbe_close
;
3509 netdev
->hard_start_xmit
= &ixgbe_xmit_frame
;
3510 netdev
->get_stats
= &ixgbe_get_stats
;
3511 netdev
->set_rx_mode
= &ixgbe_set_rx_mode
;
3512 netdev
->set_multicast_list
= &ixgbe_set_rx_mode
;
3513 netdev
->set_mac_address
= &ixgbe_set_mac
;
3514 netdev
->change_mtu
= &ixgbe_change_mtu
;
3515 ixgbe_set_ethtool_ops(netdev
);
3516 netdev
->tx_timeout
= &ixgbe_tx_timeout
;
3517 netdev
->watchdog_timeo
= 5 * HZ
;
3518 netdev
->vlan_rx_register
= ixgbe_vlan_rx_register
;
3519 netdev
->vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
;
3520 netdev
->vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
;
3521 #ifdef CONFIG_NET_POLL_CONTROLLER
3522 netdev
->poll_controller
= ixgbe_netpoll
;
3524 strcpy(netdev
->name
, pci_name(pdev
));
3526 netdev
->mem_start
= mmio_start
;
3527 netdev
->mem_end
= mmio_start
+ mmio_len
;
3529 adapter
->bd_number
= cards_found
;
3531 /* PCI config space info */
3532 hw
->vendor_id
= pdev
->vendor
;
3533 hw
->device_id
= pdev
->device
;
3534 hw
->revision_id
= pdev
->revision
;
3535 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
3536 hw
->subsystem_device_id
= pdev
->subsystem_device
;
3539 memcpy(&hw
->mac
.ops
, ii
->mac_ops
, sizeof(hw
->mac
.ops
));
3540 hw
->mac
.type
= ii
->mac
;
3542 err
= ii
->get_invariants(hw
);
3546 /* setup the private structure */
3547 err
= ixgbe_sw_init(adapter
);
3551 netdev
->features
= NETIF_F_SG
|
3553 NETIF_F_HW_VLAN_TX
|
3554 NETIF_F_HW_VLAN_RX
|
3555 NETIF_F_HW_VLAN_FILTER
;
3557 netdev
->features
|= NETIF_F_LRO
;
3558 netdev
->features
|= NETIF_F_TSO
;
3559 netdev
->features
|= NETIF_F_TSO6
;
3561 netdev
->vlan_features
|= NETIF_F_TSO
;
3562 netdev
->vlan_features
|= NETIF_F_TSO6
;
3563 netdev
->vlan_features
|= NETIF_F_HW_CSUM
;
3564 netdev
->vlan_features
|= NETIF_F_SG
;
3567 netdev
->features
|= NETIF_F_HIGHDMA
;
3569 /* make sure the EEPROM is good */
3570 if (ixgbe_validate_eeprom_checksum(hw
, NULL
) < 0) {
3571 dev_err(&pdev
->dev
, "The EEPROM Checksum Is Not Valid\n");
3576 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
3577 memcpy(netdev
->perm_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
3579 if (ixgbe_validate_mac_addr(netdev
->dev_addr
)) {
3584 init_timer(&adapter
->watchdog_timer
);
3585 adapter
->watchdog_timer
.function
= &ixgbe_watchdog
;
3586 adapter
->watchdog_timer
.data
= (unsigned long)adapter
;
3588 INIT_WORK(&adapter
->reset_task
, ixgbe_reset_task
);
3590 /* initialize default flow control settings */
3591 hw
->fc
.original_type
= ixgbe_fc_full
;
3592 hw
->fc
.type
= ixgbe_fc_full
;
3593 hw
->fc
.high_water
= IXGBE_DEFAULT_FCRTH
;
3594 hw
->fc
.low_water
= IXGBE_DEFAULT_FCRTL
;
3595 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
3597 err
= ixgbe_init_interrupt_scheme(adapter
);
3601 /* print bus type/speed/width info */
3602 pci_read_config_word(pdev
, IXGBE_PCI_LINK_STATUS
, &link_status
);
3603 link_speed
= link_status
& IXGBE_PCI_LINK_SPEED
;
3604 link_width
= link_status
& IXGBE_PCI_LINK_WIDTH
;
3605 dev_info(&pdev
->dev
, "(PCI Express:%s:%s) "
3606 "%02x:%02x:%02x:%02x:%02x:%02x\n",
3607 ((link_speed
== IXGBE_PCI_LINK_SPEED_5000
) ? "5.0Gb/s" :
3608 (link_speed
== IXGBE_PCI_LINK_SPEED_2500
) ? "2.5Gb/s" :
3610 ((link_width
== IXGBE_PCI_LINK_WIDTH_8
) ? "Width x8" :
3611 (link_width
== IXGBE_PCI_LINK_WIDTH_4
) ? "Width x4" :
3612 (link_width
== IXGBE_PCI_LINK_WIDTH_2
) ? "Width x2" :
3613 (link_width
== IXGBE_PCI_LINK_WIDTH_1
) ? "Width x1" :
3615 netdev
->dev_addr
[0], netdev
->dev_addr
[1], netdev
->dev_addr
[2],
3616 netdev
->dev_addr
[3], netdev
->dev_addr
[4], netdev
->dev_addr
[5]);
3617 ixgbe_read_part_num(hw
, &part_num
);
3618 dev_info(&pdev
->dev
, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
3619 hw
->mac
.type
, hw
->phy
.type
,
3620 (part_num
>> 8), (part_num
& 0xff));
3622 if (link_width
<= IXGBE_PCI_LINK_WIDTH_4
) {
3623 dev_warn(&pdev
->dev
, "PCI-Express bandwidth available for "
3624 "this card is not sufficient for optimal "
3626 dev_warn(&pdev
->dev
, "For optimal performance a x8 "
3627 "PCI-Express slot is required.\n");
3630 /* reset the hardware with the new settings */
3633 netif_carrier_off(netdev
);
3634 netif_tx_stop_all_queues(netdev
);
3636 ixgbe_napi_add_all(adapter
);
3638 strcpy(netdev
->name
, "eth%d");
3639 err
= register_netdev(netdev
);
3644 if (dca_add_requester(&pdev
->dev
) == 0) {
3645 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
3646 /* always use CB2 mode, difference is masked
3647 * in the CB driver */
3648 IXGBE_WRITE_REG(hw
, IXGBE_DCA_CTRL
, 2);
3649 ixgbe_setup_dca(adapter
);
3653 dev_info(&pdev
->dev
, "Intel(R) 10 Gigabit Network Connection\n");
3658 ixgbe_release_hw_control(adapter
);
3661 ixgbe_reset_interrupt_capability(adapter
);
3663 iounmap(hw
->hw_addr
);
3665 free_netdev(netdev
);
3667 pci_release_regions(pdev
);
3670 pci_disable_device(pdev
);
3675 * ixgbe_remove - Device Removal Routine
3676 * @pdev: PCI device information struct
3678 * ixgbe_remove is called by the PCI subsystem to alert the driver
3679 * that it should release a PCI device. The could be caused by a
3680 * Hot-Plug event, or because the driver is going to be removed from
3683 static void __devexit
ixgbe_remove(struct pci_dev
*pdev
)
3685 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3686 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3688 set_bit(__IXGBE_DOWN
, &adapter
->state
);
3689 del_timer_sync(&adapter
->watchdog_timer
);
3691 flush_scheduled_work();
3694 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
3695 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
3696 dca_remove_requester(&pdev
->dev
);
3697 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
3701 unregister_netdev(netdev
);
3703 ixgbe_reset_interrupt_capability(adapter
);
3705 ixgbe_release_hw_control(adapter
);
3707 iounmap(adapter
->hw
.hw_addr
);
3708 pci_release_regions(pdev
);
3710 DPRINTK(PROBE
, INFO
, "complete\n");
3711 kfree(adapter
->tx_ring
);
3712 kfree(adapter
->rx_ring
);
3714 free_netdev(netdev
);
3716 pci_disable_device(pdev
);
3720 * ixgbe_io_error_detected - called when PCI error is detected
3721 * @pdev: Pointer to PCI device
3722 * @state: The current pci connection state
3724 * This function is called after a PCI bus error affecting
3725 * this device has been detected.
3727 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
3728 pci_channel_state_t state
)
3730 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3731 struct ixgbe_adapter
*adapter
= netdev
->priv
;
3733 netif_device_detach(netdev
);
3735 if (netif_running(netdev
))
3736 ixgbe_down(adapter
);
3737 pci_disable_device(pdev
);
3739 /* Request a slot slot reset. */
3740 return PCI_ERS_RESULT_NEED_RESET
;
3744 * ixgbe_io_slot_reset - called after the pci bus has been reset.
3745 * @pdev: Pointer to PCI device
3747 * Restart the card from scratch, as if from a cold-boot.
3749 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
3751 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3752 struct ixgbe_adapter
*adapter
= netdev
->priv
;
3754 if (pci_enable_device(pdev
)) {
3756 "Cannot re-enable PCI device after reset.\n");
3757 return PCI_ERS_RESULT_DISCONNECT
;
3759 pci_set_master(pdev
);
3760 pci_restore_state(pdev
);
3762 pci_enable_wake(pdev
, PCI_D3hot
, 0);
3763 pci_enable_wake(pdev
, PCI_D3cold
, 0);
3765 ixgbe_reset(adapter
);
3767 return PCI_ERS_RESULT_RECOVERED
;
3771 * ixgbe_io_resume - called when traffic can start flowing again.
3772 * @pdev: Pointer to PCI device
3774 * This callback is called when the error recovery driver tells us that
3775 * its OK to resume normal operation.
3777 static void ixgbe_io_resume(struct pci_dev
*pdev
)
3779 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3780 struct ixgbe_adapter
*adapter
= netdev
->priv
;
3782 if (netif_running(netdev
)) {
3783 if (ixgbe_up(adapter
)) {
3784 DPRINTK(PROBE
, INFO
, "ixgbe_up failed after reset\n");
3789 netif_device_attach(netdev
);
3793 static struct pci_error_handlers ixgbe_err_handler
= {
3794 .error_detected
= ixgbe_io_error_detected
,
3795 .slot_reset
= ixgbe_io_slot_reset
,
3796 .resume
= ixgbe_io_resume
,
3799 static struct pci_driver ixgbe_driver
= {
3800 .name
= ixgbe_driver_name
,
3801 .id_table
= ixgbe_pci_tbl
,
3802 .probe
= ixgbe_probe
,
3803 .remove
= __devexit_p(ixgbe_remove
),
3805 .suspend
= ixgbe_suspend
,
3806 .resume
= ixgbe_resume
,
3808 .shutdown
= ixgbe_shutdown
,
3809 .err_handler
= &ixgbe_err_handler
3813 * ixgbe_init_module - Driver Registration Routine
3815 * ixgbe_init_module is the first routine called when the driver is
3816 * loaded. All it does is register with the PCI subsystem.
3818 static int __init
ixgbe_init_module(void)
3821 printk(KERN_INFO
"%s: %s - version %s\n", ixgbe_driver_name
,
3822 ixgbe_driver_string
, ixgbe_driver_version
);
3824 printk(KERN_INFO
"%s: %s\n", ixgbe_driver_name
, ixgbe_copyright
);
3827 dca_register_notify(&dca_notifier
);
3830 ret
= pci_register_driver(&ixgbe_driver
);
3833 module_init(ixgbe_init_module
);
3836 * ixgbe_exit_module - Driver Exit Cleanup Routine
3838 * ixgbe_exit_module is called just before the driver is removed
3841 static void __exit
ixgbe_exit_module(void)
3844 dca_unregister_notify(&dca_notifier
);
3846 pci_unregister_driver(&ixgbe_driver
);
3850 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
3855 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
3856 __ixgbe_notify_dca
);
3858 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
3860 #endif /* CONFIG_DCA */
3862 module_exit(ixgbe_exit_module
);