drivers/media/video/em28xx/em28xx-core.c

   1 /*
   2    em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
   3
   4    Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
   5                       Markus Rechberger <mrechberger@gmail.com>
   6                       Mauro Carvalho Chehab <mchehab@infradead.org>
   7                       Sascha Sommer <saschasommer@freenet.de>
   8
   9    This program is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 2 of the License, or
  12    (at your option) any later version.
  13
  14    This program is distributed in the hope that it will be useful,
  15    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17    GNU General Public License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with this program; if not, write to the Free Software
  21    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  */
  23
  24 #include <linux/init.h>
  25 #include <linux/list.h>
  26 #include <linux/module.h>
  27 #include <linux/usb.h>
  28 #include <linux/vmalloc.h>
  29
  30 #include "em28xx.h"
  31
  32 /* #define ENABLE_DEBUG_ISOC_FRAMES */
  33
  34 static unsigned int core_debug;
  35 module_param(core_debug,int,0644);
  36 MODULE_PARM_DESC(core_debug,"enable debug messages [core]");
  37
  38 #define em28xx_coredbg(fmt, arg...) do {\
  39         if (core_debug) \
  40                 printk(KERN_INFO "%s %s :"fmt, \
  41                          dev->name, __func__ , ##arg); } while (0)
  42
  43 static unsigned int reg_debug;
  44 module_param(reg_debug,int,0644);
  45 MODULE_PARM_DESC(reg_debug,"enable debug messages [URB reg]");
  46
  47 #define em28xx_regdbg(fmt, arg...) do {\
  48         if (reg_debug) \
  49                 printk(KERN_INFO "%s %s :"fmt, \
  50                          dev->name, __func__ , ##arg); } while (0)
  51
  52 static int alt = EM28XX_PINOUT;
  53 module_param(alt, int, 0644);
  54 MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
  55
  56 /* FIXME */
  57 #define em28xx_isocdbg(fmt, arg...) do {\
  58         if (core_debug) \
  59                 printk(KERN_INFO "%s %s :"fmt, \
  60                          dev->name, __func__ , ##arg); } while (0)
  61
  62 /*
  63  * em28xx_read_reg_req()
  64  * reads data from the usb device specifying bRequest
  65  */
  66 int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
  67                                    char *buf, int len)
  68 {
  69         int ret, byte;
  70
  71         if (dev->state & DEV_DISCONNECTED)
  72                 return -ENODEV;
  73
  74         if (len > URB_MAX_CTRL_SIZE)
  75                 return -EINVAL;
  76
  77         em28xx_regdbg("req=%02x, reg=%02x ", req, reg);
  78
  79         mutex_lock(&dev->ctrl_urb_lock);
  80         ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), req,
  81                               USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  82                               0x0000, reg, dev->urb_buf, len, HZ);
  83         if (ret < 0) {
  84                 if (reg_debug)
  85                         printk(" failed!\n");
  86                 mutex_unlock(&dev->ctrl_urb_lock);
  87                 return ret;
  88         }
  89
  90         if (len)
  91                 memcpy(buf, dev->urb_buf, len);
  92
  93         mutex_unlock(&dev->ctrl_urb_lock);
  94
  95         if (reg_debug) {
  96                 printk("%02x values: ", ret);
  97                 for (byte = 0; byte < len; byte++)
  98                         printk(" %02x", (unsigned char)buf[byte]);
  99                 printk("\n");
 100         }
 101
 102         return ret;
 103 }
 104
 105 /*
 106  * em28xx_read_reg_req()
 107  * reads data from the usb device specifying bRequest
 108  */
 109 int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
 110 {
 111         u8 val;
 112         int ret;
 113
 114         if (dev->state & DEV_DISCONNECTED)
 115                 return(-ENODEV);
 116
 117         em28xx_regdbg("req=%02x, reg=%02x:", req, reg);
 118
 119         mutex_lock(&dev->ctrl_urb_lock);
 120         ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), req,
 121                               USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 122                               0x0000, reg, dev->urb_buf, 1, HZ);
 123         val = dev->urb_buf[0];
 124         mutex_unlock(&dev->ctrl_urb_lock);
 125
 126         if (ret < 0) {
 127                 printk(" failed!\n");
 128                 return ret;
 129         }
 130
 131         if (reg_debug)
 132                 printk("%02x\n", (unsigned char) val);
 133
 134         return val;
 135 }
 136
 137 int em28xx_read_reg(struct em28xx *dev, u16 reg)
 138 {
 139         return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
 140 }
 141
 142 /*
 143  * em28xx_write_regs_req()
 144  * sends data to the usb device, specifying bRequest
 145  */
 146 int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
 147                                  int len)
 148 {
 149         int ret;
 150
 151         if (dev->state & DEV_DISCONNECTED)
 152                 return -ENODEV;
 153
 154         if ((len < 1) || (len > URB_MAX_CTRL_SIZE))
 155                 return -EINVAL;
 156
 157         em28xx_regdbg("req=%02x reg=%02x:", req, reg);
 158         if (reg_debug) {
 159                 int i;
 160                 for (i = 0; i < len; ++i)
 161                         printk(" %02x", (unsigned char)buf[i]);
 162                 printk("\n");
 163         }
 164
 165         mutex_lock(&dev->ctrl_urb_lock);
 166         memcpy(dev->urb_buf, buf, len);
 167         ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), req,
 168                               USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 169                               0x0000, reg, dev->urb_buf, len, HZ);
 170         mutex_unlock(&dev->ctrl_urb_lock);
 171
 172         if (dev->wait_after_write)
 173                 msleep(dev->wait_after_write);
 174
 175         return ret;
 176 }
 177
 178 int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
 179 {
 180         int rc;
 181
 182         rc = em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
 183
 184         /* Stores GPO/GPIO values at the cache, if changed
 185            Only write values should be stored, since input on a GPIO
 186            register will return the input bits.
 187            Not sure what happens on reading GPO register.
 188          */
 189         if (rc >= 0) {
 190                 if (reg == dev->reg_gpo_num)
 191                         dev->reg_gpo = buf[0];
 192                 else if (reg == dev->reg_gpio_num)
 193                         dev->reg_gpio = buf[0];
 194         }
 195
 196         return rc;
 197 }
 198
 199 /* Write a single register */
 200 int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val)
 201 {
 202         return em28xx_write_regs(dev, reg, &val, 1);
 203 }
 204
 205 /*
 206  * em28xx_write_reg_bits()
 207  * sets only some bits (specified by bitmask) of a register, by first reading
 208  * the actual value
 209  */
 210 static int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
 211                                  u8 bitmask)
 212 {
 213         int oldval;
 214         u8 newval;
 215
 216         /* Uses cache for gpo/gpio registers */
 217         if (reg == dev->reg_gpo_num)
 218                 oldval = dev->reg_gpo;
 219         else if (reg == dev->reg_gpio_num)
 220                 oldval = dev->reg_gpio;
 221         else
 222                 oldval = em28xx_read_reg(dev, reg);
 223
 224         if (oldval < 0)
 225                 return oldval;
 226
 227         newval = (((u8) oldval) & ~bitmask) | (val & bitmask);
 228
 229         return em28xx_write_regs(dev, reg, &newval, 1);
 230 }
 231
 232 /*
 233  * em28xx_is_ac97_ready()
 234  * Checks if ac97 is ready
 235  */
 236 static int em28xx_is_ac97_ready(struct em28xx *dev)
 237 {
 238         int ret, i;
 239
 240         /* Wait up to 50 ms for AC97 command to complete */
 241         for (i = 0; i < 10; i++, msleep(5)) {
 242                 ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY);
 243                 if (ret < 0)
 244                         return ret;
 245
 246                 if (!(ret & 0x01))
 247                         return 0;
 248         }
 249
 250         em28xx_warn("AC97 command still being executed: not handled properly!\n");
 251         return -EBUSY;
 252 }
 253
 254 /*
 255  * em28xx_read_ac97()
 256  * write a 16 bit value to the specified AC97 address (LSB first!)
 257  */
 258 static int em28xx_read_ac97(struct em28xx *dev, u8 reg)
 259 {
 260         int ret;
 261         u8 addr = (reg & 0x7f) | 0x80;
 262         u16 val;
 263
 264         ret = em28xx_is_ac97_ready(dev);
 265         if (ret < 0)
 266                 return ret;
 267
 268         ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
 269         if (ret < 0)
 270                 return ret;
 271
 272         ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB,
 273                                            (u8 *)&val, sizeof(val));
 274
 275         if (ret < 0)
 276                 return ret;
 277         return le16_to_cpu(val);
 278 }
 279
 280 /*
 281  * em28xx_write_ac97()
 282  * write a 16 bit value to the specified AC97 address (LSB first!)
 283  */
 284 static int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val)
 285 {
 286         int ret;
 287         u8 addr = reg & 0x7f;
 288         __le16 value;
 289
 290         value = cpu_to_le16(val);
 291
 292         ret = em28xx_is_ac97_ready(dev);
 293         if (ret < 0)
 294                 return ret;
 295
 296         ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *) &value, 2);
 297         if (ret < 0)
 298                 return ret;
 299
 300         ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
 301         if (ret < 0)
 302                 return ret;
 303
 304         return 0;
 305 }
 306
 307 struct em28xx_input_table {
 308         enum em28xx_amux amux;
 309         u8               reg;
 310 };
 311
 312 static struct em28xx_input_table inputs[] = {
 313         { EM28XX_AMUX_VIDEO,    AC97_VIDEO_VOL   },
 314         { EM28XX_AMUX_LINE_IN,  AC97_LINEIN_VOL  },
 315         { EM28XX_AMUX_PHONE,    AC97_PHONE_VOL   },
 316         { EM28XX_AMUX_MIC,      AC97_MIC_VOL     },
 317         { EM28XX_AMUX_CD,       AC97_CD_VOL      },
 318         { EM28XX_AMUX_AUX,      AC97_AUX_VOL     },
 319         { EM28XX_AMUX_PCM_OUT,  AC97_PCM_OUT_VOL },
 320 };
 321
 322 static int set_ac97_input(struct em28xx *dev)
 323 {
 324         int ret, i;
 325         enum em28xx_amux amux = dev->ctl_ainput;
 326
 327         /* EM28XX_AMUX_VIDEO2 is a special case used to indicate that
 328            em28xx should point to LINE IN, while AC97 should use VIDEO
 329          */
 330         if (amux == EM28XX_AMUX_VIDEO2)
 331                 amux = EM28XX_AMUX_VIDEO;
 332
 333         /* Mute all entres but the one that were selected */
 334         for (i = 0; i < ARRAY_SIZE(inputs); i++) {
 335                 if (amux == inputs[i].amux)
 336                         ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808);
 337                 else
 338                         ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000);
 339
 340                 if (ret < 0)
 341                         em28xx_warn("couldn't setup AC97 register %d\n",
 342                                      inputs[i].reg);
 343         }
 344         return 0;
 345 }
 346
 347 static int em28xx_set_audio_source(struct em28xx *dev)
 348 {
 349         int ret;
 350         u8 input;
 351
 352         if (dev->is_em2800) {
 353                 if (dev->ctl_ainput == EM28XX_AMUX_VIDEO)
 354                         input = EM2800_AUDIO_SRC_TUNER;
 355                 else
 356                         input = EM2800_AUDIO_SRC_LINE;
 357
 358                 ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1);
 359                 if (ret < 0)
 360                         return ret;
 361         }
 362
 363         if (dev->has_msp34xx)
 364                 input = EM28XX_AUDIO_SRC_TUNER;
 365         else {
 366                 switch (dev->ctl_ainput) {
 367                 case EM28XX_AMUX_VIDEO:
 368                         input = EM28XX_AUDIO_SRC_TUNER;
 369                         break;
 370                 default:
 371                         input = EM28XX_AUDIO_SRC_LINE;
 372                         break;
 373                 }
 374         }
 375
 376         ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0);
 377         if (ret < 0)
 378                 return ret;
 379         msleep(5);
 380
 381         switch (dev->audio_mode.ac97) {
 382         case EM28XX_NO_AC97:
 383                 break;
 384         default:
 385                 ret = set_ac97_input(dev);
 386         }
 387
 388         return ret;
 389 }
 390
 391 static int outputs[] = {
 392         [EM28XX_AOUT_MASTER] = AC97_MASTER_VOL,
 393         [EM28XX_AOUT_LINE]   = AC97_LINE_LEVEL_VOL,
 394         [EM28XX_AOUT_MONO]   = AC97_MASTER_MONO_VOL,
 395         [EM28XX_AOUT_LFE]    = AC97_LFE_MASTER_VOL,
 396         [EM28XX_AOUT_SURR]   = AC97_SURR_MASTER_VOL,
 397 };
 398
 399 int em28xx_audio_analog_set(struct em28xx *dev)
 400 {
 401         int ret, i;
 402         u8 xclk = 0x07;
 403
 404         if (!dev->audio_mode.has_audio)
 405                 return 0;
 406
 407         /* It is assumed that all devices use master volume for output.
 408            It would be possible to use also line output.
 409          */
 410         if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
 411                 /* Mute all outputs */
 412                 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
 413                         ret = em28xx_write_ac97(dev, outputs[i], 0x8000);
 414                         if (ret < 0)
 415                                 em28xx_warn("couldn't setup AC97 register %d\n",
 416                                      outputs[i]);
 417                 }
 418         }
 419
 420         if (dev->has_12mhz_i2s)
 421                 xclk |= 0x20;
 422
 423         if (!dev->mute)
 424                 xclk |= 0x80;
 425
 426         ret = em28xx_write_reg_bits(dev, EM28XX_R0F_XCLK, xclk, 0xa7);
 427         if (ret < 0)
 428                 return ret;
 429         msleep(10);
 430
 431         /* Selects the proper audio input */
 432         ret = em28xx_set_audio_source(dev);
 433
 434         /* Sets volume */
 435         if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
 436                 int vol;
 437
 438                 /* LSB: left channel - both channels with the same level */
 439                 vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8);
 440
 441                 /* Mute device, if needed */
 442                 if (dev->mute)
 443                         vol |= 0x8000;
 444
 445                 /* Sets volume */
 446                 ret = em28xx_write_ac97(dev, outputs[dev->ctl_aoutput], vol);
 447         }
 448
 449         return ret;
 450 }
 451 EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
 452
 453 int em28xx_audio_setup(struct em28xx *dev)
 454 {
 455         int vid1, vid2, feat, cfg;
 456         u32 vid;
 457
 458         if (dev->chip_id == CHIP_ID_EM2874) {
 459                 /* Digital only device - don't load any alsa module */
 460                 dev->audio_mode.has_audio = 0;
 461                 dev->has_audio_class = 0;
 462                 dev->has_alsa_audio = 0;
 463                 return 0;
 464         }
 465
 466         /* If device doesn't support Usb Audio Class, use vendor class */
 467         if (!dev->has_audio_class)
 468                 dev->has_alsa_audio = 1;
 469
 470         dev->audio_mode.has_audio = 1;
 471
 472         /* See how this device is configured */
 473         cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG);
 474         if (cfg < 0)
 475                 cfg = EM28XX_CHIPCFG_AC97; /* Be conservative */
 476         else
 477                 em28xx_info("Config register raw data: 0x%02x\n", cfg);
 478
 479         if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
 480                     EM28XX_CHIPCFG_I2S_3_SAMPRATES) {
 481                 em28xx_info("I2S Audio (3 sample rates)\n");
 482                 dev->audio_mode.i2s_3rates = 1;
 483         }
 484         if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
 485                     EM28XX_CHIPCFG_I2S_5_SAMPRATES) {
 486                 em28xx_info("I2S Audio (5 sample rates)\n");
 487                 dev->audio_mode.i2s_5rates = 1;
 488         }
 489
 490         if (!(cfg & EM28XX_CHIPCFG_AC97)) {
 491                 dev->audio_mode.ac97 = EM28XX_NO_AC97;
 492                 goto init_audio;
 493         }
 494
 495         dev->audio_mode.ac97 = EM28XX_AC97_OTHER;
 496
 497         vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1);
 498         if (vid1 < 0) {
 499                 /* Device likely doesn't support AC97 */
 500                 em28xx_warn("AC97 chip type couldn't be determined\n");
 501                 goto init_audio;
 502         }
 503
 504         vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2);
 505         if (vid2 < 0)
 506                 goto init_audio;
 507
 508         vid = vid1 << 16 | vid2;
 509
 510         dev->audio_mode.ac97_vendor_id = vid;
 511         em28xx_warn("AC97 vendor ID = 0x%08x\n", vid);
 512
 513         feat = em28xx_read_ac97(dev, AC97_RESET);
 514         if (feat < 0)
 515                 goto init_audio;
 516
 517         dev->audio_mode.ac97_feat = feat;
 518         em28xx_warn("AC97 features = 0x%04x\n", feat);
 519
 520         /* Try to identify what audio processor we have */
 521         if ((vid == 0xffffffff) && (feat == 0x6a90))
 522                 dev->audio_mode.ac97 = EM28XX_AC97_EM202;
 523
 524 init_audio:
 525         /* Reports detected AC97 processor */
 526         switch (dev->audio_mode.ac97) {
 527         case EM28XX_NO_AC97:
 528                 em28xx_info("No AC97 audio processor\n");
 529                 break;
 530         case EM28XX_AC97_EM202:
 531                 em28xx_info("Empia 202 AC97 audio processor detected\n");
 532                 break;
 533         case EM28XX_AC97_OTHER:
 534                 em28xx_warn("Unknown AC97 audio processor detected!\n");
 535                 break;
 536         default:
 537                 break;
 538         }
 539
 540         return em28xx_audio_analog_set(dev);
 541 }
 542 EXPORT_SYMBOL_GPL(em28xx_audio_setup);
 543
 544 int em28xx_colorlevels_set_default(struct em28xx *dev)
 545 {
 546         em28xx_write_regs(dev, EM28XX_R20_YGAIN, "\x10", 1);    /* contrast */
 547         em28xx_write_regs(dev, EM28XX_R21_YOFFSET, "\x00", 1);  /* brightness */
 548         em28xx_write_regs(dev, EM28XX_R22_UVGAIN, "\x10", 1);   /* saturation */
 549         em28xx_write_regs(dev, EM28XX_R23_UOFFSET, "\x00", 1);
 550         em28xx_write_regs(dev, EM28XX_R24_VOFFSET, "\x00", 1);
 551         em28xx_write_regs(dev, EM28XX_R25_SHARPNESS, "\x00", 1);
 552
 553         em28xx_write_regs(dev, EM28XX_R14_GAMMA, "\x20", 1);
 554         em28xx_write_regs(dev, EM28XX_R15_RGAIN, "\x20", 1);
 555         em28xx_write_regs(dev, EM28XX_R16_GGAIN, "\x20", 1);
 556         em28xx_write_regs(dev, EM28XX_R17_BGAIN, "\x20", 1);
 557         em28xx_write_regs(dev, EM28XX_R18_ROFFSET, "\x00", 1);
 558         em28xx_write_regs(dev, EM28XX_R19_GOFFSET, "\x00", 1);
 559         return em28xx_write_regs(dev, EM28XX_R1A_BOFFSET, "\x00", 1);
 560 }
 561
 562 int em28xx_capture_start(struct em28xx *dev, int start)
 563 {
 564         int rc;
 565
 566         if (dev->chip_id == CHIP_ID_EM2874) {
 567                 /* The Transport Stream Enable Register moved in em2874 */
 568                 if (!start) {
 569                         rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
 570                                                    0x00,
 571                                                    EM2874_TS1_CAPTURE_ENABLE);
 572                         return rc;
 573                 }
 574
 575                 /* Enable Transport Stream */
 576                 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
 577                                            EM2874_TS1_CAPTURE_ENABLE,
 578                                            EM2874_TS1_CAPTURE_ENABLE);
 579                 return rc;
 580         }
 581
 582
 583         /* FIXME: which is the best order? */
 584         /* video registers are sampled by VREF */
 585         rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP,
 586                                    start ? 0x10 : 0x00, 0x10);
 587         if (rc < 0)
 588                 return rc;
 589
 590         if (!start) {
 591                 /* disable video capture */
 592                 rc = em28xx_write_regs(dev, EM28XX_R12_VINENABLE, "\x27", 1);
 593                 return rc;
 594         }
 595
 596         /* enable video capture */
 597         rc = em28xx_write_regs_req(dev, 0x00, 0x48, "\x00", 1);
 598
 599         if (dev->mode == EM28XX_ANALOG_MODE)
 600                 rc = em28xx_write_regs(dev, EM28XX_R12_VINENABLE, "\x67", 1);
 601         else
 602                 rc = em28xx_write_regs(dev, EM28XX_R12_VINENABLE, "\x37", 1);
 603
 604         msleep(6);
 605
 606         return rc;
 607 }
 608
 609 int em28xx_outfmt_set_yuv422(struct em28xx *dev)
 610 {
 611         em28xx_write_regs(dev, EM28XX_R27_OUTFMT, "\x34", 1);
 612         em28xx_write_regs(dev, EM28XX_R10_VINMODE, "\x10", 1);
 613         return em28xx_write_regs(dev, EM28XX_R11_VINCTRL, "\x11", 1);
 614 }
 615
 616 static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
 617                                   u8 ymin, u8 ymax)
 618 {
 619         em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n",
 620                         xmin, ymin, xmax, ymax);
 621
 622         em28xx_write_regs(dev, EM28XX_R28_XMIN, &xmin, 1);
 623         em28xx_write_regs(dev, EM28XX_R29_XMAX, &xmax, 1);
 624         em28xx_write_regs(dev, EM28XX_R2A_YMIN, &ymin, 1);
 625         return em28xx_write_regs(dev, EM28XX_R2B_YMAX, &ymax, 1);
 626 }
 627
 628 static int em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart,
 629                                    u16 width, u16 height)
 630 {
 631         u8 cwidth = width;
 632         u8 cheight = height;
 633         u8 overflow = (height >> 7 & 0x02) | (width >> 8 & 0x01);
 634
 635         em28xx_coredbg("em28xx Area Set: (%d,%d)\n",
 636                         (width | (overflow & 2) << 7),
 637                         (height | (overflow & 1) << 8));
 638
 639         em28xx_write_regs(dev, EM28XX_R1C_HSTART, &hstart, 1);
 640         em28xx_write_regs(dev, EM28XX_R1D_VSTART, &vstart, 1);
 641         em28xx_write_regs(dev, EM28XX_R1E_CWIDTH, &cwidth, 1);
 642         em28xx_write_regs(dev, EM28XX_R1F_CHEIGHT, &cheight, 1);
 643         return em28xx_write_regs(dev, EM28XX_R1B_OFLOW, &overflow, 1);
 644 }
 645
 646 static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v)
 647 {
 648         u8 mode;
 649         /* the em2800 scaler only supports scaling down to 50% */
 650         if (dev->is_em2800)
 651                 mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00);
 652         else {
 653                 u8 buf[2];
 654                 buf[0] = h;
 655                 buf[1] = h >> 8;
 656                 em28xx_write_regs(dev, EM28XX_R30_HSCALELOW, (char *)buf, 2);
 657                 buf[0] = v;
 658                 buf[1] = v >> 8;
 659                 em28xx_write_regs(dev, EM28XX_R32_VSCALELOW, (char *)buf, 2);
 660                 /* it seems that both H and V scalers must be active
 661                    to work correctly */
 662                 mode = (h || v)? 0x30: 0x00;
 663         }
 664         return em28xx_write_reg_bits(dev, EM28XX_R26_COMPR, mode, 0x30);
 665 }
 666
 667 /* FIXME: this only function read values from dev */
 668 int em28xx_resolution_set(struct em28xx *dev)
 669 {
 670         int width, height;
 671         width = norm_maxw(dev);
 672         height = norm_maxh(dev) >> 1;
 673
 674         em28xx_outfmt_set_yuv422(dev);
 675         em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2);
 676         em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2);
 677         return em28xx_scaler_set(dev, dev->hscale, dev->vscale);
 678 }
 679
 680 int em28xx_set_alternate(struct em28xx *dev)
 681 {
 682         int errCode, prev_alt = dev->alt;
 683         int i;
 684         unsigned int min_pkt_size = dev->width * 2 + 4;
 685
 686         /* When image size is bigger than a certain value,
 687            the frame size should be increased, otherwise, only
 688            green screen will be received.
 689          */
 690         if (dev->width * 2 * dev->height > 720 * 240 * 2)
 691                 min_pkt_size *= 2;
 692
 693         for (i = 0; i < dev->num_alt; i++) {
 694                 /* stop when the selected alt setting offers enough bandwidth */
 695                 if (dev->alt_max_pkt_size[i] >= min_pkt_size) {
 696                         dev->alt = i;
 697                         break;
 698                 /* otherwise make sure that we end up with the maximum bandwidth
 699                    because the min_pkt_size equation might be wrong...
 700                 */
 701                 } else if (dev->alt_max_pkt_size[i] >
 702                            dev->alt_max_pkt_size[dev->alt])
 703                         dev->alt = i;
 704         }
 705
 706         if (dev->alt != prev_alt) {
 707                 em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
 708                                 min_pkt_size, dev->alt);
 709                 dev->max_pkt_size = dev->alt_max_pkt_size[dev->alt];
 710                 em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
 711                                dev->alt, dev->max_pkt_size);
 712                 errCode = usb_set_interface(dev->udev, 0, dev->alt);
 713                 if (errCode < 0) {
 714                         em28xx_errdev("cannot change alternate number to %d (error=%i)\n",
 715                                         dev->alt, errCode);
 716                         return errCode;
 717                 }
 718         }
 719         return 0;
 720 }
 721
 722 int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio)
 723 {
 724         int rc = 0;
 725
 726         if (!gpio)
 727                 return rc;
 728
 729         dev->em28xx_write_regs_req(dev, 0x00, 0x48, "\x00", 1);
 730         if (dev->mode == EM28XX_ANALOG_MODE)
 731                 dev->em28xx_write_regs_req(dev, 0x00, 0x12, "\x67", 1);
 732         else
 733                 dev->em28xx_write_regs_req(dev, 0x00, 0x12, "\x37", 1);
 734         msleep(6);
 735
 736         /* Send GPIO reset sequences specified at board entry */
 737         while (gpio->sleep >= 0) {
 738                 if (gpio->reg >= 0) {
 739                         rc = em28xx_write_reg_bits(dev,
 740                                                    gpio->reg,
 741                                                    gpio->val,
 742                                                    gpio->mask);
 743                         if (rc < 0)
 744                                 return rc;
 745                 }
 746                 if (gpio->sleep > 0)
 747                         msleep(gpio->sleep);
 748
 749                 gpio++;
 750         }
 751         return rc;
 752 }
 753
 754 int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode)
 755 {
 756         if (dev->mode == set_mode)
 757                 return 0;
 758
 759         if (set_mode == EM28XX_MODE_UNDEFINED) {
 760                 dev->mode = set_mode;
 761                 return 0;
 762         }
 763
 764         dev->mode = set_mode;
 765
 766         if (dev->mode == EM28XX_DIGITAL_MODE)
 767                 return em28xx_gpio_set(dev, dev->digital_gpio);
 768         else
 769                 return em28xx_gpio_set(dev, dev->analog_gpio);
 770 }
 771 EXPORT_SYMBOL_GPL(em28xx_set_mode);
 772
 773 /* ------------------------------------------------------------------
 774         URB control
 775    ------------------------------------------------------------------*/
 776
 777 /*
 778  * IRQ callback, called by URB callback
 779  */
 780 static void em28xx_irq_callback(struct urb *urb)
 781 {
 782         struct em28xx_dmaqueue  *dma_q = urb->context;
 783         struct em28xx *dev = container_of(dma_q, struct em28xx, vidq);
 784         int rc, i;
 785
 786         /* Copy data from URB */
 787         spin_lock(&dev->slock);
 788         rc = dev->isoc_ctl.isoc_copy(dev, urb);
 789         spin_unlock(&dev->slock);
 790
 791         /* Reset urb buffers */
 792         for (i = 0; i < urb->number_of_packets; i++) {
 793                 urb->iso_frame_desc[i].status = 0;
 794                 urb->iso_frame_desc[i].actual_length = 0;
 795         }
 796         urb->status = 0;
 797
 798         urb->status = usb_submit_urb(urb, GFP_ATOMIC);
 799         if (urb->status) {
 800                 em28xx_isocdbg("urb resubmit failed (error=%i)\n",
 801                                urb->status);
 802         }
 803 }
 804
 805 /*
 806  * Stop and Deallocate URBs
 807  */
 808 void em28xx_uninit_isoc(struct em28xx *dev)
 809 {
 810         struct urb *urb;
 811         int i;
 812
 813         em28xx_isocdbg("em28xx: called em28xx_uninit_isoc\n");
 814
 815         dev->isoc_ctl.nfields = -1;
 816         for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
 817                 urb = dev->isoc_ctl.urb[i];
 818                 if (urb) {
 819                         usb_kill_urb(urb);
 820                         usb_unlink_urb(urb);
 821                         if (dev->isoc_ctl.transfer_buffer[i]) {
 822                                 usb_buffer_free(dev->udev,
 823                                         urb->transfer_buffer_length,
 824                                         dev->isoc_ctl.transfer_buffer[i],
 825                                         urb->transfer_dma);
 826                         }
 827                         usb_free_urb(urb);
 828                         dev->isoc_ctl.urb[i] = NULL;
 829                 }
 830                 dev->isoc_ctl.transfer_buffer[i] = NULL;
 831         }
 832
 833         kfree(dev->isoc_ctl.urb);
 834         kfree(dev->isoc_ctl.transfer_buffer);
 835
 836         dev->isoc_ctl.urb = NULL;
 837         dev->isoc_ctl.transfer_buffer = NULL;
 838         dev->isoc_ctl.num_bufs = 0;
 839
 840         em28xx_capture_start(dev, 0);
 841 }
 842 EXPORT_SYMBOL_GPL(em28xx_uninit_isoc);
 843
 844 /*
 845  * Allocate URBs and start IRQ
 846  */
 847 int em28xx_init_isoc(struct em28xx *dev, int max_packets,
 848                      int num_bufs, int max_pkt_size,
 849                      int (*isoc_copy) (struct em28xx *dev, struct urb *urb))
 850 {
 851         struct em28xx_dmaqueue *dma_q = &dev->vidq;
 852         int i;
 853         int sb_size, pipe;
 854         struct urb *urb;
 855         int j, k;
 856         int rc;
 857
 858         em28xx_isocdbg("em28xx: called em28xx_prepare_isoc\n");
 859
 860         /* De-allocates all pending stuff */
 861         em28xx_uninit_isoc(dev);
 862
 863         dev->isoc_ctl.isoc_copy = isoc_copy;
 864         dev->isoc_ctl.num_bufs = num_bufs;
 865
 866         dev->isoc_ctl.urb = kzalloc(sizeof(void *)*num_bufs,  GFP_KERNEL);
 867         if (!dev->isoc_ctl.urb) {
 868                 em28xx_errdev("cannot alloc memory for usb buffers\n");
 869                 return -ENOMEM;
 870         }
 871
 872         dev->isoc_ctl.transfer_buffer = kzalloc(sizeof(void *)*num_bufs,
 873                                               GFP_KERNEL);
 874         if (!dev->isoc_ctl.transfer_buffer) {
 875                 em28xx_errdev("cannot allocate memory for usbtransfer\n");
 876                 kfree(dev->isoc_ctl.urb);
 877                 return -ENOMEM;
 878         }
 879
 880         dev->isoc_ctl.max_pkt_size = max_pkt_size;
 881         dev->isoc_ctl.buf = NULL;
 882
 883         sb_size = max_packets * dev->isoc_ctl.max_pkt_size;
 884
 885         /* allocate urbs and transfer buffers */
 886         for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
 887                 urb = usb_alloc_urb(max_packets, GFP_KERNEL);
 888                 if (!urb) {
 889                         em28xx_err("cannot alloc isoc_ctl.urb %i\n", i);
 890                         em28xx_uninit_isoc(dev);
 891                         return -ENOMEM;
 892                 }
 893                 dev->isoc_ctl.urb[i] = urb;
 894
 895                 dev->isoc_ctl.transfer_buffer[i] = usb_buffer_alloc(dev->udev,
 896                         sb_size, GFP_KERNEL, &urb->transfer_dma);
 897                 if (!dev->isoc_ctl.transfer_buffer[i]) {
 898                         em28xx_err("unable to allocate %i bytes for transfer"
 899                                         " buffer %i%s\n",
 900                                         sb_size, i,
 901                                         in_interrupt()?" while in int":"");
 902                         em28xx_uninit_isoc(dev);
 903                         return -ENOMEM;
 904                 }
 905                 memset(dev->isoc_ctl.transfer_buffer[i], 0, sb_size);
 906
 907                 /* FIXME: this is a hack - should be
 908                         'desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK'
 909                         should also be using 'desc.bInterval'
 910                  */
 911                 pipe = usb_rcvisocpipe(dev->udev,
 912                         dev->mode == EM28XX_ANALOG_MODE ? 0x82 : 0x84);
 913
 914                 usb_fill_int_urb(urb, dev->udev, pipe,
 915                                  dev->isoc_ctl.transfer_buffer[i], sb_size,
 916                                  em28xx_irq_callback, dma_q, 1);
 917
 918                 urb->number_of_packets = max_packets;
 919                 urb->transfer_flags = URB_ISO_ASAP;
 920
 921                 k = 0;
 922                 for (j = 0; j < max_packets; j++) {
 923                         urb->iso_frame_desc[j].offset = k;
 924                         urb->iso_frame_desc[j].length =
 925                                                 dev->isoc_ctl.max_pkt_size;
 926                         k += dev->isoc_ctl.max_pkt_size;
 927                 }
 928         }
 929
 930         init_waitqueue_head(&dma_q->wq);
 931
 932         em28xx_capture_start(dev, 1);
 933
 934         /* submit urbs and enables IRQ */
 935         for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
 936                 rc = usb_submit_urb(dev->isoc_ctl.urb[i], GFP_ATOMIC);
 937                 if (rc) {
 938                         em28xx_err("submit of urb %i failed (error=%i)\n", i,
 939                                    rc);
 940                         em28xx_uninit_isoc(dev);
 941                         return rc;
 942                 }
 943         }
 944
 945         return 0;
 946 }
 947 EXPORT_SYMBOL_GPL(em28xx_init_isoc);