3 * Purpose: Generic MCA handling layer
5 * Updated for latest kernel
6 * Copyright (C) 2003 Hewlett-Packard Co
7 * David Mosberger-Tang <davidm@hpl.hp.com>
9 * Copyright (C) 2002 Dell Inc.
10 * Copyright (C) Matt Domsch (Matt_Domsch@dell.com)
12 * Copyright (C) 2002 Intel
13 * Copyright (C) Jenna Hall (jenna.s.hall@intel.com)
15 * Copyright (C) 2001 Intel
16 * Copyright (C) Fred Lewis (frederick.v.lewis@intel.com)
18 * Copyright (C) 2000 Intel
19 * Copyright (C) Chuck Fleckenstein (cfleck@co.intel.com)
21 * Copyright (C) 1999, 2004 Silicon Graphics, Inc.
22 * Copyright (C) Vijay Chander(vijay@engr.sgi.com)
24 * 03/04/15 D. Mosberger Added INIT backtrace support.
25 * 02/03/25 M. Domsch GUID cleanups
27 * 02/01/04 J. Hall Aligned MCA stack to 16 bytes, added platform vs. CPU
28 * error flag, set SAL default return values, changed
29 * error record structure to linked list, added init call
30 * to sal_get_state_info_size().
32 * 01/01/03 F. Lewis Added setup of CMCI and CPEI IRQs, logging of corrected
33 * platform errors, completed code for logging of
34 * corrected & uncorrected machine check errors, and
35 * updated for conformance with Nov. 2000 revision of the
37 * 00/03/29 C. Fleckenstein Fixed PAL/SAL update issues, began MCA bug fixes, logging issues,
38 * added min save state dump, added INIT handler.
40 * 2003-12-08 Keith Owens <kaos@sgi.com>
41 * smp_call_function() must not be called from interrupt context (can
42 * deadlock on tasklist_lock). Use keventd to call smp_call_function().
44 * 2004-02-01 Keith Owens <kaos@sgi.com>
45 * Avoid deadlock when using printk() for MCA and INIT records.
46 * Delete all record printing code, moved to salinfo_decode in user space.
47 * Mark variables and functions static where possible.
48 * Delete dead variables and functions.
49 * Reorder to remove the need for forward declarations and to consolidate
52 * 2005-08-12 Keith Owens <kaos@sgi.com>
53 * Convert MCA/INIT handlers to use per event stacks and SAL/OS state.
55 * 2005-10-07 Keith Owens <kaos@sgi.com>
56 * Add notify_die() hooks.
58 * 2006-09-15 Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
59 * Add printing support for MCA/INIT.
61 #include <linux/types.h>
62 #include <linux/init.h>
63 #include <linux/sched.h>
64 #include <linux/interrupt.h>
65 #include <linux/irq.h>
66 #include <linux/bootmem.h>
67 #include <linux/acpi.h>
68 #include <linux/timer.h>
69 #include <linux/module.h>
70 #include <linux/kernel.h>
71 #include <linux/smp.h>
72 #include <linux/workqueue.h>
73 #include <linux/cpumask.h>
74 #include <linux/kdebug.h>
76 #include <asm/delay.h>
77 #include <asm/machvec.h>
78 #include <asm/meminit.h>
80 #include <asm/ptrace.h>
81 #include <asm/system.h>
84 #include <asm/kexec.h>
87 #include <asm/hw_irq.h>
92 #if defined(IA64_MCA_DEBUG_INFO)
93 # define IA64_MCA_DEBUG(fmt...) printk(fmt)
95 # define IA64_MCA_DEBUG(fmt...)
98 /* Used by mca_asm.S */
99 u32 ia64_mca_serialize
;
100 DEFINE_PER_CPU(u64
, ia64_mca_data
); /* == __per_cpu_mca[smp_processor_id()] */
101 DEFINE_PER_CPU(u64
, ia64_mca_per_cpu_pte
); /* PTE to map per-CPU area */
102 DEFINE_PER_CPU(u64
, ia64_mca_pal_pte
); /* PTE to map PAL code */
103 DEFINE_PER_CPU(u64
, ia64_mca_pal_base
); /* vaddr PAL code granule */
105 unsigned long __per_cpu_mca
[NR_CPUS
];
108 extern void ia64_os_init_dispatch_monarch (void);
109 extern void ia64_os_init_dispatch_slave (void);
111 static int monarch_cpu
= -1;
113 static ia64_mc_info_t ia64_mc_info
;
115 #define MAX_CPE_POLL_INTERVAL (15*60*HZ) /* 15 minutes */
116 #define MIN_CPE_POLL_INTERVAL (2*60*HZ) /* 2 minutes */
117 #define CMC_POLL_INTERVAL (1*60*HZ) /* 1 minute */
118 #define CPE_HISTORY_LENGTH 5
119 #define CMC_HISTORY_LENGTH 5
122 static struct timer_list cpe_poll_timer
;
124 static struct timer_list cmc_poll_timer
;
126 * This variable tells whether we are currently in polling mode.
127 * Start with this in the wrong state so we won't play w/ timers
128 * before the system is ready.
130 static int cmc_polling_enabled
= 1;
133 * Clearing this variable prevents CPE polling from getting activated
134 * in mca_late_init. Use it if your system doesn't provide a CPEI,
135 * but encounters problems retrieving CPE logs. This should only be
136 * necessary for debugging.
138 static int cpe_poll_enabled
= 1;
140 extern void salinfo_log_wakeup(int type
, u8
*buffer
, u64 size
, int irqsafe
);
142 static int mca_init __initdata
;
145 * limited & delayed printing support for MCA/INIT handler
148 #define mprintk(fmt...) ia64_mca_printk(fmt)
150 #define MLOGBUF_SIZE (512+256*NR_CPUS)
151 #define MLOGBUF_MSGMAX 256
152 static char mlogbuf
[MLOGBUF_SIZE
];
153 static DEFINE_SPINLOCK(mlogbuf_wlock
); /* mca context only */
154 static DEFINE_SPINLOCK(mlogbuf_rlock
); /* normal context only */
155 static unsigned long mlogbuf_start
;
156 static unsigned long mlogbuf_end
;
157 static unsigned int mlogbuf_finished
= 0;
158 static unsigned long mlogbuf_timestamp
= 0;
160 static int loglevel_save
= -1;
161 #define BREAK_LOGLEVEL(__console_loglevel) \
162 oops_in_progress = 1; \
163 if (loglevel_save < 0) \
164 loglevel_save = __console_loglevel; \
165 __console_loglevel = 15;
167 #define RESTORE_LOGLEVEL(__console_loglevel) \
168 if (loglevel_save >= 0) { \
169 __console_loglevel = loglevel_save; \
170 loglevel_save = -1; \
172 mlogbuf_finished = 0; \
173 oops_in_progress = 0;
176 * Push messages into buffer, print them later if not urgent.
178 void ia64_mca_printk(const char *fmt
, ...)
182 char temp_buf
[MLOGBUF_MSGMAX
];
186 printed_len
= vscnprintf(temp_buf
, sizeof(temp_buf
), fmt
, args
);
189 /* Copy the output into mlogbuf */
190 if (oops_in_progress
) {
191 /* mlogbuf was abandoned, use printk directly instead. */
194 spin_lock(&mlogbuf_wlock
);
195 for (p
= temp_buf
; *p
; p
++) {
196 unsigned long next
= (mlogbuf_end
+ 1) % MLOGBUF_SIZE
;
197 if (next
!= mlogbuf_start
) {
198 mlogbuf
[mlogbuf_end
] = *p
;
205 mlogbuf
[mlogbuf_end
] = '\0';
206 spin_unlock(&mlogbuf_wlock
);
209 EXPORT_SYMBOL(ia64_mca_printk
);
212 * Print buffered messages.
213 * NOTE: call this after returning normal context. (ex. from salinfod)
215 void ia64_mlogbuf_dump(void)
217 char temp_buf
[MLOGBUF_MSGMAX
];
221 unsigned int printed_len
;
223 /* Get output from mlogbuf */
224 while (mlogbuf_start
!= mlogbuf_end
) {
229 spin_lock_irqsave(&mlogbuf_rlock
, flags
);
231 index
= mlogbuf_start
;
232 while (index
!= mlogbuf_end
) {
234 index
= (index
+ 1) % MLOGBUF_SIZE
;
238 if (++printed_len
>= MLOGBUF_MSGMAX
- 1)
244 mlogbuf_start
= index
;
246 mlogbuf_timestamp
= 0;
247 spin_unlock_irqrestore(&mlogbuf_rlock
, flags
);
250 EXPORT_SYMBOL(ia64_mlogbuf_dump
);
253 * Call this if system is going to down or if immediate flushing messages to
254 * console is required. (ex. recovery was failed, crash dump is going to be
255 * invoked, long-wait rendezvous etc.)
256 * NOTE: this should be called from monarch.
258 static void ia64_mlogbuf_finish(int wait
)
260 BREAK_LOGLEVEL(console_loglevel
);
262 spin_lock_init(&mlogbuf_rlock
);
264 printk(KERN_EMERG
"mlogbuf_finish: printing switched to urgent mode, "
265 "MCA/INIT might be dodgy or fail.\n");
270 /* wait for console */
271 printk("Delaying for 5 seconds...\n");
274 mlogbuf_finished
= 1;
276 EXPORT_SYMBOL(ia64_mlogbuf_finish
);
279 * Print buffered messages from INIT context.
281 static void ia64_mlogbuf_dump_from_init(void)
283 if (mlogbuf_finished
)
286 if (mlogbuf_timestamp
&& (mlogbuf_timestamp
+ 30*HZ
> jiffies
)) {
287 printk(KERN_ERR
"INIT: mlogbuf_dump is interrupted by INIT "
288 " and the system seems to be messed up.\n");
289 ia64_mlogbuf_finish(0);
293 if (!spin_trylock(&mlogbuf_rlock
)) {
294 printk(KERN_ERR
"INIT: mlogbuf_dump is interrupted by INIT. "
295 "Generated messages other than stack dump will be "
296 "buffered to mlogbuf and will be printed later.\n");
297 printk(KERN_ERR
"INIT: If messages would not printed after "
298 "this INIT, wait 30sec and assert INIT again.\n");
299 if (!mlogbuf_timestamp
)
300 mlogbuf_timestamp
= jiffies
;
303 spin_unlock(&mlogbuf_rlock
);
308 ia64_mca_spin(const char *func
)
310 if (monarch_cpu
== smp_processor_id())
311 ia64_mlogbuf_finish(0);
312 mprintk(KERN_EMERG
"%s: spinning here, not returning to SAL\n", func
);
317 * IA64_MCA log support
319 #define IA64_MAX_LOGS 2 /* Double-buffering for nested MCAs */
320 #define IA64_MAX_LOG_TYPES 4 /* MCA, INIT, CMC, CPE */
322 typedef struct ia64_state_log_s
326 unsigned long isl_count
;
327 ia64_err_rec_t
*isl_log
[IA64_MAX_LOGS
]; /* need space to store header + error log */
330 static ia64_state_log_t ia64_state_log
[IA64_MAX_LOG_TYPES
];
332 #define IA64_LOG_ALLOCATE(it, size) \
333 {ia64_state_log[it].isl_log[IA64_LOG_CURR_INDEX(it)] = \
334 (ia64_err_rec_t *)alloc_bootmem(size); \
335 ia64_state_log[it].isl_log[IA64_LOG_NEXT_INDEX(it)] = \
336 (ia64_err_rec_t *)alloc_bootmem(size);}
337 #define IA64_LOG_LOCK_INIT(it) spin_lock_init(&ia64_state_log[it].isl_lock)
338 #define IA64_LOG_LOCK(it) spin_lock_irqsave(&ia64_state_log[it].isl_lock, s)
339 #define IA64_LOG_UNLOCK(it) spin_unlock_irqrestore(&ia64_state_log[it].isl_lock,s)
340 #define IA64_LOG_NEXT_INDEX(it) ia64_state_log[it].isl_index
341 #define IA64_LOG_CURR_INDEX(it) 1 - ia64_state_log[it].isl_index
342 #define IA64_LOG_INDEX_INC(it) \
343 {ia64_state_log[it].isl_index = 1 - ia64_state_log[it].isl_index; \
344 ia64_state_log[it].isl_count++;}
345 #define IA64_LOG_INDEX_DEC(it) \
346 ia64_state_log[it].isl_index = 1 - ia64_state_log[it].isl_index
347 #define IA64_LOG_NEXT_BUFFER(it) (void *)((ia64_state_log[it].isl_log[IA64_LOG_NEXT_INDEX(it)]))
348 #define IA64_LOG_CURR_BUFFER(it) (void *)((ia64_state_log[it].isl_log[IA64_LOG_CURR_INDEX(it)]))
349 #define IA64_LOG_COUNT(it) ia64_state_log[it].isl_count
353 * Reset the OS ia64 log buffer
354 * Inputs : info_type (SAL_INFO_TYPE_{MCA,INIT,CMC,CPE})
358 ia64_log_init(int sal_info_type
)
362 IA64_LOG_NEXT_INDEX(sal_info_type
) = 0;
363 IA64_LOG_LOCK_INIT(sal_info_type
);
365 // SAL will tell us the maximum size of any error record of this type
366 max_size
= ia64_sal_get_state_info_size(sal_info_type
);
368 /* alloc_bootmem() doesn't like zero-sized allocations! */
371 // set up OS data structures to hold error info
372 IA64_LOG_ALLOCATE(sal_info_type
, max_size
);
373 memset(IA64_LOG_CURR_BUFFER(sal_info_type
), 0, max_size
);
374 memset(IA64_LOG_NEXT_BUFFER(sal_info_type
), 0, max_size
);
380 * Get the current MCA log from SAL and copy it into the OS log buffer.
382 * Inputs : info_type (SAL_INFO_TYPE_{MCA,INIT,CMC,CPE})
383 * irq_safe whether you can use printk at this point
384 * Outputs : size (total record length)
385 * *buffer (ptr to error record)
389 ia64_log_get(int sal_info_type
, u8
**buffer
, int irq_safe
)
391 sal_log_record_header_t
*log_buffer
;
395 IA64_LOG_LOCK(sal_info_type
);
397 /* Get the process state information */
398 log_buffer
= IA64_LOG_NEXT_BUFFER(sal_info_type
);
400 total_len
= ia64_sal_get_state_info(sal_info_type
, (u64
*)log_buffer
);
403 IA64_LOG_INDEX_INC(sal_info_type
);
404 IA64_LOG_UNLOCK(sal_info_type
);
406 IA64_MCA_DEBUG("%s: SAL error record type %d retrieved. "
407 "Record length = %ld\n", __FUNCTION__
, sal_info_type
, total_len
);
409 *buffer
= (u8
*) log_buffer
;
412 IA64_LOG_UNLOCK(sal_info_type
);
418 * ia64_mca_log_sal_error_record
420 * This function retrieves a specified error record type from SAL
421 * and wakes up any processes waiting for error records.
423 * Inputs : sal_info_type (Type of error record MCA/CMC/CPE)
424 * FIXME: remove MCA and irq_safe.
427 ia64_mca_log_sal_error_record(int sal_info_type
)
430 sal_log_record_header_t
*rh
;
432 int irq_safe
= sal_info_type
!= SAL_INFO_TYPE_MCA
;
433 #ifdef IA64_MCA_DEBUG_INFO
434 static const char * const rec_name
[] = { "MCA", "INIT", "CMC", "CPE" };
437 size
= ia64_log_get(sal_info_type
, &buffer
, irq_safe
);
441 salinfo_log_wakeup(sal_info_type
, buffer
, size
, irq_safe
);
444 IA64_MCA_DEBUG("CPU %d: SAL log contains %s error record\n",
446 sal_info_type
< ARRAY_SIZE(rec_name
) ? rec_name
[sal_info_type
] : "UNKNOWN");
448 /* Clear logs from corrected errors in case there's no user-level logger */
449 rh
= (sal_log_record_header_t
*)buffer
;
450 if (rh
->severity
== sal_log_severity_corrected
)
451 ia64_sal_clear_state_info(sal_info_type
);
456 * See if the MCA surfaced in an instruction range
457 * that has been tagged as recoverable.
460 * first First address range to check
461 * last Last address range to check
462 * ip Instruction pointer, address we are looking for
465 * 1 on Success (in the table)/ 0 on Failure (not in the table)
468 search_mca_table (const struct mca_table_entry
*first
,
469 const struct mca_table_entry
*last
,
472 const struct mca_table_entry
*curr
;
473 u64 curr_start
, curr_end
;
476 while (curr
<= last
) {
477 curr_start
= (u64
) &curr
->start_addr
+ curr
->start_addr
;
478 curr_end
= (u64
) &curr
->end_addr
+ curr
->end_addr
;
480 if ((ip
>= curr_start
) && (ip
<= curr_end
)) {
488 /* Given an address, look for it in the mca tables. */
489 int mca_recover_range(unsigned long addr
)
491 extern struct mca_table_entry __start___mca_table
[];
492 extern struct mca_table_entry __stop___mca_table
[];
494 return search_mca_table(__start___mca_table
, __stop___mca_table
-1, addr
);
496 EXPORT_SYMBOL_GPL(mca_recover_range
);
501 int ia64_cpe_irq
= -1;
504 ia64_mca_cpe_int_handler (int cpe_irq
, void *arg
)
506 static unsigned long cpe_history
[CPE_HISTORY_LENGTH
];
508 static DEFINE_SPINLOCK(cpe_history_lock
);
510 IA64_MCA_DEBUG("%s: received interrupt vector = %#x on CPU %d\n",
511 __FUNCTION__
, cpe_irq
, smp_processor_id());
513 /* SAL spec states this should run w/ interrupts enabled */
516 spin_lock(&cpe_history_lock
);
517 if (!cpe_poll_enabled
&& cpe_vector
>= 0) {
519 int i
, count
= 1; /* we know 1 happened now */
520 unsigned long now
= jiffies
;
522 for (i
= 0; i
< CPE_HISTORY_LENGTH
; i
++) {
523 if (now
- cpe_history
[i
] <= HZ
)
527 IA64_MCA_DEBUG(KERN_INFO
"CPE threshold %d/%d\n", count
, CPE_HISTORY_LENGTH
);
528 if (count
>= CPE_HISTORY_LENGTH
) {
530 cpe_poll_enabled
= 1;
531 spin_unlock(&cpe_history_lock
);
532 disable_irq_nosync(local_vector_to_irq(IA64_CPE_VECTOR
));
535 * Corrected errors will still be corrected, but
536 * make sure there's a log somewhere that indicates
537 * something is generating more than we can handle.
539 printk(KERN_WARNING
"WARNING: Switching to polling CPE handler; error records may be lost\n");
541 mod_timer(&cpe_poll_timer
, jiffies
+ MIN_CPE_POLL_INTERVAL
);
543 /* lock already released, get out now */
546 cpe_history
[index
++] = now
;
547 if (index
== CPE_HISTORY_LENGTH
)
551 spin_unlock(&cpe_history_lock
);
553 /* Get the CPE error record and log it */
554 ia64_mca_log_sal_error_record(SAL_INFO_TYPE_CPE
);
559 #endif /* CONFIG_ACPI */
563 * ia64_mca_register_cpev
565 * Register the corrected platform error vector with SAL.
568 * cpev Corrected Platform Error Vector number
574 ia64_mca_register_cpev (int cpev
)
576 /* Register the CPE interrupt vector with SAL */
577 struct ia64_sal_retval isrv
;
579 isrv
= ia64_sal_mc_set_params(SAL_MC_PARAM_CPE_INT
, SAL_MC_PARAM_MECHANISM_INT
, cpev
, 0, 0);
581 printk(KERN_ERR
"Failed to register Corrected Platform "
582 "Error interrupt vector with SAL (status %ld)\n", isrv
.status
);
586 IA64_MCA_DEBUG("%s: corrected platform error "
587 "vector %#x registered\n", __FUNCTION__
, cpev
);
589 #endif /* CONFIG_ACPI */
592 * ia64_mca_cmc_vector_setup
594 * Setup the corrected machine check vector register in the processor.
595 * (The interrupt is masked on boot. ia64_mca_late_init unmask this.)
596 * This function is invoked on a per-processor basis.
605 ia64_mca_cmc_vector_setup (void)
609 cmcv
.cmcv_regval
= 0;
610 cmcv
.cmcv_mask
= 1; /* Mask/disable interrupt at first */
611 cmcv
.cmcv_vector
= IA64_CMC_VECTOR
;
612 ia64_setreg(_IA64_REG_CR_CMCV
, cmcv
.cmcv_regval
);
614 IA64_MCA_DEBUG("%s: CPU %d corrected "
615 "machine check vector %#x registered.\n",
616 __FUNCTION__
, smp_processor_id(), IA64_CMC_VECTOR
);
618 IA64_MCA_DEBUG("%s: CPU %d CMCV = %#016lx\n",
619 __FUNCTION__
, smp_processor_id(), ia64_getreg(_IA64_REG_CR_CMCV
));
623 * ia64_mca_cmc_vector_disable
625 * Mask the corrected machine check vector register in the processor.
626 * This function is invoked on a per-processor basis.
635 ia64_mca_cmc_vector_disable (void *dummy
)
639 cmcv
.cmcv_regval
= ia64_getreg(_IA64_REG_CR_CMCV
);
641 cmcv
.cmcv_mask
= 1; /* Mask/disable interrupt */
642 ia64_setreg(_IA64_REG_CR_CMCV
, cmcv
.cmcv_regval
);
644 IA64_MCA_DEBUG("%s: CPU %d corrected "
645 "machine check vector %#x disabled.\n",
646 __FUNCTION__
, smp_processor_id(), cmcv
.cmcv_vector
);
650 * ia64_mca_cmc_vector_enable
652 * Unmask the corrected machine check vector register in the processor.
653 * This function is invoked on a per-processor basis.
662 ia64_mca_cmc_vector_enable (void *dummy
)
666 cmcv
.cmcv_regval
= ia64_getreg(_IA64_REG_CR_CMCV
);
668 cmcv
.cmcv_mask
= 0; /* Unmask/enable interrupt */
669 ia64_setreg(_IA64_REG_CR_CMCV
, cmcv
.cmcv_regval
);
671 IA64_MCA_DEBUG("%s: CPU %d corrected "
672 "machine check vector %#x enabled.\n",
673 __FUNCTION__
, smp_processor_id(), cmcv
.cmcv_vector
);
677 * ia64_mca_cmc_vector_disable_keventd
679 * Called via keventd (smp_call_function() is not safe in interrupt context) to
680 * disable the cmc interrupt vector.
683 ia64_mca_cmc_vector_disable_keventd(struct work_struct
*unused
)
685 on_each_cpu(ia64_mca_cmc_vector_disable
, NULL
, 1, 0);
689 * ia64_mca_cmc_vector_enable_keventd
691 * Called via keventd (smp_call_function() is not safe in interrupt context) to
692 * enable the cmc interrupt vector.
695 ia64_mca_cmc_vector_enable_keventd(struct work_struct
*unused
)
697 on_each_cpu(ia64_mca_cmc_vector_enable
, NULL
, 1, 0);
703 * Send an inter-cpu interrupt to wake-up a particular cpu
704 * and mark that cpu to be out of rendez.
710 ia64_mca_wakeup(int cpu
)
712 platform_send_ipi(cpu
, IA64_MCA_WAKEUP_VECTOR
, IA64_IPI_DM_INT
, 0);
713 ia64_mc_info
.imi_rendez_checkin
[cpu
] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE
;
718 * ia64_mca_wakeup_all
720 * Wakeup all the cpus which have rendez'ed previously.
726 ia64_mca_wakeup_all(void)
730 /* Clear the Rendez checkin flag for all cpus */
731 for_each_online_cpu(cpu
) {
732 if (ia64_mc_info
.imi_rendez_checkin
[cpu
] == IA64_MCA_RENDEZ_CHECKIN_DONE
)
733 ia64_mca_wakeup(cpu
);
739 * ia64_mca_rendez_interrupt_handler
741 * This is handler used to put slave processors into spinloop
742 * while the monarch processor does the mca handling and later
743 * wake each slave up once the monarch is done.
749 ia64_mca_rendez_int_handler(int rendez_irq
, void *arg
)
752 int cpu
= smp_processor_id();
753 struct ia64_mca_notify_die nd
=
754 { .sos
= NULL
, .monarch_cpu
= &monarch_cpu
};
756 /* Mask all interrupts */
757 local_irq_save(flags
);
758 if (notify_die(DIE_MCA_RENDZVOUS_ENTER
, "MCA", get_irq_regs(),
759 (long)&nd
, 0, 0) == NOTIFY_STOP
)
760 ia64_mca_spin(__FUNCTION__
);
762 ia64_mc_info
.imi_rendez_checkin
[cpu
] = IA64_MCA_RENDEZ_CHECKIN_DONE
;
763 /* Register with the SAL monarch that the slave has
766 ia64_sal_mc_rendez();
768 if (notify_die(DIE_MCA_RENDZVOUS_PROCESS
, "MCA", get_irq_regs(),
769 (long)&nd
, 0, 0) == NOTIFY_STOP
)
770 ia64_mca_spin(__FUNCTION__
);
772 /* Wait for the monarch cpu to exit. */
773 while (monarch_cpu
!= -1)
774 cpu_relax(); /* spin until monarch leaves */
776 if (notify_die(DIE_MCA_RENDZVOUS_LEAVE
, "MCA", get_irq_regs(),
777 (long)&nd
, 0, 0) == NOTIFY_STOP
)
778 ia64_mca_spin(__FUNCTION__
);
780 /* Enable all interrupts */
781 local_irq_restore(flags
);
786 * ia64_mca_wakeup_int_handler
788 * The interrupt handler for processing the inter-cpu interrupt to the
789 * slave cpu which was spinning in the rendez loop.
790 * Since this spinning is done by turning off the interrupts and
791 * polling on the wakeup-interrupt bit in the IRR, there is
792 * nothing useful to be done in the handler.
794 * Inputs : wakeup_irq (Wakeup-interrupt bit)
795 * arg (Interrupt handler specific argument)
800 ia64_mca_wakeup_int_handler(int wakeup_irq
, void *arg
)
805 /* Function pointer for extra MCA recovery */
806 int (*ia64_mca_ucmc_extension
)
807 (void*,struct ia64_sal_os_state
*)
811 ia64_reg_MCA_extension(int (*fn
)(void *, struct ia64_sal_os_state
*))
813 if (ia64_mca_ucmc_extension
)
816 ia64_mca_ucmc_extension
= fn
;
821 ia64_unreg_MCA_extension(void)
823 if (ia64_mca_ucmc_extension
)
824 ia64_mca_ucmc_extension
= NULL
;
827 EXPORT_SYMBOL(ia64_reg_MCA_extension
);
828 EXPORT_SYMBOL(ia64_unreg_MCA_extension
);
832 copy_reg(const u64
*fr
, u64 fnat
, u64
*tr
, u64
*tnat
)
834 u64 fslot
, tslot
, nat
;
836 fslot
= ((unsigned long)fr
>> 3) & 63;
837 tslot
= ((unsigned long)tr
>> 3) & 63;
838 *tnat
&= ~(1UL << tslot
);
839 nat
= (fnat
>> fslot
) & 1;
840 *tnat
|= (nat
<< tslot
);
843 /* Change the comm field on the MCA/INT task to include the pid that
844 * was interrupted, it makes for easier debugging. If that pid was 0
845 * (swapper or nested MCA/INIT) then use the start of the previous comm
846 * field suffixed with its cpu.
850 ia64_mca_modify_comm(const struct task_struct
*previous_current
)
852 char *p
, comm
[sizeof(current
->comm
)];
853 if (previous_current
->pid
)
854 snprintf(comm
, sizeof(comm
), "%s %d",
855 current
->comm
, previous_current
->pid
);
858 if ((p
= strchr(previous_current
->comm
, ' ')))
859 l
= p
- previous_current
->comm
;
861 l
= strlen(previous_current
->comm
);
862 snprintf(comm
, sizeof(comm
), "%s %*s %d",
863 current
->comm
, l
, previous_current
->comm
,
864 task_thread_info(previous_current
)->cpu
);
866 memcpy(current
->comm
, comm
, sizeof(current
->comm
));
869 /* On entry to this routine, we are running on the per cpu stack, see
870 * mca_asm.h. The original stack has not been touched by this event. Some of
871 * the original stack's registers will be in the RBS on this stack. This stack
872 * also contains a partial pt_regs and switch_stack, the rest of the data is in
875 * The first thing to do is modify the original stack to look like a blocked
876 * task so we can run backtrace on the original task. Also mark the per cpu
877 * stack as current to ensure that we use the correct task state, it also means
878 * that we can do backtrace on the MCA/INIT handler code itself.
881 static struct task_struct
*
882 ia64_mca_modify_original_stack(struct pt_regs
*regs
,
883 const struct switch_stack
*sw
,
884 struct ia64_sal_os_state
*sos
,
889 extern char ia64_leave_kernel
[]; /* Need asm address, not function descriptor */
890 const pal_min_state_area_t
*ms
= sos
->pal_min_state
;
891 struct task_struct
*previous_current
;
892 struct pt_regs
*old_regs
;
893 struct switch_stack
*old_sw
;
894 unsigned size
= sizeof(struct pt_regs
) +
895 sizeof(struct switch_stack
) + 16;
896 u64
*old_bspstore
, *old_bsp
;
897 u64
*new_bspstore
, *new_bsp
;
898 u64 old_unat
, old_rnat
, new_rnat
, nat
;
899 u64 slots
, loadrs
= regs
->loadrs
;
900 u64 r12
= ms
->pmsa_gr
[12-1], r13
= ms
->pmsa_gr
[13-1];
901 u64 ar_bspstore
= regs
->ar_bspstore
;
902 u64 ar_bsp
= regs
->ar_bspstore
+ (loadrs
>> 16);
905 int cpu
= smp_processor_id();
907 previous_current
= curr_task(cpu
);
908 set_curr_task(cpu
, current
);
909 if ((p
= strchr(current
->comm
, ' ')))
912 /* Best effort attempt to cope with MCA/INIT delivered while in
915 regs
->cr_ipsr
= ms
->pmsa_ipsr
;
916 if (ia64_psr(regs
)->dt
== 0) {
928 if (ia64_psr(regs
)->rt
== 0) {
941 /* mca_asm.S ia64_old_stack() cannot assume that the dirty registers
942 * have been copied to the old stack, the old stack may fail the
943 * validation tests below. So ia64_old_stack() must restore the dirty
944 * registers from the new stack. The old and new bspstore probably
945 * have different alignments, so loadrs calculated on the old bsp
946 * cannot be used to restore from the new bsp. Calculate a suitable
947 * loadrs for the new stack and save it in the new pt_regs, where
948 * ia64_old_stack() can get it.
950 old_bspstore
= (u64
*)ar_bspstore
;
951 old_bsp
= (u64
*)ar_bsp
;
952 slots
= ia64_rse_num_regs(old_bspstore
, old_bsp
);
953 new_bspstore
= (u64
*)((u64
)current
+ IA64_RBS_OFFSET
);
954 new_bsp
= ia64_rse_skip_regs(new_bspstore
, slots
);
955 regs
->loadrs
= (new_bsp
- new_bspstore
) * 8 << 16;
957 /* Verify the previous stack state before we change it */
958 if (user_mode(regs
)) {
959 msg
= "occurred in user space";
960 /* previous_current is guaranteed to be valid when the task was
961 * in user space, so ...
963 ia64_mca_modify_comm(previous_current
);
967 if (!mca_recover_range(ms
->pmsa_iip
)) {
968 if (r13
!= sos
->prev_IA64_KR_CURRENT
) {
969 msg
= "inconsistent previous current and r13";
972 if ((r12
- r13
) >= KERNEL_STACK_SIZE
) {
973 msg
= "inconsistent r12 and r13";
976 if ((ar_bspstore
- r13
) >= KERNEL_STACK_SIZE
) {
977 msg
= "inconsistent ar.bspstore and r13";
982 msg
= "old_bspstore is in the wrong region";
985 if ((ar_bsp
- r13
) >= KERNEL_STACK_SIZE
) {
986 msg
= "inconsistent ar.bsp and r13";
989 size
+= (ia64_rse_skip_regs(old_bspstore
, slots
) - old_bspstore
) * 8;
990 if (ar_bspstore
+ size
> r12
) {
991 msg
= "no room for blocked state";
996 ia64_mca_modify_comm(previous_current
);
998 /* Make the original task look blocked. First stack a struct pt_regs,
999 * describing the state at the time of interrupt. mca_asm.S built a
1000 * partial pt_regs, copy it and fill in the blanks using minstate.
1002 p
= (char *)r12
- sizeof(*regs
);
1003 old_regs
= (struct pt_regs
*)p
;
1004 memcpy(old_regs
, regs
, sizeof(*regs
));
1005 /* If ipsr.ic then use pmsa_{iip,ipsr,ifs}, else use
1006 * pmsa_{xip,xpsr,xfs}
1008 if (ia64_psr(regs
)->ic
) {
1009 old_regs
->cr_iip
= ms
->pmsa_iip
;
1010 old_regs
->cr_ipsr
= ms
->pmsa_ipsr
;
1011 old_regs
->cr_ifs
= ms
->pmsa_ifs
;
1013 old_regs
->cr_iip
= ms
->pmsa_xip
;
1014 old_regs
->cr_ipsr
= ms
->pmsa_xpsr
;
1015 old_regs
->cr_ifs
= ms
->pmsa_xfs
;
1017 old_regs
->pr
= ms
->pmsa_pr
;
1018 old_regs
->b0
= ms
->pmsa_br0
;
1019 old_regs
->loadrs
= loadrs
;
1020 old_regs
->ar_rsc
= ms
->pmsa_rsc
;
1021 old_unat
= old_regs
->ar_unat
;
1022 copy_reg(&ms
->pmsa_gr
[1-1], ms
->pmsa_nat_bits
, &old_regs
->r1
, &old_unat
);
1023 copy_reg(&ms
->pmsa_gr
[2-1], ms
->pmsa_nat_bits
, &old_regs
->r2
, &old_unat
);
1024 copy_reg(&ms
->pmsa_gr
[3-1], ms
->pmsa_nat_bits
, &old_regs
->r3
, &old_unat
);
1025 copy_reg(&ms
->pmsa_gr
[8-1], ms
->pmsa_nat_bits
, &old_regs
->r8
, &old_unat
);
1026 copy_reg(&ms
->pmsa_gr
[9-1], ms
->pmsa_nat_bits
, &old_regs
->r9
, &old_unat
);
1027 copy_reg(&ms
->pmsa_gr
[10-1], ms
->pmsa_nat_bits
, &old_regs
->r10
, &old_unat
);
1028 copy_reg(&ms
->pmsa_gr
[11-1], ms
->pmsa_nat_bits
, &old_regs
->r11
, &old_unat
);
1029 copy_reg(&ms
->pmsa_gr
[12-1], ms
->pmsa_nat_bits
, &old_regs
->r12
, &old_unat
);
1030 copy_reg(&ms
->pmsa_gr
[13-1], ms
->pmsa_nat_bits
, &old_regs
->r13
, &old_unat
);
1031 copy_reg(&ms
->pmsa_gr
[14-1], ms
->pmsa_nat_bits
, &old_regs
->r14
, &old_unat
);
1032 copy_reg(&ms
->pmsa_gr
[15-1], ms
->pmsa_nat_bits
, &old_regs
->r15
, &old_unat
);
1033 if (ia64_psr(old_regs
)->bn
)
1034 bank
= ms
->pmsa_bank1_gr
;
1036 bank
= ms
->pmsa_bank0_gr
;
1037 copy_reg(&bank
[16-16], ms
->pmsa_nat_bits
, &old_regs
->r16
, &old_unat
);
1038 copy_reg(&bank
[17-16], ms
->pmsa_nat_bits
, &old_regs
->r17
, &old_unat
);
1039 copy_reg(&bank
[18-16], ms
->pmsa_nat_bits
, &old_regs
->r18
, &old_unat
);
1040 copy_reg(&bank
[19-16], ms
->pmsa_nat_bits
, &old_regs
->r19
, &old_unat
);
1041 copy_reg(&bank
[20-16], ms
->pmsa_nat_bits
, &old_regs
->r20
, &old_unat
);
1042 copy_reg(&bank
[21-16], ms
->pmsa_nat_bits
, &old_regs
->r21
, &old_unat
);
1043 copy_reg(&bank
[22-16], ms
->pmsa_nat_bits
, &old_regs
->r22
, &old_unat
);
1044 copy_reg(&bank
[23-16], ms
->pmsa_nat_bits
, &old_regs
->r23
, &old_unat
);
1045 copy_reg(&bank
[24-16], ms
->pmsa_nat_bits
, &old_regs
->r24
, &old_unat
);
1046 copy_reg(&bank
[25-16], ms
->pmsa_nat_bits
, &old_regs
->r25
, &old_unat
);
1047 copy_reg(&bank
[26-16], ms
->pmsa_nat_bits
, &old_regs
->r26
, &old_unat
);
1048 copy_reg(&bank
[27-16], ms
->pmsa_nat_bits
, &old_regs
->r27
, &old_unat
);
1049 copy_reg(&bank
[28-16], ms
->pmsa_nat_bits
, &old_regs
->r28
, &old_unat
);
1050 copy_reg(&bank
[29-16], ms
->pmsa_nat_bits
, &old_regs
->r29
, &old_unat
);
1051 copy_reg(&bank
[30-16], ms
->pmsa_nat_bits
, &old_regs
->r30
, &old_unat
);
1052 copy_reg(&bank
[31-16], ms
->pmsa_nat_bits
, &old_regs
->r31
, &old_unat
);
1054 /* Next stack a struct switch_stack. mca_asm.S built a partial
1055 * switch_stack, copy it and fill in the blanks using pt_regs and
1058 * In the synthesized switch_stack, b0 points to ia64_leave_kernel,
1059 * ar.pfs is set to 0.
1061 * unwind.c::unw_unwind() does special processing for interrupt frames.
1062 * It checks if the PRED_NON_SYSCALL predicate is set, if the predicate
1063 * is clear then unw_unwind() does _not_ adjust bsp over pt_regs. Not
1064 * that this is documented, of course. Set PRED_NON_SYSCALL in the
1065 * switch_stack on the original stack so it will unwind correctly when
1066 * unwind.c reads pt_regs.
1068 * thread.ksp is updated to point to the synthesized switch_stack.
1070 p
-= sizeof(struct switch_stack
);
1071 old_sw
= (struct switch_stack
*)p
;
1072 memcpy(old_sw
, sw
, sizeof(*sw
));
1073 old_sw
->caller_unat
= old_unat
;
1074 old_sw
->ar_fpsr
= old_regs
->ar_fpsr
;
1075 copy_reg(&ms
->pmsa_gr
[4-1], ms
->pmsa_nat_bits
, &old_sw
->r4
, &old_unat
);
1076 copy_reg(&ms
->pmsa_gr
[5-1], ms
->pmsa_nat_bits
, &old_sw
->r5
, &old_unat
);
1077 copy_reg(&ms
->pmsa_gr
[6-1], ms
->pmsa_nat_bits
, &old_sw
->r6
, &old_unat
);
1078 copy_reg(&ms
->pmsa_gr
[7-1], ms
->pmsa_nat_bits
, &old_sw
->r7
, &old_unat
);
1079 old_sw
->b0
= (u64
)ia64_leave_kernel
;
1080 old_sw
->b1
= ms
->pmsa_br1
;
1082 old_sw
->ar_unat
= old_unat
;
1083 old_sw
->pr
= old_regs
->pr
| (1UL << PRED_NON_SYSCALL
);
1084 previous_current
->thread
.ksp
= (u64
)p
- 16;
1086 /* Finally copy the original stack's registers back to its RBS.
1087 * Registers from ar.bspstore through ar.bsp at the time of the event
1088 * are in the current RBS, copy them back to the original stack. The
1089 * copy must be done register by register because the original bspstore
1090 * and the current one have different alignments, so the saved RNAT
1091 * data occurs at different places.
1093 * mca_asm does cover, so the old_bsp already includes all registers at
1094 * the time of MCA/INIT. It also does flushrs, so all registers before
1095 * this function have been written to backing store on the MCA/INIT
1098 new_rnat
= ia64_get_rnat(ia64_rse_rnat_addr(new_bspstore
));
1099 old_rnat
= regs
->ar_rnat
;
1101 if (ia64_rse_is_rnat_slot(new_bspstore
)) {
1102 new_rnat
= ia64_get_rnat(new_bspstore
++);
1104 if (ia64_rse_is_rnat_slot(old_bspstore
)) {
1105 *old_bspstore
++ = old_rnat
;
1108 nat
= (new_rnat
>> ia64_rse_slot_num(new_bspstore
)) & 1UL;
1109 old_rnat
&= ~(1UL << ia64_rse_slot_num(old_bspstore
));
1110 old_rnat
|= (nat
<< ia64_rse_slot_num(old_bspstore
));
1111 *old_bspstore
++ = *new_bspstore
++;
1113 old_sw
->ar_bspstore
= (unsigned long)old_bspstore
;
1114 old_sw
->ar_rnat
= old_rnat
;
1116 sos
->prev_task
= previous_current
;
1117 return previous_current
;
1120 printk(KERN_INFO
"cpu %d, %s %s, original stack not modified\n",
1121 smp_processor_id(), type
, msg
);
1122 return previous_current
;
1125 /* The monarch/slave interaction is based on monarch_cpu and requires that all
1126 * slaves have entered rendezvous before the monarch leaves. If any cpu has
1127 * not entered rendezvous yet then wait a bit. The assumption is that any
1128 * slave that has not rendezvoused after a reasonable time is never going to do
1129 * so. In this context, slave includes cpus that respond to the MCA rendezvous
1130 * interrupt, as well as cpus that receive the INIT slave event.
1134 ia64_wait_for_slaves(int monarch
, const char *type
)
1136 int c
, wait
= 0, missing
= 0;
1137 for_each_online_cpu(c
) {
1140 if (ia64_mc_info
.imi_rendez_checkin
[c
] == IA64_MCA_RENDEZ_CHECKIN_NOTDONE
) {
1141 udelay(1000); /* short wait first */
1148 for_each_online_cpu(c
) {
1151 if (ia64_mc_info
.imi_rendez_checkin
[c
] == IA64_MCA_RENDEZ_CHECKIN_NOTDONE
) {
1152 udelay(5*1000000); /* wait 5 seconds for slaves (arbitrary) */
1153 if (ia64_mc_info
.imi_rendez_checkin
[c
] == IA64_MCA_RENDEZ_CHECKIN_NOTDONE
)
1161 * Maybe slave(s) dead. Print buffered messages immediately.
1163 ia64_mlogbuf_finish(0);
1164 mprintk(KERN_INFO
"OS %s slave did not rendezvous on cpu", type
);
1165 for_each_online_cpu(c
) {
1168 if (ia64_mc_info
.imi_rendez_checkin
[c
] == IA64_MCA_RENDEZ_CHECKIN_NOTDONE
)
1175 mprintk(KERN_INFO
"All OS %s slaves have reached rendezvous\n", type
);
1182 * This is uncorrectable machine check handler called from OS_MCA
1183 * dispatch code which is in turn called from SAL_CHECK().
1184 * This is the place where the core of OS MCA handling is done.
1185 * Right now the logs are extracted and displayed in a well-defined
1186 * format. This handler code is supposed to be run only on the
1187 * monarch processor. Once the monarch is done with MCA handling
1188 * further MCA logging is enabled by clearing logs.
1189 * Monarch also has the duty of sending wakeup-IPIs to pull the
1190 * slave processors out of rendezvous spinloop.
1193 ia64_mca_handler(struct pt_regs
*regs
, struct switch_stack
*sw
,
1194 struct ia64_sal_os_state
*sos
)
1196 int recover
, cpu
= smp_processor_id();
1197 struct task_struct
*previous_current
;
1198 struct ia64_mca_notify_die nd
=
1199 { .sos
= sos
, .monarch_cpu
= &monarch_cpu
};
1201 mprintk(KERN_INFO
"Entered OS MCA handler. PSP=%lx cpu=%d "
1202 "monarch=%ld\n", sos
->proc_state_param
, cpu
, sos
->monarch
);
1204 previous_current
= ia64_mca_modify_original_stack(regs
, sw
, sos
, "MCA");
1206 if (notify_die(DIE_MCA_MONARCH_ENTER
, "MCA", regs
, (long)&nd
, 0, 0)
1208 ia64_mca_spin(__FUNCTION__
);
1209 ia64_wait_for_slaves(cpu
, "MCA");
1211 /* Wakeup all the processors which are spinning in the rendezvous loop.
1212 * They will leave SAL, then spin in the OS with interrupts disabled
1213 * until this monarch cpu leaves the MCA handler. That gets control
1214 * back to the OS so we can backtrace the other cpus, backtrace when
1215 * spinning in SAL does not work.
1217 ia64_mca_wakeup_all();
1218 if (notify_die(DIE_MCA_MONARCH_PROCESS
, "MCA", regs
, (long)&nd
, 0, 0)
1220 ia64_mca_spin(__FUNCTION__
);
1222 /* Get the MCA error record and log it */
1223 ia64_mca_log_sal_error_record(SAL_INFO_TYPE_MCA
);
1225 /* MCA error recovery */
1226 recover
= (ia64_mca_ucmc_extension
1227 && ia64_mca_ucmc_extension(
1228 IA64_LOG_CURR_BUFFER(SAL_INFO_TYPE_MCA
),
1232 sal_log_record_header_t
*rh
= IA64_LOG_CURR_BUFFER(SAL_INFO_TYPE_MCA
);
1233 rh
->severity
= sal_log_severity_corrected
;
1234 ia64_sal_clear_state_info(SAL_INFO_TYPE_MCA
);
1235 sos
->os_status
= IA64_MCA_CORRECTED
;
1237 /* Dump buffered message to console */
1238 ia64_mlogbuf_finish(1);
1240 atomic_set(&kdump_in_progress
, 1);
1244 if (notify_die(DIE_MCA_MONARCH_LEAVE
, "MCA", regs
, (long)&nd
, 0, recover
)
1246 ia64_mca_spin(__FUNCTION__
);
1248 set_curr_task(cpu
, previous_current
);
1252 static DECLARE_WORK(cmc_disable_work
, ia64_mca_cmc_vector_disable_keventd
);
1253 static DECLARE_WORK(cmc_enable_work
, ia64_mca_cmc_vector_enable_keventd
);
1256 * ia64_mca_cmc_int_handler
1258 * This is corrected machine check interrupt handler.
1259 * Right now the logs are extracted and displayed in a well-defined
1264 * client data arg ptr
1270 ia64_mca_cmc_int_handler(int cmc_irq
, void *arg
)
1272 static unsigned long cmc_history
[CMC_HISTORY_LENGTH
];
1274 static DEFINE_SPINLOCK(cmc_history_lock
);
1276 IA64_MCA_DEBUG("%s: received interrupt vector = %#x on CPU %d\n",
1277 __FUNCTION__
, cmc_irq
, smp_processor_id());
1279 /* SAL spec states this should run w/ interrupts enabled */
1282 spin_lock(&cmc_history_lock
);
1283 if (!cmc_polling_enabled
) {
1284 int i
, count
= 1; /* we know 1 happened now */
1285 unsigned long now
= jiffies
;
1287 for (i
= 0; i
< CMC_HISTORY_LENGTH
; i
++) {
1288 if (now
- cmc_history
[i
] <= HZ
)
1292 IA64_MCA_DEBUG(KERN_INFO
"CMC threshold %d/%d\n", count
, CMC_HISTORY_LENGTH
);
1293 if (count
>= CMC_HISTORY_LENGTH
) {
1295 cmc_polling_enabled
= 1;
1296 spin_unlock(&cmc_history_lock
);
1297 /* If we're being hit with CMC interrupts, we won't
1298 * ever execute the schedule_work() below. Need to
1299 * disable CMC interrupts on this processor now.
1301 ia64_mca_cmc_vector_disable(NULL
);
1302 schedule_work(&cmc_disable_work
);
1305 * Corrected errors will still be corrected, but
1306 * make sure there's a log somewhere that indicates
1307 * something is generating more than we can handle.
1309 printk(KERN_WARNING
"WARNING: Switching to polling CMC handler; error records may be lost\n");
1311 mod_timer(&cmc_poll_timer
, jiffies
+ CMC_POLL_INTERVAL
);
1313 /* lock already released, get out now */
1316 cmc_history
[index
++] = now
;
1317 if (index
== CMC_HISTORY_LENGTH
)
1321 spin_unlock(&cmc_history_lock
);
1323 /* Get the CMC error record and log it */
1324 ia64_mca_log_sal_error_record(SAL_INFO_TYPE_CMC
);
1330 * ia64_mca_cmc_int_caller
1332 * Triggered by sw interrupt from CMC polling routine. Calls
1333 * real interrupt handler and either triggers a sw interrupt
1334 * on the next cpu or does cleanup at the end.
1338 * client data arg ptr
1343 ia64_mca_cmc_int_caller(int cmc_irq
, void *arg
)
1345 static int start_count
= -1;
1348 cpuid
= smp_processor_id();
1350 /* If first cpu, update count */
1351 if (start_count
== -1)
1352 start_count
= IA64_LOG_COUNT(SAL_INFO_TYPE_CMC
);
1354 ia64_mca_cmc_int_handler(cmc_irq
, arg
);
1356 for (++cpuid
; cpuid
< NR_CPUS
&& !cpu_online(cpuid
) ; cpuid
++);
1358 if (cpuid
< NR_CPUS
) {
1359 platform_send_ipi(cpuid
, IA64_CMCP_VECTOR
, IA64_IPI_DM_INT
, 0);
1361 /* If no log record, switch out of polling mode */
1362 if (start_count
== IA64_LOG_COUNT(SAL_INFO_TYPE_CMC
)) {
1364 printk(KERN_WARNING
"Returning to interrupt driven CMC handler\n");
1365 schedule_work(&cmc_enable_work
);
1366 cmc_polling_enabled
= 0;
1370 mod_timer(&cmc_poll_timer
, jiffies
+ CMC_POLL_INTERVAL
);
1382 * Poll for Corrected Machine Checks (CMCs)
1384 * Inputs : dummy(unused)
1389 ia64_mca_cmc_poll (unsigned long dummy
)
1391 /* Trigger a CMC interrupt cascade */
1392 platform_send_ipi(first_cpu(cpu_online_map
), IA64_CMCP_VECTOR
, IA64_IPI_DM_INT
, 0);
1396 * ia64_mca_cpe_int_caller
1398 * Triggered by sw interrupt from CPE polling routine. Calls
1399 * real interrupt handler and either triggers a sw interrupt
1400 * on the next cpu or does cleanup at the end.
1404 * client data arg ptr
1411 ia64_mca_cpe_int_caller(int cpe_irq
, void *arg
)
1413 static int start_count
= -1;
1414 static int poll_time
= MIN_CPE_POLL_INTERVAL
;
1417 cpuid
= smp_processor_id();
1419 /* If first cpu, update count */
1420 if (start_count
== -1)
1421 start_count
= IA64_LOG_COUNT(SAL_INFO_TYPE_CPE
);
1423 ia64_mca_cpe_int_handler(cpe_irq
, arg
);
1425 for (++cpuid
; cpuid
< NR_CPUS
&& !cpu_online(cpuid
) ; cpuid
++);
1427 if (cpuid
< NR_CPUS
) {
1428 platform_send_ipi(cpuid
, IA64_CPEP_VECTOR
, IA64_IPI_DM_INT
, 0);
1431 * If a log was recorded, increase our polling frequency,
1432 * otherwise, backoff or return to interrupt mode.
1434 if (start_count
!= IA64_LOG_COUNT(SAL_INFO_TYPE_CPE
)) {
1435 poll_time
= max(MIN_CPE_POLL_INTERVAL
, poll_time
/ 2);
1436 } else if (cpe_vector
< 0) {
1437 poll_time
= min(MAX_CPE_POLL_INTERVAL
, poll_time
* 2);
1439 poll_time
= MIN_CPE_POLL_INTERVAL
;
1441 printk(KERN_WARNING
"Returning to interrupt driven CPE handler\n");
1442 enable_irq(local_vector_to_irq(IA64_CPE_VECTOR
));
1443 cpe_poll_enabled
= 0;
1446 if (cpe_poll_enabled
)
1447 mod_timer(&cpe_poll_timer
, jiffies
+ poll_time
);
1457 * Poll for Corrected Platform Errors (CPEs), trigger interrupt
1458 * on first cpu, from there it will trickle through all the cpus.
1460 * Inputs : dummy(unused)
1465 ia64_mca_cpe_poll (unsigned long dummy
)
1467 /* Trigger a CPE interrupt cascade */
1468 platform_send_ipi(first_cpu(cpu_online_map
), IA64_CPEP_VECTOR
, IA64_IPI_DM_INT
, 0);
1471 #endif /* CONFIG_ACPI */
1474 default_monarch_init_process(struct notifier_block
*self
, unsigned long val
, void *data
)
1477 struct task_struct
*g
, *t
;
1478 if (val
!= DIE_INIT_MONARCH_PROCESS
)
1482 * FIXME: mlogbuf will brim over with INIT stack dumps.
1483 * To enable show_stack from INIT, we use oops_in_progress which should
1484 * be used in real oops. This would cause something wrong after INIT.
1486 BREAK_LOGLEVEL(console_loglevel
);
1487 ia64_mlogbuf_dump_from_init();
1489 printk(KERN_ERR
"Processes interrupted by INIT -");
1490 for_each_online_cpu(c
) {
1491 struct ia64_sal_os_state
*s
;
1492 t
= __va(__per_cpu_mca
[c
] + IA64_MCA_CPU_INIT_STACK_OFFSET
);
1493 s
= (struct ia64_sal_os_state
*)((char *)t
+ MCA_SOS_OFFSET
);
1497 printk(" %d", g
->pid
);
1499 printk(" %d (cpu %d task 0x%p)", g
->pid
, task_cpu(g
), g
);
1503 if (read_trylock(&tasklist_lock
)) {
1504 do_each_thread (g
, t
) {
1505 printk("\nBacktrace of pid %d (%s)\n", t
->pid
, t
->comm
);
1506 show_stack(t
, NULL
);
1507 } while_each_thread (g
, t
);
1508 read_unlock(&tasklist_lock
);
1510 /* FIXME: This will not restore zapped printk locks. */
1511 RESTORE_LOGLEVEL(console_loglevel
);
1516 * C portion of the OS INIT handler
1518 * Called from ia64_os_init_dispatch
1520 * Inputs: pointer to pt_regs where processor info was saved. SAL/OS state for
1521 * this event. This code is used for both monarch and slave INIT events, see
1524 * All INIT events switch to the INIT stack and change the previous process to
1525 * blocked status. If one of the INIT events is the monarch then we are
1526 * probably processing the nmi button/command. Use the monarch cpu to dump all
1527 * the processes. The slave INIT events all spin until the monarch cpu
1528 * returns. We can also get INIT slave events for MCA, in which case the MCA
1529 * process is the monarch.
1533 ia64_init_handler(struct pt_regs
*regs
, struct switch_stack
*sw
,
1534 struct ia64_sal_os_state
*sos
)
1536 static atomic_t slaves
;
1537 static atomic_t monarchs
;
1538 struct task_struct
*previous_current
;
1539 int cpu
= smp_processor_id();
1540 struct ia64_mca_notify_die nd
=
1541 { .sos
= sos
, .monarch_cpu
= &monarch_cpu
};
1543 (void) notify_die(DIE_INIT_ENTER
, "INIT", regs
, (long)&nd
, 0, 0);
1545 mprintk(KERN_INFO
"Entered OS INIT handler. PSP=%lx cpu=%d monarch=%ld\n",
1546 sos
->proc_state_param
, cpu
, sos
->monarch
);
1547 salinfo_log_wakeup(SAL_INFO_TYPE_INIT
, NULL
, 0, 0);
1549 previous_current
= ia64_mca_modify_original_stack(regs
, sw
, sos
, "INIT");
1550 sos
->os_status
= IA64_INIT_RESUME
;
1552 /* FIXME: Workaround for broken proms that drive all INIT events as
1553 * slaves. The last slave that enters is promoted to be a monarch.
1554 * Remove this code in September 2006, that gives platforms a year to
1555 * fix their proms and get their customers updated.
1557 if (!sos
->monarch
&& atomic_add_return(1, &slaves
) == num_online_cpus()) {
1558 mprintk(KERN_WARNING
"%s: Promoting cpu %d to monarch.\n",
1560 atomic_dec(&slaves
);
1564 /* FIXME: Workaround for broken proms that drive all INIT events as
1565 * monarchs. Second and subsequent monarchs are demoted to slaves.
1566 * Remove this code in September 2006, that gives platforms a year to
1567 * fix their proms and get their customers updated.
1569 if (sos
->monarch
&& atomic_add_return(1, &monarchs
) > 1) {
1570 mprintk(KERN_WARNING
"%s: Demoting cpu %d to slave.\n",
1572 atomic_dec(&monarchs
);
1576 if (!sos
->monarch
) {
1577 ia64_mc_info
.imi_rendez_checkin
[cpu
] = IA64_MCA_RENDEZ_CHECKIN_INIT
;
1578 while (monarch_cpu
== -1)
1579 cpu_relax(); /* spin until monarch enters */
1580 if (notify_die(DIE_INIT_SLAVE_ENTER
, "INIT", regs
, (long)&nd
, 0, 0)
1582 ia64_mca_spin(__FUNCTION__
);
1583 if (notify_die(DIE_INIT_SLAVE_PROCESS
, "INIT", regs
, (long)&nd
, 0, 0)
1585 ia64_mca_spin(__FUNCTION__
);
1586 while (monarch_cpu
!= -1)
1587 cpu_relax(); /* spin until monarch leaves */
1588 if (notify_die(DIE_INIT_SLAVE_LEAVE
, "INIT", regs
, (long)&nd
, 0, 0)
1590 ia64_mca_spin(__FUNCTION__
);
1591 mprintk("Slave on cpu %d returning to normal service.\n", cpu
);
1592 set_curr_task(cpu
, previous_current
);
1593 ia64_mc_info
.imi_rendez_checkin
[cpu
] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE
;
1594 atomic_dec(&slaves
);
1599 if (notify_die(DIE_INIT_MONARCH_ENTER
, "INIT", regs
, (long)&nd
, 0, 0)
1601 ia64_mca_spin(__FUNCTION__
);
1604 * Wait for a bit. On some machines (e.g., HP's zx2000 and zx6000, INIT can be
1605 * generated via the BMC's command-line interface, but since the console is on the
1606 * same serial line, the user will need some time to switch out of the BMC before
1609 mprintk("Delaying for 5 seconds...\n");
1611 ia64_wait_for_slaves(cpu
, "INIT");
1612 /* If nobody intercepts DIE_INIT_MONARCH_PROCESS then we drop through
1613 * to default_monarch_init_process() above and just print all the
1616 if (notify_die(DIE_INIT_MONARCH_PROCESS
, "INIT", regs
, (long)&nd
, 0, 0)
1618 ia64_mca_spin(__FUNCTION__
);
1619 if (notify_die(DIE_INIT_MONARCH_LEAVE
, "INIT", regs
, (long)&nd
, 0, 0)
1621 ia64_mca_spin(__FUNCTION__
);
1622 mprintk("\nINIT dump complete. Monarch on cpu %d returning to normal service.\n", cpu
);
1623 atomic_dec(&monarchs
);
1624 set_curr_task(cpu
, previous_current
);
1630 ia64_mca_disable_cpe_polling(char *str
)
1632 cpe_poll_enabled
= 0;
1636 __setup("disable_cpe_poll", ia64_mca_disable_cpe_polling
);
1638 static struct irqaction cmci_irqaction
= {
1639 .handler
= ia64_mca_cmc_int_handler
,
1640 .flags
= IRQF_DISABLED
,
1644 static struct irqaction cmcp_irqaction
= {
1645 .handler
= ia64_mca_cmc_int_caller
,
1646 .flags
= IRQF_DISABLED
,
1650 static struct irqaction mca_rdzv_irqaction
= {
1651 .handler
= ia64_mca_rendez_int_handler
,
1652 .flags
= IRQF_DISABLED
,
1656 static struct irqaction mca_wkup_irqaction
= {
1657 .handler
= ia64_mca_wakeup_int_handler
,
1658 .flags
= IRQF_DISABLED
,
1663 static struct irqaction mca_cpe_irqaction
= {
1664 .handler
= ia64_mca_cpe_int_handler
,
1665 .flags
= IRQF_DISABLED
,
1669 static struct irqaction mca_cpep_irqaction
= {
1670 .handler
= ia64_mca_cpe_int_caller
,
1671 .flags
= IRQF_DISABLED
,
1674 #endif /* CONFIG_ACPI */
1676 /* Minimal format of the MCA/INIT stacks. The pseudo processes that run on
1677 * these stacks can never sleep, they cannot return from the kernel to user
1678 * space, they do not appear in a normal ps listing. So there is no need to
1679 * format most of the fields.
1682 static void __cpuinit
1683 format_mca_init_stack(void *mca_data
, unsigned long offset
,
1684 const char *type
, int cpu
)
1686 struct task_struct
*p
= (struct task_struct
*)((char *)mca_data
+ offset
);
1687 struct thread_info
*ti
;
1688 memset(p
, 0, KERNEL_STACK_SIZE
);
1689 ti
= task_thread_info(p
);
1690 ti
->flags
= _TIF_MCA_INIT
;
1691 ti
->preempt_count
= 1;
1695 p
->state
= TASK_UNINTERRUPTIBLE
;
1696 cpu_set(cpu
, p
->cpus_allowed
);
1697 INIT_LIST_HEAD(&p
->tasks
);
1698 p
->parent
= p
->real_parent
= p
->group_leader
= p
;
1699 INIT_LIST_HEAD(&p
->children
);
1700 INIT_LIST_HEAD(&p
->sibling
);
1701 strncpy(p
->comm
, type
, sizeof(p
->comm
)-1);
1704 /* Do per-CPU MCA-related initialization. */
1707 ia64_mca_cpu_init(void *cpu_data
)
1710 static int first_time
= 1;
1717 mca_data
= alloc_bootmem(sizeof(struct ia64_mca_cpu
)
1718 * NR_CPUS
+ KERNEL_STACK_SIZE
);
1719 mca_data
= (void *)(((unsigned long)mca_data
+
1720 KERNEL_STACK_SIZE
- 1) &
1721 (-KERNEL_STACK_SIZE
));
1722 for (cpu
= 0; cpu
< NR_CPUS
; cpu
++) {
1723 format_mca_init_stack(mca_data
,
1724 offsetof(struct ia64_mca_cpu
, mca_stack
),
1726 format_mca_init_stack(mca_data
,
1727 offsetof(struct ia64_mca_cpu
, init_stack
),
1729 __per_cpu_mca
[cpu
] = __pa(mca_data
);
1730 mca_data
+= sizeof(struct ia64_mca_cpu
);
1735 * The MCA info structure was allocated earlier and its
1736 * physical address saved in __per_cpu_mca[cpu]. Copy that
1737 * address * to ia64_mca_data so we can access it as a per-CPU
1740 __get_cpu_var(ia64_mca_data
) = __per_cpu_mca
[smp_processor_id()];
1743 * Stash away a copy of the PTE needed to map the per-CPU page.
1744 * We may need it during MCA recovery.
1746 __get_cpu_var(ia64_mca_per_cpu_pte
) =
1747 pte_val(mk_pte_phys(__pa(cpu_data
), PAGE_KERNEL
));
1750 * Also, stash away a copy of the PAL address and the PTE
1753 pal_vaddr
= efi_get_pal_addr();
1756 __get_cpu_var(ia64_mca_pal_base
) =
1757 GRANULEROUNDDOWN((unsigned long) pal_vaddr
);
1758 __get_cpu_var(ia64_mca_pal_pte
) = pte_val(mk_pte_phys(__pa(pal_vaddr
),
1765 * Do all the system level mca specific initialization.
1767 * 1. Register spinloop and wakeup request interrupt vectors
1769 * 2. Register OS_MCA handler entry point
1771 * 3. Register OS_INIT handler entry point
1773 * 4. Initialize MCA/CMC/INIT related log buffers maintained by the OS.
1775 * Note that this initialization is done very early before some kernel
1776 * services are available.
1785 ia64_fptr_t
*init_hldlr_ptr_monarch
= (ia64_fptr_t
*)ia64_os_init_dispatch_monarch
;
1786 ia64_fptr_t
*init_hldlr_ptr_slave
= (ia64_fptr_t
*)ia64_os_init_dispatch_slave
;
1787 ia64_fptr_t
*mca_hldlr_ptr
= (ia64_fptr_t
*)ia64_os_mca_dispatch
;
1790 struct ia64_sal_retval isrv
;
1791 u64 timeout
= IA64_MCA_RENDEZ_TIMEOUT
; /* platform specific */
1792 static struct notifier_block default_init_monarch_nb
= {
1793 .notifier_call
= default_monarch_init_process
,
1794 .priority
= 0/* we need to notified last */
1797 IA64_MCA_DEBUG("%s: begin\n", __FUNCTION__
);
1799 /* Clear the Rendez checkin flag for all cpus */
1800 for(i
= 0 ; i
< NR_CPUS
; i
++)
1801 ia64_mc_info
.imi_rendez_checkin
[i
] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE
;
1804 * Register the rendezvous spinloop and wakeup mechanism with SAL
1807 /* Register the rendezvous interrupt vector with SAL */
1809 isrv
= ia64_sal_mc_set_params(SAL_MC_PARAM_RENDEZ_INT
,
1810 SAL_MC_PARAM_MECHANISM_INT
,
1811 IA64_MCA_RENDEZ_VECTOR
,
1813 SAL_MC_PARAM_RZ_ALWAYS
);
1818 printk(KERN_INFO
"Increasing MCA rendezvous timeout from "
1819 "%ld to %ld milliseconds\n", timeout
, isrv
.v0
);
1821 (void) notify_die(DIE_MCA_NEW_TIMEOUT
, "MCA", NULL
, timeout
, 0, 0);
1824 printk(KERN_ERR
"Failed to register rendezvous interrupt "
1825 "with SAL (status %ld)\n", rc
);
1829 /* Register the wakeup interrupt vector with SAL */
1830 isrv
= ia64_sal_mc_set_params(SAL_MC_PARAM_RENDEZ_WAKEUP
,
1831 SAL_MC_PARAM_MECHANISM_INT
,
1832 IA64_MCA_WAKEUP_VECTOR
,
1836 printk(KERN_ERR
"Failed to register wakeup interrupt with SAL "
1837 "(status %ld)\n", rc
);
1841 IA64_MCA_DEBUG("%s: registered MCA rendezvous spinloop and wakeup mech.\n", __FUNCTION__
);
1843 ia64_mc_info
.imi_mca_handler
= ia64_tpa(mca_hldlr_ptr
->fp
);
1845 * XXX - disable SAL checksum by setting size to 0; should be
1846 * ia64_tpa(ia64_os_mca_dispatch_end) - ia64_tpa(ia64_os_mca_dispatch);
1848 ia64_mc_info
.imi_mca_handler_size
= 0;
1850 /* Register the os mca handler with SAL */
1851 if ((rc
= ia64_sal_set_vectors(SAL_VECTOR_OS_MCA
,
1852 ia64_mc_info
.imi_mca_handler
,
1853 ia64_tpa(mca_hldlr_ptr
->gp
),
1854 ia64_mc_info
.imi_mca_handler_size
,
1857 printk(KERN_ERR
"Failed to register OS MCA handler with SAL "
1858 "(status %ld)\n", rc
);
1862 IA64_MCA_DEBUG("%s: registered OS MCA handler with SAL at 0x%lx, gp = 0x%lx\n", __FUNCTION__
,
1863 ia64_mc_info
.imi_mca_handler
, ia64_tpa(mca_hldlr_ptr
->gp
));
1866 * XXX - disable SAL checksum by setting size to 0, should be
1867 * size of the actual init handler in mca_asm.S.
1869 ia64_mc_info
.imi_monarch_init_handler
= ia64_tpa(init_hldlr_ptr_monarch
->fp
);
1870 ia64_mc_info
.imi_monarch_init_handler_size
= 0;
1871 ia64_mc_info
.imi_slave_init_handler
= ia64_tpa(init_hldlr_ptr_slave
->fp
);
1872 ia64_mc_info
.imi_slave_init_handler_size
= 0;
1874 IA64_MCA_DEBUG("%s: OS INIT handler at %lx\n", __FUNCTION__
,
1875 ia64_mc_info
.imi_monarch_init_handler
);
1877 /* Register the os init handler with SAL */
1878 if ((rc
= ia64_sal_set_vectors(SAL_VECTOR_OS_INIT
,
1879 ia64_mc_info
.imi_monarch_init_handler
,
1880 ia64_tpa(ia64_getreg(_IA64_REG_GP
)),
1881 ia64_mc_info
.imi_monarch_init_handler_size
,
1882 ia64_mc_info
.imi_slave_init_handler
,
1883 ia64_tpa(ia64_getreg(_IA64_REG_GP
)),
1884 ia64_mc_info
.imi_slave_init_handler_size
)))
1886 printk(KERN_ERR
"Failed to register m/s INIT handlers with SAL "
1887 "(status %ld)\n", rc
);
1890 if (register_die_notifier(&default_init_monarch_nb
)) {
1891 printk(KERN_ERR
"Failed to register default monarch INIT process\n");
1895 IA64_MCA_DEBUG("%s: registered OS INIT handler with SAL\n", __FUNCTION__
);
1898 * Configure the CMCI/P vector and handler. Interrupts for CMC are
1899 * per-processor, so AP CMC interrupts are setup in smp_callin() (smpboot.c).
1901 register_percpu_irq(IA64_CMC_VECTOR
, &cmci_irqaction
);
1902 register_percpu_irq(IA64_CMCP_VECTOR
, &cmcp_irqaction
);
1903 ia64_mca_cmc_vector_setup(); /* Setup vector on BSP */
1905 /* Setup the MCA rendezvous interrupt vector */
1906 register_percpu_irq(IA64_MCA_RENDEZ_VECTOR
, &mca_rdzv_irqaction
);
1908 /* Setup the MCA wakeup interrupt vector */
1909 register_percpu_irq(IA64_MCA_WAKEUP_VECTOR
, &mca_wkup_irqaction
);
1912 /* Setup the CPEI/P handler */
1913 register_percpu_irq(IA64_CPEP_VECTOR
, &mca_cpep_irqaction
);
1916 /* Initialize the areas set aside by the OS to buffer the
1917 * platform/processor error states for MCA/INIT/CMC
1920 ia64_log_init(SAL_INFO_TYPE_MCA
);
1921 ia64_log_init(SAL_INFO_TYPE_INIT
);
1922 ia64_log_init(SAL_INFO_TYPE_CMC
);
1923 ia64_log_init(SAL_INFO_TYPE_CPE
);
1926 printk(KERN_INFO
"MCA related initialization done\n");
1930 * ia64_mca_late_init
1932 * Opportunity to setup things that require initialization later
1933 * than ia64_mca_init. Setup a timer to poll for CPEs if the
1934 * platform doesn't support an interrupt driven mechanism.
1940 ia64_mca_late_init(void)
1945 /* Setup the CMCI/P vector and handler */
1946 init_timer(&cmc_poll_timer
);
1947 cmc_poll_timer
.function
= ia64_mca_cmc_poll
;
1949 /* Unmask/enable the vector */
1950 cmc_polling_enabled
= 0;
1951 schedule_work(&cmc_enable_work
);
1953 IA64_MCA_DEBUG("%s: CMCI/P setup and enabled.\n", __FUNCTION__
);
1956 /* Setup the CPEI/P vector and handler */
1957 cpe_vector
= acpi_request_vector(ACPI_INTERRUPT_CPEI
);
1958 init_timer(&cpe_poll_timer
);
1959 cpe_poll_timer
.function
= ia64_mca_cpe_poll
;
1965 if (cpe_vector
>= 0) {
1966 /* If platform supports CPEI, enable the irq. */
1967 cpe_poll_enabled
= 0;
1968 for (irq
= 0; irq
< NR_IRQS
; ++irq
)
1969 if (irq_to_vector(irq
) == cpe_vector
) {
1970 desc
= irq_desc
+ irq
;
1971 desc
->status
|= IRQ_PER_CPU
;
1972 setup_irq(irq
, &mca_cpe_irqaction
);
1975 ia64_mca_register_cpev(cpe_vector
);
1976 IA64_MCA_DEBUG("%s: CPEI/P setup and enabled.\n", __FUNCTION__
);
1978 /* If platform doesn't support CPEI, get the timer going. */
1979 if (cpe_poll_enabled
) {
1980 ia64_mca_cpe_poll(0UL);
1981 IA64_MCA_DEBUG("%s: CPEP setup and enabled.\n", __FUNCTION__
);
1990 device_initcall(ia64_mca_late_init
);