x86, smp: refactor ->wake_cpu
[linux-2.6/mini2440.git] / arch / x86 / include / asm / mach-default / mach_apic.h
blobbae053cdcde5c0275cac6e4b814a9a6fb336eff1
1 #ifndef _ASM_X86_MACH_DEFAULT_MACH_APIC_H
2 #define _ASM_X86_MACH_DEFAULT_MACH_APIC_H
4 #ifdef CONFIG_X86_LOCAL_APIC
6 #include <asm/smp.h>
8 #define APIC_DFR_VALUE (APIC_DFR_FLAT)
10 static inline const struct cpumask *default_target_cpus(void)
12 #ifdef CONFIG_SMP
13 return cpu_online_mask;
14 #else
15 return cpumask_of(0);
16 #endif
19 #ifdef CONFIG_X86_64
20 #include <asm/genapic.h>
21 #define read_apic_id() (apic->get_apic_id(apic_read(APIC_ID)))
22 extern void default_setup_apic_routing(void);
23 #else
25 * Set up the logical destination ID.
27 * Intel recommends to set DFR, LDR and TPR before enabling
28 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
29 * document number 292116). So here it goes...
31 static inline void default_init_apic_ldr(void)
33 unsigned long val;
35 apic_write(APIC_DFR, APIC_DFR_VALUE);
36 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
37 val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());
38 apic_write(APIC_LDR, val);
41 static inline int default_apic_id_registered(void)
43 return physid_isset(read_apic_id(), phys_cpu_present_map);
46 static inline unsigned int
47 default_cpu_mask_to_apicid(const struct cpumask *cpumask)
49 return cpumask_bits(cpumask)[0];
52 static inline unsigned int
53 default_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
54 const struct cpumask *andmask)
56 unsigned long mask1 = cpumask_bits(cpumask)[0];
57 unsigned long mask2 = cpumask_bits(andmask)[0];
58 unsigned long mask3 = cpumask_bits(cpu_online_mask)[0];
60 return (unsigned int)(mask1 & mask2 & mask3);
63 static inline int default_phys_pkg_id(int cpuid_apic, int index_msb)
65 return cpuid_apic >> index_msb;
68 static inline void default_setup_apic_routing(void)
70 #ifdef CONFIG_X86_IO_APIC
71 printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
72 "Flat", nr_ioapics);
73 #endif
76 static inline int default_apicid_to_node(int logical_apicid)
78 #ifdef CONFIG_SMP
79 return apicid_2_node[hard_smp_processor_id()];
80 #else
81 return 0;
82 #endif
85 #endif
87 static inline unsigned long default_check_apicid_used(physid_mask_t bitmap, int apicid)
89 return physid_isset(apicid, bitmap);
92 static inline unsigned long default_check_apicid_present(int bit)
94 return physid_isset(bit, phys_cpu_present_map);
97 static inline physid_mask_t default_ioapic_phys_id_map(physid_mask_t phys_map)
99 return phys_map;
102 /* Mapping from cpu number to logical apicid */
103 static inline int default_cpu_to_logical_apicid(int cpu)
105 return 1 << cpu;
108 static inline int __default_cpu_present_to_apicid(int mps_cpu)
110 if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu))
111 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
112 else
113 return BAD_APICID;
116 static inline int
117 __default_check_phys_apicid_present(int boot_cpu_physical_apicid)
119 return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
122 #ifdef CONFIG_X86_32
123 static inline int default_cpu_present_to_apicid(int mps_cpu)
125 return __default_cpu_present_to_apicid(mps_cpu);
128 static inline int
129 default_check_phys_apicid_present(int boot_cpu_physical_apicid)
131 return __default_check_phys_apicid_present(boot_cpu_physical_apicid);
133 #else
134 extern int default_cpu_present_to_apicid(int mps_cpu);
135 extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
136 #endif
138 static inline physid_mask_t default_apicid_to_cpu_present(int phys_apicid)
140 return physid_mask_of_physid(phys_apicid);
143 #endif /* CONFIG_X86_LOCAL_APIC */
144 #endif /* _ASM_X86_MACH_DEFAULT_MACH_APIC_H */