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udf: support files larger than 1G
[linux-2.6/mini2440.git] / drivers / net / tc35815.c
blobf1e2dfc795a2bdce9036259f76c207e5d6c06af0
1 /*
2 * tc35815.c: A TOSHIBA TC35815CF PCI 10/100Mbps ethernet driver for linux.
3 *
4 * Based on skelton.c by Donald Becker.
5 *
6 * This driver is a replacement of older and less maintained version.
7 * This is a header of the older version:
8 * -----<snip>-----
9 * Copyright 2001 MontaVista Software Inc.
10 * Author: MontaVista Software, Inc.
11 * ahennessy@mvista.com
12 * Copyright (C) 2000-2001 Toshiba Corporation
13 * static const char *version =
14 * "tc35815.c:v0.00 26/07/2000 by Toshiba Corporation\n";
15 * -----<snip>-----
16 *
17 * This file is subject to the terms and conditions of the GNU General Public
18 * License. See the file "COPYING" in the main directory of this archive
19 * for more details.
20 *
21 * (C) Copyright TOSHIBA CORPORATION 2004-2005
22 * All Rights Reserved.
23 */
24
25 #ifdef TC35815_NAPI
26 #define DRV_VERSION "1.35-NAPI"
27 #else
28 #define DRV_VERSION "1.35"
29 #endif
30 static const char *version = "tc35815.c:v" DRV_VERSION "\n";
31 #define MODNAME "tc35815"
32
33 #include <linux/module.h>
34 #include <linux/kernel.h>
35 #include <linux/types.h>
36 #include <linux/fcntl.h>
37 #include <linux/interrupt.h>
38 #include <linux/ioport.h>
39 #include <linux/in.h>
40 #include <linux/slab.h>
41 #include <linux/string.h>
42 #include <linux/spinlock.h>
43 #include <linux/errno.h>
44 #include <linux/init.h>
45 #include <linux/netdevice.h>
46 #include <linux/etherdevice.h>
47 #include <linux/skbuff.h>
48 #include <linux/delay.h>
49 #include <linux/pci.h>
50 #include <linux/mii.h>
51 #include <linux/ethtool.h>
52 #include <asm/io.h>
53 #include <asm/byteorder.h>
54
55 /* First, a few definitions that the brave might change. */
56
57 #define GATHER_TXINT /* On-Demand Tx Interrupt */
58 #define WORKAROUND_LOSTCAR
59 #define WORKAROUND_100HALF_PROMISC
60 /* #define TC35815_USE_PACKEDBUFFER */
61
62 typedef enum {
63 TC35815CF = 0,
64 TC35815_NWU,
65 TC35815_TX4939,
66 } board_t;
67
68 /* indexed by board_t, above */
69 static const struct {
70 const char *name;
71 } board_info[] __devinitdata = {
72 { "TOSHIBA TC35815CF 10/100BaseTX" },
73 { "TOSHIBA TC35815 with Wake on LAN" },
74 { "TOSHIBA TC35815/TX4939" },
75 };
76
77 static const struct pci_device_id tc35815_pci_tbl[] = {
78 {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815CF), .driver_data = TC35815CF },
79 {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_NWU), .driver_data = TC35815_NWU },
80 {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939), .driver_data = TC35815_TX4939 },
81 {0,}
82 };
83 MODULE_DEVICE_TABLE (pci, tc35815_pci_tbl);
84
85 /* see MODULE_PARM_DESC */
86 static struct tc35815_options {
87 int speed;
88 int duplex;
89 int doforce;
90 } options;
91
92 /*
93 * Registers
94 */
95 struct tc35815_regs {
96 volatile __u32 DMA_Ctl; /* 0x00 */
97 volatile __u32 TxFrmPtr;
98 volatile __u32 TxThrsh;
99 volatile __u32 TxPollCtr;
100 volatile __u32 BLFrmPtr;
101 volatile __u32 RxFragSize;
102 volatile __u32 Int_En;
103 volatile __u32 FDA_Bas;
104 volatile __u32 FDA_Lim; /* 0x20 */
105 volatile __u32 Int_Src;
106 volatile __u32 unused0[2];
107 volatile __u32 PauseCnt;
108 volatile __u32 RemPauCnt;
109 volatile __u32 TxCtlFrmStat;
110 volatile __u32 unused1;
111 volatile __u32 MAC_Ctl; /* 0x40 */
112 volatile __u32 CAM_Ctl;
113 volatile __u32 Tx_Ctl;
114 volatile __u32 Tx_Stat;
115 volatile __u32 Rx_Ctl;
116 volatile __u32 Rx_Stat;
117 volatile __u32 MD_Data;
118 volatile __u32 MD_CA;
119 volatile __u32 CAM_Adr; /* 0x60 */
120 volatile __u32 CAM_Data;
121 volatile __u32 CAM_Ena;
122 volatile __u32 PROM_Ctl;
123 volatile __u32 PROM_Data;
124 volatile __u32 Algn_Cnt;
125 volatile __u32 CRC_Cnt;
126 volatile __u32 Miss_Cnt;
127 };
128
129 /*
130 * Bit assignments
131 */
132 /* DMA_Ctl bit asign ------------------------------------------------------- */
133 #define DMA_RxAlign 0x00c00000 /* 1:Reception Alignment */
134 #define DMA_RxAlign_1 0x00400000
135 #define DMA_RxAlign_2 0x00800000
136 #define DMA_RxAlign_3 0x00c00000
137 #define DMA_M66EnStat 0x00080000 /* 1:66MHz Enable State */
138 #define DMA_IntMask 0x00040000 /* 1:Interupt mask */
139 #define DMA_SWIntReq 0x00020000 /* 1:Software Interrupt request */
140 #define DMA_TxWakeUp 0x00010000 /* 1:Transmit Wake Up */
141 #define DMA_RxBigE 0x00008000 /* 1:Receive Big Endian */
142 #define DMA_TxBigE 0x00004000 /* 1:Transmit Big Endian */
143 #define DMA_TestMode 0x00002000 /* 1:Test Mode */
144 #define DMA_PowrMgmnt 0x00001000 /* 1:Power Management */
145 #define DMA_DmBurst_Mask 0x000001fc /* DMA Burst size */
146
147 /* RxFragSize bit asign ---------------------------------------------------- */
148 #define RxFrag_EnPack 0x00008000 /* 1:Enable Packing */
149 #define RxFrag_MinFragMask 0x00000ffc /* Minimum Fragment */
150
151 /* MAC_Ctl bit asign ------------------------------------------------------- */
152 #define MAC_Link10 0x00008000 /* 1:Link Status 10Mbits */
153 #define MAC_EnMissRoll 0x00002000 /* 1:Enable Missed Roll */
154 #define MAC_MissRoll 0x00000400 /* 1:Missed Roll */
155 #define MAC_Loop10 0x00000080 /* 1:Loop 10 Mbps */
156 #define MAC_Conn_Auto 0x00000000 /*00:Connection mode (Automatic) */
157 #define MAC_Conn_10M 0x00000020 /*01: (10Mbps endec)*/
158 #define MAC_Conn_Mll 0x00000040 /*10: (Mll clock) */
159 #define MAC_MacLoop 0x00000010 /* 1:MAC Loopback */
160 #define MAC_FullDup 0x00000008 /* 1:Full Duplex 0:Half Duplex */
161 #define MAC_Reset 0x00000004 /* 1:Software Reset */
162 #define MAC_HaltImm 0x00000002 /* 1:Halt Immediate */
163 #define MAC_HaltReq 0x00000001 /* 1:Halt request */
164
165 /* PROM_Ctl bit asign ------------------------------------------------------ */
166 #define PROM_Busy 0x00008000 /* 1:Busy (Start Operation) */
167 #define PROM_Read 0x00004000 /*10:Read operation */
168 #define PROM_Write 0x00002000 /*01:Write operation */
169 #define PROM_Erase 0x00006000 /*11:Erase operation */
170 /*00:Enable or Disable Writting, */
171 /* as specified in PROM_Addr. */
172 #define PROM_Addr_Ena 0x00000030 /*11xxxx:PROM Write enable */
173 /*00xxxx: disable */
174
175 /* CAM_Ctl bit asign ------------------------------------------------------- */
176 #define CAM_CompEn 0x00000010 /* 1:CAM Compare Enable */
177 #define CAM_NegCAM 0x00000008 /* 1:Reject packets CAM recognizes,*/
178 /* accept other */
179 #define CAM_BroadAcc 0x00000004 /* 1:Broadcast assept */
180 #define CAM_GroupAcc 0x00000002 /* 1:Multicast assept */
181 #define CAM_StationAcc 0x00000001 /* 1:unicast accept */
182
183 /* CAM_Ena bit asign ------------------------------------------------------- */
184 #define CAM_ENTRY_MAX 21 /* CAM Data entry max count */
185 #define CAM_Ena_Mask ((1<<CAM_ENTRY_MAX)-1) /* CAM Enable bits (Max 21bits) */
186 #define CAM_Ena_Bit(index) (1<<(index))
187 #define CAM_ENTRY_DESTINATION 0
188 #define CAM_ENTRY_SOURCE 1
189 #define CAM_ENTRY_MACCTL 20
190
191 /* Tx_Ctl bit asign -------------------------------------------------------- */
192 #define Tx_En 0x00000001 /* 1:Transmit enable */
193 #define Tx_TxHalt 0x00000002 /* 1:Transmit Halt Request */
194 #define Tx_NoPad 0x00000004 /* 1:Suppress Padding */
195 #define Tx_NoCRC 0x00000008 /* 1:Suppress Padding */
196 #define Tx_FBack 0x00000010 /* 1:Fast Back-off */
197 #define Tx_EnUnder 0x00000100 /* 1:Enable Underrun */
198 #define Tx_EnExDefer 0x00000200 /* 1:Enable Excessive Deferral */
199 #define Tx_EnLCarr 0x00000400 /* 1:Enable Lost Carrier */
200 #define Tx_EnExColl 0x00000800 /* 1:Enable Excessive Collision */
201 #define Tx_EnLateColl 0x00001000 /* 1:Enable Late Collision */
202 #define Tx_EnTxPar 0x00002000 /* 1:Enable Transmit Parity */
203 #define Tx_EnComp 0x00004000 /* 1:Enable Completion */
204
205 /* Tx_Stat bit asign ------------------------------------------------------- */
206 #define Tx_TxColl_MASK 0x0000000F /* Tx Collision Count */
207 #define Tx_ExColl 0x00000010 /* Excessive Collision */
208 #define Tx_TXDefer 0x00000020 /* Transmit Defered */
209 #define Tx_Paused 0x00000040 /* Transmit Paused */
210 #define Tx_IntTx 0x00000080 /* Interrupt on Tx */
211 #define Tx_Under 0x00000100 /* Underrun */
212 #define Tx_Defer 0x00000200 /* Deferral */
213 #define Tx_NCarr 0x00000400 /* No Carrier */
214 #define Tx_10Stat 0x00000800 /* 10Mbps Status */
215 #define Tx_LateColl 0x00001000 /* Late Collision */
216 #define Tx_TxPar 0x00002000 /* Tx Parity Error */
217 #define Tx_Comp 0x00004000 /* Completion */
218 #define Tx_Halted 0x00008000 /* Tx Halted */
219 #define Tx_SQErr 0x00010000 /* Signal Quality Error(SQE) */
220
221 /* Rx_Ctl bit asign -------------------------------------------------------- */
222 #define Rx_EnGood 0x00004000 /* 1:Enable Good */
223 #define Rx_EnRxPar 0x00002000 /* 1:Enable Receive Parity */
224 #define Rx_EnLongErr 0x00000800 /* 1:Enable Long Error */
225 #define Rx_EnOver 0x00000400 /* 1:Enable OverFlow */
226 #define Rx_EnCRCErr 0x00000200 /* 1:Enable CRC Error */
227 #define Rx_EnAlign 0x00000100 /* 1:Enable Alignment */
228 #define Rx_IgnoreCRC 0x00000040 /* 1:Ignore CRC Value */
229 #define Rx_StripCRC 0x00000010 /* 1:Strip CRC Value */
230 #define Rx_ShortEn 0x00000008 /* 1:Short Enable */
231 #define Rx_LongEn 0x00000004 /* 1:Long Enable */
232 #define Rx_RxHalt 0x00000002 /* 1:Receive Halt Request */
233 #define Rx_RxEn 0x00000001 /* 1:Receive Intrrupt Enable */
234
235 /* Rx_Stat bit asign ------------------------------------------------------- */
236 #define Rx_Halted 0x00008000 /* Rx Halted */
237 #define Rx_Good 0x00004000 /* Rx Good */
238 #define Rx_RxPar 0x00002000 /* Rx Parity Error */
239 /* 0x00001000 not use */
240 #define Rx_LongErr 0x00000800 /* Rx Long Error */
241 #define Rx_Over 0x00000400 /* Rx Overflow */
242 #define Rx_CRCErr 0x00000200 /* Rx CRC Error */
243 #define Rx_Align 0x00000100 /* Rx Alignment Error */
244 #define Rx_10Stat 0x00000080 /* Rx 10Mbps Status */
245 #define Rx_IntRx 0x00000040 /* Rx Interrupt */
246 #define Rx_CtlRecd 0x00000020 /* Rx Control Receive */
247
248 #define Rx_Stat_Mask 0x0000EFC0 /* Rx All Status Mask */
249
250 /* Int_En bit asign -------------------------------------------------------- */
251 #define Int_NRAbtEn 0x00000800 /* 1:Non-recoverable Abort Enable */
252 #define Int_TxCtlCmpEn 0x00000400 /* 1:Transmit Control Complete Enable */
253 #define Int_DmParErrEn 0x00000200 /* 1:DMA Parity Error Enable */
254 #define Int_DParDEn 0x00000100 /* 1:Data Parity Error Enable */
255 #define Int_EarNotEn 0x00000080 /* 1:Early Notify Enable */
256 #define Int_DParErrEn 0x00000040 /* 1:Detected Parity Error Enable */
257 #define Int_SSysErrEn 0x00000020 /* 1:Signalled System Error Enable */
258 #define Int_RMasAbtEn 0x00000010 /* 1:Received Master Abort Enable */
259 #define Int_RTargAbtEn 0x00000008 /* 1:Received Target Abort Enable */
260 #define Int_STargAbtEn 0x00000004 /* 1:Signalled Target Abort Enable */
261 #define Int_BLExEn 0x00000002 /* 1:Buffer List Exhausted Enable */
262 #define Int_FDAExEn 0x00000001 /* 1:Free Descriptor Area */
263 /* Exhausted Enable */
264
265 /* Int_Src bit asign ------------------------------------------------------- */
266 #define Int_NRabt 0x00004000 /* 1:Non Recoverable error */
267 #define Int_DmParErrStat 0x00002000 /* 1:DMA Parity Error & Clear */
268 #define Int_BLEx 0x00001000 /* 1:Buffer List Empty & Clear */
269 #define Int_FDAEx 0x00000800 /* 1:FDA Empty & Clear */
270 #define Int_IntNRAbt 0x00000400 /* 1:Non Recoverable Abort */
271 #define Int_IntCmp 0x00000200 /* 1:MAC control packet complete */
272 #define Int_IntExBD 0x00000100 /* 1:Interrupt Extra BD & Clear */
273 #define Int_DmParErr 0x00000080 /* 1:DMA Parity Error & Clear */
274 #define Int_IntEarNot 0x00000040 /* 1:Receive Data write & Clear */
275 #define Int_SWInt 0x00000020 /* 1:Software request & Clear */
276 #define Int_IntBLEx 0x00000010 /* 1:Buffer List Empty & Clear */
277 #define Int_IntFDAEx 0x00000008 /* 1:FDA Empty & Clear */
278 #define Int_IntPCI 0x00000004 /* 1:PCI controller & Clear */
279 #define Int_IntMacRx 0x00000002 /* 1:Rx controller & Clear */
280 #define Int_IntMacTx 0x00000001 /* 1:Tx controller & Clear */
281
282 /* MD_CA bit asign --------------------------------------------------------- */
283 #define MD_CA_PreSup 0x00001000 /* 1:Preamble Supress */
284 #define MD_CA_Busy 0x00000800 /* 1:Busy (Start Operation) */
285 #define MD_CA_Wr 0x00000400 /* 1:Write 0:Read */
286
287
288 /*
289 * Descriptors
290 */
291
292 /* Frame descripter */
293 struct FDesc {
294 volatile __u32 FDNext;
295 volatile __u32 FDSystem;
296 volatile __u32 FDStat;
297 volatile __u32 FDCtl;
298 };
299
300 /* Buffer descripter */
301 struct BDesc {
302 volatile __u32 BuffData;
303 volatile __u32 BDCtl;
304 };
305
306 #define FD_ALIGN 16
307
308 /* Frame Descripter bit asign ---------------------------------------------- */
309 #define FD_FDLength_MASK 0x0000FFFF /* Length MASK */
310 #define FD_BDCnt_MASK 0x001F0000 /* BD count MASK in FD */
311 #define FD_FrmOpt_MASK 0x7C000000 /* Frame option MASK */
312 #define FD_FrmOpt_BigEndian 0x40000000 /* Tx/Rx */
313 #define FD_FrmOpt_IntTx 0x20000000 /* Tx only */
314 #define FD_FrmOpt_NoCRC 0x10000000 /* Tx only */
315 #define FD_FrmOpt_NoPadding 0x08000000 /* Tx only */
316 #define FD_FrmOpt_Packing 0x04000000 /* Rx only */
317 #define FD_CownsFD 0x80000000 /* FD Controller owner bit */
318 #define FD_Next_EOL 0x00000001 /* FD EOL indicator */
319 #define FD_BDCnt_SHIFT 16
320
321 /* Buffer Descripter bit asign --------------------------------------------- */
322 #define BD_BuffLength_MASK 0x0000FFFF /* Recieve Data Size */
323 #define BD_RxBDID_MASK 0x00FF0000 /* BD ID Number MASK */
324 #define BD_RxBDSeqN_MASK 0x7F000000 /* Rx BD Sequence Number */
325 #define BD_CownsBD 0x80000000 /* BD Controller owner bit */
326 #define BD_RxBDID_SHIFT 16
327 #define BD_RxBDSeqN_SHIFT 24
328
329
330 /* Some useful constants. */
331 #undef NO_CHECK_CARRIER /* Does not check No-Carrier with TP */
332
333 #ifdef NO_CHECK_CARRIER
334 #define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
335 Tx_EnExColl | Tx_EnExDefer | Tx_EnUnder | \
336 Tx_En) /* maybe 0x7b01 */
337 #else
338 #define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
339 Tx_EnExColl | Tx_EnLCarr | Tx_EnExDefer | Tx_EnUnder | \
340 Tx_En) /* maybe 0x7b01 */
341 #endif
342 #define RX_CTL_CMD (Rx_EnGood | Rx_EnRxPar | Rx_EnLongErr | Rx_EnOver \
343 | Rx_EnCRCErr | Rx_EnAlign | Rx_RxEn) /* maybe 0x6f01 */
344 #define INT_EN_CMD (Int_NRAbtEn | \
345 Int_DmParErrEn | Int_DParDEn | Int_DParErrEn | \
346 Int_SSysErrEn | Int_RMasAbtEn | Int_RTargAbtEn | \
347 Int_STargAbtEn | \
348 Int_BLExEn | Int_FDAExEn) /* maybe 0xb7f*/
349 #define DMA_CTL_CMD DMA_BURST_SIZE
350 #define HAVE_DMA_RXALIGN(lp) likely((lp)->boardtype != TC35815CF)
351
352 /* Tuning parameters */
353 #define DMA_BURST_SIZE 32
354 #define TX_THRESHOLD 1024
355 #define TX_THRESHOLD_MAX 1536 /* used threshold with packet max byte for low pci transfer ability.*/
356 #define TX_THRESHOLD_KEEP_LIMIT 10 /* setting threshold max value when overrun error occured this count. */
357
358 /* 16 + RX_BUF_NUM * 8 + RX_FD_NUM * 16 + TX_FD_NUM * 32 <= PAGE_SIZE*FD_PAGE_NUM */
359 #ifdef TC35815_USE_PACKEDBUFFER
360 #define FD_PAGE_NUM 2
361 #define RX_BUF_NUM 8 /* >= 2 */
362 #define RX_FD_NUM 250 /* >= 32 */
363 #define TX_FD_NUM 128
364 #define RX_BUF_SIZE PAGE_SIZE
365 #else /* TC35815_USE_PACKEDBUFFER */
366 #define FD_PAGE_NUM 4
367 #define RX_BUF_NUM 128 /* < 256 */
368 #define RX_FD_NUM 256 /* >= 32 */
369 #define TX_FD_NUM 128
370 #if RX_CTL_CMD & Rx_LongEn
371 #define RX_BUF_SIZE PAGE_SIZE
372 #elif RX_CTL_CMD & Rx_StripCRC
373 #define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 4 + 2, 32) /* +2: reserve */
374 #else
375 #define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 2, 32) /* +2: reserve */
376 #endif
377 #endif /* TC35815_USE_PACKEDBUFFER */
378 #define RX_FD_RESERVE (2 / 2) /* max 2 BD per RxFD */
379 #define NAPI_WEIGHT 16
380
381 struct TxFD {
382 struct FDesc fd;
383 struct BDesc bd;
384 struct BDesc unused;
385 };
386
387 struct RxFD {
388 struct FDesc fd;
389 struct BDesc bd[0]; /* variable length */
390 };
391
392 struct FrFD {
393 struct FDesc fd;
394 struct BDesc bd[RX_BUF_NUM];
395 };
396
397
398 #define tc_readl(addr) readl(addr)
399 #define tc_writel(d, addr) writel(d, addr)
400
401 #define TC35815_TX_TIMEOUT msecs_to_jiffies(400)
402
403 /* Timer state engine. */
404 enum tc35815_timer_state {
405 arbwait = 0, /* Waiting for auto negotiation to complete. */
406 lupwait = 1, /* Auto-neg complete, awaiting link-up status. */
407 ltrywait = 2, /* Forcing try of all modes, from fastest to slowest. */
408 asleep = 3, /* Time inactive. */
409 lcheck = 4, /* Check link status. */
410 };
411
412 /* Information that need to be kept for each board. */
413 struct tc35815_local {
414 struct pci_dev *pci_dev;
415
416 /* statistics */
417 struct net_device_stats stats;
418 struct {
419 int max_tx_qlen;
420 int tx_ints;
421 int rx_ints;
422 int tx_underrun;
423 } lstats;
424
425 /* Tx control lock. This protects the transmit buffer ring
426 * state along with the "tx full" state of the driver. This
427 * means all netif_queue flow control actions are protected
428 * by this lock as well.
429 */
430 spinlock_t lock;
431
432 int phy_addr;
433 int fullduplex;
434 unsigned short saved_lpa;
435 struct timer_list timer;
436 enum tc35815_timer_state timer_state; /* State of auto-neg timer. */
437 unsigned int timer_ticks; /* Number of clicks at each state */
438
439 /*
440 * Transmitting: Batch Mode.
441 * 1 BD in 1 TxFD.
442 * Receiving: Packing Mode. (TC35815_USE_PACKEDBUFFER)
443 * 1 circular FD for Free Buffer List.
444 * RX_BUF_NUM BD in Free Buffer FD.
445 * One Free Buffer BD has PAGE_SIZE data buffer.
446 * Or Non-Packing Mode.
447 * 1 circular FD for Free Buffer List.
448 * RX_BUF_NUM BD in Free Buffer FD.
449 * One Free Buffer BD has ETH_FRAME_LEN data buffer.
450 */
451 void * fd_buf; /* for TxFD, RxFD, FrFD */
452 dma_addr_t fd_buf_dma;
453 struct TxFD *tfd_base;
454 unsigned int tfd_start;
455 unsigned int tfd_end;
456 struct RxFD *rfd_base;
457 struct RxFD *rfd_limit;
458 struct RxFD *rfd_cur;
459 struct FrFD *fbl_ptr;
460 #ifdef TC35815_USE_PACKEDBUFFER
461 unsigned char fbl_curid;
462 void * data_buf[RX_BUF_NUM]; /* packing */
463 dma_addr_t data_buf_dma[RX_BUF_NUM];
464 struct {
465 struct sk_buff *skb;
466 dma_addr_t skb_dma;
467 } tx_skbs[TX_FD_NUM];
468 #else
469 unsigned int fbl_count;
470 struct {
471 struct sk_buff *skb;
472 dma_addr_t skb_dma;
473 } tx_skbs[TX_FD_NUM], rx_skbs[RX_BUF_NUM];
474 #endif
475 struct mii_if_info mii;
476 unsigned short mii_id[2];
477 u32 msg_enable;
478 board_t boardtype;
479 };
480
481 static inline dma_addr_t fd_virt_to_bus(struct tc35815_local *lp, void *virt)
482 {
483 return lp->fd_buf_dma + ((u8 *)virt - (u8 *)lp->fd_buf);
484 }
485 #ifdef DEBUG
486 static inline void *fd_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
487 {
488 return (void *)((u8 *)lp->fd_buf + (bus - lp->fd_buf_dma));
489 }
490 #endif
491 #ifdef TC35815_USE_PACKEDBUFFER
492 static inline void *rxbuf_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
493 {
494 int i;
495 for (i = 0; i < RX_BUF_NUM; i++) {
496 if (bus >= lp->data_buf_dma[i] &&
497 bus < lp->data_buf_dma[i] + PAGE_SIZE)
498 return (void *)((u8 *)lp->data_buf[i] +
499 (bus - lp->data_buf_dma[i]));
500 }
501 return NULL;
502 }
503
504 #define TC35815_DMA_SYNC_ONDEMAND
505 static void* alloc_rxbuf_page(struct pci_dev *hwdev, dma_addr_t *dma_handle)
506 {
507 #ifdef TC35815_DMA_SYNC_ONDEMAND
508 void *buf;
509 /* pci_map + pci_dma_sync will be more effective than
510 * pci_alloc_consistent on some archs. */
511 if ((buf = (void *)__get_free_page(GFP_ATOMIC)) == NULL)
512 return NULL;
513 *dma_handle = pci_map_single(hwdev, buf, PAGE_SIZE,
514 PCI_DMA_FROMDEVICE);
515 if (pci_dma_mapping_error(*dma_handle)) {
516 free_page((unsigned long)buf);
517 return NULL;
518 }
519 return buf;
520 #else
521 return pci_alloc_consistent(hwdev, PAGE_SIZE, dma_handle);
522 #endif
523 }
524
525 static void free_rxbuf_page(struct pci_dev *hwdev, void *buf, dma_addr_t dma_handle)
526 {
527 #ifdef TC35815_DMA_SYNC_ONDEMAND
528 pci_unmap_single(hwdev, dma_handle, PAGE_SIZE, PCI_DMA_FROMDEVICE);
529 free_page((unsigned long)buf);
530 #else
531 pci_free_consistent(hwdev, PAGE_SIZE, buf, dma_handle);
532 #endif
533 }
534 #else /* TC35815_USE_PACKEDBUFFER */
535 static struct sk_buff *alloc_rxbuf_skb(struct net_device *dev,
536 struct pci_dev *hwdev,
537 dma_addr_t *dma_handle)
538 {
539 struct sk_buff *skb;
540 skb = dev_alloc_skb(RX_BUF_SIZE);
541 if (!skb)
542 return NULL;
543 skb->dev = dev;
544 *dma_handle = pci_map_single(hwdev, skb->data, RX_BUF_SIZE,
545 PCI_DMA_FROMDEVICE);
546 if (pci_dma_mapping_error(*dma_handle)) {
547 dev_kfree_skb_any(skb);
548 return NULL;
549 }
550 skb_reserve(skb, 2); /* make IP header 4byte aligned */
551 return skb;
552 }
553
554 static void free_rxbuf_skb(struct pci_dev *hwdev, struct sk_buff *skb, dma_addr_t dma_handle)
555 {
556 pci_unmap_single(hwdev, dma_handle, RX_BUF_SIZE,
557 PCI_DMA_FROMDEVICE);
558 dev_kfree_skb_any(skb);
559 }
560 #endif /* TC35815_USE_PACKEDBUFFER */
561
562 /* Index to functions, as function prototypes. */
563
564 static int tc35815_open(struct net_device *dev);
565 static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev);
566 static irqreturn_t tc35815_interrupt(int irq, void *dev_id);
567 #ifdef TC35815_NAPI
568 static int tc35815_rx(struct net_device *dev, int limit);
569 static int tc35815_poll(struct net_device *dev, int *budget);
570 #else
571 static void tc35815_rx(struct net_device *dev);
572 #endif
573 static void tc35815_txdone(struct net_device *dev);
574 static int tc35815_close(struct net_device *dev);
575 static struct net_device_stats *tc35815_get_stats(struct net_device *dev);
576 static void tc35815_set_multicast_list(struct net_device *dev);
577 static void tc35815_tx_timeout(struct net_device *dev);
578 static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
579 #ifdef CONFIG_NET_POLL_CONTROLLER
580 static void tc35815_poll_controller(struct net_device *dev);
581 #endif
582 static const struct ethtool_ops tc35815_ethtool_ops;
583
584 /* Example routines you must write ;->. */
585 static void tc35815_chip_reset(struct net_device *dev);
586 static void tc35815_chip_init(struct net_device *dev);
587 static void tc35815_find_phy(struct net_device *dev);
588 static void tc35815_phy_chip_init(struct net_device *dev);
589
590 #ifdef DEBUG
591 static void panic_queues(struct net_device *dev);
592 #endif
593
594 static void tc35815_timer(unsigned long data);
595 static void tc35815_start_auto_negotiation(struct net_device *dev,
596 struct ethtool_cmd *ep);
597 static int tc_mdio_read(struct net_device *dev, int phy_id, int location);
598 static void tc_mdio_write(struct net_device *dev, int phy_id, int location,
599 int val);
600
601 static void __devinit tc35815_init_dev_addr (struct net_device *dev)
602 {
603 struct tc35815_regs __iomem *tr =
604 (struct tc35815_regs __iomem *)dev->base_addr;
605 int i;
606
607 /* dev_addr will be overwritten on NETDEV_REGISTER event */
608 while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
609 ;
610 for (i = 0; i < 6; i += 2) {
611 unsigned short data;
612 tc_writel(PROM_Busy | PROM_Read | (i / 2 + 2), &tr->PROM_Ctl);
613 while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
614 ;
615 data = tc_readl(&tr->PROM_Data);
616 dev->dev_addr[i] = data & 0xff;
617 dev->dev_addr[i+1] = data >> 8;
618 }
619 }
620
621 static int __devinit tc35815_init_one (struct pci_dev *pdev,
622 const struct pci_device_id *ent)
623 {
624 void __iomem *ioaddr = NULL;
625 struct net_device *dev;
626 struct tc35815_local *lp;
627 int rc;
628 unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
629
630 static int printed_version;
631 if (!printed_version++) {
632 printk(version);
633 dev_printk(KERN_DEBUG, &pdev->dev,
634 "speed:%d duplex:%d doforce:%d\n",
635 options.speed, options.duplex, options.doforce);
636 }
637
638 if (!pdev->irq) {
639 dev_warn(&pdev->dev, "no IRQ assigned.\n");
640 return -ENODEV;
641 }
642
643 /* dev zeroed in alloc_etherdev */
644 dev = alloc_etherdev (sizeof (*lp));
645 if (dev == NULL) {
646 dev_err(&pdev->dev, "unable to alloc new ethernet\n");
647 return -ENOMEM;
648 }
649 SET_MODULE_OWNER(dev);
650 SET_NETDEV_DEV(dev, &pdev->dev);
651 lp = dev->priv;
652
653 /* enable device (incl. PCI PM wakeup), and bus-mastering */
654 rc = pci_enable_device (pdev);
655 if (rc)
656 goto err_out;
657
658 mmio_start = pci_resource_start (pdev, 1);
659 mmio_end = pci_resource_end (pdev, 1);
660 mmio_flags = pci_resource_flags (pdev, 1);
661 mmio_len = pci_resource_len (pdev, 1);
662
663 /* set this immediately, we need to know before
664 * we talk to the chip directly */
665
666 /* make sure PCI base addr 1 is MMIO */
667 if (!(mmio_flags & IORESOURCE_MEM)) {
668 dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n");
669 rc = -ENODEV;
670 goto err_out;
671 }
672
673 /* check for weird/broken PCI region reporting */
674 if ((mmio_len < sizeof(struct tc35815_regs))) {
675 dev_err(&pdev->dev, "Invalid PCI region size(s), aborting\n");
676 rc = -ENODEV;
677 goto err_out;
678 }
679
680 rc = pci_request_regions (pdev, MODNAME);
681 if (rc)
682 goto err_out;
683
684 pci_set_master (pdev);
685
686 /* ioremap MMIO region */
687 ioaddr = ioremap (mmio_start, mmio_len);
688 if (ioaddr == NULL) {
689 dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
690 rc = -EIO;
691 goto err_out_free_res;
692 }
693
694 /* Initialize the device structure. */
695 dev->open = tc35815_open;
696 dev->hard_start_xmit = tc35815_send_packet;
697 dev->stop = tc35815_close;
698 dev->get_stats = tc35815_get_stats;
699 dev->set_multicast_list = tc35815_set_multicast_list;
700 dev->do_ioctl = tc35815_ioctl;
701 dev->ethtool_ops = &tc35815_ethtool_ops;
702 dev->tx_timeout = tc35815_tx_timeout;
703 dev->watchdog_timeo = TC35815_TX_TIMEOUT;
704 #ifdef TC35815_NAPI
705 dev->poll = tc35815_poll;
706 dev->weight = NAPI_WEIGHT;
707 #endif
708 #ifdef CONFIG_NET_POLL_CONTROLLER
709 dev->poll_controller = tc35815_poll_controller;
710 #endif
711
712 dev->irq = pdev->irq;
713 dev->base_addr = (unsigned long) ioaddr;
714
715 /* dev->priv/lp zeroed and aligned in alloc_etherdev */
716 lp = dev->priv;
717 spin_lock_init(&lp->lock);
718 lp->pci_dev = pdev;
719 lp->boardtype = ent->driver_data;
720
721 lp->msg_enable = NETIF_MSG_TX_ERR | NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK;
722 pci_set_drvdata(pdev, dev);
723
724 /* Soft reset the chip. */
725 tc35815_chip_reset(dev);
726
727 /* Retrieve the ethernet address. */
728 tc35815_init_dev_addr(dev);
729
730 rc = register_netdev (dev);
731 if (rc)
732 goto err_out_unmap;
733
734 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
735 printk(KERN_INFO "%s: %s at 0x%lx, "
736 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
737 "IRQ %d\n",
738 dev->name,
739 board_info[ent->driver_data].name,
740 dev->base_addr,
741 dev->dev_addr[0], dev->dev_addr[1],
742 dev->dev_addr[2], dev->dev_addr[3],
743 dev->dev_addr[4], dev->dev_addr[5],
744 dev->irq);
745
746 setup_timer(&lp->timer, tc35815_timer, (unsigned long) dev);
747 lp->mii.dev = dev;
748 lp->mii.mdio_read = tc_mdio_read;
749 lp->mii.mdio_write = tc_mdio_write;
750 lp->mii.phy_id_mask = 0x1f;
751 lp->mii.reg_num_mask = 0x1f;
752 tc35815_find_phy(dev);
753 lp->mii.phy_id = lp->phy_addr;
754 lp->mii.full_duplex = 0;
755 lp->mii.force_media = 0;
756
757 return 0;
758
759 err_out_unmap:
760 iounmap(ioaddr);
761 err_out_free_res:
762 pci_release_regions (pdev);
763 err_out:
764 free_netdev (dev);
765 return rc;
766 }
767
768
769 static void __devexit tc35815_remove_one (struct pci_dev *pdev)
770 {
771 struct net_device *dev = pci_get_drvdata (pdev);
772 unsigned long mmio_addr;
773
774 mmio_addr = dev->base_addr;
775
776 unregister_netdev (dev);
777
778 if (mmio_addr) {
779 iounmap ((void __iomem *)mmio_addr);
780 pci_release_regions (pdev);
781 }
782
783 free_netdev (dev);
784
785 pci_set_drvdata (pdev, NULL);
786 }
787
788 static int
789 tc35815_init_queues(struct net_device *dev)
790 {
791 struct tc35815_local *lp = dev->priv;
792 int i;
793 unsigned long fd_addr;
794
795 if (!lp->fd_buf) {
796 BUG_ON(sizeof(struct FDesc) +
797 sizeof(struct BDesc) * RX_BUF_NUM +
798 sizeof(struct FDesc) * RX_FD_NUM +
799 sizeof(struct TxFD) * TX_FD_NUM >
800 PAGE_SIZE * FD_PAGE_NUM);
801
802 if ((lp->fd_buf = pci_alloc_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM, &lp->fd_buf_dma)) == 0)
803 return -ENOMEM;
804 for (i = 0; i < RX_BUF_NUM; i++) {
805 #ifdef TC35815_USE_PACKEDBUFFER
806 if ((lp->data_buf[i] = alloc_rxbuf_page(lp->pci_dev, &lp->data_buf_dma[i])) == NULL) {
807 while (--i >= 0) {
808 free_rxbuf_page(lp->pci_dev,
809 lp->data_buf[i],
810 lp->data_buf_dma[i]);
811 lp->data_buf[i] = NULL;
812 }
813 pci_free_consistent(lp->pci_dev,
814 PAGE_SIZE * FD_PAGE_NUM,
815 lp->fd_buf,
816 lp->fd_buf_dma);
817 lp->fd_buf = NULL;
818 return -ENOMEM;
819 }
820 #else
821 lp->rx_skbs[i].skb =
822 alloc_rxbuf_skb(dev, lp->pci_dev,
823 &lp->rx_skbs[i].skb_dma);
824 if (!lp->rx_skbs[i].skb) {
825 while (--i >= 0) {
826 free_rxbuf_skb(lp->pci_dev,
827 lp->rx_skbs[i].skb,
828 lp->rx_skbs[i].skb_dma);
829 lp->rx_skbs[i].skb = NULL;
830 }
831 pci_free_consistent(lp->pci_dev,
832 PAGE_SIZE * FD_PAGE_NUM,
833 lp->fd_buf,
834 lp->fd_buf_dma);
835 lp->fd_buf = NULL;
836 return -ENOMEM;
837 }
838 #endif
839 }
840 printk(KERN_DEBUG "%s: FD buf %p DataBuf",
841 dev->name, lp->fd_buf);
842 #ifdef TC35815_USE_PACKEDBUFFER
843 printk(" DataBuf");
844 for (i = 0; i < RX_BUF_NUM; i++)
845 printk(" %p", lp->data_buf[i]);
846 #endif
847 printk("\n");
848 } else {
849 for (i = 0; i < FD_PAGE_NUM; i++) {
850 clear_page((void *)((unsigned long)lp->fd_buf + i * PAGE_SIZE));
851 }
852 }
853 fd_addr = (unsigned long)lp->fd_buf;
854
855 /* Free Descriptors (for Receive) */
856 lp->rfd_base = (struct RxFD *)fd_addr;
857 fd_addr += sizeof(struct RxFD) * RX_FD_NUM;
858 for (i = 0; i < RX_FD_NUM; i++) {
859 lp->rfd_base[i].fd.FDCtl = cpu_to_le32(FD_CownsFD);
860 }
861 lp->rfd_cur = lp->rfd_base;
862 lp->rfd_limit = (struct RxFD *)fd_addr - (RX_FD_RESERVE + 1);
863
864 /* Transmit Descriptors */
865 lp->tfd_base = (struct TxFD *)fd_addr;
866 fd_addr += sizeof(struct TxFD) * TX_FD_NUM;
867 for (i = 0; i < TX_FD_NUM; i++) {
868 lp->tfd_base[i].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[i+1]));
869 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
870 lp->tfd_base[i].fd.FDCtl = cpu_to_le32(0);
871 }
872 lp->tfd_base[TX_FD_NUM-1].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[0]));
873 lp->tfd_start = 0;
874 lp->tfd_end = 0;
875
876 /* Buffer List (for Receive) */
877 lp->fbl_ptr = (struct FrFD *)fd_addr;
878 lp->fbl_ptr->fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, lp->fbl_ptr));
879 lp->fbl_ptr->fd.FDCtl = cpu_to_le32(RX_BUF_NUM | FD_CownsFD);
880 #ifndef TC35815_USE_PACKEDBUFFER
881 /*
882 * move all allocated skbs to head of rx_skbs[] array.
883 * fbl_count mighe not be RX_BUF_NUM if alloc_rxbuf_skb() in
884 * tc35815_rx() had failed.
885 */
886 lp->fbl_count = 0;
887 for (i = 0; i < RX_BUF_NUM; i++) {
888 if (lp->rx_skbs[i].skb) {
889 if (i != lp->fbl_count) {
890 lp->rx_skbs[lp->fbl_count].skb =
891 lp->rx_skbs[i].skb;
892 lp->rx_skbs[lp->fbl_count].skb_dma =
893 lp->rx_skbs[i].skb_dma;
894 }
895 lp->fbl_count++;
896 }
897 }
898 #endif
899 for (i = 0; i < RX_BUF_NUM; i++) {
900 #ifdef TC35815_USE_PACKEDBUFFER
901 lp->fbl_ptr->bd[i].BuffData = cpu_to_le32(lp->data_buf_dma[i]);
902 #else
903 if (i >= lp->fbl_count) {
904 lp->fbl_ptr->bd[i].BuffData = 0;
905 lp->fbl_ptr->bd[i].BDCtl = 0;
906 continue;
907 }
908 lp->fbl_ptr->bd[i].BuffData =
909 cpu_to_le32(lp->rx_skbs[i].skb_dma);
910 #endif
911 /* BDID is index of FrFD.bd[] */
912 lp->fbl_ptr->bd[i].BDCtl =
913 cpu_to_le32(BD_CownsBD | (i << BD_RxBDID_SHIFT) |
914 RX_BUF_SIZE);
915 }
916 #ifdef TC35815_USE_PACKEDBUFFER
917 lp->fbl_curid = 0;
918 #endif
919
920 printk(KERN_DEBUG "%s: TxFD %p RxFD %p FrFD %p\n",
921 dev->name, lp->tfd_base, lp->rfd_base, lp->fbl_ptr);
922 return 0;
923 }
924
925 static void
926 tc35815_clear_queues(struct net_device *dev)
927 {
928 struct tc35815_local *lp = dev->priv;
929 int i;
930
931 for (i = 0; i < TX_FD_NUM; i++) {
932 u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
933 struct sk_buff *skb =
934 fdsystem != 0xffffffff ?
935 lp->tx_skbs[fdsystem].skb : NULL;
936 #ifdef DEBUG
937 if (lp->tx_skbs[i].skb != skb) {
938 printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
939 panic_queues(dev);
940 }
941 #else
942 BUG_ON(lp->tx_skbs[i].skb != skb);
943 #endif
944 if (skb) {
945 pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
946 lp->tx_skbs[i].skb = NULL;
947 lp->tx_skbs[i].skb_dma = 0;
948 dev_kfree_skb_any(skb);
949 }
950 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
951 }
952
953 tc35815_init_queues(dev);
954 }
955
956 static void
957 tc35815_free_queues(struct net_device *dev)
958 {
959 struct tc35815_local *lp = dev->priv;
960 int i;
961
962 if (lp->tfd_base) {
963 for (i = 0; i < TX_FD_NUM; i++) {
964 u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
965 struct sk_buff *skb =
966 fdsystem != 0xffffffff ?
967 lp->tx_skbs[fdsystem].skb : NULL;
968 #ifdef DEBUG
969 if (lp->tx_skbs[i].skb != skb) {
970 printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
971 panic_queues(dev);
972 }
973 #else
974 BUG_ON(lp->tx_skbs[i].skb != skb);
975 #endif
976 if (skb) {
977 dev_kfree_skb(skb);
978 pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
979 lp->tx_skbs[i].skb = NULL;
980 lp->tx_skbs[i].skb_dma = 0;
981 }
982 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
983 }
984 }
985
986 lp->rfd_base = NULL;
987 lp->rfd_limit = NULL;
988 lp->rfd_cur = NULL;
989 lp->fbl_ptr = NULL;
990
991 for (i = 0; i < RX_BUF_NUM; i++) {
992 #ifdef TC35815_USE_PACKEDBUFFER
993 if (lp->data_buf[i]) {
994 free_rxbuf_page(lp->pci_dev,
995 lp->data_buf[i], lp->data_buf_dma[i]);
996 lp->data_buf[i] = NULL;
997 }
998 #else
999 if (lp->rx_skbs[i].skb) {
1000 free_rxbuf_skb(lp->pci_dev, lp->rx_skbs[i].skb,
1001 lp->rx_skbs[i].skb_dma);
1002 lp->rx_skbs[i].skb = NULL;
1003 }
1004 #endif
1005 }
1006 if (lp->fd_buf) {
1007 pci_free_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM,
1008 lp->fd_buf, lp->fd_buf_dma);
1009 lp->fd_buf = NULL;
1010 }
1011 }
1012
1013 static void
1014 dump_txfd(struct TxFD *fd)
1015 {
1016 printk("TxFD(%p): %08x %08x %08x %08x\n", fd,
1017 le32_to_cpu(fd->fd.FDNext),
1018 le32_to_cpu(fd->fd.FDSystem),
1019 le32_to_cpu(fd->fd.FDStat),
1020 le32_to_cpu(fd->fd.FDCtl));
1021 printk("BD: ");
1022 printk(" %08x %08x",
1023 le32_to_cpu(fd->bd.BuffData),
1024 le32_to_cpu(fd->bd.BDCtl));
1025 printk("\n");
1026 }
1027
1028 static int
1029 dump_rxfd(struct RxFD *fd)
1030 {
1031 int i, bd_count = (le32_to_cpu(fd->fd.FDCtl) & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
1032 if (bd_count > 8)
1033 bd_count = 8;
1034 printk("RxFD(%p): %08x %08x %08x %08x\n", fd,
1035 le32_to_cpu(fd->fd.FDNext),
1036 le32_to_cpu(fd->fd.FDSystem),
1037 le32_to_cpu(fd->fd.FDStat),
1038 le32_to_cpu(fd->fd.FDCtl));
1039 if (le32_to_cpu(fd->fd.FDCtl) & FD_CownsFD)
1040 return 0;
1041 printk("BD: ");
1042 for (i = 0; i < bd_count; i++)
1043 printk(" %08x %08x",
1044 le32_to_cpu(fd->bd[i].BuffData),
1045 le32_to_cpu(fd->bd[i].BDCtl));
1046 printk("\n");
1047 return bd_count;
1048 }
1049
1050 #if defined(DEBUG) || defined(TC35815_USE_PACKEDBUFFER)
1051 static void
1052 dump_frfd(struct FrFD *fd)
1053 {
1054 int i;
1055 printk("FrFD(%p): %08x %08x %08x %08x\n", fd,
1056 le32_to_cpu(fd->fd.FDNext),
1057 le32_to_cpu(fd->fd.FDSystem),
1058 le32_to_cpu(fd->fd.FDStat),
1059 le32_to_cpu(fd->fd.FDCtl));
1060 printk("BD: ");
1061 for (i = 0; i < RX_BUF_NUM; i++)
1062 printk(" %08x %08x",
1063 le32_to_cpu(fd->bd[i].BuffData),
1064 le32_to_cpu(fd->bd[i].BDCtl));
1065 printk("\n");
1066 }
1067 #endif
1068
1069 #ifdef DEBUG
1070 static void
1071 panic_queues(struct net_device *dev)
1072 {
1073 struct tc35815_local *lp = dev->priv;
1074 int i;
1075
1076 printk("TxFD base %p, start %u, end %u\n",
1077 lp->tfd_base, lp->tfd_start, lp->tfd_end);
1078 printk("RxFD base %p limit %p cur %p\n",
1079 lp->rfd_base, lp->rfd_limit, lp->rfd_cur);
1080 printk("FrFD %p\n", lp->fbl_ptr);
1081 for (i = 0; i < TX_FD_NUM; i++)
1082 dump_txfd(&lp->tfd_base[i]);
1083 for (i = 0; i < RX_FD_NUM; i++) {
1084 int bd_count = dump_rxfd(&lp->rfd_base[i]);
1085 i += (bd_count + 1) / 2; /* skip BDs */
1086 }
1087 dump_frfd(lp->fbl_ptr);
1088 panic("%s: Illegal queue state.", dev->name);
1089 }
1090 #endif
1091
1092 static void print_eth(char *add)
1093 {
1094 int i;
1095
1096 printk("print_eth(%p)\n", add);
1097 for (i = 0; i < 6; i++)
1098 printk(" %2.2X", (unsigned char) add[i + 6]);
1099 printk(" =>");
1100 for (i = 0; i < 6; i++)
1101 printk(" %2.2X", (unsigned char) add[i]);
1102 printk(" : %2.2X%2.2X\n", (unsigned char) add[12], (unsigned char) add[13]);
1103 }
1104
1105 static int tc35815_tx_full(struct net_device *dev)
1106 {
1107 struct tc35815_local *lp = dev->priv;
1108 return ((lp->tfd_start + 1) % TX_FD_NUM == lp->tfd_end);
1109 }
1110
1111 static void tc35815_restart(struct net_device *dev)
1112 {
1113 struct tc35815_local *lp = dev->priv;
1114 int pid = lp->phy_addr;
1115 int do_phy_reset = 1;
1116 del_timer(&lp->timer); /* Kill if running */
1117
1118 if (lp->mii_id[0] == 0x0016 && (lp->mii_id[1] & 0xfc00) == 0xf800) {
1119 /* Resetting PHY cause problem on some chip... (SEEQ 80221) */
1120 do_phy_reset = 0;
1121 }
1122 if (do_phy_reset) {
1123 int timeout;
1124 tc_mdio_write(dev, pid, MII_BMCR, BMCR_RESET);
1125 timeout = 100;
1126 while (--timeout) {
1127 if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_RESET))
1128 break;
1129 udelay(1);
1130 }
1131 if (!timeout)
1132 printk(KERN_ERR "%s: BMCR reset failed.\n", dev->name);
1133 }
1134
1135 tc35815_chip_reset(dev);
1136 tc35815_clear_queues(dev);
1137 tc35815_chip_init(dev);
1138 /* Reconfigure CAM again since tc35815_chip_init() initialize it. */
1139 tc35815_set_multicast_list(dev);
1140 }
1141
1142 static void tc35815_tx_timeout(struct net_device *dev)
1143 {
1144 struct tc35815_local *lp = dev->priv;
1145 struct tc35815_regs __iomem *tr =
1146 (struct tc35815_regs __iomem *)dev->base_addr;
1147
1148 printk(KERN_WARNING "%s: transmit timed out, status %#x\n",
1149 dev->name, tc_readl(&tr->Tx_Stat));
1150
1151 /* Try to restart the adaptor. */
1152 spin_lock_irq(&lp->lock);
1153 tc35815_restart(dev);
1154 spin_unlock_irq(&lp->lock);
1155
1156 lp->stats.tx_errors++;
1157
1158 /* If we have space available to accept new transmit
1159 * requests, wake up the queueing layer. This would
1160 * be the case if the chipset_init() call above just
1161 * flushes out the tx queue and empties it.
1162 *
1163 * If instead, the tx queue is retained then the
1164 * netif_wake_queue() call should be placed in the
1165 * TX completion interrupt handler of the driver instead
1166 * of here.
1167 */
1168 if (!tc35815_tx_full(dev))
1169 netif_wake_queue(dev);
1170 }
1171
1172 /*
1173 * Open/initialize the board. This is called (in the current kernel)
1174 * sometime after booting when the 'ifconfig' program is run.
1175 *
1176 * This routine should set everything up anew at each open, even
1177 * registers that "should" only need to be set once at boot, so that
1178 * there is non-reboot way to recover if something goes wrong.
1179 */
1180 static int
1181 tc35815_open(struct net_device *dev)
1182 {
1183 struct tc35815_local *lp = dev->priv;
1184
1185 /*
1186 * This is used if the interrupt line can turned off (shared).
1187 * See 3c503.c for an example of selecting the IRQ at config-time.
1188 */
1189 if (request_irq(dev->irq, &tc35815_interrupt, IRQF_SHARED, dev->name, dev)) {
1190 return -EAGAIN;
1191 }
1192
1193 del_timer(&lp->timer); /* Kill if running */
1194 tc35815_chip_reset(dev);
1195
1196 if (tc35815_init_queues(dev) != 0) {
1197 free_irq(dev->irq, dev);
1198 return -EAGAIN;
1199 }
1200
1201 /* Reset the hardware here. Don't forget to set the station address. */
1202 spin_lock_irq(&lp->lock);
1203 tc35815_chip_init(dev);
1204 spin_unlock_irq(&lp->lock);
1205
1206 /* We are now ready to accept transmit requeusts from
1207 * the queueing layer of the networking.
1208 */
1209 netif_start_queue(dev);
1210
1211 return 0;
1212 }
1213
1214 /* This will only be invoked if your driver is _not_ in XOFF state.
1215 * What this means is that you need not check it, and that this
1216 * invariant will hold if you make sure that the netif_*_queue()
1217 * calls are done at the proper times.
1218 */
1219 static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev)
1220 {
1221 struct tc35815_local *lp = dev->priv;
1222 struct TxFD *txfd;
1223 unsigned long flags;
1224
1225 /* If some error occurs while trying to transmit this
1226 * packet, you should return '1' from this function.
1227 * In such a case you _may not_ do anything to the
1228 * SKB, it is still owned by the network queueing
1229 * layer when an error is returned. This means you
1230 * may not modify any SKB fields, you may not free
1231 * the SKB, etc.
1232 */
1233
1234 /* This is the most common case for modern hardware.
1235 * The spinlock protects this code from the TX complete
1236 * hardware interrupt handler. Queue flow control is
1237 * thus managed under this lock as well.
1238 */
1239 spin_lock_irqsave(&lp->lock, flags);
1240
1241 /* failsafe... (handle txdone now if half of FDs are used) */
1242 if ((lp->tfd_start + TX_FD_NUM - lp->tfd_end) % TX_FD_NUM >
1243 TX_FD_NUM / 2)
1244 tc35815_txdone(dev);
1245
1246 if (netif_msg_pktdata(lp))
1247 print_eth(skb->data);
1248 #ifdef DEBUG
1249 if (lp->tx_skbs[lp->tfd_start].skb) {
1250 printk("%s: tx_skbs conflict.\n", dev->name);
1251 panic_queues(dev);
1252 }
1253 #else
1254 BUG_ON(lp->tx_skbs[lp->tfd_start].skb);
1255 #endif
1256 lp->tx_skbs[lp->tfd_start].skb = skb;
1257 lp->tx_skbs[lp->tfd_start].skb_dma = pci_map_single(lp->pci_dev, skb->data, skb->len, PCI_DMA_TODEVICE);
1258
1259 /*add to ring */
1260 txfd = &lp->tfd_base[lp->tfd_start];
1261 txfd->bd.BuffData = cpu_to_le32(lp->tx_skbs[lp->tfd_start].skb_dma);
1262 txfd->bd.BDCtl = cpu_to_le32(skb->len);
1263 txfd->fd.FDSystem = cpu_to_le32(lp->tfd_start);
1264 txfd->fd.FDCtl = cpu_to_le32(FD_CownsFD | (1 << FD_BDCnt_SHIFT));
1265
1266 if (lp->tfd_start == lp->tfd_end) {
1267 struct tc35815_regs __iomem *tr =
1268 (struct tc35815_regs __iomem *)dev->base_addr;
1269 /* Start DMA Transmitter. */
1270 txfd->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
1271 #ifdef GATHER_TXINT
1272 txfd->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
1273 #endif
1274 if (netif_msg_tx_queued(lp)) {
1275 printk("%s: starting TxFD.\n", dev->name);
1276 dump_txfd(txfd);
1277 }
1278 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
1279 } else {
1280 txfd->fd.FDNext &= cpu_to_le32(~FD_Next_EOL);
1281 if (netif_msg_tx_queued(lp)) {
1282 printk("%s: queueing TxFD.\n", dev->name);
1283 dump_txfd(txfd);
1284 }
1285 }
1286 lp->tfd_start = (lp->tfd_start + 1) % TX_FD_NUM;
1287
1288 dev->trans_start = jiffies;
1289
1290 /* If we just used up the very last entry in the
1291 * TX ring on this device, tell the queueing
1292 * layer to send no more.
1293 */
1294 if (tc35815_tx_full(dev)) {
1295 if (netif_msg_tx_queued(lp))
1296 printk(KERN_WARNING "%s: TxFD Exhausted.\n", dev->name);
1297 netif_stop_queue(dev);
1298 }
1299
1300 /* When the TX completion hw interrupt arrives, this
1301 * is when the transmit statistics are updated.
1302 */
1303
1304 spin_unlock_irqrestore(&lp->lock, flags);
1305 return 0;
1306 }
1307
1308 #define FATAL_ERROR_INT \
1309 (Int_IntPCI | Int_DmParErr | Int_IntNRAbt)
1310 static void tc35815_fatal_error_interrupt(struct net_device *dev, u32 status)
1311 {
1312 static int count;
1313 printk(KERN_WARNING "%s: Fatal Error Intterrupt (%#x):",
1314 dev->name, status);
1315 if (status & Int_IntPCI)
1316 printk(" IntPCI");
1317 if (status & Int_DmParErr)
1318 printk(" DmParErr");
1319 if (status & Int_IntNRAbt)
1320 printk(" IntNRAbt");
1321 printk("\n");
1322 if (count++ > 100)
1323 panic("%s: Too many fatal errors.", dev->name);
1324 printk(KERN_WARNING "%s: Resetting ...\n", dev->name);
1325 /* Try to restart the adaptor. */
1326 tc35815_restart(dev);
1327 }
1328
1329 #ifdef TC35815_NAPI
1330 static int tc35815_do_interrupt(struct net_device *dev, u32 status, int limit)
1331 #else
1332 static int tc35815_do_interrupt(struct net_device *dev, u32 status)
1333 #endif
1334 {
1335 struct tc35815_local *lp = dev->priv;
1336 struct tc35815_regs __iomem *tr =
1337 (struct tc35815_regs __iomem *)dev->base_addr;
1338 int ret = -1;
1339
1340 /* Fatal errors... */
1341 if (status & FATAL_ERROR_INT) {
1342 tc35815_fatal_error_interrupt(dev, status);
1343 return 0;
1344 }
1345 /* recoverable errors */
1346 if (status & Int_IntFDAEx) {
1347 /* disable FDAEx int. (until we make rooms...) */
1348 tc_writel(tc_readl(&tr->Int_En) & ~Int_FDAExEn, &tr->Int_En);
1349 printk(KERN_WARNING
1350 "%s: Free Descriptor Area Exhausted (%#x).\n",
1351 dev->name, status);
1352 lp->stats.rx_dropped++;
1353 ret = 0;
1354 }
1355 if (status & Int_IntBLEx) {
1356 /* disable BLEx int. (until we make rooms...) */
1357 tc_writel(tc_readl(&tr->Int_En) & ~Int_BLExEn, &tr->Int_En);
1358 printk(KERN_WARNING
1359 "%s: Buffer List Exhausted (%#x).\n",
1360 dev->name, status);
1361 lp->stats.rx_dropped++;
1362 ret = 0;
1363 }
1364 if (status & Int_IntExBD) {
1365 printk(KERN_WARNING
1366 "%s: Excessive Buffer Descriptiors (%#x).\n",
1367 dev->name, status);
1368 lp->stats.rx_length_errors++;
1369 ret = 0;
1370 }
1371
1372 /* normal notification */
1373 if (status & Int_IntMacRx) {
1374 /* Got a packet(s). */
1375 #ifdef TC35815_NAPI
1376 ret = tc35815_rx(dev, limit);
1377 #else
1378 tc35815_rx(dev);
1379 ret = 0;
1380 #endif
1381 lp->lstats.rx_ints++;
1382 }
1383 if (status & Int_IntMacTx) {
1384 /* Transmit complete. */
1385 lp->lstats.tx_ints++;
1386 tc35815_txdone(dev);
1387 netif_wake_queue(dev);
1388 ret = 0;
1389 }
1390 return ret;
1391 }
1392
1393 /*
1394 * The typical workload of the driver:
1395 * Handle the network interface interrupts.
1396 */
1397 static irqreturn_t tc35815_interrupt(int irq, void *dev_id)
1398 {
1399 struct net_device *dev = dev_id;
1400 struct tc35815_regs __iomem *tr =
1401 (struct tc35815_regs __iomem *)dev->base_addr;
1402 #ifdef TC35815_NAPI
1403 u32 dmactl = tc_readl(&tr->DMA_Ctl);
1404
1405 if (!(dmactl & DMA_IntMask)) {
1406 /* disable interrupts */
1407 tc_writel(dmactl | DMA_IntMask, &tr->DMA_Ctl);
1408 if (netif_rx_schedule_prep(dev))
1409 __netif_rx_schedule(dev);
1410 else {
1411 printk(KERN_ERR "%s: interrupt taken in poll\n",
1412 dev->name);
1413 BUG();
1414 }
1415 (void)tc_readl(&tr->Int_Src); /* flush */
1416 return IRQ_HANDLED;
1417 }
1418 return IRQ_NONE;
1419 #else
1420 struct tc35815_local *lp = dev->priv;
1421 int handled;
1422 u32 status;
1423
1424 spin_lock(&lp->lock);
1425 status = tc_readl(&tr->Int_Src);
1426 tc_writel(status, &tr->Int_Src); /* write to clear */
1427 handled = tc35815_do_interrupt(dev, status);
1428 (void)tc_readl(&tr->Int_Src); /* flush */
1429 spin_unlock(&lp->lock);
1430 return IRQ_RETVAL(handled >= 0);
1431 #endif /* TC35815_NAPI */
1432 }
1433
1434 #ifdef CONFIG_NET_POLL_CONTROLLER
1435 static void tc35815_poll_controller(struct net_device *dev)
1436 {
1437 disable_irq(dev->irq);
1438 tc35815_interrupt(dev->irq, dev);
1439 enable_irq(dev->irq);
1440 }
1441 #endif
1442
1443 /* We have a good packet(s), get it/them out of the buffers. */
1444 #ifdef TC35815_NAPI
1445 static int
1446 tc35815_rx(struct net_device *dev, int limit)
1447 #else
1448 static void
1449 tc35815_rx(struct net_device *dev)
1450 #endif
1451 {
1452 struct tc35815_local *lp = dev->priv;
1453 unsigned int fdctl;
1454 int i;
1455 int buf_free_count = 0;
1456 int fd_free_count = 0;
1457 #ifdef TC35815_NAPI
1458 int received = 0;
1459 #endif
1460
1461 while (!((fdctl = le32_to_cpu(lp->rfd_cur->fd.FDCtl)) & FD_CownsFD)) {
1462 int status = le32_to_cpu(lp->rfd_cur->fd.FDStat);
1463 int pkt_len = fdctl & FD_FDLength_MASK;
1464 int bd_count = (fdctl & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
1465 #ifdef DEBUG
1466 struct RxFD *next_rfd;
1467 #endif
1468 #if (RX_CTL_CMD & Rx_StripCRC) == 0
1469 pkt_len -= 4;
1470 #endif
1471
1472 if (netif_msg_rx_status(lp))
1473 dump_rxfd(lp->rfd_cur);
1474 if (status & Rx_Good) {
1475 struct sk_buff *skb;
1476 unsigned char *data;
1477 int cur_bd;
1478 #ifdef TC35815_USE_PACKEDBUFFER
1479 int offset;
1480 #endif
1481
1482 #ifdef TC35815_NAPI
1483 if (--limit < 0)
1484 break;
1485 #endif
1486 #ifdef TC35815_USE_PACKEDBUFFER
1487 BUG_ON(bd_count > 2);
1488 skb = dev_alloc_skb(pkt_len + 2); /* +2: for reserve */
1489 if (skb == NULL) {
1490 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n",
1491 dev->name);
1492 lp->stats.rx_dropped++;
1493 break;
1494 }
1495 skb_reserve(skb, 2); /* 16 bit alignment */
1496
1497 data = skb_put(skb, pkt_len);
1498
1499 /* copy from receive buffer */
1500 cur_bd = 0;
1501 offset = 0;
1502 while (offset < pkt_len && cur_bd < bd_count) {
1503 int len = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BDCtl) &
1504 BD_BuffLength_MASK;
1505 dma_addr_t dma = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BuffData);
1506 void *rxbuf = rxbuf_bus_to_virt(lp, dma);
1507 if (offset + len > pkt_len)
1508 len = pkt_len - offset;
1509 #ifdef TC35815_DMA_SYNC_ONDEMAND
1510 pci_dma_sync_single_for_cpu(lp->pci_dev,
1511 dma, len,
1512 PCI_DMA_FROMDEVICE);
1513 #endif
1514 memcpy(data + offset, rxbuf, len);
1515 #ifdef TC35815_DMA_SYNC_ONDEMAND
1516 pci_dma_sync_single_for_device(lp->pci_dev,
1517 dma, len,
1518 PCI_DMA_FROMDEVICE);
1519 #endif
1520 offset += len;
1521 cur_bd++;
1522 }
1523 #else /* TC35815_USE_PACKEDBUFFER */
1524 BUG_ON(bd_count > 1);
1525 cur_bd = (le32_to_cpu(lp->rfd_cur->bd[0].BDCtl)
1526 & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
1527 #ifdef DEBUG
1528 if (cur_bd >= RX_BUF_NUM) {
1529 printk("%s: invalid BDID.\n", dev->name);
1530 panic_queues(dev);
1531 }
1532 BUG_ON(lp->rx_skbs[cur_bd].skb_dma !=
1533 (le32_to_cpu(lp->rfd_cur->bd[0].BuffData) & ~3));
1534 if (!lp->rx_skbs[cur_bd].skb) {
1535 printk("%s: NULL skb.\n", dev->name);
1536 panic_queues(dev);
1537 }
1538 #else
1539 BUG_ON(cur_bd >= RX_BUF_NUM);
1540 #endif
1541 skb = lp->rx_skbs[cur_bd].skb;
1542 prefetch(skb->data);
1543 lp->rx_skbs[cur_bd].skb = NULL;
1544 lp->fbl_count--;
1545 pci_unmap_single(lp->pci_dev,
1546 lp->rx_skbs[cur_bd].skb_dma,
1547 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1548 if (!HAVE_DMA_RXALIGN(lp))
1549 memmove(skb->data, skb->data - 2, pkt_len);
1550 data = skb_put(skb, pkt_len);
1551 #endif /* TC35815_USE_PACKEDBUFFER */
1552 if (netif_msg_pktdata(lp))
1553 print_eth(data);
1554 skb->protocol = eth_type_trans(skb, dev);
1555 #ifdef TC35815_NAPI
1556 netif_receive_skb(skb);
1557 received++;
1558 #else
1559 netif_rx(skb);
1560 #endif
1561 dev->last_rx = jiffies;
1562 lp->stats.rx_packets++;
1563 lp->stats.rx_bytes += pkt_len;
1564 } else {
1565 lp->stats.rx_errors++;
1566 printk(KERN_DEBUG "%s: Rx error (status %x)\n",
1567 dev->name, status & Rx_Stat_Mask);
1568 /* WORKAROUND: LongErr and CRCErr means Overflow. */
1569 if ((status & Rx_LongErr) && (status & Rx_CRCErr)) {
1570 status &= ~(Rx_LongErr|Rx_CRCErr);
1571 status |= Rx_Over;
1572 }
1573 if (status & Rx_LongErr) lp->stats.rx_length_errors++;
1574 if (status & Rx_Over) lp->stats.rx_fifo_errors++;
1575 if (status & Rx_CRCErr) lp->stats.rx_crc_errors++;
1576 if (status & Rx_Align) lp->stats.rx_frame_errors++;
1577 }
1578
1579 if (bd_count > 0) {
1580 /* put Free Buffer back to controller */
1581 int bdctl = le32_to_cpu(lp->rfd_cur->bd[bd_count - 1].BDCtl);
1582 unsigned char id =
1583 (bdctl & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
1584 #ifdef DEBUG
1585 if (id >= RX_BUF_NUM) {
1586 printk("%s: invalid BDID.\n", dev->name);
1587 panic_queues(dev);
1588 }
1589 #else
1590 BUG_ON(id >= RX_BUF_NUM);
1591 #endif
1592 /* free old buffers */
1593 #ifdef TC35815_USE_PACKEDBUFFER
1594 while (lp->fbl_curid != id)
1595 #else
1596 while (lp->fbl_count < RX_BUF_NUM)
1597 #endif
1598 {
1599 #ifdef TC35815_USE_PACKEDBUFFER
1600 unsigned char curid = lp->fbl_curid;
1601 #else
1602 unsigned char curid =
1603 (id + 1 + lp->fbl_count) % RX_BUF_NUM;
1604 #endif
1605 struct BDesc *bd = &lp->fbl_ptr->bd[curid];
1606 #ifdef DEBUG
1607 bdctl = le32_to_cpu(bd->BDCtl);
1608 if (bdctl & BD_CownsBD) {
1609 printk("%s: Freeing invalid BD.\n",
1610 dev->name);
1611 panic_queues(dev);
1612 }
1613 #endif
1614 /* pass BD to controler */
1615 #ifndef TC35815_USE_PACKEDBUFFER
1616 if (!lp->rx_skbs[curid].skb) {
1617 lp->rx_skbs[curid].skb =
1618 alloc_rxbuf_skb(dev,
1619 lp->pci_dev,
1620 &lp->rx_skbs[curid].skb_dma);
1621 if (!lp->rx_skbs[curid].skb)
1622 break; /* try on next reception */
1623 bd->BuffData = cpu_to_le32(lp->rx_skbs[curid].skb_dma);
1624 }
1625 #endif /* TC35815_USE_PACKEDBUFFER */
1626 /* Note: BDLength was modified by chip. */
1627 bd->BDCtl = cpu_to_le32(BD_CownsBD |
1628 (curid << BD_RxBDID_SHIFT) |
1629 RX_BUF_SIZE);
1630 #ifdef TC35815_USE_PACKEDBUFFER
1631 lp->fbl_curid = (curid + 1) % RX_BUF_NUM;
1632 if (netif_msg_rx_status(lp)) {
1633 printk("%s: Entering new FBD %d\n",
1634 dev->name, lp->fbl_curid);
1635 dump_frfd(lp->fbl_ptr);
1636 }
1637 #else
1638 lp->fbl_count++;
1639 #endif
1640 buf_free_count++;
1641 }
1642 }
1643
1644 /* put RxFD back to controller */
1645 #ifdef DEBUG
1646 next_rfd = fd_bus_to_virt(lp,
1647 le32_to_cpu(lp->rfd_cur->fd.FDNext));
1648 if (next_rfd < lp->rfd_base || next_rfd > lp->rfd_limit) {
1649 printk("%s: RxFD FDNext invalid.\n", dev->name);
1650 panic_queues(dev);
1651 }
1652 #endif
1653 for (i = 0; i < (bd_count + 1) / 2 + 1; i++) {
1654 /* pass FD to controler */
1655 #ifdef DEBUG
1656 lp->rfd_cur->fd.FDNext = cpu_to_le32(0xdeaddead);
1657 #else
1658 lp->rfd_cur->fd.FDNext = cpu_to_le32(FD_Next_EOL);
1659 #endif
1660 lp->rfd_cur->fd.FDCtl = cpu_to_le32(FD_CownsFD);
1661 lp->rfd_cur++;
1662 fd_free_count++;
1663 }
1664 if (lp->rfd_cur > lp->rfd_limit)
1665 lp->rfd_cur = lp->rfd_base;
1666 #ifdef DEBUG
1667 if (lp->rfd_cur != next_rfd)
1668 printk("rfd_cur = %p, next_rfd %p\n",
1669 lp->rfd_cur, next_rfd);
1670 #endif
1671 }
1672
1673 /* re-enable BL/FDA Exhaust interrupts. */
1674 if (fd_free_count) {
1675 struct tc35815_regs __iomem *tr =
1676 (struct tc35815_regs __iomem *)dev->base_addr;
1677 u32 en, en_old = tc_readl(&tr->Int_En);
1678 en = en_old | Int_FDAExEn;
1679 if (buf_free_count)
1680 en |= Int_BLExEn;
1681 if (en != en_old)
1682 tc_writel(en, &tr->Int_En);
1683 }
1684 #ifdef TC35815_NAPI
1685 return received;
1686 #endif
1687 }
1688
1689 #ifdef TC35815_NAPI
1690 static int
1691 tc35815_poll(struct net_device *dev, int *budget)
1692 {
1693 struct tc35815_local *lp = dev->priv;
1694 struct tc35815_regs __iomem *tr =
1695 (struct tc35815_regs __iomem *)dev->base_addr;
1696 int limit = min(*budget, dev->quota);
1697 int received = 0, handled;
1698 u32 status;
1699
1700 spin_lock(&lp->lock);
1701 status = tc_readl(&tr->Int_Src);
1702 do {
1703 tc_writel(status, &tr->Int_Src); /* write to clear */
1704
1705 handled = tc35815_do_interrupt(dev, status, limit);
1706 if (handled >= 0) {
1707 received += handled;
1708 limit -= handled;
1709 if (limit <= 0)
1710 break;
1711 }
1712 status = tc_readl(&tr->Int_Src);
1713 } while (status);
1714 spin_unlock(&lp->lock);
1715
1716 dev->quota -= received;
1717 *budget -= received;
1718 if (limit <= 0)
1719 return 1;
1720
1721 netif_rx_complete(dev);
1722 /* enable interrupts */
1723 tc_writel(tc_readl(&tr->DMA_Ctl) & ~DMA_IntMask, &tr->DMA_Ctl);
1724 return 0;
1725 }
1726 #endif
1727
1728 #ifdef NO_CHECK_CARRIER
1729 #define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_LateColl|Tx_TxPar|Tx_SQErr)
1730 #else
1731 #define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_NCarr|Tx_LateColl|Tx_TxPar|Tx_SQErr)
1732 #endif
1733
1734 static void
1735 tc35815_check_tx_stat(struct net_device *dev, int status)
1736 {
1737 struct tc35815_local *lp = dev->priv;
1738 const char *msg = NULL;
1739
1740 /* count collisions */
1741 if (status & Tx_ExColl)
1742 lp->stats.collisions += 16;
1743 if (status & Tx_TxColl_MASK)
1744 lp->stats.collisions += status & Tx_TxColl_MASK;
1745
1746 #ifndef NO_CHECK_CARRIER
1747 /* TX4939 does not have NCarr */
1748 if (lp->boardtype == TC35815_TX4939)
1749 status &= ~Tx_NCarr;
1750 #ifdef WORKAROUND_LOSTCAR
1751 /* WORKAROUND: ignore LostCrS in full duplex operation */
1752 if ((lp->timer_state != asleep && lp->timer_state != lcheck)
1753 || lp->fullduplex)
1754 status &= ~Tx_NCarr;
1755 #endif
1756 #endif
1757
1758 if (!(status & TX_STA_ERR)) {
1759 /* no error. */
1760 lp->stats.tx_packets++;
1761 return;
1762 }
1763
1764 lp->stats.tx_errors++;
1765 if (status & Tx_ExColl) {
1766 lp->stats.tx_aborted_errors++;
1767 msg = "Excessive Collision.";
1768 }
1769 if (status & Tx_Under) {
1770 lp->stats.tx_fifo_errors++;
1771 msg = "Tx FIFO Underrun.";
1772 if (lp->lstats.tx_underrun < TX_THRESHOLD_KEEP_LIMIT) {
1773 lp->lstats.tx_underrun++;
1774 if (lp->lstats.tx_underrun >= TX_THRESHOLD_KEEP_LIMIT) {
1775 struct tc35815_regs __iomem *tr =
1776 (struct tc35815_regs __iomem *)dev->base_addr;
1777 tc_writel(TX_THRESHOLD_MAX, &tr->TxThrsh);
1778 msg = "Tx FIFO Underrun.Change Tx threshold to max.";
1779 }
1780 }
1781 }
1782 if (status & Tx_Defer) {
1783 lp->stats.tx_fifo_errors++;
1784 msg = "Excessive Deferral.";
1785 }
1786 #ifndef NO_CHECK_CARRIER
1787 if (status & Tx_NCarr) {
1788 lp->stats.tx_carrier_errors++;
1789 msg = "Lost Carrier Sense.";
1790 }
1791 #endif
1792 if (status & Tx_LateColl) {
1793 lp->stats.tx_aborted_errors++;
1794 msg = "Late Collision.";
1795 }
1796 if (status & Tx_TxPar) {
1797 lp->stats.tx_fifo_errors++;
1798 msg = "Transmit Parity Error.";
1799 }
1800 if (status & Tx_SQErr) {
1801 lp->stats.tx_heartbeat_errors++;
1802 msg = "Signal Quality Error.";
1803 }
1804 if (msg && netif_msg_tx_err(lp))
1805 printk(KERN_WARNING "%s: %s (%#x)\n", dev->name, msg, status);
1806 }
1807
1808 /* This handles TX complete events posted by the device
1809 * via interrupts.
1810 */
1811 static void
1812 tc35815_txdone(struct net_device *dev)
1813 {
1814 struct tc35815_local *lp = dev->priv;
1815 struct TxFD *txfd;
1816 unsigned int fdctl;
1817
1818 txfd = &lp->tfd_base[lp->tfd_end];
1819 while (lp->tfd_start != lp->tfd_end &&
1820 !((fdctl = le32_to_cpu(txfd->fd.FDCtl)) & FD_CownsFD)) {
1821 int status = le32_to_cpu(txfd->fd.FDStat);
1822 struct sk_buff *skb;
1823 unsigned long fdnext = le32_to_cpu(txfd->fd.FDNext);
1824 u32 fdsystem = le32_to_cpu(txfd->fd.FDSystem);
1825
1826 if (netif_msg_tx_done(lp)) {
1827 printk("%s: complete TxFD.\n", dev->name);
1828 dump_txfd(txfd);
1829 }
1830 tc35815_check_tx_stat(dev, status);
1831
1832 skb = fdsystem != 0xffffffff ?
1833 lp->tx_skbs[fdsystem].skb : NULL;
1834 #ifdef DEBUG
1835 if (lp->tx_skbs[lp->tfd_end].skb != skb) {
1836 printk("%s: tx_skbs mismatch.\n", dev->name);
1837 panic_queues(dev);
1838 }
1839 #else
1840 BUG_ON(lp->tx_skbs[lp->tfd_end].skb != skb);
1841 #endif
1842 if (skb) {
1843 lp->stats.tx_bytes += skb->len;
1844 pci_unmap_single(lp->pci_dev, lp->tx_skbs[lp->tfd_end].skb_dma, skb->len, PCI_DMA_TODEVICE);
1845 lp->tx_skbs[lp->tfd_end].skb = NULL;
1846 lp->tx_skbs[lp->tfd_end].skb_dma = 0;
1847 #ifdef TC35815_NAPI
1848 dev_kfree_skb_any(skb);
1849 #else
1850 dev_kfree_skb_irq(skb);
1851 #endif
1852 }
1853 txfd->fd.FDSystem = cpu_to_le32(0xffffffff);
1854
1855 lp->tfd_end = (lp->tfd_end + 1) % TX_FD_NUM;
1856 txfd = &lp->tfd_base[lp->tfd_end];
1857 #ifdef DEBUG
1858 if ((fdnext & ~FD_Next_EOL) != fd_virt_to_bus(lp, txfd)) {
1859 printk("%s: TxFD FDNext invalid.\n", dev->name);
1860 panic_queues(dev);
1861 }
1862 #endif
1863 if (fdnext & FD_Next_EOL) {
1864 /* DMA Transmitter has been stopping... */
1865 if (lp->tfd_end != lp->tfd_start) {
1866 struct tc35815_regs __iomem *tr =
1867 (struct tc35815_regs __iomem *)dev->base_addr;
1868 int head = (lp->tfd_start + TX_FD_NUM - 1) % TX_FD_NUM;
1869 struct TxFD* txhead = &lp->tfd_base[head];
1870 int qlen = (lp->tfd_start + TX_FD_NUM
1871 - lp->tfd_end) % TX_FD_NUM;
1872
1873 #ifdef DEBUG
1874 if (!(le32_to_cpu(txfd->fd.FDCtl) & FD_CownsFD)) {
1875 printk("%s: TxFD FDCtl invalid.\n", dev->name);
1876 panic_queues(dev);
1877 }
1878 #endif
1879 /* log max queue length */
1880 if (lp->lstats.max_tx_qlen < qlen)
1881 lp->lstats.max_tx_qlen = qlen;
1882
1883
1884 /* start DMA Transmitter again */
1885 txhead->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
1886 #ifdef GATHER_TXINT
1887 txhead->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
1888 #endif
1889 if (netif_msg_tx_queued(lp)) {
1890 printk("%s: start TxFD on queue.\n",
1891 dev->name);
1892 dump_txfd(txfd);
1893 }
1894 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
1895 }
1896 break;
1897 }
1898 }
1899
1900 /* If we had stopped the queue due to a "tx full"
1901 * condition, and space has now been made available,
1902 * wake up the queue.
1903 */
1904 if (netif_queue_stopped(dev) && ! tc35815_tx_full(dev))
1905 netif_wake_queue(dev);
1906 }
1907
1908 /* The inverse routine to tc35815_open(). */
1909 static int
1910 tc35815_close(struct net_device *dev)
1911 {
1912 struct tc35815_local *lp = dev->priv;
1913 netif_stop_queue(dev);
1914
1915 /* Flush the Tx and disable Rx here. */
1916
1917 del_timer(&lp->timer); /* Kill if running */
1918 tc35815_chip_reset(dev);
1919 free_irq(dev->irq, dev);
1920
1921 tc35815_free_queues(dev);
1922
1923 return 0;
1924
1925 }
1926
1927 /*
1928 * Get the current statistics.
1929 * This may be called with the card open or closed.
1930 */
1931 static struct net_device_stats *tc35815_get_stats(struct net_device *dev)
1932 {
1933 struct tc35815_local *lp = dev->priv;
1934 struct tc35815_regs __iomem *tr =
1935 (struct tc35815_regs __iomem *)dev->base_addr;
1936 if (netif_running(dev)) {
1937 /* Update the statistics from the device registers. */
1938 lp->stats.rx_missed_errors = tc_readl(&tr->Miss_Cnt);
1939 }
1940
1941 return &lp->stats;
1942 }
1943
1944 static void tc35815_set_cam_entry(struct net_device *dev, int index, unsigned char *addr)
1945 {
1946 struct tc35815_local *lp = dev->priv;
1947 struct tc35815_regs __iomem *tr =
1948 (struct tc35815_regs __iomem *)dev->base_addr;
1949 int cam_index = index * 6;
1950 u32 cam_data;
1951 u32 saved_addr;
1952 saved_addr = tc_readl(&tr->CAM_Adr);
1953
1954 if (netif_msg_hw(lp)) {
1955 int i;
1956 printk(KERN_DEBUG "%s: CAM %d:", dev->name, index);
1957 for (i = 0; i < 6; i++)
1958 printk(" %02x", addr[i]);
1959 printk("\n");
1960 }
1961 if (index & 1) {
1962 /* read modify write */
1963 tc_writel(cam_index - 2, &tr->CAM_Adr);
1964 cam_data = tc_readl(&tr->CAM_Data) & 0xffff0000;
1965 cam_data |= addr[0] << 8 | addr[1];
1966 tc_writel(cam_data, &tr->CAM_Data);
1967 /* write whole word */
1968 tc_writel(cam_index + 2, &tr->CAM_Adr);
1969 cam_data = (addr[2] << 24) | (addr[3] << 16) | (addr[4] << 8) | addr[5];
1970 tc_writel(cam_data, &tr->CAM_Data);
1971 } else {
1972 /* write whole word */
1973 tc_writel(cam_index, &tr->CAM_Adr);
1974 cam_data = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3];
1975 tc_writel(cam_data, &tr->CAM_Data);
1976 /* read modify write */
1977 tc_writel(cam_index + 4, &tr->CAM_Adr);
1978 cam_data = tc_readl(&tr->CAM_Data) & 0x0000ffff;
1979 cam_data |= addr[4] << 24 | (addr[5] << 16);
1980 tc_writel(cam_data, &tr->CAM_Data);
1981 }
1982
1983 tc_writel(saved_addr, &tr->CAM_Adr);
1984 }
1985
1986
1987 /*
1988 * Set or clear the multicast filter for this adaptor.
1989 * num_addrs == -1 Promiscuous mode, receive all packets
1990 * num_addrs == 0 Normal mode, clear multicast list
1991 * num_addrs > 0 Multicast mode, receive normal and MC packets,
1992 * and do best-effort filtering.
1993 */
1994 static void
1995 tc35815_set_multicast_list(struct net_device *dev)
1996 {
1997 struct tc35815_regs __iomem *tr =
1998 (struct tc35815_regs __iomem *)dev->base_addr;
1999
2000 if (dev->flags&IFF_PROMISC)
2001 {
2002 #ifdef WORKAROUND_100HALF_PROMISC
2003 /* With some (all?) 100MHalf HUB, controller will hang
2004 * if we enabled promiscuous mode before linkup... */
2005 struct tc35815_local *lp = dev->priv;
2006 int pid = lp->phy_addr;
2007 if (!(tc_mdio_read(dev, pid, MII_BMSR) & BMSR_LSTATUS))
2008 return;
2009 #endif
2010 /* Enable promiscuous mode */
2011 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc | CAM_StationAcc, &tr->CAM_Ctl);
2012 }
2013 else if((dev->flags&IFF_ALLMULTI) || dev->mc_count > CAM_ENTRY_MAX - 3)
2014 {
2015 /* CAM 0, 1, 20 are reserved. */
2016 /* Disable promiscuous mode, use normal mode. */
2017 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc, &tr->CAM_Ctl);
2018 }
2019 else if(dev->mc_count)
2020 {
2021 struct dev_mc_list* cur_addr = dev->mc_list;
2022 int i;
2023 int ena_bits = CAM_Ena_Bit(CAM_ENTRY_SOURCE);
2024
2025 tc_writel(0, &tr->CAM_Ctl);
2026 /* Walk the address list, and load the filter */
2027 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
2028 if (!cur_addr)
2029 break;
2030 /* entry 0,1 is reserved. */
2031 tc35815_set_cam_entry(dev, i + 2, cur_addr->dmi_addr);
2032 ena_bits |= CAM_Ena_Bit(i + 2);
2033 }
2034 tc_writel(ena_bits, &tr->CAM_Ena);
2035 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2036 }
2037 else {
2038 tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
2039 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2040 }
2041 }
2042
2043 static void tc35815_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2044 {
2045 struct tc35815_local *lp = dev->priv;
2046 strcpy(info->driver, MODNAME);
2047 strcpy(info->version, DRV_VERSION);
2048 strcpy(info->bus_info, pci_name(lp->pci_dev));
2049 }
2050
2051 static int tc35815_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2052 {
2053 struct tc35815_local *lp = dev->priv;
2054 spin_lock_irq(&lp->lock);
2055 mii_ethtool_gset(&lp->mii, cmd);
2056 spin_unlock_irq(&lp->lock);
2057 return 0;
2058 }
2059
2060 static int tc35815_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2061 {
2062 struct tc35815_local *lp = dev->priv;
2063 int rc;
2064 #if 1 /* use our negotiation method... */
2065 /* Verify the settings we care about. */
2066 if (cmd->autoneg != AUTONEG_ENABLE &&
2067 cmd->autoneg != AUTONEG_DISABLE)
2068 return -EINVAL;
2069 if (cmd->autoneg == AUTONEG_DISABLE &&
2070 ((cmd->speed != SPEED_100 &&
2071 cmd->speed != SPEED_10) ||
2072 (cmd->duplex != DUPLEX_HALF &&
2073 cmd->duplex != DUPLEX_FULL)))
2074 return -EINVAL;
2075
2076 /* Ok, do it to it. */
2077 spin_lock_irq(&lp->lock);
2078 del_timer(&lp->timer);
2079 tc35815_start_auto_negotiation(dev, cmd);
2080 spin_unlock_irq(&lp->lock);
2081 rc = 0;
2082 #else
2083 spin_lock_irq(&lp->lock);
2084 rc = mii_ethtool_sset(&lp->mii, cmd);
2085 spin_unlock_irq(&lp->lock);
2086 #endif
2087 return rc;
2088 }
2089
2090 static int tc35815_nway_reset(struct net_device *dev)
2091 {
2092 struct tc35815_local *lp = dev->priv;
2093 int rc;
2094 spin_lock_irq(&lp->lock);
2095 rc = mii_nway_restart(&lp->mii);
2096 spin_unlock_irq(&lp->lock);
2097 return rc;
2098 }
2099
2100 static u32 tc35815_get_link(struct net_device *dev)
2101 {
2102 struct tc35815_local *lp = dev->priv;
2103 int rc;
2104 spin_lock_irq(&lp->lock);
2105 rc = mii_link_ok(&lp->mii);
2106 spin_unlock_irq(&lp->lock);
2107 return rc;
2108 }
2109
2110 static u32 tc35815_get_msglevel(struct net_device *dev)
2111 {
2112 struct tc35815_local *lp = dev->priv;
2113 return lp->msg_enable;
2114 }
2115
2116 static void tc35815_set_msglevel(struct net_device *dev, u32 datum)
2117 {
2118 struct tc35815_local *lp = dev->priv;
2119 lp->msg_enable = datum;
2120 }
2121
2122 static int tc35815_get_stats_count(struct net_device *dev)
2123 {
2124 struct tc35815_local *lp = dev->priv;
2125 return sizeof(lp->lstats) / sizeof(int);
2126 }
2127
2128 static void tc35815_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
2129 {
2130 struct tc35815_local *lp = dev->priv;
2131 data[0] = lp->lstats.max_tx_qlen;
2132 data[1] = lp->lstats.tx_ints;
2133 data[2] = lp->lstats.rx_ints;
2134 data[3] = lp->lstats.tx_underrun;
2135 }
2136
2137 static struct {
2138 const char str[ETH_GSTRING_LEN];
2139 } ethtool_stats_keys[] = {
2140 { "max_tx_qlen" },
2141 { "tx_ints" },
2142 { "rx_ints" },
2143 { "tx_underrun" },
2144 };
2145
2146 static void tc35815_get_strings(struct net_device *dev, u32 stringset, u8 *data)
2147 {
2148 memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
2149 }
2150
2151 static const struct ethtool_ops tc35815_ethtool_ops = {
2152 .get_drvinfo = tc35815_get_drvinfo,
2153 .get_settings = tc35815_get_settings,
2154 .set_settings = tc35815_set_settings,
2155 .nway_reset = tc35815_nway_reset,
2156 .get_link = tc35815_get_link,
2157 .get_msglevel = tc35815_get_msglevel,
2158 .set_msglevel = tc35815_set_msglevel,
2159 .get_strings = tc35815_get_strings,
2160 .get_stats_count = tc35815_get_stats_count,
2161 .get_ethtool_stats = tc35815_get_ethtool_stats,
2162 .get_perm_addr = ethtool_op_get_perm_addr,
2163 };
2164
2165 static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2166 {
2167 struct tc35815_local *lp = dev->priv;
2168 int rc;
2169
2170 if (!netif_running(dev))
2171 return -EINVAL;
2172
2173 spin_lock_irq(&lp->lock);
2174 rc = generic_mii_ioctl(&lp->mii, if_mii(rq), cmd, NULL);
2175 spin_unlock_irq(&lp->lock);
2176
2177 return rc;
2178 }
2179
2180 static int tc_mdio_read(struct net_device *dev, int phy_id, int location)
2181 {
2182 struct tc35815_regs __iomem *tr =
2183 (struct tc35815_regs __iomem *)dev->base_addr;
2184 u32 data;
2185 tc_writel(MD_CA_Busy | (phy_id << 5) | location, &tr->MD_CA);
2186 while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
2187 ;
2188 data = tc_readl(&tr->MD_Data);
2189 return data & 0xffff;
2190 }
2191
2192 static void tc_mdio_write(struct net_device *dev, int phy_id, int location,
2193 int val)
2194 {
2195 struct tc35815_regs __iomem *tr =
2196 (struct tc35815_regs __iomem *)dev->base_addr;
2197 tc_writel(val, &tr->MD_Data);
2198 tc_writel(MD_CA_Busy | MD_CA_Wr | (phy_id << 5) | location, &tr->MD_CA);
2199 while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
2200 ;
2201 }
2202
2203 /* Auto negotiation. The scheme is very simple. We have a timer routine
2204 * that keeps watching the auto negotiation process as it progresses.
2205 * The DP83840 is first told to start doing it's thing, we set up the time
2206 * and place the timer state machine in it's initial state.
2207 *
2208 * Here the timer peeks at the DP83840 status registers at each click to see
2209 * if the auto negotiation has completed, we assume here that the DP83840 PHY
2210 * will time out at some point and just tell us what (didn't) happen. For
2211 * complete coverage we only allow so many of the ticks at this level to run,
2212 * when this has expired we print a warning message and try another strategy.
2213 * This "other" strategy is to force the interface into various speed/duplex
2214 * configurations and we stop when we see a link-up condition before the
2215 * maximum number of "peek" ticks have occurred.
2216 *
2217 * Once a valid link status has been detected we configure the BigMAC and
2218 * the rest of the Happy Meal to speak the most efficient protocol we could
2219 * get a clean link for. The priority for link configurations, highest first
2220 * is:
2221 * 100 Base-T Full Duplex
2222 * 100 Base-T Half Duplex
2223 * 10 Base-T Full Duplex
2224 * 10 Base-T Half Duplex
2225 *
2226 * We start a new timer now, after a successful auto negotiation status has
2227 * been detected. This timer just waits for the link-up bit to get set in
2228 * the BMCR of the DP83840. When this occurs we print a kernel log message
2229 * describing the link type in use and the fact that it is up.
2230 *
2231 * If a fatal error of some sort is signalled and detected in the interrupt
2232 * service routine, and the chip is reset, or the link is ifconfig'd down
2233 * and then back up, this entire process repeats itself all over again.
2234 */
2235 /* Note: Above comments are come from sunhme driver. */
2236
2237 static int tc35815_try_next_permutation(struct net_device *dev)
2238 {
2239 struct tc35815_local *lp = dev->priv;
2240 int pid = lp->phy_addr;
2241 unsigned short bmcr;
2242
2243 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2244
2245 /* Downgrade from full to half duplex. Only possible via ethtool. */
2246 if (bmcr & BMCR_FULLDPLX) {
2247 bmcr &= ~BMCR_FULLDPLX;
2248 printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
2249 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2250 return 0;
2251 }
2252
2253 /* Downgrade from 100 to 10. */
2254 if (bmcr & BMCR_SPEED100) {
2255 bmcr &= ~BMCR_SPEED100;
2256 printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
2257 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2258 return 0;
2259 }
2260
2261 /* We've tried everything. */
2262 return -1;
2263 }
2264
2265 static void
2266 tc35815_display_link_mode(struct net_device *dev)
2267 {
2268 struct tc35815_local *lp = dev->priv;
2269 int pid = lp->phy_addr;
2270 unsigned short lpa, bmcr;
2271 char *speed = "", *duplex = "";
2272
2273 lpa = tc_mdio_read(dev, pid, MII_LPA);
2274 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2275 if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
2276 speed = "100Mb/s";
2277 else
2278 speed = "10Mb/s";
2279 if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
2280 duplex = "Full Duplex";
2281 else
2282 duplex = "Half Duplex";
2283
2284 if (netif_msg_link(lp))
2285 printk(KERN_INFO "%s: Link is up at %s, %s.\n",
2286 dev->name, speed, duplex);
2287 printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
2288 dev->name,
2289 bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
2290 }
2291
2292 static void tc35815_display_forced_link_mode(struct net_device *dev)
2293 {
2294 struct tc35815_local *lp = dev->priv;
2295 int pid = lp->phy_addr;
2296 unsigned short bmcr;
2297 char *speed = "", *duplex = "";
2298
2299 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2300 if (bmcr & BMCR_SPEED100)
2301 speed = "100Mb/s";
2302 else
2303 speed = "10Mb/s";
2304 if (bmcr & BMCR_FULLDPLX)
2305 duplex = "Full Duplex.\n";
2306 else
2307 duplex = "Half Duplex.\n";
2308
2309 if (netif_msg_link(lp))
2310 printk(KERN_INFO "%s: Link has been forced up at %s, %s",
2311 dev->name, speed, duplex);
2312 }
2313
2314 static void tc35815_set_link_modes(struct net_device *dev)
2315 {
2316 struct tc35815_local *lp = dev->priv;
2317 struct tc35815_regs __iomem *tr =
2318 (struct tc35815_regs __iomem *)dev->base_addr;
2319 int pid = lp->phy_addr;
2320 unsigned short bmcr, lpa;
2321 int speed;
2322
2323 if (lp->timer_state == arbwait) {
2324 lpa = tc_mdio_read(dev, pid, MII_LPA);
2325 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2326 printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
2327 dev->name,
2328 bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
2329 if (!(lpa & (LPA_10HALF | LPA_10FULL |
2330 LPA_100HALF | LPA_100FULL))) {
2331 /* fall back to 10HALF */
2332 printk(KERN_INFO "%s: bad ability %04x - falling back to 10HD.\n",
2333 dev->name, lpa);
2334 lpa = LPA_10HALF;
2335 }
2336 if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
2337 lp->fullduplex = 1;
2338 else
2339 lp->fullduplex = 0;
2340 if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
2341 speed = 100;
2342 else
2343 speed = 10;
2344 } else {
2345 /* Forcing a link mode. */
2346 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2347 if (bmcr & BMCR_FULLDPLX)
2348 lp->fullduplex = 1;
2349 else
2350 lp->fullduplex = 0;
2351 if (bmcr & BMCR_SPEED100)
2352 speed = 100;
2353 else
2354 speed = 10;
2355 }
2356
2357 tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_HaltReq, &tr->MAC_Ctl);
2358 if (lp->fullduplex) {
2359 tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_FullDup, &tr->MAC_Ctl);
2360 } else {
2361 tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_FullDup, &tr->MAC_Ctl);
2362 }
2363 tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_HaltReq, &tr->MAC_Ctl);
2364
2365 /* TX4939 PCFG.SPEEDn bit will be changed on NETDEV_CHANGE event. */
2366
2367 #ifndef NO_CHECK_CARRIER
2368 /* TX4939 does not have EnLCarr */
2369 if (lp->boardtype != TC35815_TX4939) {
2370 #ifdef WORKAROUND_LOSTCAR
2371 /* WORKAROUND: enable LostCrS only if half duplex operation */
2372 if (!lp->fullduplex && lp->boardtype != TC35815_TX4939)
2373 tc_writel(tc_readl(&tr->Tx_Ctl) | Tx_EnLCarr, &tr->Tx_Ctl);
2374 #endif
2375 }
2376 #endif
2377 lp->mii.full_duplex = lp->fullduplex;
2378 }
2379
2380 static void tc35815_timer(unsigned long data)
2381 {
2382 struct net_device *dev = (struct net_device *)data;
2383 struct tc35815_local *lp = dev->priv;
2384 int pid = lp->phy_addr;
2385 unsigned short bmsr, bmcr, lpa;
2386 int restart_timer = 0;
2387
2388 spin_lock_irq(&lp->lock);
2389
2390 lp->timer_ticks++;
2391 switch (lp->timer_state) {
2392 case arbwait:
2393 /*
2394 * Only allow for 5 ticks, thats 10 seconds and much too
2395 * long to wait for arbitration to complete.
2396 */
2397 /* TC35815 need more times... */
2398 if (lp->timer_ticks >= 10) {
2399 /* Enter force mode. */
2400 if (!options.doforce) {
2401 printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
2402 " cable probblem?\n", dev->name);
2403 /* Try to restart the adaptor. */
2404 tc35815_restart(dev);
2405 goto out;
2406 }
2407 printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
2408 " trying force link mode\n", dev->name);
2409 printk(KERN_DEBUG "%s: BMCR %x BMSR %x\n", dev->name,
2410 tc_mdio_read(dev, pid, MII_BMCR),
2411 tc_mdio_read(dev, pid, MII_BMSR));
2412 bmcr = BMCR_SPEED100;
2413 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2414
2415 /*
2416 * OK, seems we need do disable the transceiver
2417 * for the first tick to make sure we get an
2418 * accurate link state at the second tick.
2419 */
2420
2421 lp->timer_state = ltrywait;
2422 lp->timer_ticks = 0;
2423 restart_timer = 1;
2424 } else {
2425 /* Anything interesting happen? */
2426 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2427 if (bmsr & BMSR_ANEGCOMPLETE) {
2428 /* Just what we've been waiting for... */
2429 tc35815_set_link_modes(dev);
2430
2431 /*
2432 * Success, at least so far, advance our state
2433 * engine.
2434 */
2435 lp->timer_state = lupwait;
2436 restart_timer = 1;
2437 } else {
2438 restart_timer = 1;
2439 }
2440 }
2441 break;
2442
2443 case lupwait:
2444 /*
2445 * Auto negotiation was successful and we are awaiting a
2446 * link up status. I have decided to let this timer run
2447 * forever until some sort of error is signalled, reporting
2448 * a message to the user at 10 second intervals.
2449 */
2450 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2451 if (bmsr & BMSR_LSTATUS) {
2452 /*
2453 * Wheee, it's up, display the link mode in use and put
2454 * the timer to sleep.
2455 */
2456 tc35815_display_link_mode(dev);
2457 netif_carrier_on(dev);
2458 #ifdef WORKAROUND_100HALF_PROMISC
2459 /* delayed promiscuous enabling */
2460 if (dev->flags & IFF_PROMISC)
2461 tc35815_set_multicast_list(dev);
2462 #endif
2463 #if 1
2464 lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
2465 lp->timer_state = lcheck;
2466 restart_timer = 1;
2467 #else
2468 lp->timer_state = asleep;
2469 restart_timer = 0;
2470 #endif
2471 } else {
2472 if (lp->timer_ticks >= 10) {
2473 printk(KERN_NOTICE "%s: Auto negotiation successful, link still "
2474 "not completely up.\n", dev->name);
2475 lp->timer_ticks = 0;
2476 restart_timer = 1;
2477 } else {
2478 restart_timer = 1;
2479 }
2480 }
2481 break;
2482
2483 case ltrywait:
2484 /*
2485 * Making the timeout here too long can make it take
2486 * annoyingly long to attempt all of the link mode
2487 * permutations, but then again this is essentially
2488 * error recovery code for the most part.
2489 */
2490 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2491 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2492 if (lp->timer_ticks == 1) {
2493 /*
2494 * Re-enable transceiver, we'll re-enable the
2495 * transceiver next tick, then check link state
2496 * on the following tick.
2497 */
2498 restart_timer = 1;
2499 break;
2500 }
2501 if (lp->timer_ticks == 2) {
2502 restart_timer = 1;
2503 break;
2504 }
2505 if (bmsr & BMSR_LSTATUS) {
2506 /* Force mode selection success. */
2507 tc35815_display_forced_link_mode(dev);
2508 netif_carrier_on(dev);
2509 tc35815_set_link_modes(dev);
2510 #ifdef WORKAROUND_100HALF_PROMISC
2511 /* delayed promiscuous enabling */
2512 if (dev->flags & IFF_PROMISC)
2513 tc35815_set_multicast_list(dev);
2514 #endif
2515 #if 1
2516 lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
2517 lp->timer_state = lcheck;
2518 restart_timer = 1;
2519 #else
2520 lp->timer_state = asleep;
2521 restart_timer = 0;
2522 #endif
2523 } else {
2524 if (lp->timer_ticks >= 4) { /* 6 seconds or so... */
2525 int ret;
2526
2527 ret = tc35815_try_next_permutation(dev);
2528 if (ret == -1) {
2529 /*
2530 * Aieee, tried them all, reset the
2531 * chip and try all over again.
2532 */
2533 printk(KERN_NOTICE "%s: Link down, "
2534 "cable problem?\n",
2535 dev->name);
2536
2537 /* Try to restart the adaptor. */
2538 tc35815_restart(dev);
2539 goto out;
2540 }
2541 lp->timer_ticks = 0;
2542 restart_timer = 1;
2543 } else {
2544 restart_timer = 1;
2545 }
2546 }
2547 break;
2548
2549 case lcheck:
2550 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2551 lpa = tc_mdio_read(dev, pid, MII_LPA);
2552 if (bmcr & (BMCR_PDOWN | BMCR_ISOLATE | BMCR_RESET)) {
2553 printk(KERN_ERR "%s: PHY down? (BMCR %x)\n", dev->name,
2554 bmcr);
2555 } else if ((lp->saved_lpa ^ lpa) &
2556 (LPA_100FULL|LPA_100HALF|LPA_10FULL|LPA_10HALF)) {
2557 printk(KERN_NOTICE "%s: link status changed"
2558 " (BMCR %x LPA %x->%x)\n", dev->name,
2559 bmcr, lp->saved_lpa, lpa);
2560 } else {
2561 /* go on */
2562 restart_timer = 1;
2563 break;
2564 }
2565 /* Try to restart the adaptor. */
2566 tc35815_restart(dev);
2567 goto out;
2568
2569 case asleep:
2570 default:
2571 /* Can't happens.... */
2572 printk(KERN_ERR "%s: Aieee, link timer is asleep but we got "
2573 "one anyways!\n", dev->name);
2574 restart_timer = 0;
2575 lp->timer_ticks = 0;
2576 lp->timer_state = asleep; /* foo on you */
2577 break;
2578 }
2579
2580 if (restart_timer) {
2581 lp->timer.expires = jiffies + msecs_to_jiffies(1200);
2582 add_timer(&lp->timer);
2583 }
2584 out:
2585 spin_unlock_irq(&lp->lock);
2586 }
2587
2588 static void tc35815_start_auto_negotiation(struct net_device *dev,
2589 struct ethtool_cmd *ep)
2590 {
2591 struct tc35815_local *lp = dev->priv;
2592 int pid = lp->phy_addr;
2593 unsigned short bmsr, bmcr, advertize;
2594 int timeout;
2595
2596 netif_carrier_off(dev);
2597 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2598 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2599 advertize = tc_mdio_read(dev, pid, MII_ADVERTISE);
2600
2601 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
2602 if (options.speed || options.duplex) {
2603 /* Advertise only specified configuration. */
2604 advertize &= ~(ADVERTISE_10HALF |
2605 ADVERTISE_10FULL |
2606 ADVERTISE_100HALF |
2607 ADVERTISE_100FULL);
2608 if (options.speed != 10) {
2609 if (options.duplex != 1)
2610 advertize |= ADVERTISE_100FULL;
2611 if (options.duplex != 2)
2612 advertize |= ADVERTISE_100HALF;
2613 }
2614 if (options.speed != 100) {
2615 if (options.duplex != 1)
2616 advertize |= ADVERTISE_10FULL;
2617 if (options.duplex != 2)
2618 advertize |= ADVERTISE_10HALF;
2619 }
2620 if (options.speed == 100)
2621 bmcr |= BMCR_SPEED100;
2622 else if (options.speed == 10)
2623 bmcr &= ~BMCR_SPEED100;
2624 if (options.duplex == 2)
2625 bmcr |= BMCR_FULLDPLX;
2626 else if (options.duplex == 1)
2627 bmcr &= ~BMCR_FULLDPLX;
2628 } else {
2629 /* Advertise everything we can support. */
2630 if (bmsr & BMSR_10HALF)
2631 advertize |= ADVERTISE_10HALF;
2632 else
2633 advertize &= ~ADVERTISE_10HALF;
2634 if (bmsr & BMSR_10FULL)
2635 advertize |= ADVERTISE_10FULL;
2636 else
2637 advertize &= ~ADVERTISE_10FULL;
2638 if (bmsr & BMSR_100HALF)
2639 advertize |= ADVERTISE_100HALF;
2640 else
2641 advertize &= ~ADVERTISE_100HALF;
2642 if (bmsr & BMSR_100FULL)
2643 advertize |= ADVERTISE_100FULL;
2644 else
2645 advertize &= ~ADVERTISE_100FULL;
2646 }
2647
2648 tc_mdio_write(dev, pid, MII_ADVERTISE, advertize);
2649
2650 /* Enable Auto-Negotiation, this is usually on already... */
2651 bmcr |= BMCR_ANENABLE;
2652 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2653
2654 /* Restart it to make sure it is going. */
2655 bmcr |= BMCR_ANRESTART;
2656 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2657 printk(KERN_DEBUG "%s: ADVERTISE %x BMCR %x\n", dev->name, advertize, bmcr);
2658
2659 /* BMCR_ANRESTART self clears when the process has begun. */
2660 timeout = 64; /* More than enough. */
2661 while (--timeout) {
2662 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2663 if (!(bmcr & BMCR_ANRESTART))
2664 break; /* got it. */
2665 udelay(10);
2666 }
2667 if (!timeout) {
2668 printk(KERN_ERR "%s: TC35815 would not start auto "
2669 "negotiation BMCR=0x%04x\n",
2670 dev->name, bmcr);
2671 printk(KERN_NOTICE "%s: Performing force link "
2672 "detection.\n", dev->name);
2673 goto force_link;
2674 } else {
2675 printk(KERN_DEBUG "%s: auto negotiation started.\n", dev->name);
2676 lp->timer_state = arbwait;
2677 }
2678 } else {
2679 force_link:
2680 /* Force the link up, trying first a particular mode.
2681 * Either we are here at the request of ethtool or
2682 * because the Happy Meal would not start to autoneg.
2683 */
2684
2685 /* Disable auto-negotiation in BMCR, enable the duplex and
2686 * speed setting, init the timer state machine, and fire it off.
2687 */
2688 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
2689 bmcr = BMCR_SPEED100;
2690 } else {
2691 if (ep->speed == SPEED_100)
2692 bmcr = BMCR_SPEED100;
2693 else
2694 bmcr = 0;
2695 if (ep->duplex == DUPLEX_FULL)
2696 bmcr |= BMCR_FULLDPLX;
2697 }
2698 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2699
2700 /* OK, seems we need do disable the transceiver for the first
2701 * tick to make sure we get an accurate link state at the
2702 * second tick.
2703 */
2704 lp->timer_state = ltrywait;
2705 }
2706
2707 del_timer(&lp->timer);
2708 lp->timer_ticks = 0;
2709 lp->timer.expires = jiffies + msecs_to_jiffies(1200);
2710 add_timer(&lp->timer);
2711 }
2712
2713 static void tc35815_find_phy(struct net_device *dev)
2714 {
2715 struct tc35815_local *lp = dev->priv;
2716 int pid = lp->phy_addr;
2717 unsigned short id0;
2718
2719 /* find MII phy */
2720 for (pid = 31; pid >= 0; pid--) {
2721 id0 = tc_mdio_read(dev, pid, MII_BMSR);
2722 if (id0 != 0xffff && id0 != 0x0000 &&
2723 (id0 & BMSR_RESV) != (0xffff & BMSR_RESV) /* paranoia? */
2724 ) {
2725 lp->phy_addr = pid;
2726 break;
2727 }
2728 }
2729 if (pid < 0) {
2730 printk(KERN_ERR "%s: No MII Phy found.\n",
2731 dev->name);
2732 lp->phy_addr = pid = 0;
2733 }
2734
2735 lp->mii_id[0] = tc_mdio_read(dev, pid, MII_PHYSID1);
2736 lp->mii_id[1] = tc_mdio_read(dev, pid, MII_PHYSID2);
2737 if (netif_msg_hw(lp))
2738 printk(KERN_INFO "%s: PHY(%02x) ID %04x %04x\n", dev->name,
2739 pid, lp->mii_id[0], lp->mii_id[1]);
2740 }
2741
2742 static void tc35815_phy_chip_init(struct net_device *dev)
2743 {
2744 struct tc35815_local *lp = dev->priv;
2745 int pid = lp->phy_addr;
2746 unsigned short bmcr;
2747 struct ethtool_cmd ecmd, *ep;
2748
2749 /* dis-isolate if needed. */
2750 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2751 if (bmcr & BMCR_ISOLATE) {
2752 int count = 32;
2753 printk(KERN_DEBUG "%s: unisolating...", dev->name);
2754 tc_mdio_write(dev, pid, MII_BMCR, bmcr & ~BMCR_ISOLATE);
2755 while (--count) {
2756 if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_ISOLATE))
2757 break;
2758 udelay(20);
2759 }
2760 printk(" %s.\n", count ? "done" : "failed");
2761 }
2762
2763 if (options.speed && options.duplex) {
2764 ecmd.autoneg = AUTONEG_DISABLE;
2765 ecmd.speed = options.speed == 10 ? SPEED_10 : SPEED_100;
2766 ecmd.duplex = options.duplex == 1 ? DUPLEX_HALF : DUPLEX_FULL;
2767 ep = &ecmd;
2768 } else {
2769 ep = NULL;
2770 }
2771 tc35815_start_auto_negotiation(dev, ep);
2772 }
2773
2774 static void tc35815_chip_reset(struct net_device *dev)
2775 {
2776 struct tc35815_regs __iomem *tr =
2777 (struct tc35815_regs __iomem *)dev->base_addr;
2778 int i;
2779 /* reset the controller */
2780 tc_writel(MAC_Reset, &tr->MAC_Ctl);
2781 udelay(4); /* 3200ns */
2782 i = 0;
2783 while (tc_readl(&tr->MAC_Ctl) & MAC_Reset) {
2784 if (i++ > 100) {
2785 printk(KERN_ERR "%s: MAC reset failed.\n", dev->name);
2786 break;
2787 }
2788 mdelay(1);
2789 }
2790 tc_writel(0, &tr->MAC_Ctl);
2791
2792 /* initialize registers to default value */
2793 tc_writel(0, &tr->DMA_Ctl);
2794 tc_writel(0, &tr->TxThrsh);
2795 tc_writel(0, &tr->TxPollCtr);
2796 tc_writel(0, &tr->RxFragSize);
2797 tc_writel(0, &tr->Int_En);
2798 tc_writel(0, &tr->FDA_Bas);
2799 tc_writel(0, &tr->FDA_Lim);
2800 tc_writel(0xffffffff, &tr->Int_Src); /* Write 1 to clear */
2801 tc_writel(0, &tr->CAM_Ctl);
2802 tc_writel(0, &tr->Tx_Ctl);
2803 tc_writel(0, &tr->Rx_Ctl);
2804 tc_writel(0, &tr->CAM_Ena);
2805 (void)tc_readl(&tr->Miss_Cnt); /* Read to clear */
2806
2807 /* initialize internal SRAM */
2808 tc_writel(DMA_TestMode, &tr->DMA_Ctl);
2809 for (i = 0; i < 0x1000; i += 4) {
2810 tc_writel(i, &tr->CAM_Adr);
2811 tc_writel(0, &tr->CAM_Data);
2812 }
2813 tc_writel(0, &tr->DMA_Ctl);
2814 }
2815
2816 static void tc35815_chip_init(struct net_device *dev)
2817 {
2818 struct tc35815_local *lp = dev->priv;
2819 struct tc35815_regs __iomem *tr =
2820 (struct tc35815_regs __iomem *)dev->base_addr;
2821 unsigned long txctl = TX_CTL_CMD;
2822
2823 tc35815_phy_chip_init(dev);
2824
2825 /* load station address to CAM */
2826 tc35815_set_cam_entry(dev, CAM_ENTRY_SOURCE, dev->dev_addr);
2827
2828 /* Enable CAM (broadcast and unicast) */
2829 tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
2830 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2831
2832 /* Use DMA_RxAlign_2 to make IP header 4-byte aligned. */
2833 if (HAVE_DMA_RXALIGN(lp))
2834 tc_writel(DMA_BURST_SIZE | DMA_RxAlign_2, &tr->DMA_Ctl);
2835 else
2836 tc_writel(DMA_BURST_SIZE, &tr->DMA_Ctl);
2837 #ifdef TC35815_USE_PACKEDBUFFER
2838 tc_writel(RxFrag_EnPack | ETH_ZLEN, &tr->RxFragSize); /* Packing */
2839 #else
2840 tc_writel(ETH_ZLEN, &tr->RxFragSize);
2841 #endif
2842 tc_writel(0, &tr->TxPollCtr); /* Batch mode */
2843 tc_writel(TX_THRESHOLD, &tr->TxThrsh);
2844 tc_writel(INT_EN_CMD, &tr->Int_En);
2845
2846 /* set queues */
2847 tc_writel(fd_virt_to_bus(lp, lp->rfd_base), &tr->FDA_Bas);
2848 tc_writel((unsigned long)lp->rfd_limit - (unsigned long)lp->rfd_base,
2849 &tr->FDA_Lim);
2850 /*
2851 * Activation method:
2852 * First, enable the MAC Transmitter and the DMA Receive circuits.
2853 * Then enable the DMA Transmitter and the MAC Receive circuits.
2854 */
2855 tc_writel(fd_virt_to_bus(lp, lp->fbl_ptr), &tr->BLFrmPtr); /* start DMA receiver */
2856 tc_writel(RX_CTL_CMD, &tr->Rx_Ctl); /* start MAC receiver */
2857
2858 /* start MAC transmitter */
2859 #ifndef NO_CHECK_CARRIER
2860 /* TX4939 does not have EnLCarr */
2861 if (lp->boardtype == TC35815_TX4939)
2862 txctl &= ~Tx_EnLCarr;
2863 #ifdef WORKAROUND_LOSTCAR
2864 /* WORKAROUND: ignore LostCrS in full duplex operation */
2865 if ((lp->timer_state != asleep && lp->timer_state != lcheck) ||
2866 lp->fullduplex)
2867 txctl &= ~Tx_EnLCarr;
2868 #endif
2869 #endif /* !NO_CHECK_CARRIER */
2870 #ifdef GATHER_TXINT
2871 txctl &= ~Tx_EnComp; /* disable global tx completion int. */
2872 #endif
2873 tc_writel(txctl, &tr->Tx_Ctl);
2874 }
2875
2876 #ifdef CONFIG_PM
2877 static int tc35815_suspend(struct pci_dev *pdev, pm_message_t state)
2878 {
2879 struct net_device *dev = pci_get_drvdata(pdev);
2880 struct tc35815_local *lp = dev->priv;
2881 unsigned long flags;
2882
2883 pci_save_state(pdev);
2884 if (!netif_running(dev))
2885 return 0;
2886 netif_device_detach(dev);
2887 spin_lock_irqsave(&lp->lock, flags);
2888 del_timer(&lp->timer); /* Kill if running */
2889 tc35815_chip_reset(dev);
2890 spin_unlock_irqrestore(&lp->lock, flags);
2891 pci_set_power_state(pdev, PCI_D3hot);
2892 return 0;
2893 }
2894
2895 static int tc35815_resume(struct pci_dev *pdev)
2896 {
2897 struct net_device *dev = pci_get_drvdata(pdev);
2898 struct tc35815_local *lp = dev->priv;
2899 unsigned long flags;
2900
2901 pci_restore_state(pdev);
2902 if (!netif_running(dev))
2903 return 0;
2904 pci_set_power_state(pdev, PCI_D0);
2905 spin_lock_irqsave(&lp->lock, flags);
2906 tc35815_restart(dev);
2907 spin_unlock_irqrestore(&lp->lock, flags);
2908 netif_device_attach(dev);
2909 return 0;
2910 }
2911 #endif /* CONFIG_PM */
2912
2913 static struct pci_driver tc35815_pci_driver = {
2914 .name = MODNAME,
2915 .id_table = tc35815_pci_tbl,
2916 .probe = tc35815_init_one,
2917 .remove = __devexit_p(tc35815_remove_one),
2918 #ifdef CONFIG_PM
2919 .suspend = tc35815_suspend,
2920 .resume = tc35815_resume,
2921 #endif
2922 };
2923
2924 module_param_named(speed, options.speed, int, 0);
2925 MODULE_PARM_DESC(speed, "0:auto, 10:10Mbps, 100:100Mbps");
2926 module_param_named(duplex, options.duplex, int, 0);
2927 MODULE_PARM_DESC(duplex, "0:auto, 1:half, 2:full");
2928 module_param_named(doforce, options.doforce, int, 0);
2929 MODULE_PARM_DESC(doforce, "try force link mode if auto-negotiation failed");
2930
2931 static int __init tc35815_init_module(void)
2932 {
2933 return pci_register_driver(&tc35815_pci_driver);
2934 }
2935
2936 static void __exit tc35815_cleanup_module(void)
2937 {
2938 pci_unregister_driver(&tc35815_pci_driver);
2939 }
2940
2941 module_init(tc35815_init_module);
2942 module_exit(tc35815_cleanup_module);
2943
2944 MODULE_DESCRIPTION("TOSHIBA TC35815 PCI 10M/100M Ethernet driver");
2945 MODULE_LICENSE("GPL");
Support for the Chinese Samsung S3C2440 based development boards