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udf: support files larger than 1G
[linux-2.6/mini2440.git] / drivers / net / smc911x.c
blob81f24847c9632e538645a23f345e0dbbc542f061
1 /*
2 * smc911x.c
3 * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
4 *
5 * Copyright (C) 2005 Sensoria Corp
6 * Derived from the unified SMC91x driver by Nicolas Pitre
7 * and the smsc911x.c reference driver by SMSC
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 * Arguments:
24 * watchdog = TX watchdog timeout
25 * tx_fifo_kb = Size of TX FIFO in KB
26 *
27 * History:
28 * 04/16/05 Dustin McIntire Initial version
29 */
30 static const char version[] =
31 "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
32
33 /* Debugging options */
34 #define ENABLE_SMC_DEBUG_RX 0
35 #define ENABLE_SMC_DEBUG_TX 0
36 #define ENABLE_SMC_DEBUG_DMA 0
37 #define ENABLE_SMC_DEBUG_PKTS 0
38 #define ENABLE_SMC_DEBUG_MISC 0
39 #define ENABLE_SMC_DEBUG_FUNC 0
40
41 #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
42 #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
43 #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
44 #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
45 #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
46 #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
47
48 #ifndef SMC_DEBUG
49 #define SMC_DEBUG ( SMC_DEBUG_RX | \
50 SMC_DEBUG_TX | \
51 SMC_DEBUG_DMA | \
52 SMC_DEBUG_PKTS | \
53 SMC_DEBUG_MISC | \
54 SMC_DEBUG_FUNC \
55 )
56 #endif
57
58 #include <linux/init.h>
59 #include <linux/module.h>
60 #include <linux/kernel.h>
61 #include <linux/sched.h>
62 #include <linux/slab.h>
63 #include <linux/delay.h>
64 #include <linux/interrupt.h>
65 #include <linux/errno.h>
66 #include <linux/ioport.h>
67 #include <linux/crc32.h>
68 #include <linux/device.h>
69 #include <linux/platform_device.h>
70 #include <linux/spinlock.h>
71 #include <linux/ethtool.h>
72 #include <linux/mii.h>
73 #include <linux/workqueue.h>
74
75 #include <linux/netdevice.h>
76 #include <linux/etherdevice.h>
77 #include <linux/skbuff.h>
78
79 #include <asm/io.h>
80 #include <asm/irq.h>
81
82 #include "smc911x.h"
83
84 /*
85 * Transmit timeout, default 5 seconds.
86 */
87 static int watchdog = 5000;
88 module_param(watchdog, int, 0400);
89 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
90
91 static int tx_fifo_kb=8;
92 module_param(tx_fifo_kb, int, 0400);
93 MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
94
95 MODULE_LICENSE("GPL");
96
97 /*
98 * The internal workings of the driver. If you are changing anything
99 * here with the SMC stuff, you should have the datasheet and know
100 * what you are doing.
101 */
102 #define CARDNAME "smc911x"
103
104 /*
105 * Use power-down feature of the chip
106 */
107 #define POWER_DOWN 1
108
109
110 /* store this information for the driver.. */
111 struct smc911x_local {
112 /*
113 * If I have to wait until the DMA is finished and ready to reload a
114 * packet, I will store the skbuff here. Then, the DMA will send it
115 * out and free it.
116 */
117 struct sk_buff *pending_tx_skb;
118
119 /*
120 * these are things that the kernel wants me to keep, so users
121 * can find out semi-useless statistics of how well the card is
122 * performing
123 */
124 struct net_device_stats stats;
125
126 /* version/revision of the SMC911x chip */
127 u16 version;
128 u16 revision;
129
130 /* FIFO sizes */
131 int tx_fifo_kb;
132 int tx_fifo_size;
133 int rx_fifo_size;
134 int afc_cfg;
135
136 /* Contains the current active receive/phy mode */
137 int ctl_rfduplx;
138 int ctl_rspeed;
139
140 u32 msg_enable;
141 u32 phy_type;
142 struct mii_if_info mii;
143
144 /* work queue */
145 struct work_struct phy_configure;
146 int work_pending;
147
148 int tx_throttle;
149 spinlock_t lock;
150
151 struct net_device *netdev;
152
153 #ifdef SMC_USE_DMA
154 /* DMA needs the physical address of the chip */
155 u_long physaddr;
156 int rxdma;
157 int txdma;
158 int rxdma_active;
159 int txdma_active;
160 struct sk_buff *current_rx_skb;
161 struct sk_buff *current_tx_skb;
162 struct device *dev;
163 #endif
164 };
165
166 #if SMC_DEBUG > 0
167 #define DBG(n, args...) \
168 do { \
169 if (SMC_DEBUG & (n)) \
170 printk(args); \
171 } while (0)
172
173 #define PRINTK(args...) printk(args)
174 #else
175 #define DBG(n, args...) do { } while (0)
176 #define PRINTK(args...) printk(KERN_DEBUG args)
177 #endif
178
179 #if SMC_DEBUG_PKTS > 0
180 static void PRINT_PKT(u_char *buf, int length)
181 {
182 int i;
183 int remainder;
184 int lines;
185
186 lines = length / 16;
187 remainder = length % 16;
188
189 for (i = 0; i < lines ; i ++) {
190 int cur;
191 for (cur = 0; cur < 8; cur++) {
192 u_char a, b;
193 a = *buf++;
194 b = *buf++;
195 printk("%02x%02x ", a, b);
196 }
197 printk("\n");
198 }
199 for (i = 0; i < remainder/2 ; i++) {
200 u_char a, b;
201 a = *buf++;
202 b = *buf++;
203 printk("%02x%02x ", a, b);
204 }
205 printk("\n");
206 }
207 #else
208 #define PRINT_PKT(x...) do { } while (0)
209 #endif
210
211
212 /* this enables an interrupt in the interrupt mask register */
213 #define SMC_ENABLE_INT(x) do { \
214 unsigned int __mask; \
215 unsigned long __flags; \
216 spin_lock_irqsave(&lp->lock, __flags); \
217 __mask = SMC_GET_INT_EN(); \
218 __mask |= (x); \
219 SMC_SET_INT_EN(__mask); \
220 spin_unlock_irqrestore(&lp->lock, __flags); \
221 } while (0)
222
223 /* this disables an interrupt from the interrupt mask register */
224 #define SMC_DISABLE_INT(x) do { \
225 unsigned int __mask; \
226 unsigned long __flags; \
227 spin_lock_irqsave(&lp->lock, __flags); \
228 __mask = SMC_GET_INT_EN(); \
229 __mask &= ~(x); \
230 SMC_SET_INT_EN(__mask); \
231 spin_unlock_irqrestore(&lp->lock, __flags); \
232 } while (0)
233
234 /*
235 * this does a soft reset on the device
236 */
237 static void smc911x_reset(struct net_device *dev)
238 {
239 unsigned long ioaddr = dev->base_addr;
240 struct smc911x_local *lp = netdev_priv(dev);
241 unsigned int reg, timeout=0, resets=1;
242 unsigned long flags;
243
244 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
245
246 /* Take out of PM setting first */
247 if ((SMC_GET_PMT_CTRL() & PMT_CTRL_READY_) == 0) {
248 /* Write to the bytetest will take out of powerdown */
249 SMC_SET_BYTE_TEST(0);
250 timeout=10;
251 do {
252 udelay(10);
253 reg = SMC_GET_PMT_CTRL() & PMT_CTRL_READY_;
254 } while ( timeout-- && !reg);
255 if (timeout == 0) {
256 PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
257 return;
258 }
259 }
260
261 /* Disable all interrupts */
262 spin_lock_irqsave(&lp->lock, flags);
263 SMC_SET_INT_EN(0);
264 spin_unlock_irqrestore(&lp->lock, flags);
265
266 while (resets--) {
267 SMC_SET_HW_CFG(HW_CFG_SRST_);
268 timeout=10;
269 do {
270 udelay(10);
271 reg = SMC_GET_HW_CFG();
272 /* If chip indicates reset timeout then try again */
273 if (reg & HW_CFG_SRST_TO_) {
274 PRINTK("%s: chip reset timeout, retrying...\n", dev->name);
275 resets++;
276 break;
277 }
278 } while ( timeout-- && (reg & HW_CFG_SRST_));
279 }
280 if (timeout == 0) {
281 PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
282 return;
283 }
284
285 /* make sure EEPROM has finished loading before setting GPIO_CFG */
286 timeout=1000;
287 while ( timeout-- && (SMC_GET_E2P_CMD() & E2P_CMD_EPC_BUSY_)) {
288 udelay(10);
289 }
290 if (timeout == 0){
291 PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
292 return;
293 }
294
295 /* Initialize interrupts */
296 SMC_SET_INT_EN(0);
297 SMC_ACK_INT(-1);
298
299 /* Reset the FIFO level and flow control settings */
300 SMC_SET_HW_CFG((lp->tx_fifo_kb & 0xF) << 16);
301 //TODO: Figure out what appropriate pause time is
302 SMC_SET_FLOW(FLOW_FCPT_ | FLOW_FCEN_);
303 SMC_SET_AFC_CFG(lp->afc_cfg);
304
305
306 /* Set to LED outputs */
307 SMC_SET_GPIO_CFG(0x70070000);
308
309 /*
310 * Deassert IRQ for 1*10us for edge type interrupts
311 * and drive IRQ pin push-pull
312 */
313 SMC_SET_IRQ_CFG( (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_ );
314
315 /* clear anything saved */
316 if (lp->pending_tx_skb != NULL) {
317 dev_kfree_skb (lp->pending_tx_skb);
318 lp->pending_tx_skb = NULL;
319 lp->stats.tx_errors++;
320 lp->stats.tx_aborted_errors++;
321 }
322 }
323
324 /*
325 * Enable Interrupts, Receive, and Transmit
326 */
327 static void smc911x_enable(struct net_device *dev)
328 {
329 unsigned long ioaddr = dev->base_addr;
330 struct smc911x_local *lp = netdev_priv(dev);
331 unsigned mask, cfg, cr;
332 unsigned long flags;
333
334 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
335
336 SMC_SET_MAC_ADDR(dev->dev_addr);
337
338 /* Enable TX */
339 cfg = SMC_GET_HW_CFG();
340 cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
341 cfg |= HW_CFG_SF_;
342 SMC_SET_HW_CFG(cfg);
343 SMC_SET_FIFO_TDA(0xFF);
344 /* Update TX stats on every 64 packets received or every 1 sec */
345 SMC_SET_FIFO_TSL(64);
346 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
347
348 spin_lock_irqsave(&lp->lock, flags);
349 SMC_GET_MAC_CR(cr);
350 cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
351 SMC_SET_MAC_CR(cr);
352 SMC_SET_TX_CFG(TX_CFG_TX_ON_);
353 spin_unlock_irqrestore(&lp->lock, flags);
354
355 /* Add 2 byte padding to start of packets */
356 SMC_SET_RX_CFG((2<<8) & RX_CFG_RXDOFF_);
357
358 /* Turn on receiver and enable RX */
359 if (cr & MAC_CR_RXEN_)
360 DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name);
361
362 spin_lock_irqsave(&lp->lock, flags);
363 SMC_SET_MAC_CR( cr | MAC_CR_RXEN_ );
364 spin_unlock_irqrestore(&lp->lock, flags);
365
366 /* Interrupt on every received packet */
367 SMC_SET_FIFO_RSA(0x01);
368 SMC_SET_FIFO_RSL(0x00);
369
370 /* now, enable interrupts */
371 mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
372 INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
373 INT_EN_PHY_INT_EN_;
374 if (IS_REV_A(lp->revision))
375 mask|=INT_EN_RDFL_EN_;
376 else {
377 mask|=INT_EN_RDFO_EN_;
378 }
379 SMC_ENABLE_INT(mask);
380 }
381
382 /*
383 * this puts the device in an inactive state
384 */
385 static void smc911x_shutdown(struct net_device *dev)
386 {
387 unsigned long ioaddr = dev->base_addr;
388 struct smc911x_local *lp = netdev_priv(dev);
389 unsigned cr;
390 unsigned long flags;
391
392 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __FUNCTION__);
393
394 /* Disable IRQ's */
395 SMC_SET_INT_EN(0);
396
397 /* Turn of Rx and TX */
398 spin_lock_irqsave(&lp->lock, flags);
399 SMC_GET_MAC_CR(cr);
400 cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
401 SMC_SET_MAC_CR(cr);
402 SMC_SET_TX_CFG(TX_CFG_STOP_TX_);
403 spin_unlock_irqrestore(&lp->lock, flags);
404 }
405
406 static inline void smc911x_drop_pkt(struct net_device *dev)
407 {
408 unsigned long ioaddr = dev->base_addr;
409 unsigned int fifo_count, timeout, reg;
410
411 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __FUNCTION__);
412 fifo_count = SMC_GET_RX_FIFO_INF() & 0xFFFF;
413 if (fifo_count <= 4) {
414 /* Manually dump the packet data */
415 while (fifo_count--)
416 SMC_GET_RX_FIFO();
417 } else {
418 /* Fast forward through the bad packet */
419 SMC_SET_RX_DP_CTRL(RX_DP_CTRL_FFWD_BUSY_);
420 timeout=50;
421 do {
422 udelay(10);
423 reg = SMC_GET_RX_DP_CTRL() & RX_DP_CTRL_FFWD_BUSY_;
424 } while ( timeout-- && reg);
425 if (timeout == 0) {
426 PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
427 }
428 }
429 }
430
431 /*
432 * This is the procedure to handle the receipt of a packet.
433 * It should be called after checking for packet presence in
434 * the RX status FIFO. It must be called with the spin lock
435 * already held.
436 */
437 static inline void smc911x_rcv(struct net_device *dev)
438 {
439 struct smc911x_local *lp = netdev_priv(dev);
440 unsigned long ioaddr = dev->base_addr;
441 unsigned int pkt_len, status;
442 struct sk_buff *skb;
443 unsigned char *data;
444
445 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n",
446 dev->name, __FUNCTION__);
447 status = SMC_GET_RX_STS_FIFO();
448 DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n",
449 dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff);
450 pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
451 if (status & RX_STS_ES_) {
452 /* Deal with a bad packet */
453 lp->stats.rx_errors++;
454 if (status & RX_STS_CRC_ERR_)
455 lp->stats.rx_crc_errors++;
456 else {
457 if (status & RX_STS_LEN_ERR_)
458 lp->stats.rx_length_errors++;
459 if (status & RX_STS_MCAST_)
460 lp->stats.multicast++;
461 }
462 /* Remove the bad packet data from the RX FIFO */
463 smc911x_drop_pkt(dev);
464 } else {
465 /* Receive a valid packet */
466 /* Alloc a buffer with extra room for DMA alignment */
467 skb=dev_alloc_skb(pkt_len+32);
468 if (unlikely(skb == NULL)) {
469 PRINTK( "%s: Low memory, rcvd packet dropped.\n",
470 dev->name);
471 lp->stats.rx_dropped++;
472 smc911x_drop_pkt(dev);
473 return;
474 }
475 /* Align IP header to 32 bits
476 * Note that the device is configured to add a 2
477 * byte padding to the packet start, so we really
478 * want to write to the orignal data pointer */
479 data = skb->data;
480 skb_reserve(skb, 2);
481 skb_put(skb,pkt_len-4);
482 #ifdef SMC_USE_DMA
483 {
484 unsigned int fifo;
485 /* Lower the FIFO threshold if possible */
486 fifo = SMC_GET_FIFO_INT();
487 if (fifo & 0xFF) fifo--;
488 DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n",
489 dev->name, fifo & 0xff);
490 SMC_SET_FIFO_INT(fifo);
491 /* Setup RX DMA */
492 SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
493 lp->rxdma_active = 1;
494 lp->current_rx_skb = skb;
495 SMC_PULL_DATA(data, (pkt_len+2+15) & ~15);
496 /* Packet processing deferred to DMA RX interrupt */
497 }
498 #else
499 SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
500 SMC_PULL_DATA(data, pkt_len+2+3);
501
502 DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name);
503 PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
504 dev->last_rx = jiffies;
505 skb->protocol = eth_type_trans(skb, dev);
506 netif_rx(skb);
507 lp->stats.rx_packets++;
508 lp->stats.rx_bytes += pkt_len-4;
509 #endif
510 }
511 }
512
513 /*
514 * This is called to actually send a packet to the chip.
515 */
516 static void smc911x_hardware_send_pkt(struct net_device *dev)
517 {
518 struct smc911x_local *lp = netdev_priv(dev);
519 unsigned long ioaddr = dev->base_addr;
520 struct sk_buff *skb;
521 unsigned int cmdA, cmdB, len;
522 unsigned char *buf;
523 unsigned long flags;
524
525 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __FUNCTION__);
526 BUG_ON(lp->pending_tx_skb == NULL);
527
528 skb = lp->pending_tx_skb;
529 lp->pending_tx_skb = NULL;
530
531 /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
532 /* cmdB {31:16] pkt tag [10:0] length */
533 #ifdef SMC_USE_DMA
534 /* 16 byte buffer alignment mode */
535 buf = (char*)((u32)(skb->data) & ~0xF);
536 len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
537 cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
538 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
539 skb->len;
540 #else
541 buf = (char*)((u32)skb->data & ~0x3);
542 len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
543 cmdA = (((u32)skb->data & 0x3) << 16) |
544 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
545 skb->len;
546 #endif
547 /* tag is packet length so we can use this in stats update later */
548 cmdB = (skb->len << 16) | (skb->len & 0x7FF);
549
550 DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
551 dev->name, len, len, buf, cmdA, cmdB);
552 SMC_SET_TX_FIFO(cmdA);
553 SMC_SET_TX_FIFO(cmdB);
554
555 DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name);
556 PRINT_PKT(buf, len <= 64 ? len : 64);
557
558 /* Send pkt via PIO or DMA */
559 #ifdef SMC_USE_DMA
560 lp->current_tx_skb = skb;
561 SMC_PUSH_DATA(buf, len);
562 /* DMA complete IRQ will free buffer and set jiffies */
563 #else
564 SMC_PUSH_DATA(buf, len);
565 dev->trans_start = jiffies;
566 dev_kfree_skb(skb);
567 #endif
568 spin_lock_irqsave(&lp->lock, flags);
569 if (!lp->tx_throttle) {
570 netif_wake_queue(dev);
571 }
572 spin_unlock_irqrestore(&lp->lock, flags);
573 SMC_ENABLE_INT(INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
574 }
575
576 /*
577 * Since I am not sure if I will have enough room in the chip's ram
578 * to store the packet, I call this routine which either sends it
579 * now, or set the card to generates an interrupt when ready
580 * for the packet.
581 */
582 static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
583 {
584 struct smc911x_local *lp = netdev_priv(dev);
585 unsigned long ioaddr = dev->base_addr;
586 unsigned int free;
587 unsigned long flags;
588
589 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
590 dev->name, __FUNCTION__);
591
592 BUG_ON(lp->pending_tx_skb != NULL);
593
594 free = SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TDFREE_;
595 DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free);
596
597 /* Turn off the flow when running out of space in FIFO */
598 if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
599 DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n",
600 dev->name, free);
601 spin_lock_irqsave(&lp->lock, flags);
602 /* Reenable when at least 1 packet of size MTU present */
603 SMC_SET_FIFO_TDA((SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
604 lp->tx_throttle = 1;
605 netif_stop_queue(dev);
606 spin_unlock_irqrestore(&lp->lock, flags);
607 }
608
609 /* Drop packets when we run out of space in TX FIFO
610 * Account for overhead required for:
611 *
612 * Tx command words 8 bytes
613 * Start offset 15 bytes
614 * End padding 15 bytes
615 */
616 if (unlikely(free < (skb->len + 8 + 15 + 15))) {
617 printk("%s: No Tx free space %d < %d\n",
618 dev->name, free, skb->len);
619 lp->pending_tx_skb = NULL;
620 lp->stats.tx_errors++;
621 lp->stats.tx_dropped++;
622 dev_kfree_skb(skb);
623 return 0;
624 }
625
626 #ifdef SMC_USE_DMA
627 {
628 /* If the DMA is already running then defer this packet Tx until
629 * the DMA IRQ starts it
630 */
631 spin_lock_irqsave(&lp->lock, flags);
632 if (lp->txdma_active) {
633 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name);
634 lp->pending_tx_skb = skb;
635 netif_stop_queue(dev);
636 spin_unlock_irqrestore(&lp->lock, flags);
637 return 0;
638 } else {
639 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name);
640 lp->txdma_active = 1;
641 }
642 spin_unlock_irqrestore(&lp->lock, flags);
643 }
644 #endif
645 lp->pending_tx_skb = skb;
646 smc911x_hardware_send_pkt(dev);
647
648 return 0;
649 }
650
651 /*
652 * This handles a TX status interrupt, which is only called when:
653 * - a TX error occurred, or
654 * - TX of a packet completed.
655 */
656 static void smc911x_tx(struct net_device *dev)
657 {
658 unsigned long ioaddr = dev->base_addr;
659 struct smc911x_local *lp = netdev_priv(dev);
660 unsigned int tx_status;
661
662 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
663 dev->name, __FUNCTION__);
664
665 /* Collect the TX status */
666 while (((SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
667 DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n",
668 dev->name,
669 (SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16);
670 tx_status = SMC_GET_TX_STS_FIFO();
671 lp->stats.tx_packets++;
672 lp->stats.tx_bytes+=tx_status>>16;
673 DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n",
674 dev->name, (tx_status & 0xffff0000) >> 16,
675 tx_status & 0x0000ffff);
676 /* count Tx errors, but ignore lost carrier errors when in
677 * full-duplex mode */
678 if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
679 !(tx_status & 0x00000306))) {
680 lp->stats.tx_errors++;
681 }
682 if (tx_status & TX_STS_MANY_COLL_) {
683 lp->stats.collisions+=16;
684 lp->stats.tx_aborted_errors++;
685 } else {
686 lp->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
687 }
688 /* carrier error only has meaning for half-duplex communication */
689 if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
690 !lp->ctl_rfduplx) {
691 lp->stats.tx_carrier_errors++;
692 }
693 if (tx_status & TX_STS_LATE_COLL_) {
694 lp->stats.collisions++;
695 lp->stats.tx_aborted_errors++;
696 }
697 }
698 }
699
700
701 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
702 /*
703 * Reads a register from the MII Management serial interface
704 */
705
706 static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
707 {
708 unsigned long ioaddr = dev->base_addr;
709 unsigned int phydata;
710
711 SMC_GET_MII(phyreg, phyaddr, phydata);
712
713 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
714 __FUNCTION__, phyaddr, phyreg, phydata);
715 return phydata;
716 }
717
718
719 /*
720 * Writes a register to the MII Management serial interface
721 */
722 static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
723 int phydata)
724 {
725 unsigned long ioaddr = dev->base_addr;
726
727 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
728 __FUNCTION__, phyaddr, phyreg, phydata);
729
730 SMC_SET_MII(phyreg, phyaddr, phydata);
731 }
732
733 /*
734 * Finds and reports the PHY address (115 and 117 have external
735 * PHY interface 118 has internal only
736 */
737 static void smc911x_phy_detect(struct net_device *dev)
738 {
739 unsigned long ioaddr = dev->base_addr;
740 struct smc911x_local *lp = netdev_priv(dev);
741 int phyaddr;
742 unsigned int cfg, id1, id2;
743
744 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
745
746 lp->phy_type = 0;
747
748 /*
749 * Scan all 32 PHY addresses if necessary, starting at
750 * PHY#1 to PHY#31, and then PHY#0 last.
751 */
752 switch(lp->version) {
753 case 0x115:
754 case 0x117:
755 cfg = SMC_GET_HW_CFG();
756 if (cfg & HW_CFG_EXT_PHY_DET_) {
757 cfg &= ~HW_CFG_PHY_CLK_SEL_;
758 cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
759 SMC_SET_HW_CFG(cfg);
760 udelay(10); /* Wait for clocks to stop */
761
762 cfg |= HW_CFG_EXT_PHY_EN_;
763 SMC_SET_HW_CFG(cfg);
764 udelay(10); /* Wait for clocks to stop */
765
766 cfg &= ~HW_CFG_PHY_CLK_SEL_;
767 cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
768 SMC_SET_HW_CFG(cfg);
769 udelay(10); /* Wait for clocks to stop */
770
771 cfg |= HW_CFG_SMI_SEL_;
772 SMC_SET_HW_CFG(cfg);
773
774 for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
775
776 /* Read the PHY identifiers */
777 SMC_GET_PHY_ID1(phyaddr & 31, id1);
778 SMC_GET_PHY_ID2(phyaddr & 31, id2);
779
780 /* Make sure it is a valid identifier */
781 if (id1 != 0x0000 && id1 != 0xffff &&
782 id1 != 0x8000 && id2 != 0x0000 &&
783 id2 != 0xffff && id2 != 0x8000) {
784 /* Save the PHY's address */
785 lp->mii.phy_id = phyaddr & 31;
786 lp->phy_type = id1 << 16 | id2;
787 break;
788 }
789 }
790 }
791 default:
792 /* Internal media only */
793 SMC_GET_PHY_ID1(1, id1);
794 SMC_GET_PHY_ID2(1, id2);
795 /* Save the PHY's address */
796 lp->mii.phy_id = 1;
797 lp->phy_type = id1 << 16 | id2;
798 }
799
800 DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
801 dev->name, id1, id2, lp->mii.phy_id);
802 }
803
804 /*
805 * Sets the PHY to a configuration as determined by the user.
806 * Called with spin_lock held.
807 */
808 static int smc911x_phy_fixed(struct net_device *dev)
809 {
810 struct smc911x_local *lp = netdev_priv(dev);
811 unsigned long ioaddr = dev->base_addr;
812 int phyaddr = lp->mii.phy_id;
813 int bmcr;
814
815 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
816
817 /* Enter Link Disable state */
818 SMC_GET_PHY_BMCR(phyaddr, bmcr);
819 bmcr |= BMCR_PDOWN;
820 SMC_SET_PHY_BMCR(phyaddr, bmcr);
821
822 /*
823 * Set our fixed capabilities
824 * Disable auto-negotiation
825 */
826 bmcr &= ~BMCR_ANENABLE;
827 if (lp->ctl_rfduplx)
828 bmcr |= BMCR_FULLDPLX;
829
830 if (lp->ctl_rspeed == 100)
831 bmcr |= BMCR_SPEED100;
832
833 /* Write our capabilities to the phy control register */
834 SMC_SET_PHY_BMCR(phyaddr, bmcr);
835
836 /* Re-Configure the Receive/Phy Control register */
837 bmcr &= ~BMCR_PDOWN;
838 SMC_SET_PHY_BMCR(phyaddr, bmcr);
839
840 return 1;
841 }
842
843 /*
844 * smc911x_phy_reset - reset the phy
845 * @dev: net device
846 * @phy: phy address
847 *
848 * Issue a software reset for the specified PHY and
849 * wait up to 100ms for the reset to complete. We should
850 * not access the PHY for 50ms after issuing the reset.
851 *
852 * The time to wait appears to be dependent on the PHY.
853 *
854 */
855 static int smc911x_phy_reset(struct net_device *dev, int phy)
856 {
857 struct smc911x_local *lp = netdev_priv(dev);
858 unsigned long ioaddr = dev->base_addr;
859 int timeout;
860 unsigned long flags;
861 unsigned int reg;
862
863 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
864
865 spin_lock_irqsave(&lp->lock, flags);
866 reg = SMC_GET_PMT_CTRL();
867 reg &= ~0xfffff030;
868 reg |= PMT_CTRL_PHY_RST_;
869 SMC_SET_PMT_CTRL(reg);
870 spin_unlock_irqrestore(&lp->lock, flags);
871 for (timeout = 2; timeout; timeout--) {
872 msleep(50);
873 spin_lock_irqsave(&lp->lock, flags);
874 reg = SMC_GET_PMT_CTRL();
875 spin_unlock_irqrestore(&lp->lock, flags);
876 if (!(reg & PMT_CTRL_PHY_RST_)) {
877 /* extra delay required because the phy may
878 * not be completed with its reset
879 * when PHY_BCR_RESET_ is cleared. 256us
880 * should suffice, but use 500us to be safe
881 */
882 udelay(500);
883 break;
884 }
885 }
886
887 return reg & PMT_CTRL_PHY_RST_;
888 }
889
890 /*
891 * smc911x_phy_powerdown - powerdown phy
892 * @dev: net device
893 * @phy: phy address
894 *
895 * Power down the specified PHY
896 */
897 static void smc911x_phy_powerdown(struct net_device *dev, int phy)
898 {
899 unsigned long ioaddr = dev->base_addr;
900 unsigned int bmcr;
901
902 /* Enter Link Disable state */
903 SMC_GET_PHY_BMCR(phy, bmcr);
904 bmcr |= BMCR_PDOWN;
905 SMC_SET_PHY_BMCR(phy, bmcr);
906 }
907
908 /*
909 * smc911x_phy_check_media - check the media status and adjust BMCR
910 * @dev: net device
911 * @init: set true for initialisation
912 *
913 * Select duplex mode depending on negotiation state. This
914 * also updates our carrier state.
915 */
916 static void smc911x_phy_check_media(struct net_device *dev, int init)
917 {
918 struct smc911x_local *lp = netdev_priv(dev);
919 unsigned long ioaddr = dev->base_addr;
920 int phyaddr = lp->mii.phy_id;
921 unsigned int bmcr, cr;
922
923 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
924
925 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
926 /* duplex state has changed */
927 SMC_GET_PHY_BMCR(phyaddr, bmcr);
928 SMC_GET_MAC_CR(cr);
929 if (lp->mii.full_duplex) {
930 DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name);
931 bmcr |= BMCR_FULLDPLX;
932 cr |= MAC_CR_RCVOWN_;
933 } else {
934 DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name);
935 bmcr &= ~BMCR_FULLDPLX;
936 cr &= ~MAC_CR_RCVOWN_;
937 }
938 SMC_SET_PHY_BMCR(phyaddr, bmcr);
939 SMC_SET_MAC_CR(cr);
940 }
941 }
942
943 /*
944 * Configures the specified PHY through the MII management interface
945 * using Autonegotiation.
946 * Calls smc911x_phy_fixed() if the user has requested a certain config.
947 * If RPC ANEG bit is set, the media selection is dependent purely on
948 * the selection by the MII (either in the MII BMCR reg or the result
949 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
950 * is controlled by the RPC SPEED and RPC DPLX bits.
951 */
952 static void smc911x_phy_configure(struct work_struct *work)
953 {
954 struct smc911x_local *lp = container_of(work, struct smc911x_local,
955 phy_configure);
956 struct net_device *dev = lp->netdev;
957 unsigned long ioaddr = dev->base_addr;
958 int phyaddr = lp->mii.phy_id;
959 int my_phy_caps; /* My PHY capabilities */
960 int my_ad_caps; /* My Advertised capabilities */
961 int status;
962 unsigned long flags;
963
964 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
965
966 /*
967 * We should not be called if phy_type is zero.
968 */
969 if (lp->phy_type == 0)
970 goto smc911x_phy_configure_exit_nolock;
971
972 if (smc911x_phy_reset(dev, phyaddr)) {
973 printk("%s: PHY reset timed out\n", dev->name);
974 goto smc911x_phy_configure_exit_nolock;
975 }
976 spin_lock_irqsave(&lp->lock, flags);
977
978 /*
979 * Enable PHY Interrupts (for register 18)
980 * Interrupts listed here are enabled
981 */
982 SMC_SET_PHY_INT_MASK(phyaddr, PHY_INT_MASK_ENERGY_ON_ |
983 PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
984 PHY_INT_MASK_LINK_DOWN_);
985
986 /* If the user requested no auto neg, then go set his request */
987 if (lp->mii.force_media) {
988 smc911x_phy_fixed(dev);
989 goto smc911x_phy_configure_exit;
990 }
991
992 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
993 SMC_GET_PHY_BMSR(phyaddr, my_phy_caps);
994 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
995 printk(KERN_INFO "Auto negotiation NOT supported\n");
996 smc911x_phy_fixed(dev);
997 goto smc911x_phy_configure_exit;
998 }
999
1000 /* CSMA capable w/ both pauses */
1001 my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
1002
1003 if (my_phy_caps & BMSR_100BASE4)
1004 my_ad_caps |= ADVERTISE_100BASE4;
1005 if (my_phy_caps & BMSR_100FULL)
1006 my_ad_caps |= ADVERTISE_100FULL;
1007 if (my_phy_caps & BMSR_100HALF)
1008 my_ad_caps |= ADVERTISE_100HALF;
1009 if (my_phy_caps & BMSR_10FULL)
1010 my_ad_caps |= ADVERTISE_10FULL;
1011 if (my_phy_caps & BMSR_10HALF)
1012 my_ad_caps |= ADVERTISE_10HALF;
1013
1014 /* Disable capabilities not selected by our user */
1015 if (lp->ctl_rspeed != 100)
1016 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1017
1018 if (!lp->ctl_rfduplx)
1019 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1020
1021 /* Update our Auto-Neg Advertisement Register */
1022 SMC_SET_PHY_MII_ADV(phyaddr, my_ad_caps);
1023 lp->mii.advertising = my_ad_caps;
1024
1025 /*
1026 * Read the register back. Without this, it appears that when
1027 * auto-negotiation is restarted, sometimes it isn't ready and
1028 * the link does not come up.
1029 */
1030 udelay(10);
1031 SMC_GET_PHY_MII_ADV(phyaddr, status);
1032
1033 DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
1034 DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
1035
1036 /* Restart auto-negotiation process in order to advertise my caps */
1037 SMC_SET_PHY_BMCR(phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
1038
1039 smc911x_phy_check_media(dev, 1);
1040
1041 smc911x_phy_configure_exit:
1042 spin_unlock_irqrestore(&lp->lock, flags);
1043 smc911x_phy_configure_exit_nolock:
1044 lp->work_pending = 0;
1045 }
1046
1047 /*
1048 * smc911x_phy_interrupt
1049 *
1050 * Purpose: Handle interrupts relating to PHY register 18. This is
1051 * called from the "hard" interrupt handler under our private spinlock.
1052 */
1053 static void smc911x_phy_interrupt(struct net_device *dev)
1054 {
1055 struct smc911x_local *lp = netdev_priv(dev);
1056 unsigned long ioaddr = dev->base_addr;
1057 int phyaddr = lp->mii.phy_id;
1058 int status;
1059
1060 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1061
1062 if (lp->phy_type == 0)
1063 return;
1064
1065 smc911x_phy_check_media(dev, 0);
1066 /* read to clear status bits */
1067 SMC_GET_PHY_INT_SRC(phyaddr,status);
1068 DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n",
1069 dev->name, status & 0xffff);
1070 DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n",
1071 dev->name, SMC_GET_AFC_CFG());
1072 }
1073
1074 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1075
1076 /*
1077 * This is the main routine of the driver, to handle the device when
1078 * it needs some attention.
1079 */
1080 static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
1081 {
1082 struct net_device *dev = dev_id;
1083 unsigned long ioaddr = dev->base_addr;
1084 struct smc911x_local *lp = netdev_priv(dev);
1085 unsigned int status, mask, timeout;
1086 unsigned int rx_overrun=0, cr, pkts;
1087 unsigned long flags;
1088
1089 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1090
1091 spin_lock_irqsave(&lp->lock, flags);
1092
1093 /* Spurious interrupt check */
1094 if ((SMC_GET_IRQ_CFG() & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
1095 (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
1096 spin_unlock_irqrestore(&lp->lock, flags);
1097 return IRQ_NONE;
1098 }
1099
1100 mask = SMC_GET_INT_EN();
1101 SMC_SET_INT_EN(0);
1102
1103 /* set a timeout value, so I don't stay here forever */
1104 timeout = 8;
1105
1106
1107 do {
1108 status = SMC_GET_INT();
1109
1110 DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
1111 dev->name, status, mask, status & ~mask);
1112
1113 status &= mask;
1114 if (!status)
1115 break;
1116
1117 /* Handle SW interrupt condition */
1118 if (status & INT_STS_SW_INT_) {
1119 SMC_ACK_INT(INT_STS_SW_INT_);
1120 mask &= ~INT_EN_SW_INT_EN_;
1121 }
1122 /* Handle various error conditions */
1123 if (status & INT_STS_RXE_) {
1124 SMC_ACK_INT(INT_STS_RXE_);
1125 lp->stats.rx_errors++;
1126 }
1127 if (status & INT_STS_RXDFH_INT_) {
1128 SMC_ACK_INT(INT_STS_RXDFH_INT_);
1129 lp->stats.rx_dropped+=SMC_GET_RX_DROP();
1130 }
1131 /* Undocumented interrupt-what is the right thing to do here? */
1132 if (status & INT_STS_RXDF_INT_) {
1133 SMC_ACK_INT(INT_STS_RXDF_INT_);
1134 }
1135
1136 /* Rx Data FIFO exceeds set level */
1137 if (status & INT_STS_RDFL_) {
1138 if (IS_REV_A(lp->revision)) {
1139 rx_overrun=1;
1140 SMC_GET_MAC_CR(cr);
1141 cr &= ~MAC_CR_RXEN_;
1142 SMC_SET_MAC_CR(cr);
1143 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
1144 lp->stats.rx_errors++;
1145 lp->stats.rx_fifo_errors++;
1146 }
1147 SMC_ACK_INT(INT_STS_RDFL_);
1148 }
1149 if (status & INT_STS_RDFO_) {
1150 if (!IS_REV_A(lp->revision)) {
1151 SMC_GET_MAC_CR(cr);
1152 cr &= ~MAC_CR_RXEN_;
1153 SMC_SET_MAC_CR(cr);
1154 rx_overrun=1;
1155 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
1156 lp->stats.rx_errors++;
1157 lp->stats.rx_fifo_errors++;
1158 }
1159 SMC_ACK_INT(INT_STS_RDFO_);
1160 }
1161 /* Handle receive condition */
1162 if ((status & INT_STS_RSFL_) || rx_overrun) {
1163 unsigned int fifo;
1164 DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name);
1165 fifo = SMC_GET_RX_FIFO_INF();
1166 pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
1167 DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n",
1168 dev->name, pkts, fifo & 0xFFFF );
1169 if (pkts != 0) {
1170 #ifdef SMC_USE_DMA
1171 unsigned int fifo;
1172 if (lp->rxdma_active){
1173 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
1174 "%s: RX DMA active\n", dev->name);
1175 /* The DMA is already running so up the IRQ threshold */
1176 fifo = SMC_GET_FIFO_INT() & ~0xFF;
1177 fifo |= pkts & 0xFF;
1178 DBG(SMC_DEBUG_RX,
1179 "%s: Setting RX stat FIFO threshold to %d\n",
1180 dev->name, fifo & 0xff);
1181 SMC_SET_FIFO_INT(fifo);
1182 } else
1183 #endif
1184 smc911x_rcv(dev);
1185 }
1186 SMC_ACK_INT(INT_STS_RSFL_);
1187 }
1188 /* Handle transmit FIFO available */
1189 if (status & INT_STS_TDFA_) {
1190 DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name);
1191 SMC_SET_FIFO_TDA(0xFF);
1192 lp->tx_throttle = 0;
1193 #ifdef SMC_USE_DMA
1194 if (!lp->txdma_active)
1195 #endif
1196 netif_wake_queue(dev);
1197 SMC_ACK_INT(INT_STS_TDFA_);
1198 }
1199 /* Handle transmit done condition */
1200 #if 1
1201 if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
1202 DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC,
1203 "%s: Tx stat FIFO limit (%d) /GPT irq\n",
1204 dev->name, (SMC_GET_FIFO_INT() & 0x00ff0000) >> 16);
1205 smc911x_tx(dev);
1206 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
1207 SMC_ACK_INT(INT_STS_TSFL_);
1208 SMC_ACK_INT(INT_STS_TSFL_ | INT_STS_GPT_INT_);
1209 }
1210 #else
1211 if (status & INT_STS_TSFL_) {
1212 DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, );
1213 smc911x_tx(dev);
1214 SMC_ACK_INT(INT_STS_TSFL_);
1215 }
1216
1217 if (status & INT_STS_GPT_INT_) {
1218 DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
1219 dev->name,
1220 SMC_GET_IRQ_CFG(),
1221 SMC_GET_FIFO_INT(),
1222 SMC_GET_RX_CFG());
1223 DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x "
1224 "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
1225 dev->name,
1226 (SMC_GET_RX_FIFO_INF() & 0x00ff0000) >> 16,
1227 SMC_GET_RX_FIFO_INF() & 0xffff,
1228 SMC_GET_RX_STS_FIFO_PEEK());
1229 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
1230 SMC_ACK_INT(INT_STS_GPT_INT_);
1231 }
1232 #endif
1233
1234 /* Handle PHY interupt condition */
1235 if (status & INT_STS_PHY_INT_) {
1236 DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name);
1237 smc911x_phy_interrupt(dev);
1238 SMC_ACK_INT(INT_STS_PHY_INT_);
1239 }
1240 } while (--timeout);
1241
1242 /* restore mask state */
1243 SMC_SET_INT_EN(mask);
1244
1245 DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n",
1246 dev->name, 8-timeout);
1247
1248 spin_unlock_irqrestore(&lp->lock, flags);
1249
1250 DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout);
1251
1252 return IRQ_HANDLED;
1253 }
1254
1255 #ifdef SMC_USE_DMA
1256 static void
1257 smc911x_tx_dma_irq(int dma, void *data)
1258 {
1259 struct net_device *dev = (struct net_device *)data;
1260 struct smc911x_local *lp = netdev_priv(dev);
1261 struct sk_buff *skb = lp->current_tx_skb;
1262 unsigned long flags;
1263
1264 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1265
1266 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name);
1267 /* Clear the DMA interrupt sources */
1268 SMC_DMA_ACK_IRQ(dev, dma);
1269 BUG_ON(skb == NULL);
1270 dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
1271 dev->trans_start = jiffies;
1272 dev_kfree_skb_irq(skb);
1273 lp->current_tx_skb = NULL;
1274 if (lp->pending_tx_skb != NULL)
1275 smc911x_hardware_send_pkt(dev);
1276 else {
1277 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
1278 "%s: No pending Tx packets. DMA disabled\n", dev->name);
1279 spin_lock_irqsave(&lp->lock, flags);
1280 lp->txdma_active = 0;
1281 if (!lp->tx_throttle) {
1282 netif_wake_queue(dev);
1283 }
1284 spin_unlock_irqrestore(&lp->lock, flags);
1285 }
1286
1287 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
1288 "%s: TX DMA irq completed\n", dev->name);
1289 }
1290 static void
1291 smc911x_rx_dma_irq(int dma, void *data)
1292 {
1293 struct net_device *dev = (struct net_device *)data;
1294 unsigned long ioaddr = dev->base_addr;
1295 struct smc911x_local *lp = netdev_priv(dev);
1296 struct sk_buff *skb = lp->current_rx_skb;
1297 unsigned long flags;
1298 unsigned int pkts;
1299
1300 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1301 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name);
1302 /* Clear the DMA interrupt sources */
1303 SMC_DMA_ACK_IRQ(dev, dma);
1304 dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
1305 BUG_ON(skb == NULL);
1306 lp->current_rx_skb = NULL;
1307 PRINT_PKT(skb->data, skb->len);
1308 dev->last_rx = jiffies;
1309 skb->protocol = eth_type_trans(skb, dev);
1310 netif_rx(skb);
1311 lp->stats.rx_packets++;
1312 lp->stats.rx_bytes += skb->len;
1313
1314 spin_lock_irqsave(&lp->lock, flags);
1315 pkts = (SMC_GET_RX_FIFO_INF() & RX_FIFO_INF_RXSUSED_) >> 16;
1316 if (pkts != 0) {
1317 smc911x_rcv(dev);
1318 }else {
1319 lp->rxdma_active = 0;
1320 }
1321 spin_unlock_irqrestore(&lp->lock, flags);
1322 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
1323 "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n",
1324 dev->name, pkts);
1325 }
1326 #endif /* SMC_USE_DMA */
1327
1328 #ifdef CONFIG_NET_POLL_CONTROLLER
1329 /*
1330 * Polling receive - used by netconsole and other diagnostic tools
1331 * to allow network i/o with interrupts disabled.
1332 */
1333 static void smc911x_poll_controller(struct net_device *dev)
1334 {
1335 disable_irq(dev->irq);
1336 smc911x_interrupt(dev->irq, dev);
1337 enable_irq(dev->irq);
1338 }
1339 #endif
1340
1341 /* Our watchdog timed out. Called by the networking layer */
1342 static void smc911x_timeout(struct net_device *dev)
1343 {
1344 struct smc911x_local *lp = netdev_priv(dev);
1345 unsigned long ioaddr = dev->base_addr;
1346 int status, mask;
1347 unsigned long flags;
1348
1349 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1350
1351 spin_lock_irqsave(&lp->lock, flags);
1352 status = SMC_GET_INT();
1353 mask = SMC_GET_INT_EN();
1354 spin_unlock_irqrestore(&lp->lock, flags);
1355 DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n",
1356 dev->name, status, mask);
1357
1358 /* Dump the current TX FIFO contents and restart */
1359 mask = SMC_GET_TX_CFG();
1360 SMC_SET_TX_CFG(mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
1361 /*
1362 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1363 * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
1364 * which calls schedule(). Hence we use a work queue.
1365 */
1366 if (lp->phy_type != 0) {
1367 if (schedule_work(&lp->phy_configure)) {
1368 lp->work_pending = 1;
1369 }
1370 }
1371
1372 /* We can accept TX packets again */
1373 dev->trans_start = jiffies;
1374 netif_wake_queue(dev);
1375 }
1376
1377 /*
1378 * This routine will, depending on the values passed to it,
1379 * either make it accept multicast packets, go into
1380 * promiscuous mode (for TCPDUMP and cousins) or accept
1381 * a select set of multicast packets
1382 */
1383 static void smc911x_set_multicast_list(struct net_device *dev)
1384 {
1385 struct smc911x_local *lp = netdev_priv(dev);
1386 unsigned long ioaddr = dev->base_addr;
1387 unsigned int multicast_table[2];
1388 unsigned int mcr, update_multicast = 0;
1389 unsigned long flags;
1390 /* table for flipping the order of 5 bits */
1391 static const unsigned char invert5[] =
1392 {0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0C, 0x1C,
1393 0x02, 0x12, 0x0A, 0x1A, 0x06, 0x16, 0x0E, 0x1E,
1394 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0D, 0x1D,
1395 0x03, 0x13, 0x0B, 0x1B, 0x07, 0x17, 0x0F, 0x1F};
1396
1397
1398 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1399
1400 spin_lock_irqsave(&lp->lock, flags);
1401 SMC_GET_MAC_CR(mcr);
1402 spin_unlock_irqrestore(&lp->lock, flags);
1403
1404 if (dev->flags & IFF_PROMISC) {
1405
1406 DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name);
1407 mcr |= MAC_CR_PRMS_;
1408 }
1409 /*
1410 * Here, I am setting this to accept all multicast packets.
1411 * I don't need to zero the multicast table, because the flag is
1412 * checked before the table is
1413 */
1414 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1415 DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name);
1416 mcr |= MAC_CR_MCPAS_;
1417 }
1418
1419 /*
1420 * This sets the internal hardware table to filter out unwanted
1421 * multicast packets before they take up memory.
1422 *
1423 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1424 * address are the offset into the table. If that bit is 1, then the
1425 * multicast packet is accepted. Otherwise, it's dropped silently.
1426 *
1427 * To use the 6 bits as an offset into the table, the high 1 bit is
1428 * the number of the 32 bit register, while the low 5 bits are the bit
1429 * within that register.
1430 */
1431 else if (dev->mc_count) {
1432 int i;
1433 struct dev_mc_list *cur_addr;
1434
1435 /* Set the Hash perfec mode */
1436 mcr |= MAC_CR_HPFILT_;
1437
1438 /* start with a table of all zeros: reject all */
1439 memset(multicast_table, 0, sizeof(multicast_table));
1440
1441 cur_addr = dev->mc_list;
1442 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1443 int position;
1444
1445 /* do we have a pointer here? */
1446 if (!cur_addr)
1447 break;
1448 /* make sure this is a multicast address -
1449 shouldn't this be a given if we have it here ? */
1450 if (!(*cur_addr->dmi_addr & 1))
1451 continue;
1452
1453 /* only use the low order bits */
1454 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1455
1456 /* do some messy swapping to put the bit in the right spot */
1457 multicast_table[invert5[position&0x1F]&0x1] |=
1458 (1<<invert5[(position>>1)&0x1F]);
1459 }
1460
1461 /* be sure I get rid of flags I might have set */
1462 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1463
1464 /* now, the table can be loaded into the chipset */
1465 update_multicast = 1;
1466 } else {
1467 DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n",
1468 dev->name);
1469 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1470
1471 /*
1472 * since I'm disabling all multicast entirely, I need to
1473 * clear the multicast list
1474 */
1475 memset(multicast_table, 0, sizeof(multicast_table));
1476 update_multicast = 1;
1477 }
1478
1479 spin_lock_irqsave(&lp->lock, flags);
1480 SMC_SET_MAC_CR(mcr);
1481 if (update_multicast) {
1482 DBG(SMC_DEBUG_MISC,
1483 "%s: update mcast hash table 0x%08x 0x%08x\n",
1484 dev->name, multicast_table[0], multicast_table[1]);
1485 SMC_SET_HASHL(multicast_table[0]);
1486 SMC_SET_HASHH(multicast_table[1]);
1487 }
1488 spin_unlock_irqrestore(&lp->lock, flags);
1489 }
1490
1491
1492 /*
1493 * Open and Initialize the board
1494 *
1495 * Set up everything, reset the card, etc..
1496 */
1497 static int
1498 smc911x_open(struct net_device *dev)
1499 {
1500 struct smc911x_local *lp = netdev_priv(dev);
1501
1502 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1503
1504 /*
1505 * Check that the address is valid. If its not, refuse
1506 * to bring the device up. The user must specify an
1507 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1508 */
1509 if (!is_valid_ether_addr(dev->dev_addr)) {
1510 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
1511 return -EINVAL;
1512 }
1513
1514 /* reset the hardware */
1515 smc911x_reset(dev);
1516
1517 /* Configure the PHY, initialize the link state */
1518 smc911x_phy_configure(&lp->phy_configure);
1519
1520 /* Turn on Tx + Rx */
1521 smc911x_enable(dev);
1522
1523 netif_start_queue(dev);
1524
1525 return 0;
1526 }
1527
1528 /*
1529 * smc911x_close
1530 *
1531 * this makes the board clean up everything that it can
1532 * and not talk to the outside world. Caused by
1533 * an 'ifconfig ethX down'
1534 */
1535 static int smc911x_close(struct net_device *dev)
1536 {
1537 struct smc911x_local *lp = netdev_priv(dev);
1538
1539 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1540
1541 netif_stop_queue(dev);
1542 netif_carrier_off(dev);
1543
1544 /* clear everything */
1545 smc911x_shutdown(dev);
1546
1547 if (lp->phy_type != 0) {
1548 /* We need to ensure that no calls to
1549 * smc911x_phy_configure are pending.
1550
1551 * flush_scheduled_work() cannot be called because we
1552 * are running with the netlink semaphore held (from
1553 * devinet_ioctl()) and the pending work queue
1554 * contains linkwatch_event() (scheduled by
1555 * netif_carrier_off() above). linkwatch_event() also
1556 * wants the netlink semaphore.
1557 */
1558 while (lp->work_pending)
1559 schedule();
1560 smc911x_phy_powerdown(dev, lp->mii.phy_id);
1561 }
1562
1563 if (lp->pending_tx_skb) {
1564 dev_kfree_skb(lp->pending_tx_skb);
1565 lp->pending_tx_skb = NULL;
1566 }
1567
1568 return 0;
1569 }
1570
1571 /*
1572 * Get the current statistics.
1573 * This may be called with the card open or closed.
1574 */
1575 static struct net_device_stats *smc911x_query_statistics(struct net_device *dev)
1576 {
1577 struct smc911x_local *lp = netdev_priv(dev);
1578 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1579
1580
1581 return &lp->stats;
1582 }
1583
1584 /*
1585 * Ethtool support
1586 */
1587 static int
1588 smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1589 {
1590 struct smc911x_local *lp = netdev_priv(dev);
1591 unsigned long ioaddr = dev->base_addr;
1592 int ret, status;
1593 unsigned long flags;
1594
1595 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1596 cmd->maxtxpkt = 1;
1597 cmd->maxrxpkt = 1;
1598
1599 if (lp->phy_type != 0) {
1600 spin_lock_irqsave(&lp->lock, flags);
1601 ret = mii_ethtool_gset(&lp->mii, cmd);
1602 spin_unlock_irqrestore(&lp->lock, flags);
1603 } else {
1604 cmd->supported = SUPPORTED_10baseT_Half |
1605 SUPPORTED_10baseT_Full |
1606 SUPPORTED_TP | SUPPORTED_AUI;
1607
1608 if (lp->ctl_rspeed == 10)
1609 cmd->speed = SPEED_10;
1610 else if (lp->ctl_rspeed == 100)
1611 cmd->speed = SPEED_100;
1612
1613 cmd->autoneg = AUTONEG_DISABLE;
1614 if (lp->mii.phy_id==1)
1615 cmd->transceiver = XCVR_INTERNAL;
1616 else
1617 cmd->transceiver = XCVR_EXTERNAL;
1618 cmd->port = 0;
1619 SMC_GET_PHY_SPECIAL(lp->mii.phy_id, status);
1620 cmd->duplex =
1621 (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
1622 DUPLEX_FULL : DUPLEX_HALF;
1623 ret = 0;
1624 }
1625
1626 return ret;
1627 }
1628
1629 static int
1630 smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1631 {
1632 struct smc911x_local *lp = netdev_priv(dev);
1633 int ret;
1634 unsigned long flags;
1635
1636 if (lp->phy_type != 0) {
1637 spin_lock_irqsave(&lp->lock, flags);
1638 ret = mii_ethtool_sset(&lp->mii, cmd);
1639 spin_unlock_irqrestore(&lp->lock, flags);
1640 } else {
1641 if (cmd->autoneg != AUTONEG_DISABLE ||
1642 cmd->speed != SPEED_10 ||
1643 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1644 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1645 return -EINVAL;
1646
1647 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1648
1649 ret = 0;
1650 }
1651
1652 return ret;
1653 }
1654
1655 static void
1656 smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1657 {
1658 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1659 strncpy(info->version, version, sizeof(info->version));
1660 strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
1661 }
1662
1663 static int smc911x_ethtool_nwayreset(struct net_device *dev)
1664 {
1665 struct smc911x_local *lp = netdev_priv(dev);
1666 int ret = -EINVAL;
1667 unsigned long flags;
1668
1669 if (lp->phy_type != 0) {
1670 spin_lock_irqsave(&lp->lock, flags);
1671 ret = mii_nway_restart(&lp->mii);
1672 spin_unlock_irqrestore(&lp->lock, flags);
1673 }
1674
1675 return ret;
1676 }
1677
1678 static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
1679 {
1680 struct smc911x_local *lp = netdev_priv(dev);
1681 return lp->msg_enable;
1682 }
1683
1684 static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1685 {
1686 struct smc911x_local *lp = netdev_priv(dev);
1687 lp->msg_enable = level;
1688 }
1689
1690 static int smc911x_ethtool_getregslen(struct net_device *dev)
1691 {
1692 /* System regs + MAC regs + PHY regs */
1693 return (((E2P_CMD - ID_REV)/4 + 1) +
1694 (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
1695 }
1696
1697 static void smc911x_ethtool_getregs(struct net_device *dev,
1698 struct ethtool_regs* regs, void *buf)
1699 {
1700 unsigned long ioaddr = dev->base_addr;
1701 struct smc911x_local *lp = netdev_priv(dev);
1702 unsigned long flags;
1703 u32 reg,i,j=0;
1704 u32 *data = (u32*)buf;
1705
1706 regs->version = lp->version;
1707 for(i=ID_REV;i<=E2P_CMD;i+=4) {
1708 data[j++] = SMC_inl(ioaddr,i);
1709 }
1710 for(i=MAC_CR;i<=WUCSR;i++) {
1711 spin_lock_irqsave(&lp->lock, flags);
1712 SMC_GET_MAC_CSR(i, reg);
1713 spin_unlock_irqrestore(&lp->lock, flags);
1714 data[j++] = reg;
1715 }
1716 for(i=0;i<=31;i++) {
1717 spin_lock_irqsave(&lp->lock, flags);
1718 SMC_GET_MII(i, lp->mii.phy_id, reg);
1719 spin_unlock_irqrestore(&lp->lock, flags);
1720 data[j++] = reg & 0xFFFF;
1721 }
1722 }
1723
1724 static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
1725 {
1726 unsigned long ioaddr = dev->base_addr;
1727 unsigned int timeout;
1728 int e2p_cmd;
1729
1730 e2p_cmd = SMC_GET_E2P_CMD();
1731 for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
1732 if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
1733 PRINTK("%s: %s timeout waiting for EEPROM to respond\n",
1734 dev->name, __FUNCTION__);
1735 return -EFAULT;
1736 }
1737 mdelay(1);
1738 e2p_cmd = SMC_GET_E2P_CMD();
1739 }
1740 if (timeout == 0) {
1741 PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n",
1742 dev->name, __FUNCTION__);
1743 return -ETIMEDOUT;
1744 }
1745 return 0;
1746 }
1747
1748 static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
1749 int cmd, int addr)
1750 {
1751 unsigned long ioaddr = dev->base_addr;
1752 int ret;
1753
1754 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1755 return ret;
1756 SMC_SET_E2P_CMD(E2P_CMD_EPC_BUSY_ |
1757 ((cmd) & (0x7<<28)) |
1758 ((addr) & 0xFF));
1759 return 0;
1760 }
1761
1762 static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
1763 u8 *data)
1764 {
1765 unsigned long ioaddr = dev->base_addr;
1766 int ret;
1767
1768 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1769 return ret;
1770 *data = SMC_GET_E2P_DATA();
1771 return 0;
1772 }
1773
1774 static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
1775 u8 data)
1776 {
1777 unsigned long ioaddr = dev->base_addr;
1778 int ret;
1779
1780 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1781 return ret;
1782 SMC_SET_E2P_DATA(data);
1783 return 0;
1784 }
1785
1786 static int smc911x_ethtool_geteeprom(struct net_device *dev,
1787 struct ethtool_eeprom *eeprom, u8 *data)
1788 {
1789 u8 eebuf[SMC911X_EEPROM_LEN];
1790 int i, ret;
1791
1792 for(i=0;i<SMC911X_EEPROM_LEN;i++) {
1793 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
1794 return ret;
1795 if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
1796 return ret;
1797 }
1798 memcpy(data, eebuf+eeprom->offset, eeprom->len);
1799 return 0;
1800 }
1801
1802 static int smc911x_ethtool_seteeprom(struct net_device *dev,
1803 struct ethtool_eeprom *eeprom, u8 *data)
1804 {
1805 int i, ret;
1806
1807 /* Enable erase */
1808 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
1809 return ret;
1810 for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
1811 /* erase byte */
1812 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
1813 return ret;
1814 /* write byte */
1815 if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
1816 return ret;
1817 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
1818 return ret;
1819 }
1820 return 0;
1821 }
1822
1823 static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
1824 {
1825 return SMC911X_EEPROM_LEN;
1826 }
1827
1828 static const struct ethtool_ops smc911x_ethtool_ops = {
1829 .get_settings = smc911x_ethtool_getsettings,
1830 .set_settings = smc911x_ethtool_setsettings,
1831 .get_drvinfo = smc911x_ethtool_getdrvinfo,
1832 .get_msglevel = smc911x_ethtool_getmsglevel,
1833 .set_msglevel = smc911x_ethtool_setmsglevel,
1834 .nway_reset = smc911x_ethtool_nwayreset,
1835 .get_link = ethtool_op_get_link,
1836 .get_regs_len = smc911x_ethtool_getregslen,
1837 .get_regs = smc911x_ethtool_getregs,
1838 .get_eeprom_len = smc911x_ethtool_geteeprom_len,
1839 .get_eeprom = smc911x_ethtool_geteeprom,
1840 .set_eeprom = smc911x_ethtool_seteeprom,
1841 };
1842
1843 /*
1844 * smc911x_findirq
1845 *
1846 * This routine has a simple purpose -- make the SMC chip generate an
1847 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1848 */
1849 static int __init smc911x_findirq(unsigned long ioaddr)
1850 {
1851 int timeout = 20;
1852 unsigned long cookie;
1853
1854 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
1855
1856 cookie = probe_irq_on();
1857
1858 /*
1859 * Force a SW interrupt
1860 */
1861
1862 SMC_SET_INT_EN(INT_EN_SW_INT_EN_);
1863
1864 /*
1865 * Wait until positive that the interrupt has been generated
1866 */
1867 do {
1868 int int_status;
1869 udelay(10);
1870 int_status = SMC_GET_INT_EN();
1871 if (int_status & INT_EN_SW_INT_EN_)
1872 break; /* got the interrupt */
1873 } while (--timeout);
1874
1875 /*
1876 * there is really nothing that I can do here if timeout fails,
1877 * as autoirq_report will return a 0 anyway, which is what I
1878 * want in this case. Plus, the clean up is needed in both
1879 * cases.
1880 */
1881
1882 /* and disable all interrupts again */
1883 SMC_SET_INT_EN(0);
1884
1885 /* and return what I found */
1886 return probe_irq_off(cookie);
1887 }
1888
1889 /*
1890 * Function: smc911x_probe(unsigned long ioaddr)
1891 *
1892 * Purpose:
1893 * Tests to see if a given ioaddr points to an SMC911x chip.
1894 * Returns a 0 on success
1895 *
1896 * Algorithm:
1897 * (1) see if the endian word is OK
1898 * (1) see if I recognize the chip ID in the appropriate register
1899 *
1900 * Here I do typical initialization tasks.
1901 *
1902 * o Initialize the structure if needed
1903 * o print out my vanity message if not done so already
1904 * o print out what type of hardware is detected
1905 * o print out the ethernet address
1906 * o find the IRQ
1907 * o set up my private data
1908 * o configure the dev structure with my subroutines
1909 * o actually GRAB the irq.
1910 * o GRAB the region
1911 */
1912 static int __init smc911x_probe(struct net_device *dev, unsigned long ioaddr)
1913 {
1914 struct smc911x_local *lp = netdev_priv(dev);
1915 int i, retval;
1916 unsigned int val, chip_id, revision;
1917 const char *version_string;
1918
1919 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1920
1921 /* First, see if the endian word is recognized */
1922 val = SMC_GET_BYTE_TEST();
1923 DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val);
1924 if (val != 0x87654321) {
1925 printk(KERN_ERR "Invalid chip endian 0x08%x\n",val);
1926 retval = -ENODEV;
1927 goto err_out;
1928 }
1929
1930 /*
1931 * check if the revision register is something that I
1932 * recognize. These might need to be added to later,
1933 * as future revisions could be added.
1934 */
1935 chip_id = SMC_GET_PN();
1936 DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id);
1937 for(i=0;chip_ids[i].id != 0; i++) {
1938 if (chip_ids[i].id == chip_id) break;
1939 }
1940 if (!chip_ids[i].id) {
1941 printk(KERN_ERR "Unknown chip ID %04x\n", chip_id);
1942 retval = -ENODEV;
1943 goto err_out;
1944 }
1945 version_string = chip_ids[i].name;
1946
1947 revision = SMC_GET_REV();
1948 DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision);
1949
1950 /* At this point I'll assume that the chip is an SMC911x. */
1951 DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name);
1952
1953 /* Validate the TX FIFO size requested */
1954 if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
1955 printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb);
1956 retval = -EINVAL;
1957 goto err_out;
1958 }
1959
1960 /* fill in some of the fields */
1961 dev->base_addr = ioaddr;
1962 lp->version = chip_ids[i].id;
1963 lp->revision = revision;
1964 lp->tx_fifo_kb = tx_fifo_kb;
1965 /* Reverse calculate the RX FIFO size from the TX */
1966 lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
1967 lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
1968
1969 /* Set the automatic flow control values */
1970 switch(lp->tx_fifo_kb) {
1971 /*
1972 * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
1973 * AFC_LO is AFC_HI/2
1974 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1975 */
1976 case 2:/* 13440 Rx Data Fifo Size */
1977 lp->afc_cfg=0x008C46AF;break;
1978 case 3:/* 12480 Rx Data Fifo Size */
1979 lp->afc_cfg=0x0082419F;break;
1980 case 4:/* 11520 Rx Data Fifo Size */
1981 lp->afc_cfg=0x00783C9F;break;
1982 case 5:/* 10560 Rx Data Fifo Size */
1983 lp->afc_cfg=0x006E374F;break;
1984 case 6:/* 9600 Rx Data Fifo Size */
1985 lp->afc_cfg=0x0064328F;break;
1986 case 7:/* 8640 Rx Data Fifo Size */
1987 lp->afc_cfg=0x005A2D7F;break;
1988 case 8:/* 7680 Rx Data Fifo Size */
1989 lp->afc_cfg=0x0050287F;break;
1990 case 9:/* 6720 Rx Data Fifo Size */
1991 lp->afc_cfg=0x0046236F;break;
1992 case 10:/* 5760 Rx Data Fifo Size */
1993 lp->afc_cfg=0x003C1E6F;break;
1994 case 11:/* 4800 Rx Data Fifo Size */
1995 lp->afc_cfg=0x0032195F;break;
1996 /*
1997 * AFC_HI is ~1520 bytes less than RX Data Fifo Size
1998 * AFC_LO is AFC_HI/2
1999 * BACK_DUR is about 5uS*(AFC_LO) rounded down
2000 */
2001 case 12:/* 3840 Rx Data Fifo Size */
2002 lp->afc_cfg=0x0024124F;break;
2003 case 13:/* 2880 Rx Data Fifo Size */
2004 lp->afc_cfg=0x0015073F;break;
2005 case 14:/* 1920 Rx Data Fifo Size */
2006 lp->afc_cfg=0x0006032F;break;
2007 default:
2008 PRINTK("%s: ERROR -- no AFC_CFG setting found",
2009 dev->name);
2010 break;
2011 }
2012
2013 DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX,
2014 "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
2015 lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
2016
2017 spin_lock_init(&lp->lock);
2018
2019 /* Get the MAC address */
2020 SMC_GET_MAC_ADDR(dev->dev_addr);
2021
2022 /* now, reset the chip, and put it into a known state */
2023 smc911x_reset(dev);
2024
2025 /*
2026 * If dev->irq is 0, then the device has to be banged on to see
2027 * what the IRQ is.
2028 *
2029 * Specifying an IRQ is done with the assumption that the user knows
2030 * what (s)he is doing. No checking is done!!!!
2031 */
2032 if (dev->irq < 1) {
2033 int trials;
2034
2035 trials = 3;
2036 while (trials--) {
2037 dev->irq = smc911x_findirq(ioaddr);
2038 if (dev->irq)
2039 break;
2040 /* kick the card and try again */
2041 smc911x_reset(dev);
2042 }
2043 }
2044 if (dev->irq == 0) {
2045 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
2046 dev->name);
2047 retval = -ENODEV;
2048 goto err_out;
2049 }
2050 dev->irq = irq_canonicalize(dev->irq);
2051
2052 /* Fill in the fields of the device structure with ethernet values. */
2053 ether_setup(dev);
2054
2055 dev->open = smc911x_open;
2056 dev->stop = smc911x_close;
2057 dev->hard_start_xmit = smc911x_hard_start_xmit;
2058 dev->tx_timeout = smc911x_timeout;
2059 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
2060 dev->get_stats = smc911x_query_statistics;
2061 dev->set_multicast_list = smc911x_set_multicast_list;
2062 dev->ethtool_ops = &smc911x_ethtool_ops;
2063 #ifdef CONFIG_NET_POLL_CONTROLLER
2064 dev->poll_controller = smc911x_poll_controller;
2065 #endif
2066
2067 INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
2068 lp->mii.phy_id_mask = 0x1f;
2069 lp->mii.reg_num_mask = 0x1f;
2070 lp->mii.force_media = 0;
2071 lp->mii.full_duplex = 0;
2072 lp->mii.dev = dev;
2073 lp->mii.mdio_read = smc911x_phy_read;
2074 lp->mii.mdio_write = smc911x_phy_write;
2075
2076 /*
2077 * Locate the phy, if any.
2078 */
2079 smc911x_phy_detect(dev);
2080
2081 /* Set default parameters */
2082 lp->msg_enable = NETIF_MSG_LINK;
2083 lp->ctl_rfduplx = 1;
2084 lp->ctl_rspeed = 100;
2085
2086 /* Grab the IRQ */
2087 retval = request_irq(dev->irq, &smc911x_interrupt, IRQF_SHARED, dev->name, dev);
2088 if (retval)
2089 goto err_out;
2090
2091 set_irq_type(dev->irq, IRQT_FALLING);
2092
2093 #ifdef SMC_USE_DMA
2094 lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
2095 lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
2096 lp->rxdma_active = 0;
2097 lp->txdma_active = 0;
2098 dev->dma = lp->rxdma;
2099 #endif
2100
2101 retval = register_netdev(dev);
2102 if (retval == 0) {
2103 /* now, print out the card info, in a short format.. */
2104 printk("%s: %s (rev %d) at %#lx IRQ %d",
2105 dev->name, version_string, lp->revision,
2106 dev->base_addr, dev->irq);
2107
2108 #ifdef SMC_USE_DMA
2109 if (lp->rxdma != -1)
2110 printk(" RXDMA %d ", lp->rxdma);
2111
2112 if (lp->txdma != -1)
2113 printk("TXDMA %d", lp->txdma);
2114 #endif
2115 printk("\n");
2116 if (!is_valid_ether_addr(dev->dev_addr)) {
2117 printk("%s: Invalid ethernet MAC address. Please "
2118 "set using ifconfig\n", dev->name);
2119 } else {
2120 /* Print the Ethernet address */
2121 printk("%s: Ethernet addr: ", dev->name);
2122 for (i = 0; i < 5; i++)
2123 printk("%2.2x:", dev->dev_addr[i]);
2124 printk("%2.2x\n", dev->dev_addr[5]);
2125 }
2126
2127 if (lp->phy_type == 0) {
2128 PRINTK("%s: No PHY found\n", dev->name);
2129 } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
2130 PRINTK("%s: LAN911x Internal PHY\n", dev->name);
2131 } else {
2132 PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type);
2133 }
2134 }
2135
2136 err_out:
2137 #ifdef SMC_USE_DMA
2138 if (retval) {
2139 if (lp->rxdma != -1) {
2140 SMC_DMA_FREE(dev, lp->rxdma);
2141 }
2142 if (lp->txdma != -1) {
2143 SMC_DMA_FREE(dev, lp->txdma);
2144 }
2145 }
2146 #endif
2147 return retval;
2148 }
2149
2150 /*
2151 * smc911x_init(void)
2152 *
2153 * Output:
2154 * 0 --> there is a device
2155 * anything else, error
2156 */
2157 static int smc911x_drv_probe(struct platform_device *pdev)
2158 {
2159 struct net_device *ndev;
2160 struct resource *res;
2161 struct smc911x_local *lp;
2162 unsigned int *addr;
2163 int ret;
2164
2165 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2166 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2167 if (!res) {
2168 ret = -ENODEV;
2169 goto out;
2170 }
2171
2172 /*
2173 * Request the regions.
2174 */
2175 if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
2176 ret = -EBUSY;
2177 goto out;
2178 }
2179
2180 ndev = alloc_etherdev(sizeof(struct smc911x_local));
2181 if (!ndev) {
2182 printk("%s: could not allocate device.\n", CARDNAME);
2183 ret = -ENOMEM;
2184 goto release_1;
2185 }
2186 SET_MODULE_OWNER(ndev);
2187 SET_NETDEV_DEV(ndev, &pdev->dev);
2188
2189 ndev->dma = (unsigned char)-1;
2190 ndev->irq = platform_get_irq(pdev, 0);
2191 lp = netdev_priv(ndev);
2192 lp->netdev = ndev;
2193
2194 addr = ioremap(res->start, SMC911X_IO_EXTENT);
2195 if (!addr) {
2196 ret = -ENOMEM;
2197 goto release_both;
2198 }
2199
2200 platform_set_drvdata(pdev, ndev);
2201 ret = smc911x_probe(ndev, (unsigned long)addr);
2202 if (ret != 0) {
2203 platform_set_drvdata(pdev, NULL);
2204 iounmap(addr);
2205 release_both:
2206 free_netdev(ndev);
2207 release_1:
2208 release_mem_region(res->start, SMC911X_IO_EXTENT);
2209 out:
2210 printk("%s: not found (%d).\n", CARDNAME, ret);
2211 }
2212 #ifdef SMC_USE_DMA
2213 else {
2214 lp->physaddr = res->start;
2215 lp->dev = &pdev->dev;
2216 }
2217 #endif
2218
2219 return ret;
2220 }
2221
2222 static int smc911x_drv_remove(struct platform_device *pdev)
2223 {
2224 struct net_device *ndev = platform_get_drvdata(pdev);
2225 struct resource *res;
2226
2227 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2228 platform_set_drvdata(pdev, NULL);
2229
2230 unregister_netdev(ndev);
2231
2232 free_irq(ndev->irq, ndev);
2233
2234 #ifdef SMC_USE_DMA
2235 {
2236 struct smc911x_local *lp = netdev_priv(ndev);
2237 if (lp->rxdma != -1) {
2238 SMC_DMA_FREE(dev, lp->rxdma);
2239 }
2240 if (lp->txdma != -1) {
2241 SMC_DMA_FREE(dev, lp->txdma);
2242 }
2243 }
2244 #endif
2245 iounmap((void *)ndev->base_addr);
2246 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2247 release_mem_region(res->start, SMC911X_IO_EXTENT);
2248
2249 free_netdev(ndev);
2250 return 0;
2251 }
2252
2253 static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
2254 {
2255 struct net_device *ndev = platform_get_drvdata(dev);
2256 unsigned long ioaddr = ndev->base_addr;
2257
2258 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2259 if (ndev) {
2260 if (netif_running(ndev)) {
2261 netif_device_detach(ndev);
2262 smc911x_shutdown(ndev);
2263 #if POWER_DOWN
2264 /* Set D2 - Energy detect only setting */
2265 SMC_SET_PMT_CTRL(2<<12);
2266 #endif
2267 }
2268 }
2269 return 0;
2270 }
2271
2272 static int smc911x_drv_resume(struct platform_device *dev)
2273 {
2274 struct net_device *ndev = platform_get_drvdata(dev);
2275
2276 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2277 if (ndev) {
2278 struct smc911x_local *lp = netdev_priv(ndev);
2279
2280 if (netif_running(ndev)) {
2281 smc911x_reset(ndev);
2282 smc911x_enable(ndev);
2283 if (lp->phy_type != 0)
2284 smc911x_phy_configure(&lp->phy_configure);
2285 netif_device_attach(ndev);
2286 }
2287 }
2288 return 0;
2289 }
2290
2291 static struct platform_driver smc911x_driver = {
2292 .probe = smc911x_drv_probe,
2293 .remove = smc911x_drv_remove,
2294 .suspend = smc911x_drv_suspend,
2295 .resume = smc911x_drv_resume,
2296 .driver = {
2297 .name = CARDNAME,
2298 },
2299 };
2300
2301 static int __init smc911x_init(void)
2302 {
2303 return platform_driver_register(&smc911x_driver);
2304 }
2305
2306 static void __exit smc911x_cleanup(void)
2307 {
2308 platform_driver_unregister(&smc911x_driver);
2309 }
2310
2311 module_init(smc911x_init);
2312 module_exit(smc911x_cleanup);
Support for the Chinese Samsung S3C2440 based development boards