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[MTD] Remove gratuitous inclusion of ARM-only header from physmap.c
[linux-2.6/mini2440.git] / drivers / net / wireless / atmel.c
blob8606c88886fca9237fd8b3f4bd774fca8aa7e02c
1 /*** -*- linux-c -*- **********************************************************
2
3 Driver for Atmel at76c502 at76c504 and at76c506 wireless cards.
4
5 Copyright 2000-2001 ATMEL Corporation.
6 Copyright 2003-2004 Simon Kelley.
7
8 This code was developed from version 2.1.1 of the Atmel drivers,
9 released by Atmel corp. under the GPL in December 2002. It also
10 includes code from the Linux aironet drivers (C) Benjamin Reed,
11 and the Linux PCMCIA package, (C) David Hinds and the Linux wireless
12 extensions, (C) Jean Tourrilhes.
13
14 The firmware module for reading the MAC address of the card comes from
15 net.russotto.AtmelMACFW, written by Matthew T. Russotto and copyright
16 by him. net.russotto.AtmelMACFW is used under the GPL license version 2.
17 This file contains the module in binary form and, under the terms
18 of the GPL, in source form. The source is located at the end of the file.
19
20 This program is free software; you can redistribute it and/or modify
21 it under the terms of the GNU General Public License as published by
22 the Free Software Foundation; either version 2 of the License, or
23 (at your option) any later version.
24
25 This software is distributed in the hope that it will be useful,
26 but WITHOUT ANY WARRANTY; without even the implied warranty of
27 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 GNU General Public License for more details.
29
30 You should have received a copy of the GNU General Public License
31 along with Atmel wireless lan drivers; if not, write to the Free Software
32 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
33
34 For all queries about this code, please contact the current author,
35 Simon Kelley <simon@thekelleys.org.uk> and not Atmel Corporation.
36
37 Credit is due to HP UK and Cambridge Online Systems Ltd for supplying
38 hardware used during development of this driver.
39
40 ******************************************************************************/
41
42 #include <linux/config.h>
43 #include <linux/init.h>
44
45 #include <linux/kernel.h>
46 #include <linux/sched.h>
47 #include <linux/ptrace.h>
48 #include <linux/slab.h>
49 #include <linux/string.h>
50 #include <linux/ctype.h>
51 #include <linux/timer.h>
52 #include <asm/io.h>
53 #include <asm/system.h>
54 #include <asm/uaccess.h>
55 #include <linux/module.h>
56 #include <linux/netdevice.h>
57 #include <linux/etherdevice.h>
58 #include <linux/skbuff.h>
59 #include <linux/if_arp.h>
60 #include <linux/ioport.h>
61 #include <linux/fcntl.h>
62 #include <linux/delay.h>
63 #include <linux/wireless.h>
64 #include <net/iw_handler.h>
65 #include <linux/byteorder/generic.h>
66 #include <linux/crc32.h>
67 #include <linux/proc_fs.h>
68 #include <linux/device.h>
69 #include <linux/moduleparam.h>
70 #include <linux/firmware.h>
71 #include <net/ieee80211.h>
72 #include "atmel.h"
73
74 #define DRIVER_MAJOR 0
75 #define DRIVER_MINOR 98
76
77 MODULE_AUTHOR("Simon Kelley");
78 MODULE_DESCRIPTION("Support for Atmel at76c50x 802.11 wireless ethernet cards.");
79 MODULE_LICENSE("GPL");
80 MODULE_SUPPORTED_DEVICE("Atmel at76c50x wireless cards");
81
82 /* The name of the firmware file to be loaded
83 over-rides any automatic selection */
84 static char *firmware = NULL;
85 module_param(firmware, charp, 0);
86
87 /* table of firmware file names */
88 static struct {
89 AtmelFWType fw_type;
90 const char *fw_file;
91 const char *fw_file_ext;
92 } fw_table[] = {
93 { ATMEL_FW_TYPE_502, "atmel_at76c502", "bin" },
94 { ATMEL_FW_TYPE_502D, "atmel_at76c502d", "bin" },
95 { ATMEL_FW_TYPE_502E, "atmel_at76c502e", "bin" },
96 { ATMEL_FW_TYPE_502_3COM, "atmel_at76c502_3com", "bin" },
97 { ATMEL_FW_TYPE_504, "atmel_at76c504", "bin" },
98 { ATMEL_FW_TYPE_504_2958, "atmel_at76c504_2958", "bin" },
99 { ATMEL_FW_TYPE_504A_2958,"atmel_at76c504a_2958","bin" },
100 { ATMEL_FW_TYPE_506, "atmel_at76c506", "bin" },
101 { ATMEL_FW_TYPE_NONE, NULL, NULL }
102 };
103
104 #define MAX_SSID_LENGTH 32
105 #define MGMT_JIFFIES (256 * HZ / 100)
106
107 #define MAX_BSS_ENTRIES 64
108
109 /* registers */
110 #define GCR 0x00 // (SIR0) General Configuration Register
111 #define BSR 0x02 // (SIR1) Bank Switching Select Register
112 #define AR 0x04
113 #define DR 0x08
114 #define MR1 0x12 // Mirror Register 1
115 #define MR2 0x14 // Mirror Register 2
116 #define MR3 0x16 // Mirror Register 3
117 #define MR4 0x18 // Mirror Register 4
118
119 #define GPR1 0x0c
120 #define GPR2 0x0e
121 #define GPR3 0x10
122 //
123 // Constants for the GCR register.
124 //
125 #define GCR_REMAP 0x0400 // Remap internal SRAM to 0
126 #define GCR_SWRES 0x0080 // BIU reset (ARM and PAI are NOT reset)
127 #define GCR_CORES 0x0060 // Core Reset (ARM and PAI are reset)
128 #define GCR_ENINT 0x0002 // Enable Interrupts
129 #define GCR_ACKINT 0x0008 // Acknowledge Interrupts
130
131 #define BSS_SRAM 0x0200 // AMBA module selection --> SRAM
132 #define BSS_IRAM 0x0100 // AMBA module selection --> IRAM
133 //
134 // Constants for the MR registers.
135 //
136 #define MAC_INIT_COMPLETE 0x0001 // MAC init has been completed
137 #define MAC_BOOT_COMPLETE 0x0010 // MAC boot has been completed
138 #define MAC_INIT_OK 0x0002 // MAC boot has been completed
139
140 #define MIB_MAX_DATA_BYTES 212
141 #define MIB_HEADER_SIZE 4 /* first four fields */
142
143 struct get_set_mib {
144 u8 type;
145 u8 size;
146 u8 index;
147 u8 reserved;
148 u8 data[MIB_MAX_DATA_BYTES];
149 };
150
151 struct rx_desc {
152 u32 Next;
153 u16 MsduPos;
154 u16 MsduSize;
155
156 u8 State;
157 u8 Status;
158 u8 Rate;
159 u8 Rssi;
160 u8 LinkQuality;
161 u8 PreambleType;
162 u16 Duration;
163 u32 RxTime;
164 };
165
166 #define RX_DESC_FLAG_VALID 0x80
167 #define RX_DESC_FLAG_CONSUMED 0x40
168 #define RX_DESC_FLAG_IDLE 0x00
169
170 #define RX_STATUS_SUCCESS 0x00
171
172 #define RX_DESC_MSDU_POS_OFFSET 4
173 #define RX_DESC_MSDU_SIZE_OFFSET 6
174 #define RX_DESC_FLAGS_OFFSET 8
175 #define RX_DESC_STATUS_OFFSET 9
176 #define RX_DESC_RSSI_OFFSET 11
177 #define RX_DESC_LINK_QUALITY_OFFSET 12
178 #define RX_DESC_PREAMBLE_TYPE_OFFSET 13
179 #define RX_DESC_DURATION_OFFSET 14
180 #define RX_DESC_RX_TIME_OFFSET 16
181
182 struct tx_desc {
183 u32 NextDescriptor;
184 u16 TxStartOfFrame;
185 u16 TxLength;
186
187 u8 TxState;
188 u8 TxStatus;
189 u8 RetryCount;
190
191 u8 TxRate;
192
193 u8 KeyIndex;
194 u8 ChiperType;
195 u8 ChipreLength;
196 u8 Reserved1;
197
198 u8 Reserved;
199 u8 PacketType;
200 u16 HostTxLength;
201 };
202
203 #define TX_DESC_NEXT_OFFSET 0
204 #define TX_DESC_POS_OFFSET 4
205 #define TX_DESC_SIZE_OFFSET 6
206 #define TX_DESC_FLAGS_OFFSET 8
207 #define TX_DESC_STATUS_OFFSET 9
208 #define TX_DESC_RETRY_OFFSET 10
209 #define TX_DESC_RATE_OFFSET 11
210 #define TX_DESC_KEY_INDEX_OFFSET 12
211 #define TX_DESC_CIPHER_TYPE_OFFSET 13
212 #define TX_DESC_CIPHER_LENGTH_OFFSET 14
213 #define TX_DESC_PACKET_TYPE_OFFSET 17
214 #define TX_DESC_HOST_LENGTH_OFFSET 18
215
216 ///////////////////////////////////////////////////////
217 // Host-MAC interface
218 ///////////////////////////////////////////////////////
219
220 #define TX_STATUS_SUCCESS 0x00
221
222 #define TX_FIRM_OWN 0x80
223 #define TX_DONE 0x40
224
225 #define TX_ERROR 0x01
226
227 #define TX_PACKET_TYPE_DATA 0x01
228 #define TX_PACKET_TYPE_MGMT 0x02
229
230 #define ISR_EMPTY 0x00 // no bits set in ISR
231 #define ISR_TxCOMPLETE 0x01 // packet transmitted
232 #define ISR_RxCOMPLETE 0x02 // packet received
233 #define ISR_RxFRAMELOST 0x04 // Rx Frame lost
234 #define ISR_FATAL_ERROR 0x08 // Fatal error
235 #define ISR_COMMAND_COMPLETE 0x10 // command completed
236 #define ISR_OUT_OF_RANGE 0x20 // command completed
237 #define ISR_IBSS_MERGE 0x40 // (4.1.2.30): IBSS merge
238 #define ISR_GENERIC_IRQ 0x80
239
240 #define Local_Mib_Type 0x01
241 #define Mac_Address_Mib_Type 0x02
242 #define Mac_Mib_Type 0x03
243 #define Statistics_Mib_Type 0x04
244 #define Mac_Mgmt_Mib_Type 0x05
245 #define Mac_Wep_Mib_Type 0x06
246 #define Phy_Mib_Type 0x07
247 #define Multi_Domain_MIB 0x08
248
249 #define MAC_MGMT_MIB_CUR_BSSID_POS 14
250 #define MAC_MIB_FRAG_THRESHOLD_POS 8
251 #define MAC_MIB_RTS_THRESHOLD_POS 10
252 #define MAC_MIB_SHORT_RETRY_POS 16
253 #define MAC_MIB_LONG_RETRY_POS 17
254 #define MAC_MIB_SHORT_RETRY_LIMIT_POS 16
255 #define MAC_MGMT_MIB_BEACON_PER_POS 0
256 #define MAC_MGMT_MIB_STATION_ID_POS 6
257 #define MAC_MGMT_MIB_CUR_PRIVACY_POS 11
258 #define MAC_MGMT_MIB_CUR_BSSID_POS 14
259 #define MAC_MGMT_MIB_PS_MODE_POS 53
260 #define MAC_MGMT_MIB_LISTEN_INTERVAL_POS 54
261 #define MAC_MGMT_MIB_MULTI_DOMAIN_IMPLEMENTED 56
262 #define MAC_MGMT_MIB_MULTI_DOMAIN_ENABLED 57
263 #define PHY_MIB_CHANNEL_POS 14
264 #define PHY_MIB_RATE_SET_POS 20
265 #define PHY_MIB_REG_DOMAIN_POS 26
266 #define LOCAL_MIB_AUTO_TX_RATE_POS 3
267 #define LOCAL_MIB_SSID_SIZE 5
268 #define LOCAL_MIB_TX_PROMISCUOUS_POS 6
269 #define LOCAL_MIB_TX_MGMT_RATE_POS 7
270 #define LOCAL_MIB_TX_CONTROL_RATE_POS 8
271 #define LOCAL_MIB_PREAMBLE_TYPE 9
272 #define MAC_ADDR_MIB_MAC_ADDR_POS 0
273
274 #define CMD_Set_MIB_Vars 0x01
275 #define CMD_Get_MIB_Vars 0x02
276 #define CMD_Scan 0x03
277 #define CMD_Join 0x04
278 #define CMD_Start 0x05
279 #define CMD_EnableRadio 0x06
280 #define CMD_DisableRadio 0x07
281 #define CMD_SiteSurvey 0x0B
282
283 #define CMD_STATUS_IDLE 0x00
284 #define CMD_STATUS_COMPLETE 0x01
285 #define CMD_STATUS_UNKNOWN 0x02
286 #define CMD_STATUS_INVALID_PARAMETER 0x03
287 #define CMD_STATUS_FUNCTION_NOT_SUPPORTED 0x04
288 #define CMD_STATUS_TIME_OUT 0x07
289 #define CMD_STATUS_IN_PROGRESS 0x08
290 #define CMD_STATUS_REJECTED_RADIO_OFF 0x09
291 #define CMD_STATUS_HOST_ERROR 0xFF
292 #define CMD_STATUS_BUSY 0xFE
293
294 #define CMD_BLOCK_COMMAND_OFFSET 0
295 #define CMD_BLOCK_STATUS_OFFSET 1
296 #define CMD_BLOCK_PARAMETERS_OFFSET 4
297
298 #define SCAN_OPTIONS_SITE_SURVEY 0x80
299
300 #define MGMT_FRAME_BODY_OFFSET 24
301 #define MAX_AUTHENTICATION_RETRIES 3
302 #define MAX_ASSOCIATION_RETRIES 3
303
304 #define AUTHENTICATION_RESPONSE_TIME_OUT 1000
305
306 #define MAX_WIRELESS_BODY 2316 /* mtu is 2312, CRC is 4 */
307 #define LOOP_RETRY_LIMIT 500000
308
309 #define ACTIVE_MODE 1
310 #define PS_MODE 2
311
312 #define MAX_ENCRYPTION_KEYS 4
313 #define MAX_ENCRYPTION_KEY_SIZE 40
314
315 ///////////////////////////////////////////////////////////////////////////
316 // 802.11 related definitions
317 ///////////////////////////////////////////////////////////////////////////
318
319 //
320 // Regulatory Domains
321 //
322
323 #define REG_DOMAIN_FCC 0x10 //Channels 1-11 USA
324 #define REG_DOMAIN_DOC 0x20 //Channel 1-11 Canada
325 #define REG_DOMAIN_ETSI 0x30 //Channel 1-13 Europe (ex Spain/France)
326 #define REG_DOMAIN_SPAIN 0x31 //Channel 10-11 Spain
327 #define REG_DOMAIN_FRANCE 0x32 //Channel 10-13 France
328 #define REG_DOMAIN_MKK 0x40 //Channel 14 Japan
329 #define REG_DOMAIN_MKK1 0x41 //Channel 1-14 Japan(MKK1)
330 #define REG_DOMAIN_ISRAEL 0x50 //Channel 3-9 ISRAEL
331
332 #define BSS_TYPE_AD_HOC 1
333 #define BSS_TYPE_INFRASTRUCTURE 2
334
335 #define SCAN_TYPE_ACTIVE 0
336 #define SCAN_TYPE_PASSIVE 1
337
338 #define LONG_PREAMBLE 0
339 #define SHORT_PREAMBLE 1
340 #define AUTO_PREAMBLE 2
341
342 #define DATA_FRAME_WS_HEADER_SIZE 30
343
344 /* promiscuous mode control */
345 #define PROM_MODE_OFF 0x0
346 #define PROM_MODE_UNKNOWN 0x1
347 #define PROM_MODE_CRC_FAILED 0x2
348 #define PROM_MODE_DUPLICATED 0x4
349 #define PROM_MODE_MGMT 0x8
350 #define PROM_MODE_CTRL 0x10
351 #define PROM_MODE_BAD_PROTOCOL 0x20
352
353 #define IFACE_INT_STATUS_OFFSET 0
354 #define IFACE_INT_MASK_OFFSET 1
355 #define IFACE_LOCKOUT_HOST_OFFSET 2
356 #define IFACE_LOCKOUT_MAC_OFFSET 3
357 #define IFACE_FUNC_CTRL_OFFSET 28
358 #define IFACE_MAC_STAT_OFFSET 30
359 #define IFACE_GENERIC_INT_TYPE_OFFSET 32
360
361 #define CIPHER_SUITE_NONE 0
362 #define CIPHER_SUITE_WEP_64 1
363 #define CIPHER_SUITE_TKIP 2
364 #define CIPHER_SUITE_AES 3
365 #define CIPHER_SUITE_CCX 4
366 #define CIPHER_SUITE_WEP_128 5
367
368 //
369 // IFACE MACROS & definitions
370 //
371 //
372
373 // FuncCtrl field:
374 //
375 #define FUNC_CTRL_TxENABLE 0x10
376 #define FUNC_CTRL_RxENABLE 0x20
377 #define FUNC_CTRL_INIT_COMPLETE 0x01
378
379 /* A stub firmware image which reads the MAC address from NVRAM on the card.
380 For copyright information and source see the end of this file. */
381 static u8 mac_reader[] = {
382 0x06,0x00,0x00,0xea,0x04,0x00,0x00,0xea,0x03,0x00,0x00,0xea,0x02,0x00,0x00,0xea,
383 0x01,0x00,0x00,0xea,0x00,0x00,0x00,0xea,0xff,0xff,0xff,0xea,0xfe,0xff,0xff,0xea,
384 0xd3,0x00,0xa0,0xe3,0x00,0xf0,0x21,0xe1,0x0e,0x04,0xa0,0xe3,0x00,0x10,0xa0,0xe3,
385 0x81,0x11,0xa0,0xe1,0x00,0x10,0x81,0xe3,0x00,0x10,0x80,0xe5,0x1c,0x10,0x90,0xe5,
386 0x10,0x10,0xc1,0xe3,0x1c,0x10,0x80,0xe5,0x01,0x10,0xa0,0xe3,0x08,0x10,0x80,0xe5,
387 0x02,0x03,0xa0,0xe3,0x00,0x10,0xa0,0xe3,0xb0,0x10,0xc0,0xe1,0xb4,0x10,0xc0,0xe1,
388 0xb8,0x10,0xc0,0xe1,0xbc,0x10,0xc0,0xe1,0x56,0xdc,0xa0,0xe3,0x21,0x00,0x00,0xeb,
389 0x0a,0x00,0xa0,0xe3,0x1a,0x00,0x00,0xeb,0x10,0x00,0x00,0xeb,0x07,0x00,0x00,0xeb,
390 0x02,0x03,0xa0,0xe3,0x02,0x14,0xa0,0xe3,0xb4,0x10,0xc0,0xe1,0x4c,0x10,0x9f,0xe5,
391 0xbc,0x10,0xc0,0xe1,0x10,0x10,0xa0,0xe3,0xb8,0x10,0xc0,0xe1,0xfe,0xff,0xff,0xea,
392 0x00,0x40,0x2d,0xe9,0x00,0x20,0xa0,0xe3,0x02,0x3c,0xa0,0xe3,0x00,0x10,0xa0,0xe3,
393 0x28,0x00,0x9f,0xe5,0x37,0x00,0x00,0xeb,0x00,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,
394 0x00,0x40,0x2d,0xe9,0x12,0x2e,0xa0,0xe3,0x06,0x30,0xa0,0xe3,0x00,0x10,0xa0,0xe3,
395 0x02,0x04,0xa0,0xe3,0x2f,0x00,0x00,0xeb,0x00,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,
396 0x00,0x02,0x00,0x02,0x80,0x01,0x90,0xe0,0x01,0x00,0x00,0x0a,0x01,0x00,0x50,0xe2,
397 0xfc,0xff,0xff,0xea,0x1e,0xff,0x2f,0xe1,0x80,0x10,0xa0,0xe3,0xf3,0x06,0xa0,0xe3,
398 0x00,0x10,0x80,0xe5,0x00,0x10,0xa0,0xe3,0x00,0x10,0x80,0xe5,0x01,0x10,0xa0,0xe3,
399 0x04,0x10,0x80,0xe5,0x00,0x10,0x80,0xe5,0x0e,0x34,0xa0,0xe3,0x1c,0x10,0x93,0xe5,
400 0x02,0x1a,0x81,0xe3,0x1c,0x10,0x83,0xe5,0x58,0x11,0x9f,0xe5,0x30,0x10,0x80,0xe5,
401 0x54,0x11,0x9f,0xe5,0x34,0x10,0x80,0xe5,0x38,0x10,0x80,0xe5,0x3c,0x10,0x80,0xe5,
402 0x10,0x10,0x90,0xe5,0x08,0x00,0x90,0xe5,0x1e,0xff,0x2f,0xe1,0xf3,0x16,0xa0,0xe3,
403 0x08,0x00,0x91,0xe5,0x05,0x00,0xa0,0xe3,0x0c,0x00,0x81,0xe5,0x10,0x00,0x91,0xe5,
404 0x02,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0xff,0x00,0xa0,0xe3,0x0c,0x00,0x81,0xe5,
405 0x10,0x00,0x91,0xe5,0x02,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x91,0xe5,
406 0x10,0x00,0x91,0xe5,0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x91,0xe5,
407 0xff,0x00,0x00,0xe2,0x1e,0xff,0x2f,0xe1,0x30,0x40,0x2d,0xe9,0x00,0x50,0xa0,0xe1,
408 0x03,0x40,0xa0,0xe1,0xa2,0x02,0xa0,0xe1,0x08,0x00,0x00,0xe2,0x03,0x00,0x80,0xe2,
409 0xd8,0x10,0x9f,0xe5,0x00,0x00,0xc1,0xe5,0x01,0x20,0xc1,0xe5,0xe2,0xff,0xff,0xeb,
410 0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x1a,0x14,0x00,0xa0,0xe3,0xc4,0xff,0xff,0xeb,
411 0x04,0x20,0xa0,0xe1,0x05,0x10,0xa0,0xe1,0x02,0x00,0xa0,0xe3,0x01,0x00,0x00,0xeb,
412 0x30,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,0x70,0x40,0x2d,0xe9,0xf3,0x46,0xa0,0xe3,
413 0x00,0x30,0xa0,0xe3,0x00,0x00,0x50,0xe3,0x08,0x00,0x00,0x9a,0x8c,0x50,0x9f,0xe5,
414 0x03,0x60,0xd5,0xe7,0x0c,0x60,0x84,0xe5,0x10,0x60,0x94,0xe5,0x02,0x00,0x16,0xe3,
415 0xfc,0xff,0xff,0x0a,0x01,0x30,0x83,0xe2,0x00,0x00,0x53,0xe1,0xf7,0xff,0xff,0x3a,
416 0xff,0x30,0xa0,0xe3,0x0c,0x30,0x84,0xe5,0x08,0x00,0x94,0xe5,0x10,0x00,0x94,0xe5,
417 0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x94,0xe5,0x00,0x00,0xa0,0xe3,
418 0x00,0x00,0x52,0xe3,0x0b,0x00,0x00,0x9a,0x10,0x50,0x94,0xe5,0x02,0x00,0x15,0xe3,
419 0xfc,0xff,0xff,0x0a,0x0c,0x30,0x84,0xe5,0x10,0x50,0x94,0xe5,0x01,0x00,0x15,0xe3,
420 0xfc,0xff,0xff,0x0a,0x08,0x50,0x94,0xe5,0x01,0x50,0xc1,0xe4,0x01,0x00,0x80,0xe2,
421 0x02,0x00,0x50,0xe1,0xf3,0xff,0xff,0x3a,0xc8,0x00,0xa0,0xe3,0x98,0xff,0xff,0xeb,
422 0x70,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,0x01,0x0c,0x00,0x02,0x01,0x02,0x00,0x02,
423 0x00,0x01,0x00,0x02
424 };
425
426 struct atmel_private {
427 void *card; /* Bus dependent stucture varies for PCcard */
428 int (*present_callback)(void *); /* And callback which uses it */
429 char firmware_id[32];
430 AtmelFWType firmware_type;
431 u8 *firmware;
432 int firmware_length;
433 struct timer_list management_timer;
434 struct net_device *dev;
435 struct device *sys_dev;
436 struct iw_statistics wstats;
437 struct net_device_stats stats; // device stats
438 spinlock_t irqlock, timerlock; // spinlocks
439 enum { BUS_TYPE_PCCARD, BUS_TYPE_PCI } bus_type;
440 enum {
441 CARD_TYPE_PARALLEL_FLASH,
442 CARD_TYPE_SPI_FLASH,
443 CARD_TYPE_EEPROM
444 } card_type;
445 int do_rx_crc; /* If we need to CRC incoming packets */
446 int probe_crc; /* set if we don't yet know */
447 int crc_ok_cnt, crc_ko_cnt; /* counters for probing */
448 u16 rx_desc_head;
449 u16 tx_desc_free, tx_desc_head, tx_desc_tail, tx_desc_previous;
450 u16 tx_free_mem, tx_buff_head, tx_buff_tail;
451
452 u16 frag_seq, frag_len, frag_no;
453 u8 frag_source[6];
454
455 u8 wep_is_on, default_key, exclude_unencrypted, encryption_level;
456 u8 group_cipher_suite, pairwise_cipher_suite;
457 u8 wep_keys[MAX_ENCRYPTION_KEYS][MAX_ENCRYPTION_KEY_SIZE];
458 int wep_key_len[MAX_ENCRYPTION_KEYS];
459 int use_wpa, radio_on_broken; /* firmware dependent stuff. */
460
461 u16 host_info_base;
462 struct host_info_struct {
463 /* NB this is matched to the hardware, don't change. */
464 u8 volatile int_status;
465 u8 volatile int_mask;
466 u8 volatile lockout_host;
467 u8 volatile lockout_mac;
468
469 u16 tx_buff_pos;
470 u16 tx_buff_size;
471 u16 tx_desc_pos;
472 u16 tx_desc_count;
473
474 u16 rx_buff_pos;
475 u16 rx_buff_size;
476 u16 rx_desc_pos;
477 u16 rx_desc_count;
478
479 u16 build_version;
480 u16 command_pos;
481
482 u16 major_version;
483 u16 minor_version;
484
485 u16 func_ctrl;
486 u16 mac_status;
487 u16 generic_IRQ_type;
488 u8 reserved[2];
489 } host_info;
490
491 enum {
492 STATION_STATE_SCANNING,
493 STATION_STATE_JOINNING,
494 STATION_STATE_AUTHENTICATING,
495 STATION_STATE_ASSOCIATING,
496 STATION_STATE_READY,
497 STATION_STATE_REASSOCIATING,
498 STATION_STATE_DOWN,
499 STATION_STATE_MGMT_ERROR
500 } station_state;
501
502 int operating_mode, power_mode;
503 time_t last_qual;
504 int beacons_this_sec;
505 int channel;
506 int reg_domain, config_reg_domain;
507 int tx_rate;
508 int auto_tx_rate;
509 int rts_threshold;
510 int frag_threshold;
511 int long_retry, short_retry;
512 int preamble;
513 int default_beacon_period, beacon_period, listen_interval;
514 int CurrentAuthentTransactionSeqNum, ExpectedAuthentTransactionSeqNum;
515 int AuthenticationRequestRetryCnt, AssociationRequestRetryCnt, ReAssociationRequestRetryCnt;
516 enum {
517 SITE_SURVEY_IDLE,
518 SITE_SURVEY_IN_PROGRESS,
519 SITE_SURVEY_COMPLETED
520 } site_survey_state;
521 time_t last_survey;
522
523 int station_was_associated, station_is_associated;
524 int fast_scan;
525
526 struct bss_info {
527 int channel;
528 int SSIDsize;
529 int RSSI;
530 int UsingWEP;
531 int preamble;
532 int beacon_period;
533 int BSStype;
534 u8 BSSID[6];
535 u8 SSID[MAX_SSID_LENGTH];
536 } BSSinfo[MAX_BSS_ENTRIES];
537 int BSS_list_entries, current_BSS;
538 int connect_to_any_BSS;
539 int SSID_size, new_SSID_size;
540 u8 CurrentBSSID[6], BSSID[6];
541 u8 SSID[MAX_SSID_LENGTH], new_SSID[MAX_SSID_LENGTH];
542 u64 last_beacon_timestamp;
543 u8 rx_buf[MAX_WIRELESS_BODY];
544 };
545
546 static u8 atmel_basic_rates[4] = {0x82,0x84,0x0b,0x16};
547
548 static const struct {
549 int reg_domain;
550 int min, max;
551 char *name;
552 } channel_table[] = { { REG_DOMAIN_FCC, 1, 11, "USA" },
553 { REG_DOMAIN_DOC, 1, 11, "Canada" },
554 { REG_DOMAIN_ETSI, 1, 13, "Europe" },
555 { REG_DOMAIN_SPAIN, 10, 11, "Spain" },
556 { REG_DOMAIN_FRANCE, 10, 13, "France" },
557 { REG_DOMAIN_MKK, 14, 14, "MKK" },
558 { REG_DOMAIN_MKK1, 1, 14, "MKK1" },
559 { REG_DOMAIN_ISRAEL, 3, 9, "Israel"} };
560
561 static void build_wpa_mib(struct atmel_private *priv);
562 static int atmel_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
563 static void atmel_copy_to_card(struct net_device *dev, u16 dest,
564 unsigned char *src, u16 len);
565 static void atmel_copy_to_host(struct net_device *dev, unsigned char *dest,
566 u16 src, u16 len);
567 static void atmel_set_gcr(struct net_device *dev, u16 mask);
568 static void atmel_clear_gcr(struct net_device *dev, u16 mask);
569 static int atmel_lock_mac(struct atmel_private *priv);
570 static void atmel_wmem32(struct atmel_private *priv, u16 pos, u32 data);
571 static void atmel_command_irq(struct atmel_private *priv);
572 static int atmel_validate_channel(struct atmel_private *priv, int channel);
573 static void atmel_management_frame(struct atmel_private *priv,
574 struct ieee80211_hdr_4addr *header,
575 u16 frame_len, u8 rssi);
576 static void atmel_management_timer(u_long a);
577 static void atmel_send_command(struct atmel_private *priv, int command,
578 void *cmd, int cmd_size);
579 static int atmel_send_command_wait(struct atmel_private *priv, int command,
580 void *cmd, int cmd_size);
581 static void atmel_transmit_management_frame(struct atmel_private *priv,
582 struct ieee80211_hdr_4addr *header,
583 u8 *body, int body_len);
584
585 static u8 atmel_get_mib8(struct atmel_private *priv, u8 type, u8 index);
586 static void atmel_set_mib8(struct atmel_private *priv, u8 type, u8 index,
587 u8 data);
588 static void atmel_set_mib16(struct atmel_private *priv, u8 type, u8 index,
589 u16 data);
590 static void atmel_set_mib(struct atmel_private *priv, u8 type, u8 index,
591 u8 *data, int data_len);
592 static void atmel_get_mib(struct atmel_private *priv, u8 type, u8 index,
593 u8 *data, int data_len);
594 static void atmel_scan(struct atmel_private *priv, int specific_ssid);
595 static void atmel_join_bss(struct atmel_private *priv, int bss_index);
596 static void atmel_smooth_qual(struct atmel_private *priv);
597 static void atmel_writeAR(struct net_device *dev, u16 data);
598 static int probe_atmel_card(struct net_device *dev);
599 static int reset_atmel_card(struct net_device *dev );
600 static void atmel_enter_state(struct atmel_private *priv, int new_state);
601 int atmel_open (struct net_device *dev);
602
603 static inline u16 atmel_hi(struct atmel_private *priv, u16 offset)
604 {
605 return priv->host_info_base + offset;
606 }
607
608 static inline u16 atmel_co(struct atmel_private *priv, u16 offset)
609 {
610 return priv->host_info.command_pos + offset;
611 }
612
613 static inline u16 atmel_rx(struct atmel_private *priv, u16 offset, u16 desc)
614 {
615 return priv->host_info.rx_desc_pos + (sizeof(struct rx_desc) * desc) + offset;
616 }
617
618 static inline u16 atmel_tx(struct atmel_private *priv, u16 offset, u16 desc)
619 {
620 return priv->host_info.tx_desc_pos + (sizeof(struct tx_desc) * desc) + offset;
621 }
622
623 static inline u8 atmel_read8(struct net_device *dev, u16 offset)
624 {
625 return inb(dev->base_addr + offset);
626 }
627
628 static inline void atmel_write8(struct net_device *dev, u16 offset, u8 data)
629 {
630 outb(data, dev->base_addr + offset);
631 }
632
633 static inline u16 atmel_read16(struct net_device *dev, u16 offset)
634 {
635 return inw(dev->base_addr + offset);
636 }
637
638 static inline void atmel_write16(struct net_device *dev, u16 offset, u16 data)
639 {
640 outw(data, dev->base_addr + offset);
641 }
642
643 static inline u8 atmel_rmem8(struct atmel_private *priv, u16 pos)
644 {
645 atmel_writeAR(priv->dev, pos);
646 return atmel_read8(priv->dev, DR);
647 }
648
649 static inline void atmel_wmem8(struct atmel_private *priv, u16 pos, u16 data)
650 {
651 atmel_writeAR(priv->dev, pos);
652 atmel_write8(priv->dev, DR, data);
653 }
654
655 static inline u16 atmel_rmem16(struct atmel_private *priv, u16 pos)
656 {
657 atmel_writeAR(priv->dev, pos);
658 return atmel_read16(priv->dev, DR);
659 }
660
661 static inline void atmel_wmem16(struct atmel_private *priv, u16 pos, u16 data)
662 {
663 atmel_writeAR(priv->dev, pos);
664 atmel_write16(priv->dev, DR, data);
665 }
666
667 static const struct iw_handler_def atmel_handler_def;
668
669 static void tx_done_irq(struct atmel_private *priv)
670 {
671 int i;
672
673 for (i = 0;
674 atmel_rmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_head)) == TX_DONE &&
675 i < priv->host_info.tx_desc_count;
676 i++) {
677 u8 status = atmel_rmem8(priv, atmel_tx(priv, TX_DESC_STATUS_OFFSET, priv->tx_desc_head));
678 u16 msdu_size = atmel_rmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, priv->tx_desc_head));
679 u8 type = atmel_rmem8(priv, atmel_tx(priv, TX_DESC_PACKET_TYPE_OFFSET, priv->tx_desc_head));
680
681 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_head), 0);
682
683 priv->tx_free_mem += msdu_size;
684 priv->tx_desc_free++;
685
686 if (priv->tx_buff_head + msdu_size > (priv->host_info.tx_buff_pos + priv->host_info.tx_buff_size))
687 priv->tx_buff_head = 0;
688 else
689 priv->tx_buff_head += msdu_size;
690
691 if (priv->tx_desc_head < (priv->host_info.tx_desc_count - 1))
692 priv->tx_desc_head++ ;
693 else
694 priv->tx_desc_head = 0;
695
696 if (type == TX_PACKET_TYPE_DATA) {
697 if (status == TX_STATUS_SUCCESS)
698 priv->stats.tx_packets++;
699 else
700 priv->stats.tx_errors++;
701 netif_wake_queue(priv->dev);
702 }
703 }
704 }
705
706 static u16 find_tx_buff(struct atmel_private *priv, u16 len)
707 {
708 u16 bottom_free = priv->host_info.tx_buff_size - priv->tx_buff_tail;
709
710 if (priv->tx_desc_free == 3 || priv->tx_free_mem < len)
711 return 0;
712
713 if (bottom_free >= len)
714 return priv->host_info.tx_buff_pos + priv->tx_buff_tail;
715
716 if (priv->tx_free_mem - bottom_free >= len) {
717 priv->tx_buff_tail = 0;
718 return priv->host_info.tx_buff_pos;
719 }
720
721 return 0;
722 }
723
724 static void tx_update_descriptor(struct atmel_private *priv, int is_bcast,
725 u16 len, u16 buff, u8 type)
726 {
727 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_POS_OFFSET, priv->tx_desc_tail), buff);
728 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, priv->tx_desc_tail), len);
729 if (!priv->use_wpa)
730 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_HOST_LENGTH_OFFSET, priv->tx_desc_tail), len);
731 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_PACKET_TYPE_OFFSET, priv->tx_desc_tail), type);
732 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_RATE_OFFSET, priv->tx_desc_tail), priv->tx_rate);
733 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_RETRY_OFFSET, priv->tx_desc_tail), 0);
734 if (priv->use_wpa) {
735 int cipher_type, cipher_length;
736 if (is_bcast) {
737 cipher_type = priv->group_cipher_suite;
738 if (cipher_type == CIPHER_SUITE_WEP_64 ||
739 cipher_type == CIPHER_SUITE_WEP_128)
740 cipher_length = 8;
741 else if (cipher_type == CIPHER_SUITE_TKIP)
742 cipher_length = 12;
743 else if (priv->pairwise_cipher_suite == CIPHER_SUITE_WEP_64 ||
744 priv->pairwise_cipher_suite == CIPHER_SUITE_WEP_128) {
745 cipher_type = priv->pairwise_cipher_suite;
746 cipher_length = 8;
747 } else {
748 cipher_type = CIPHER_SUITE_NONE;
749 cipher_length = 0;
750 }
751 } else {
752 cipher_type = priv->pairwise_cipher_suite;
753 if (cipher_type == CIPHER_SUITE_WEP_64 ||
754 cipher_type == CIPHER_SUITE_WEP_128)
755 cipher_length = 8;
756 else if (cipher_type == CIPHER_SUITE_TKIP)
757 cipher_length = 12;
758 else if (priv->group_cipher_suite == CIPHER_SUITE_WEP_64 ||
759 priv->group_cipher_suite == CIPHER_SUITE_WEP_128) {
760 cipher_type = priv->group_cipher_suite;
761 cipher_length = 8;
762 } else {
763 cipher_type = CIPHER_SUITE_NONE;
764 cipher_length = 0;
765 }
766 }
767
768 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_CIPHER_TYPE_OFFSET, priv->tx_desc_tail),
769 cipher_type);
770 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_CIPHER_LENGTH_OFFSET, priv->tx_desc_tail),
771 cipher_length);
772 }
773 atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, priv->tx_desc_tail), 0x80000000L);
774 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_tail), TX_FIRM_OWN);
775 if (priv->tx_desc_previous != priv->tx_desc_tail)
776 atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, priv->tx_desc_previous), 0);
777 priv->tx_desc_previous = priv->tx_desc_tail;
778 if (priv->tx_desc_tail < (priv->host_info.tx_desc_count - 1))
779 priv->tx_desc_tail++;
780 else
781 priv->tx_desc_tail = 0;
782 priv->tx_desc_free--;
783 priv->tx_free_mem -= len;
784 }
785
786 static int start_tx(struct sk_buff *skb, struct net_device *dev)
787 {
788 struct atmel_private *priv = netdev_priv(dev);
789 struct ieee80211_hdr_4addr header;
790 unsigned long flags;
791 u16 buff, frame_ctl, len = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
792 u8 SNAP_RFC1024[6] = {0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00};
793
794 if (priv->card && priv->present_callback &&
795 !(*priv->present_callback)(priv->card)) {
796 priv->stats.tx_errors++;
797 dev_kfree_skb(skb);
798 return 0;
799 }
800
801 if (priv->station_state != STATION_STATE_READY) {
802 priv->stats.tx_errors++;
803 dev_kfree_skb(skb);
804 return 0;
805 }
806
807 /* first ensure the timer func cannot run */
808 spin_lock_bh(&priv->timerlock);
809 /* then stop the hardware ISR */
810 spin_lock_irqsave(&priv->irqlock, flags);
811 /* nb doing the above in the opposite order will deadlock */
812
813 /* The Wireless Header is 30 bytes. In the Ethernet packet we "cut" the
814 12 first bytes (containing DA/SA) and put them in the appropriate
815 fields of the Wireless Header. Thus the packet length is then the
816 initial + 18 (+30-12) */
817
818 if (!(buff = find_tx_buff(priv, len + 18))) {
819 priv->stats.tx_dropped++;
820 spin_unlock_irqrestore(&priv->irqlock, flags);
821 spin_unlock_bh(&priv->timerlock);
822 netif_stop_queue(dev);
823 return 1;
824 }
825
826 frame_ctl = IEEE80211_FTYPE_DATA;
827 header.duration_id = 0;
828 header.seq_ctl = 0;
829 if (priv->wep_is_on)
830 frame_ctl |= IEEE80211_FCTL_PROTECTED;
831 if (priv->operating_mode == IW_MODE_ADHOC) {
832 memcpy(&header.addr1, skb->data, 6);
833 memcpy(&header.addr2, dev->dev_addr, 6);
834 memcpy(&header.addr3, priv->BSSID, 6);
835 } else {
836 frame_ctl |= IEEE80211_FCTL_TODS;
837 memcpy(&header.addr1, priv->CurrentBSSID, 6);
838 memcpy(&header.addr2, dev->dev_addr, 6);
839 memcpy(&header.addr3, skb->data, 6);
840 }
841
842 if (priv->use_wpa)
843 memcpy(&header.addr4, SNAP_RFC1024, 6);
844
845 header.frame_ctl = cpu_to_le16(frame_ctl);
846 /* Copy the wireless header into the card */
847 atmel_copy_to_card(dev, buff, (unsigned char *)&header, DATA_FRAME_WS_HEADER_SIZE);
848 /* Copy the packet sans its 802.3 header addresses which have been replaced */
849 atmel_copy_to_card(dev, buff + DATA_FRAME_WS_HEADER_SIZE, skb->data + 12, len - 12);
850 priv->tx_buff_tail += len - 12 + DATA_FRAME_WS_HEADER_SIZE;
851
852 /* low bit of first byte of destination tells us if broadcast */
853 tx_update_descriptor(priv, *(skb->data) & 0x01, len + 18, buff, TX_PACKET_TYPE_DATA);
854 dev->trans_start = jiffies;
855 priv->stats.tx_bytes += len;
856
857 spin_unlock_irqrestore(&priv->irqlock, flags);
858 spin_unlock_bh(&priv->timerlock);
859 dev_kfree_skb(skb);
860
861 return 0;
862 }
863
864 static void atmel_transmit_management_frame(struct atmel_private *priv,
865 struct ieee80211_hdr_4addr *header,
866 u8 *body, int body_len)
867 {
868 u16 buff;
869 int len = MGMT_FRAME_BODY_OFFSET + body_len;
870
871 if (!(buff = find_tx_buff(priv, len)))
872 return;
873
874 atmel_copy_to_card(priv->dev, buff, (u8 *)header, MGMT_FRAME_BODY_OFFSET);
875 atmel_copy_to_card(priv->dev, buff + MGMT_FRAME_BODY_OFFSET, body, body_len);
876 priv->tx_buff_tail += len;
877 tx_update_descriptor(priv, header->addr1[0] & 0x01, len, buff, TX_PACKET_TYPE_MGMT);
878 }
879
880 static void fast_rx_path(struct atmel_private *priv,
881 struct ieee80211_hdr_4addr *header,
882 u16 msdu_size, u16 rx_packet_loc, u32 crc)
883 {
884 /* fast path: unfragmented packet copy directly into skbuf */
885 u8 mac4[6];
886 struct sk_buff *skb;
887 unsigned char *skbp;
888
889 /* get the final, mac 4 header field, this tells us encapsulation */
890 atmel_copy_to_host(priv->dev, mac4, rx_packet_loc + 24, 6);
891 msdu_size -= 6;
892
893 if (priv->do_rx_crc) {
894 crc = crc32_le(crc, mac4, 6);
895 msdu_size -= 4;
896 }
897
898 if (!(skb = dev_alloc_skb(msdu_size + 14))) {
899 priv->stats.rx_dropped++;
900 return;
901 }
902
903 skb_reserve(skb, 2);
904 skbp = skb_put(skb, msdu_size + 12);
905 atmel_copy_to_host(priv->dev, skbp + 12, rx_packet_loc + 30, msdu_size);
906
907 if (priv->do_rx_crc) {
908 u32 netcrc;
909 crc = crc32_le(crc, skbp + 12, msdu_size);
910 atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + 30 + msdu_size, 4);
911 if ((crc ^ 0xffffffff) != netcrc) {
912 priv->stats.rx_crc_errors++;
913 dev_kfree_skb(skb);
914 return;
915 }
916 }
917
918 memcpy(skbp, header->addr1, 6); /* destination address */
919 if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS)
920 memcpy(&skbp[6], header->addr3, 6);
921 else
922 memcpy(&skbp[6], header->addr2, 6); /* source address */
923
924 priv->dev->last_rx = jiffies;
925 skb->dev = priv->dev;
926 skb->protocol = eth_type_trans(skb, priv->dev);
927 skb->ip_summed = CHECKSUM_NONE;
928 netif_rx(skb);
929 priv->stats.rx_bytes += 12 + msdu_size;
930 priv->stats.rx_packets++;
931 }
932
933 /* Test to see if the packet in card memory at packet_loc has a valid CRC
934 It doesn't matter that this is slow: it is only used to proble the first few
935 packets. */
936 static int probe_crc(struct atmel_private *priv, u16 packet_loc, u16 msdu_size)
937 {
938 int i = msdu_size - 4;
939 u32 netcrc, crc = 0xffffffff;
940
941 if (msdu_size < 4)
942 return 0;
943
944 atmel_copy_to_host(priv->dev, (void *)&netcrc, packet_loc + i, 4);
945
946 atmel_writeAR(priv->dev, packet_loc);
947 while (i--) {
948 u8 octet = atmel_read8(priv->dev, DR);
949 crc = crc32_le(crc, &octet, 1);
950 }
951
952 return (crc ^ 0xffffffff) == netcrc;
953 }
954
955 static void frag_rx_path(struct atmel_private *priv,
956 struct ieee80211_hdr_4addr *header,
957 u16 msdu_size, u16 rx_packet_loc, u32 crc, u16 seq_no,
958 u8 frag_no, int more_frags)
959 {
960 u8 mac4[6];
961 u8 source[6];
962 struct sk_buff *skb;
963
964 if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS)
965 memcpy(source, header->addr3, 6);
966 else
967 memcpy(source, header->addr2, 6);
968
969 rx_packet_loc += 24; /* skip header */
970
971 if (priv->do_rx_crc)
972 msdu_size -= 4;
973
974 if (frag_no == 0) { /* first fragment */
975 atmel_copy_to_host(priv->dev, mac4, rx_packet_loc, 6);
976 msdu_size -= 6;
977 rx_packet_loc += 6;
978
979 if (priv->do_rx_crc)
980 crc = crc32_le(crc, mac4, 6);
981
982 priv->frag_seq = seq_no;
983 priv->frag_no = 1;
984 priv->frag_len = msdu_size;
985 memcpy(priv->frag_source, source, 6);
986 memcpy(&priv->rx_buf[6], source, 6);
987 memcpy(priv->rx_buf, header->addr1, 6);
988
989 atmel_copy_to_host(priv->dev, &priv->rx_buf[12], rx_packet_loc, msdu_size);
990
991 if (priv->do_rx_crc) {
992 u32 netcrc;
993 crc = crc32_le(crc, &priv->rx_buf[12], msdu_size);
994 atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + msdu_size, 4);
995 if ((crc ^ 0xffffffff) != netcrc) {
996 priv->stats.rx_crc_errors++;
997 memset(priv->frag_source, 0xff, 6);
998 }
999 }
1000
1001 } else if (priv->frag_no == frag_no &&
1002 priv->frag_seq == seq_no &&
1003 memcmp(priv->frag_source, source, 6) == 0) {
1004
1005 atmel_copy_to_host(priv->dev, &priv->rx_buf[12 + priv->frag_len],
1006 rx_packet_loc, msdu_size);
1007 if (priv->do_rx_crc) {
1008 u32 netcrc;
1009 crc = crc32_le(crc,
1010 &priv->rx_buf[12 + priv->frag_len],
1011 msdu_size);
1012 atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + msdu_size, 4);
1013 if ((crc ^ 0xffffffff) != netcrc) {
1014 priv->stats.rx_crc_errors++;
1015 memset(priv->frag_source, 0xff, 6);
1016 more_frags = 1; /* don't send broken assembly */
1017 }
1018 }
1019
1020 priv->frag_len += msdu_size;
1021 priv->frag_no++;
1022
1023 if (!more_frags) { /* last one */
1024 memset(priv->frag_source, 0xff, 6);
1025 if (!(skb = dev_alloc_skb(priv->frag_len + 14))) {
1026 priv->stats.rx_dropped++;
1027 } else {
1028 skb_reserve(skb, 2);
1029 memcpy(skb_put(skb, priv->frag_len + 12),
1030 priv->rx_buf,
1031 priv->frag_len + 12);
1032 priv->dev->last_rx = jiffies;
1033 skb->dev = priv->dev;
1034 skb->protocol = eth_type_trans(skb, priv->dev);
1035 skb->ip_summed = CHECKSUM_NONE;
1036 netif_rx(skb);
1037 priv->stats.rx_bytes += priv->frag_len + 12;
1038 priv->stats.rx_packets++;
1039 }
1040 }
1041 } else
1042 priv->wstats.discard.fragment++;
1043 }
1044
1045 static void rx_done_irq(struct atmel_private *priv)
1046 {
1047 int i;
1048 struct ieee80211_hdr_4addr header;
1049
1050 for (i = 0;
1051 atmel_rmem8(priv, atmel_rx(priv, RX_DESC_FLAGS_OFFSET, priv->rx_desc_head)) == RX_DESC_FLAG_VALID &&
1052 i < priv->host_info.rx_desc_count;
1053 i++) {
1054
1055 u16 msdu_size, rx_packet_loc, frame_ctl, seq_control;
1056 u8 status = atmel_rmem8(priv, atmel_rx(priv, RX_DESC_STATUS_OFFSET, priv->rx_desc_head));
1057 u32 crc = 0xffffffff;
1058
1059 if (status != RX_STATUS_SUCCESS) {
1060 if (status == 0xc1) /* determined by experiment */
1061 priv->wstats.discard.nwid++;
1062 else
1063 priv->stats.rx_errors++;
1064 goto next;
1065 }
1066
1067 msdu_size = atmel_rmem16(priv, atmel_rx(priv, RX_DESC_MSDU_SIZE_OFFSET, priv->rx_desc_head));
1068 rx_packet_loc = atmel_rmem16(priv, atmel_rx(priv, RX_DESC_MSDU_POS_OFFSET, priv->rx_desc_head));
1069
1070 if (msdu_size < 30) {
1071 priv->stats.rx_errors++;
1072 goto next;
1073 }
1074
1075 /* Get header as far as end of seq_ctl */
1076 atmel_copy_to_host(priv->dev, (char *)&header, rx_packet_loc, 24);
1077 frame_ctl = le16_to_cpu(header.frame_ctl);
1078 seq_control = le16_to_cpu(header.seq_ctl);
1079
1080 /* probe for CRC use here if needed once five packets have
1081 arrived with the same crc status, we assume we know what's
1082 happening and stop probing */
1083 if (priv->probe_crc) {
1084 if (!priv->wep_is_on || !(frame_ctl & IEEE80211_FCTL_PROTECTED)) {
1085 priv->do_rx_crc = probe_crc(priv, rx_packet_loc, msdu_size);
1086 } else {
1087 priv->do_rx_crc = probe_crc(priv, rx_packet_loc + 24, msdu_size - 24);
1088 }
1089 if (priv->do_rx_crc) {
1090 if (priv->crc_ok_cnt++ > 5)
1091 priv->probe_crc = 0;
1092 } else {
1093 if (priv->crc_ko_cnt++ > 5)
1094 priv->probe_crc = 0;
1095 }
1096 }
1097
1098 /* don't CRC header when WEP in use */
1099 if (priv->do_rx_crc && (!priv->wep_is_on || !(frame_ctl & IEEE80211_FCTL_PROTECTED))) {
1100 crc = crc32_le(0xffffffff, (unsigned char *)&header, 24);
1101 }
1102 msdu_size -= 24; /* header */
1103
1104 if ((frame_ctl & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) {
1105 int more_fragments = frame_ctl & IEEE80211_FCTL_MOREFRAGS;
1106 u8 packet_fragment_no = seq_control & IEEE80211_SCTL_FRAG;
1107 u16 packet_sequence_no = (seq_control & IEEE80211_SCTL_SEQ) >> 4;
1108
1109 if (!more_fragments && packet_fragment_no == 0) {
1110 fast_rx_path(priv, &header, msdu_size, rx_packet_loc, crc);
1111 } else {
1112 frag_rx_path(priv, &header, msdu_size, rx_packet_loc, crc,
1113 packet_sequence_no, packet_fragment_no, more_fragments);
1114 }
1115 }
1116
1117 if ((frame_ctl & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
1118 /* copy rest of packet into buffer */
1119 atmel_copy_to_host(priv->dev, (unsigned char *)&priv->rx_buf, rx_packet_loc + 24, msdu_size);
1120
1121 /* we use the same buffer for frag reassembly and control packets */
1122 memset(priv->frag_source, 0xff, 6);
1123
1124 if (priv->do_rx_crc) {
1125 /* last 4 octets is crc */
1126 msdu_size -= 4;
1127 crc = crc32_le(crc, (unsigned char *)&priv->rx_buf, msdu_size);
1128 if ((crc ^ 0xffffffff) != (*((u32 *)&priv->rx_buf[msdu_size]))) {
1129 priv->stats.rx_crc_errors++;
1130 goto next;
1131 }
1132 }
1133
1134 atmel_management_frame(priv, &header, msdu_size,
1135 atmel_rmem8(priv, atmel_rx(priv, RX_DESC_RSSI_OFFSET, priv->rx_desc_head)));
1136 }
1137
1138 next:
1139 /* release descriptor */
1140 atmel_wmem8(priv, atmel_rx(priv, RX_DESC_FLAGS_OFFSET, priv->rx_desc_head), RX_DESC_FLAG_CONSUMED);
1141
1142 if (priv->rx_desc_head < (priv->host_info.rx_desc_count - 1))
1143 priv->rx_desc_head++;
1144 else
1145 priv->rx_desc_head = 0;
1146 }
1147 }
1148
1149 static irqreturn_t service_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1150 {
1151 struct net_device *dev = (struct net_device *) dev_id;
1152 struct atmel_private *priv = netdev_priv(dev);
1153 u8 isr;
1154 int i = -1;
1155 static u8 irq_order[] = {
1156 ISR_OUT_OF_RANGE,
1157 ISR_RxCOMPLETE,
1158 ISR_TxCOMPLETE,
1159 ISR_RxFRAMELOST,
1160 ISR_FATAL_ERROR,
1161 ISR_COMMAND_COMPLETE,
1162 ISR_IBSS_MERGE,
1163 ISR_GENERIC_IRQ
1164 };
1165
1166 if (priv->card && priv->present_callback &&
1167 !(*priv->present_callback)(priv->card))
1168 return IRQ_HANDLED;
1169
1170 /* In this state upper-level code assumes it can mess with
1171 the card unhampered by interrupts which may change register state.
1172 Note that even though the card shouldn't generate interrupts
1173 the inturrupt line may be shared. This allows card setup
1174 to go on without disabling interrupts for a long time. */
1175 if (priv->station_state == STATION_STATE_DOWN)
1176 return IRQ_NONE;
1177
1178 atmel_clear_gcr(dev, GCR_ENINT); /* disable interrupts */
1179
1180 while (1) {
1181 if (!atmel_lock_mac(priv)) {
1182 /* failed to contact card */
1183 printk(KERN_ALERT "%s: failed to contact MAC.\n", dev->name);
1184 return IRQ_HANDLED;
1185 }
1186
1187 isr = atmel_rmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET));
1188 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
1189
1190 if (!isr) {
1191 atmel_set_gcr(dev, GCR_ENINT); /* enable interrupts */
1192 return i == -1 ? IRQ_NONE : IRQ_HANDLED;
1193 }
1194
1195 atmel_set_gcr(dev, GCR_ACKINT); /* acknowledge interrupt */
1196
1197 for (i = 0; i < sizeof(irq_order)/sizeof(u8); i++)
1198 if (isr & irq_order[i])
1199 break;
1200
1201 if (!atmel_lock_mac(priv)) {
1202 /* failed to contact card */
1203 printk(KERN_ALERT "%s: failed to contact MAC.\n", dev->name);
1204 return IRQ_HANDLED;
1205 }
1206
1207 isr = atmel_rmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET));
1208 isr ^= irq_order[i];
1209 atmel_wmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET), isr);
1210 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
1211
1212 switch (irq_order[i]) {
1213
1214 case ISR_OUT_OF_RANGE:
1215 if (priv->operating_mode == IW_MODE_INFRA &&
1216 priv->station_state == STATION_STATE_READY) {
1217 priv->station_is_associated = 0;
1218 atmel_scan(priv, 1);
1219 }
1220 break;
1221
1222 case ISR_RxFRAMELOST:
1223 priv->wstats.discard.misc++;
1224 /* fall through */
1225 case ISR_RxCOMPLETE:
1226 rx_done_irq(priv);
1227 break;
1228
1229 case ISR_TxCOMPLETE:
1230 tx_done_irq(priv);
1231 break;
1232
1233 case ISR_FATAL_ERROR:
1234 printk(KERN_ALERT "%s: *** FATAL error interrupt ***\n", dev->name);
1235 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
1236 break;
1237
1238 case ISR_COMMAND_COMPLETE:
1239 atmel_command_irq(priv);
1240 break;
1241
1242 case ISR_IBSS_MERGE:
1243 atmel_get_mib(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_BSSID_POS,
1244 priv->CurrentBSSID, 6);
1245 /* The WPA stuff cares about the current AP address */
1246 if (priv->use_wpa)
1247 build_wpa_mib(priv);
1248 break;
1249 case ISR_GENERIC_IRQ:
1250 printk(KERN_INFO "%s: Generic_irq received.\n", dev->name);
1251 break;
1252 }
1253 }
1254 }
1255
1256 static struct net_device_stats *atmel_get_stats(struct net_device *dev)
1257 {
1258 struct atmel_private *priv = netdev_priv(dev);
1259 return &priv->stats;
1260 }
1261
1262 static struct iw_statistics *atmel_get_wireless_stats(struct net_device *dev)
1263 {
1264 struct atmel_private *priv = netdev_priv(dev);
1265
1266 /* update the link quality here in case we are seeing no beacons
1267 at all to drive the process */
1268 atmel_smooth_qual(priv);
1269
1270 priv->wstats.status = priv->station_state;
1271
1272 if (priv->operating_mode == IW_MODE_INFRA) {
1273 if (priv->station_state != STATION_STATE_READY) {
1274 priv->wstats.qual.qual = 0;
1275 priv->wstats.qual.level = 0;
1276 priv->wstats.qual.updated = (IW_QUAL_QUAL_INVALID
1277 | IW_QUAL_LEVEL_INVALID);
1278 }
1279 priv->wstats.qual.noise = 0;
1280 priv->wstats.qual.updated |= IW_QUAL_NOISE_INVALID;
1281 } else {
1282 /* Quality levels cannot be determined in ad-hoc mode,
1283 because we can 'hear' more that one remote station. */
1284 priv->wstats.qual.qual = 0;
1285 priv->wstats.qual.level = 0;
1286 priv->wstats.qual.noise = 0;
1287 priv->wstats.qual.updated = IW_QUAL_QUAL_INVALID
1288 | IW_QUAL_LEVEL_INVALID
1289 | IW_QUAL_NOISE_INVALID;
1290 priv->wstats.miss.beacon = 0;
1291 }
1292
1293 return &priv->wstats;
1294 }
1295
1296 static int atmel_change_mtu(struct net_device *dev, int new_mtu)
1297 {
1298 if ((new_mtu < 68) || (new_mtu > 2312))
1299 return -EINVAL;
1300 dev->mtu = new_mtu;
1301 return 0;
1302 }
1303
1304 static int atmel_set_mac_address(struct net_device *dev, void *p)
1305 {
1306 struct sockaddr *addr = p;
1307
1308 memcpy (dev->dev_addr, addr->sa_data, dev->addr_len);
1309 return atmel_open(dev);
1310 }
1311
1312 EXPORT_SYMBOL(atmel_open);
1313
1314 int atmel_open(struct net_device *dev)
1315 {
1316 struct atmel_private *priv = netdev_priv(dev);
1317 int i, channel;
1318
1319 /* any scheduled timer is no longer needed and might screw things up.. */
1320 del_timer_sync(&priv->management_timer);
1321
1322 /* Interrupts will not touch the card once in this state... */
1323 priv->station_state = STATION_STATE_DOWN;
1324
1325 if (priv->new_SSID_size) {
1326 memcpy(priv->SSID, priv->new_SSID, priv->new_SSID_size);
1327 priv->SSID_size = priv->new_SSID_size;
1328 priv->new_SSID_size = 0;
1329 }
1330 priv->BSS_list_entries = 0;
1331
1332 priv->AuthenticationRequestRetryCnt = 0;
1333 priv->AssociationRequestRetryCnt = 0;
1334 priv->ReAssociationRequestRetryCnt = 0;
1335 priv->CurrentAuthentTransactionSeqNum = 0x0001;
1336 priv->ExpectedAuthentTransactionSeqNum = 0x0002;
1337
1338 priv->site_survey_state = SITE_SURVEY_IDLE;
1339 priv->station_is_associated = 0;
1340
1341 if (!reset_atmel_card(dev))
1342 return -EAGAIN;
1343
1344 if (priv->config_reg_domain) {
1345 priv->reg_domain = priv->config_reg_domain;
1346 atmel_set_mib8(priv, Phy_Mib_Type, PHY_MIB_REG_DOMAIN_POS, priv->reg_domain);
1347 } else {
1348 priv->reg_domain = atmel_get_mib8(priv, Phy_Mib_Type, PHY_MIB_REG_DOMAIN_POS);
1349 for (i = 0; i < sizeof(channel_table)/sizeof(channel_table[0]); i++)
1350 if (priv->reg_domain == channel_table[i].reg_domain)
1351 break;
1352 if (i == sizeof(channel_table)/sizeof(channel_table[0])) {
1353 priv->reg_domain = REG_DOMAIN_MKK1;
1354 printk(KERN_ALERT "%s: failed to get regulatory domain: assuming MKK1.\n", dev->name);
1355 }
1356 }
1357
1358 if ((channel = atmel_validate_channel(priv, priv->channel)))
1359 priv->channel = channel;
1360
1361 /* this moves station_state on.... */
1362 atmel_scan(priv, 1);
1363
1364 atmel_set_gcr(priv->dev, GCR_ENINT); /* enable interrupts */
1365 return 0;
1366 }
1367
1368 static int atmel_close(struct net_device *dev)
1369 {
1370 struct atmel_private *priv = netdev_priv(dev);
1371
1372 /* Send event to userspace that we are disassociating */
1373 if (priv->station_state == STATION_STATE_READY) {
1374 union iwreq_data wrqu;
1375
1376 wrqu.data.length = 0;
1377 wrqu.data.flags = 0;
1378 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
1379 memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
1380 wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL);
1381 }
1382
1383 atmel_enter_state(priv, STATION_STATE_DOWN);
1384
1385 if (priv->bus_type == BUS_TYPE_PCCARD)
1386 atmel_write16(dev, GCR, 0x0060);
1387 atmel_write16(dev, GCR, 0x0040);
1388 return 0;
1389 }
1390
1391 static int atmel_validate_channel(struct atmel_private *priv, int channel)
1392 {
1393 /* check that channel is OK, if so return zero,
1394 else return suitable default channel */
1395 int i;
1396
1397 for (i = 0; i < sizeof(channel_table)/sizeof(channel_table[0]); i++)
1398 if (priv->reg_domain == channel_table[i].reg_domain) {
1399 if (channel >= channel_table[i].min &&
1400 channel <= channel_table[i].max)
1401 return 0;
1402 else
1403 return channel_table[i].min;
1404 }
1405 return 0;
1406 }
1407
1408 static int atmel_proc_output (char *buf, struct atmel_private *priv)
1409 {
1410 int i;
1411 char *p = buf;
1412 char *s, *r, *c;
1413
1414 p += sprintf(p, "Driver version:\t\t%d.%d\n",
1415 DRIVER_MAJOR, DRIVER_MINOR);
1416
1417 if (priv->station_state != STATION_STATE_DOWN) {
1418 p += sprintf(p, "Firmware version:\t%d.%d build %d\n"
1419 "Firmware location:\t",
1420 priv->host_info.major_version,
1421 priv->host_info.minor_version,
1422 priv->host_info.build_version);
1423
1424 if (priv->card_type != CARD_TYPE_EEPROM)
1425 p += sprintf(p, "on card\n");
1426 else if (priv->firmware)
1427 p += sprintf(p, "%s loaded by host\n",
1428 priv->firmware_id);
1429 else
1430 p += sprintf(p, "%s loaded by hotplug\n",
1431 priv->firmware_id);
1432
1433 switch (priv->card_type) {
1434 case CARD_TYPE_PARALLEL_FLASH: c = "Parallel flash"; break;
1435 case CARD_TYPE_SPI_FLASH: c = "SPI flash\n"; break;
1436 case CARD_TYPE_EEPROM: c = "EEPROM"; break;
1437 default: c = "<unknown>";
1438 }
1439
1440 r = "<unknown>";
1441 for (i = 0; i < sizeof(channel_table)/sizeof(channel_table[0]); i++)
1442 if (priv->reg_domain == channel_table[i].reg_domain)
1443 r = channel_table[i].name;
1444
1445 p += sprintf(p, "MAC memory type:\t%s\n", c);
1446 p += sprintf(p, "Regulatory domain:\t%s\n", r);
1447 p += sprintf(p, "Host CRC checking:\t%s\n",
1448 priv->do_rx_crc ? "On" : "Off");
1449 p += sprintf(p, "WPA-capable firmware:\t%s\n",
1450 priv->use_wpa ? "Yes" : "No");
1451 }
1452
1453 switch(priv->station_state) {
1454 case STATION_STATE_SCANNING: s = "Scanning"; break;
1455 case STATION_STATE_JOINNING: s = "Joining"; break;
1456 case STATION_STATE_AUTHENTICATING: s = "Authenticating"; break;
1457 case STATION_STATE_ASSOCIATING: s = "Associating"; break;
1458 case STATION_STATE_READY: s = "Ready"; break;
1459 case STATION_STATE_REASSOCIATING: s = "Reassociating"; break;
1460 case STATION_STATE_MGMT_ERROR: s = "Management error"; break;
1461 case STATION_STATE_DOWN: s = "Down"; break;
1462 default: s = "<unknown>";
1463 }
1464
1465 p += sprintf(p, "Current state:\t\t%s\n", s);
1466 return p - buf;
1467 }
1468
1469 static int atmel_read_proc(char *page, char **start, off_t off,
1470 int count, int *eof, void *data)
1471 {
1472 struct atmel_private *priv = data;
1473 int len = atmel_proc_output (page, priv);
1474 if (len <= off+count) *eof = 1;
1475 *start = page + off;
1476 len -= off;
1477 if (len>count) len = count;
1478 if (len<0) len = 0;
1479 return len;
1480 }
1481
1482 struct net_device *init_atmel_card(unsigned short irq, unsigned long port,
1483 const AtmelFWType fw_type,
1484 struct device *sys_dev,
1485 int (*card_present)(void *), void *card)
1486 {
1487 struct proc_dir_entry *ent;
1488 struct net_device *dev;
1489 struct atmel_private *priv;
1490 int rc;
1491
1492 /* Create the network device object. */
1493 dev = alloc_etherdev(sizeof(*priv));
1494 if (!dev) {
1495 printk(KERN_ERR "atmel: Couldn't alloc_etherdev\n");
1496 return NULL;
1497 }
1498 if (dev_alloc_name(dev, dev->name) < 0) {
1499 printk(KERN_ERR "atmel: Couldn't get name!\n");
1500 goto err_out_free;
1501 }
1502
1503 priv = netdev_priv(dev);
1504 priv->dev = dev;
1505 priv->sys_dev = sys_dev;
1506 priv->present_callback = card_present;
1507 priv->card = card;
1508 priv->firmware = NULL;
1509 priv->firmware_id[0] = '\0';
1510 priv->firmware_type = fw_type;
1511 if (firmware) /* module parameter */
1512 strcpy(priv->firmware_id, firmware);
1513 priv->bus_type = card_present ? BUS_TYPE_PCCARD : BUS_TYPE_PCI;
1514 priv->station_state = STATION_STATE_DOWN;
1515 priv->do_rx_crc = 0;
1516 /* For PCMCIA cards, some chips need CRC, some don't
1517 so we have to probe. */
1518 if (priv->bus_type == BUS_TYPE_PCCARD) {
1519 priv->probe_crc = 1;
1520 priv->crc_ok_cnt = priv->crc_ko_cnt = 0;
1521 } else
1522 priv->probe_crc = 0;
1523 memset(&priv->stats, 0, sizeof(priv->stats));
1524 memset(&priv->wstats, 0, sizeof(priv->wstats));
1525 priv->last_qual = jiffies;
1526 priv->last_beacon_timestamp = 0;
1527 memset(priv->frag_source, 0xff, sizeof(priv->frag_source));
1528 memset(priv->BSSID, 0, 6);
1529 priv->CurrentBSSID[0] = 0xFF; /* Initialize to something invalid.... */
1530 priv->station_was_associated = 0;
1531
1532 priv->last_survey = jiffies;
1533 priv->preamble = LONG_PREAMBLE;
1534 priv->operating_mode = IW_MODE_INFRA;
1535 priv->connect_to_any_BSS = 0;
1536 priv->config_reg_domain = 0;
1537 priv->reg_domain = 0;
1538 priv->tx_rate = 3;
1539 priv->auto_tx_rate = 1;
1540 priv->channel = 4;
1541 priv->power_mode = 0;
1542 priv->SSID[0] = '\0';
1543 priv->SSID_size = 0;
1544 priv->new_SSID_size = 0;
1545 priv->frag_threshold = 2346;
1546 priv->rts_threshold = 2347;
1547 priv->short_retry = 7;
1548 priv->long_retry = 4;
1549
1550 priv->wep_is_on = 0;
1551 priv->default_key = 0;
1552 priv->encryption_level = 0;
1553 priv->exclude_unencrypted = 0;
1554 priv->group_cipher_suite = priv->pairwise_cipher_suite = CIPHER_SUITE_NONE;
1555 priv->use_wpa = 0;
1556 memset(priv->wep_keys, 0, sizeof(priv->wep_keys));
1557 memset(priv->wep_key_len, 0, sizeof(priv->wep_key_len));
1558
1559 priv->default_beacon_period = priv->beacon_period = 100;
1560 priv->listen_interval = 1;
1561
1562 init_timer(&priv->management_timer);
1563 spin_lock_init(&priv->irqlock);
1564 spin_lock_init(&priv->timerlock);
1565 priv->management_timer.function = atmel_management_timer;
1566 priv->management_timer.data = (unsigned long) dev;
1567
1568 dev->open = atmel_open;
1569 dev->stop = atmel_close;
1570 dev->change_mtu = atmel_change_mtu;
1571 dev->set_mac_address = atmel_set_mac_address;
1572 dev->hard_start_xmit = start_tx;
1573 dev->get_stats = atmel_get_stats;
1574 dev->wireless_handlers = (struct iw_handler_def *)&atmel_handler_def;
1575 dev->do_ioctl = atmel_ioctl;
1576 dev->irq = irq;
1577 dev->base_addr = port;
1578
1579 SET_NETDEV_DEV(dev, sys_dev);
1580
1581 if ((rc = request_irq(dev->irq, service_interrupt, SA_SHIRQ, dev->name, dev))) {
1582 printk(KERN_ERR "%s: register interrupt %d failed, rc %d\n", dev->name, irq, rc);
1583 goto err_out_free;
1584 }
1585
1586 if (!request_region(dev->base_addr, 32,
1587 priv->bus_type == BUS_TYPE_PCCARD ? "atmel_cs" : "atmel_pci")) {
1588 goto err_out_irq;
1589 }
1590
1591 if (register_netdev(dev))
1592 goto err_out_res;
1593
1594 if (!probe_atmel_card(dev)){
1595 unregister_netdev(dev);
1596 goto err_out_res;
1597 }
1598
1599 netif_carrier_off(dev);
1600
1601 ent = create_proc_read_entry ("driver/atmel", 0, NULL, atmel_read_proc, priv);
1602 if (!ent)
1603 printk(KERN_WARNING "atmel: unable to create /proc entry.\n");
1604
1605 printk(KERN_INFO "%s: Atmel at76c50x. Version %d.%d. MAC %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
1606 dev->name, DRIVER_MAJOR, DRIVER_MINOR,
1607 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1608 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5] );
1609
1610 SET_MODULE_OWNER(dev);
1611 return dev;
1612
1613 err_out_res:
1614 release_region( dev->base_addr, 32);
1615 err_out_irq:
1616 free_irq(dev->irq, dev);
1617 err_out_free:
1618 free_netdev(dev);
1619 return NULL;
1620 }
1621
1622 EXPORT_SYMBOL(init_atmel_card);
1623
1624 void stop_atmel_card(struct net_device *dev)
1625 {
1626 struct atmel_private *priv = netdev_priv(dev);
1627
1628 /* put a brick on it... */
1629 if (priv->bus_type == BUS_TYPE_PCCARD)
1630 atmel_write16(dev, GCR, 0x0060);
1631 atmel_write16(dev, GCR, 0x0040);
1632
1633 del_timer_sync(&priv->management_timer);
1634 unregister_netdev(dev);
1635 remove_proc_entry("driver/atmel", NULL);
1636 free_irq(dev->irq, dev);
1637 kfree(priv->firmware);
1638 release_region(dev->base_addr, 32);
1639 free_netdev(dev);
1640 }
1641
1642 EXPORT_SYMBOL(stop_atmel_card);
1643
1644 static int atmel_set_essid(struct net_device *dev,
1645 struct iw_request_info *info,
1646 struct iw_point *dwrq,
1647 char *extra)
1648 {
1649 struct atmel_private *priv = netdev_priv(dev);
1650
1651 /* Check if we asked for `any' */
1652 if(dwrq->flags == 0) {
1653 priv->connect_to_any_BSS = 1;
1654 } else {
1655 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1656
1657 priv->connect_to_any_BSS = 0;
1658
1659 /* Check the size of the string */
1660 if (dwrq->length > MAX_SSID_LENGTH + 1)
1661 return -E2BIG;
1662 if (index != 0)
1663 return -EINVAL;
1664
1665 memcpy(priv->new_SSID, extra, dwrq->length - 1);
1666 priv->new_SSID_size = dwrq->length - 1;
1667 }
1668
1669 return -EINPROGRESS;
1670 }
1671
1672 static int atmel_get_essid(struct net_device *dev,
1673 struct iw_request_info *info,
1674 struct iw_point *dwrq,
1675 char *extra)
1676 {
1677 struct atmel_private *priv = netdev_priv(dev);
1678
1679 /* Get the current SSID */
1680 if (priv->new_SSID_size != 0) {
1681 memcpy(extra, priv->new_SSID, priv->new_SSID_size);
1682 extra[priv->new_SSID_size] = '\0';
1683 dwrq->length = priv->new_SSID_size;
1684 } else {
1685 memcpy(extra, priv->SSID, priv->SSID_size);
1686 extra[priv->SSID_size] = '\0';
1687 dwrq->length = priv->SSID_size;
1688 }
1689
1690 dwrq->flags = !priv->connect_to_any_BSS; /* active */
1691
1692 return 0;
1693 }
1694
1695 static int atmel_get_wap(struct net_device *dev,
1696 struct iw_request_info *info,
1697 struct sockaddr *awrq,
1698 char *extra)
1699 {
1700 struct atmel_private *priv = netdev_priv(dev);
1701 memcpy(awrq->sa_data, priv->CurrentBSSID, 6);
1702 awrq->sa_family = ARPHRD_ETHER;
1703
1704 return 0;
1705 }
1706
1707 static int atmel_set_encode(struct net_device *dev,
1708 struct iw_request_info *info,
1709 struct iw_point *dwrq,
1710 char *extra)
1711 {
1712 struct atmel_private *priv = netdev_priv(dev);
1713
1714 /* Basic checking: do we have a key to set ?
1715 * Note : with the new API, it's impossible to get a NULL pointer.
1716 * Therefore, we need to check a key size == 0 instead.
1717 * New version of iwconfig properly set the IW_ENCODE_NOKEY flag
1718 * when no key is present (only change flags), but older versions
1719 * don't do it. - Jean II */
1720 if (dwrq->length > 0) {
1721 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1722 int current_index = priv->default_key;
1723 /* Check the size of the key */
1724 if (dwrq->length > 13) {
1725 return -EINVAL;
1726 }
1727 /* Check the index (none -> use current) */
1728 if (index < 0 || index >= 4)
1729 index = current_index;
1730 else
1731 priv->default_key = index;
1732 /* Set the length */
1733 if (dwrq->length > 5)
1734 priv->wep_key_len[index] = 13;
1735 else
1736 if (dwrq->length > 0)
1737 priv->wep_key_len[index] = 5;
1738 else
1739 /* Disable the key */
1740 priv->wep_key_len[index] = 0;
1741 /* Check if the key is not marked as invalid */
1742 if(!(dwrq->flags & IW_ENCODE_NOKEY)) {
1743 /* Cleanup */
1744 memset(priv->wep_keys[index], 0, 13);
1745 /* Copy the key in the driver */
1746 memcpy(priv->wep_keys[index], extra, dwrq->length);
1747 }
1748 /* WE specify that if a valid key is set, encryption
1749 * should be enabled (user may turn it off later)
1750 * This is also how "iwconfig ethX key on" works */
1751 if (index == current_index &&
1752 priv->wep_key_len[index] > 0) {
1753 priv->wep_is_on = 1;
1754 priv->exclude_unencrypted = 1;
1755 if (priv->wep_key_len[index] > 5) {
1756 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128;
1757 priv->encryption_level = 2;
1758 } else {
1759 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64;
1760 priv->encryption_level = 1;
1761 }
1762 }
1763 } else {
1764 /* Do we want to just set the transmit key index ? */
1765 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1766 if (index >= 0 && index < 4) {
1767 priv->default_key = index;
1768 } else
1769 /* Don't complain if only change the mode */
1770 if (!dwrq->flags & IW_ENCODE_MODE) {
1771 return -EINVAL;
1772 }
1773 }
1774 /* Read the flags */
1775 if (dwrq->flags & IW_ENCODE_DISABLED) {
1776 priv->wep_is_on = 0;
1777 priv->encryption_level = 0;
1778 priv->pairwise_cipher_suite = CIPHER_SUITE_NONE;
1779 } else {
1780 priv->wep_is_on = 1;
1781 if (priv->wep_key_len[priv->default_key] > 5) {
1782 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128;
1783 priv->encryption_level = 2;
1784 } else {
1785 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64;
1786 priv->encryption_level = 1;
1787 }
1788 }
1789 if (dwrq->flags & IW_ENCODE_RESTRICTED)
1790 priv->exclude_unencrypted = 1;
1791 if(dwrq->flags & IW_ENCODE_OPEN)
1792 priv->exclude_unencrypted = 0;
1793
1794 return -EINPROGRESS; /* Call commit handler */
1795 }
1796
1797 static int atmel_get_encode(struct net_device *dev,
1798 struct iw_request_info *info,
1799 struct iw_point *dwrq,
1800 char *extra)
1801 {
1802 struct atmel_private *priv = netdev_priv(dev);
1803 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1804
1805 if (!priv->wep_is_on)
1806 dwrq->flags = IW_ENCODE_DISABLED;
1807 else {
1808 if (priv->exclude_unencrypted)
1809 dwrq->flags = IW_ENCODE_RESTRICTED;
1810 else
1811 dwrq->flags = IW_ENCODE_OPEN;
1812 }
1813 /* Which key do we want ? -1 -> tx index */
1814 if (index < 0 || index >= 4)
1815 index = priv->default_key;
1816 dwrq->flags |= index + 1;
1817 /* Copy the key to the user buffer */
1818 dwrq->length = priv->wep_key_len[index];
1819 if (dwrq->length > 16) {
1820 dwrq->length=0;
1821 } else {
1822 memset(extra, 0, 16);
1823 memcpy(extra, priv->wep_keys[index], dwrq->length);
1824 }
1825
1826 return 0;
1827 }
1828
1829 static int atmel_set_encodeext(struct net_device *dev,
1830 struct iw_request_info *info,
1831 union iwreq_data *wrqu,
1832 char *extra)
1833 {
1834 struct atmel_private *priv = netdev_priv(dev);
1835 struct iw_point *encoding = &wrqu->encoding;
1836 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
1837 int idx, key_len, alg = ext->alg, set_key = 1;
1838
1839 /* Determine and validate the key index */
1840 idx = encoding->flags & IW_ENCODE_INDEX;
1841 if (idx) {
1842 if (idx < 1 || idx > WEP_KEYS)
1843 return -EINVAL;
1844 idx--;
1845 } else
1846 idx = priv->default_key;
1847
1848 if (encoding->flags & IW_ENCODE_DISABLED)
1849 alg = IW_ENCODE_ALG_NONE;
1850
1851 if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) {
1852 priv->default_key = idx;
1853 set_key = ext->key_len > 0 ? 1 : 0;
1854 }
1855
1856 if (set_key) {
1857 /* Set the requested key first */
1858 switch (alg) {
1859 case IW_ENCODE_ALG_NONE:
1860 priv->wep_is_on = 0;
1861 priv->encryption_level = 0;
1862 priv->pairwise_cipher_suite = CIPHER_SUITE_NONE;
1863 break;
1864 case IW_ENCODE_ALG_WEP:
1865 if (ext->key_len > 5) {
1866 priv->wep_key_len[idx] = 13;
1867 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128;
1868 priv->encryption_level = 2;
1869 } else if (ext->key_len > 0) {
1870 priv->wep_key_len[idx] = 5;
1871 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64;
1872 priv->encryption_level = 1;
1873 } else {
1874 return -EINVAL;
1875 }
1876 priv->wep_is_on = 1;
1877 memset(priv->wep_keys[idx], 0, 13);
1878 key_len = min ((int)ext->key_len, priv->wep_key_len[idx]);
1879 memcpy(priv->wep_keys[idx], ext->key, key_len);
1880 break;
1881 default:
1882 return -EINVAL;
1883 }
1884 }
1885
1886 return -EINPROGRESS;
1887 }
1888
1889 static int atmel_get_encodeext(struct net_device *dev,
1890 struct iw_request_info *info,
1891 union iwreq_data *wrqu,
1892 char *extra)
1893 {
1894 struct atmel_private *priv = netdev_priv(dev);
1895 struct iw_point *encoding = &wrqu->encoding;
1896 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
1897 int idx, max_key_len;
1898
1899 max_key_len = encoding->length - sizeof(*ext);
1900 if (max_key_len < 0)
1901 return -EINVAL;
1902
1903 idx = encoding->flags & IW_ENCODE_INDEX;
1904 if (idx) {
1905 if (idx < 1 || idx > WEP_KEYS)
1906 return -EINVAL;
1907 idx--;
1908 } else
1909 idx = priv->default_key;
1910
1911 encoding->flags = idx + 1;
1912 memset(ext, 0, sizeof(*ext));
1913
1914 if (!priv->wep_is_on) {
1915 ext->alg = IW_ENCODE_ALG_NONE;
1916 ext->key_len = 0;
1917 encoding->flags |= IW_ENCODE_DISABLED;
1918 } else {
1919 if (priv->encryption_level > 0)
1920 ext->alg = IW_ENCODE_ALG_WEP;
1921 else
1922 return -EINVAL;
1923
1924 ext->key_len = priv->wep_key_len[idx];
1925 memcpy(ext->key, priv->wep_keys[idx], ext->key_len);
1926 encoding->flags |= IW_ENCODE_ENABLED;
1927 }
1928
1929 return 0;
1930 }
1931
1932 static int atmel_set_auth(struct net_device *dev,
1933 struct iw_request_info *info,
1934 union iwreq_data *wrqu, char *extra)
1935 {
1936 struct atmel_private *priv = netdev_priv(dev);
1937 struct iw_param *param = &wrqu->param;
1938
1939 switch (param->flags & IW_AUTH_INDEX) {
1940 case IW_AUTH_WPA_VERSION:
1941 case IW_AUTH_CIPHER_PAIRWISE:
1942 case IW_AUTH_CIPHER_GROUP:
1943 case IW_AUTH_KEY_MGMT:
1944 case IW_AUTH_RX_UNENCRYPTED_EAPOL:
1945 case IW_AUTH_PRIVACY_INVOKED:
1946 /*
1947 * atmel does not use these parameters
1948 */
1949 break;
1950
1951 case IW_AUTH_DROP_UNENCRYPTED:
1952 priv->exclude_unencrypted = param->value ? 1 : 0;
1953 break;
1954
1955 case IW_AUTH_80211_AUTH_ALG: {
1956 if (param->value & IW_AUTH_ALG_SHARED_KEY) {
1957 priv->exclude_unencrypted = 1;
1958 } else if (param->value & IW_AUTH_ALG_OPEN_SYSTEM) {
1959 priv->exclude_unencrypted = 0;
1960 } else
1961 return -EINVAL;
1962 break;
1963 }
1964
1965 case IW_AUTH_WPA_ENABLED:
1966 /* Silently accept disable of WPA */
1967 if (param->value > 0)
1968 return -EOPNOTSUPP;
1969 break;
1970
1971 default:
1972 return -EOPNOTSUPP;
1973 }
1974 return -EINPROGRESS;
1975 }
1976
1977 static int atmel_get_auth(struct net_device *dev,
1978 struct iw_request_info *info,
1979 union iwreq_data *wrqu, char *extra)
1980 {
1981 struct atmel_private *priv = netdev_priv(dev);
1982 struct iw_param *param = &wrqu->param;
1983
1984 switch (param->flags & IW_AUTH_INDEX) {
1985 case IW_AUTH_DROP_UNENCRYPTED:
1986 param->value = priv->exclude_unencrypted;
1987 break;
1988
1989 case IW_AUTH_80211_AUTH_ALG:
1990 if (priv->exclude_unencrypted == 1)
1991 param->value = IW_AUTH_ALG_SHARED_KEY;
1992 else
1993 param->value = IW_AUTH_ALG_OPEN_SYSTEM;
1994 break;
1995
1996 case IW_AUTH_WPA_ENABLED:
1997 param->value = 0;
1998 break;
1999
2000 default:
2001 return -EOPNOTSUPP;
2002 }
2003 return 0;
2004 }
2005
2006
2007 static int atmel_get_name(struct net_device *dev,
2008 struct iw_request_info *info,
2009 char *cwrq,
2010 char *extra)
2011 {
2012 strcpy(cwrq, "IEEE 802.11-DS");
2013 return 0;
2014 }
2015
2016 static int atmel_set_rate(struct net_device *dev,
2017 struct iw_request_info *info,
2018 struct iw_param *vwrq,
2019 char *extra)
2020 {
2021 struct atmel_private *priv = netdev_priv(dev);
2022
2023 if (vwrq->fixed == 0) {
2024 priv->tx_rate = 3;
2025 priv->auto_tx_rate = 1;
2026 } else {
2027 priv->auto_tx_rate = 0;
2028
2029 /* Which type of value ? */
2030 if ((vwrq->value < 4) && (vwrq->value >= 0)) {
2031 /* Setting by rate index */
2032 priv->tx_rate = vwrq->value;
2033 } else {
2034 /* Setting by frequency value */
2035 switch (vwrq->value) {
2036 case 1000000: priv->tx_rate = 0; break;
2037 case 2000000: priv->tx_rate = 1; break;
2038 case 5500000: priv->tx_rate = 2; break;
2039 case 11000000: priv->tx_rate = 3; break;
2040 default: return -EINVAL;
2041 }
2042 }
2043 }
2044
2045 return -EINPROGRESS;
2046 }
2047
2048 static int atmel_set_mode(struct net_device *dev,
2049 struct iw_request_info *info,
2050 __u32 *uwrq,
2051 char *extra)
2052 {
2053 struct atmel_private *priv = netdev_priv(dev);
2054
2055 if (*uwrq != IW_MODE_ADHOC && *uwrq != IW_MODE_INFRA)
2056 return -EINVAL;
2057
2058 priv->operating_mode = *uwrq;
2059 return -EINPROGRESS;
2060 }
2061
2062 static int atmel_get_mode(struct net_device *dev,
2063 struct iw_request_info *info,
2064 __u32 *uwrq,
2065 char *extra)
2066 {
2067 struct atmel_private *priv = netdev_priv(dev);
2068
2069 *uwrq = priv->operating_mode;
2070 return 0;
2071 }
2072
2073 static int atmel_get_rate(struct net_device *dev,
2074 struct iw_request_info *info,
2075 struct iw_param *vwrq,
2076 char *extra)
2077 {
2078 struct atmel_private *priv = netdev_priv(dev);
2079
2080 if (priv->auto_tx_rate) {
2081 vwrq->fixed = 0;
2082 vwrq->value = 11000000;
2083 } else {
2084 vwrq->fixed = 1;
2085 switch(priv->tx_rate) {
2086 case 0: vwrq->value = 1000000; break;
2087 case 1: vwrq->value = 2000000; break;
2088 case 2: vwrq->value = 5500000; break;
2089 case 3: vwrq->value = 11000000; break;
2090 }
2091 }
2092 return 0;
2093 }
2094
2095 static int atmel_set_power(struct net_device *dev,
2096 struct iw_request_info *info,
2097 struct iw_param *vwrq,
2098 char *extra)
2099 {
2100 struct atmel_private *priv = netdev_priv(dev);
2101 priv->power_mode = vwrq->disabled ? 0 : 1;
2102 return -EINPROGRESS;
2103 }
2104
2105 static int atmel_get_power(struct net_device *dev,
2106 struct iw_request_info *info,
2107 struct iw_param *vwrq,
2108 char *extra)
2109 {
2110 struct atmel_private *priv = netdev_priv(dev);
2111 vwrq->disabled = priv->power_mode ? 0 : 1;
2112 vwrq->flags = IW_POWER_ON;
2113 return 0;
2114 }
2115
2116 static int atmel_set_retry(struct net_device *dev,
2117 struct iw_request_info *info,
2118 struct iw_param *vwrq,
2119 char *extra)
2120 {
2121 struct atmel_private *priv = netdev_priv(dev);
2122
2123 if (!vwrq->disabled && (vwrq->flags & IW_RETRY_LIMIT)) {
2124 if (vwrq->flags & IW_RETRY_MAX)
2125 priv->long_retry = vwrq->value;
2126 else if (vwrq->flags & IW_RETRY_MIN)
2127 priv->short_retry = vwrq->value;
2128 else {
2129 /* No modifier : set both */
2130 priv->long_retry = vwrq->value;
2131 priv->short_retry = vwrq->value;
2132 }
2133 return -EINPROGRESS;
2134 }
2135
2136 return -EINVAL;
2137 }
2138
2139 static int atmel_get_retry(struct net_device *dev,
2140 struct iw_request_info *info,
2141 struct iw_param *vwrq,
2142 char *extra)
2143 {
2144 struct atmel_private *priv = netdev_priv(dev);
2145
2146 vwrq->disabled = 0; /* Can't be disabled */
2147
2148 /* Note : by default, display the min retry number */
2149 if (vwrq->flags & IW_RETRY_MAX) {
2150 vwrq->flags = IW_RETRY_LIMIT | IW_RETRY_MAX;
2151 vwrq->value = priv->long_retry;
2152 } else {
2153 vwrq->flags = IW_RETRY_LIMIT;
2154 vwrq->value = priv->short_retry;
2155 if (priv->long_retry != priv->short_retry)
2156 vwrq->flags |= IW_RETRY_MIN;
2157 }
2158
2159 return 0;
2160 }
2161
2162 static int atmel_set_rts(struct net_device *dev,
2163 struct iw_request_info *info,
2164 struct iw_param *vwrq,
2165 char *extra)
2166 {
2167 struct atmel_private *priv = netdev_priv(dev);
2168 int rthr = vwrq->value;
2169
2170 if (vwrq->disabled)
2171 rthr = 2347;
2172 if ((rthr < 0) || (rthr > 2347)) {
2173 return -EINVAL;
2174 }
2175 priv->rts_threshold = rthr;
2176
2177 return -EINPROGRESS; /* Call commit handler */
2178 }
2179
2180 static int atmel_get_rts(struct net_device *dev,
2181 struct iw_request_info *info,
2182 struct iw_param *vwrq,
2183 char *extra)
2184 {
2185 struct atmel_private *priv = netdev_priv(dev);
2186
2187 vwrq->value = priv->rts_threshold;
2188 vwrq->disabled = (vwrq->value >= 2347);
2189 vwrq->fixed = 1;
2190
2191 return 0;
2192 }
2193
2194 static int atmel_set_frag(struct net_device *dev,
2195 struct iw_request_info *info,
2196 struct iw_param *vwrq,
2197 char *extra)
2198 {
2199 struct atmel_private *priv = netdev_priv(dev);
2200 int fthr = vwrq->value;
2201
2202 if (vwrq->disabled)
2203 fthr = 2346;
2204 if ((fthr < 256) || (fthr > 2346)) {
2205 return -EINVAL;
2206 }
2207 fthr &= ~0x1; /* Get an even value - is it really needed ??? */
2208 priv->frag_threshold = fthr;
2209
2210 return -EINPROGRESS; /* Call commit handler */
2211 }
2212
2213 static int atmel_get_frag(struct net_device *dev,
2214 struct iw_request_info *info,
2215 struct iw_param *vwrq,
2216 char *extra)
2217 {
2218 struct atmel_private *priv = netdev_priv(dev);
2219
2220 vwrq->value = priv->frag_threshold;
2221 vwrq->disabled = (vwrq->value >= 2346);
2222 vwrq->fixed = 1;
2223
2224 return 0;
2225 }
2226
2227 static const long frequency_list[] = { 2412, 2417, 2422, 2427, 2432, 2437, 2442,
2228 2447, 2452, 2457, 2462, 2467, 2472, 2484 };
2229
2230 static int atmel_set_freq(struct net_device *dev,
2231 struct iw_request_info *info,
2232 struct iw_freq *fwrq,
2233 char *extra)
2234 {
2235 struct atmel_private *priv = netdev_priv(dev);
2236 int rc = -EINPROGRESS; /* Call commit handler */
2237
2238 /* If setting by frequency, convert to a channel */
2239 if ((fwrq->e == 1) &&
2240 (fwrq->m >= (int) 241200000) &&
2241 (fwrq->m <= (int) 248700000)) {
2242 int f = fwrq->m / 100000;
2243 int c = 0;
2244 while ((c < 14) && (f != frequency_list[c]))
2245 c++;
2246 /* Hack to fall through... */
2247 fwrq->e = 0;
2248 fwrq->m = c + 1;
2249 }
2250 /* Setting by channel number */
2251 if ((fwrq->m > 1000) || (fwrq->e > 0))
2252 rc = -EOPNOTSUPP;
2253 else {
2254 int channel = fwrq->m;
2255 if (atmel_validate_channel(priv, channel) == 0) {
2256 priv->channel = channel;
2257 } else {
2258 rc = -EINVAL;
2259 }
2260 }
2261 return rc;
2262 }
2263
2264 static int atmel_get_freq(struct net_device *dev,
2265 struct iw_request_info *info,
2266 struct iw_freq *fwrq,
2267 char *extra)
2268 {
2269 struct atmel_private *priv = netdev_priv(dev);
2270
2271 fwrq->m = priv->channel;
2272 fwrq->e = 0;
2273 return 0;
2274 }
2275
2276 static int atmel_set_scan(struct net_device *dev,
2277 struct iw_request_info *info,
2278 struct iw_param *vwrq,
2279 char *extra)
2280 {
2281 struct atmel_private *priv = netdev_priv(dev);
2282 unsigned long flags;
2283
2284 /* Note : you may have realised that, as this is a SET operation,
2285 * this is privileged and therefore a normal user can't
2286 * perform scanning.
2287 * This is not an error, while the device perform scanning,
2288 * traffic doesn't flow, so it's a perfect DoS...
2289 * Jean II */
2290
2291 if (priv->station_state == STATION_STATE_DOWN)
2292 return -EAGAIN;
2293
2294 /* Timeout old surveys. */
2295 if ((jiffies - priv->last_survey) > (20 * HZ))
2296 priv->site_survey_state = SITE_SURVEY_IDLE;
2297 priv->last_survey = jiffies;
2298
2299 /* Initiate a scan command */
2300 if (priv->site_survey_state == SITE_SURVEY_IN_PROGRESS)
2301 return -EBUSY;
2302
2303 del_timer_sync(&priv->management_timer);
2304 spin_lock_irqsave(&priv->irqlock, flags);
2305
2306 priv->site_survey_state = SITE_SURVEY_IN_PROGRESS;
2307 priv->fast_scan = 0;
2308 atmel_scan(priv, 0);
2309 spin_unlock_irqrestore(&priv->irqlock, flags);
2310
2311 return 0;
2312 }
2313
2314 static int atmel_get_scan(struct net_device *dev,
2315 struct iw_request_info *info,
2316 struct iw_point *dwrq,
2317 char *extra)
2318 {
2319 struct atmel_private *priv = netdev_priv(dev);
2320 int i;
2321 char *current_ev = extra;
2322 struct iw_event iwe;
2323
2324 if (priv->site_survey_state != SITE_SURVEY_COMPLETED)
2325 return -EAGAIN;
2326
2327 for (i = 0; i < priv->BSS_list_entries; i++) {
2328 iwe.cmd = SIOCGIWAP;
2329 iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
2330 memcpy(iwe.u.ap_addr.sa_data, priv->BSSinfo[i].BSSID, 6);
2331 current_ev = iwe_stream_add_event(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, IW_EV_ADDR_LEN);
2332
2333 iwe.u.data.length = priv->BSSinfo[i].SSIDsize;
2334 if (iwe.u.data.length > 32)
2335 iwe.u.data.length = 32;
2336 iwe.cmd = SIOCGIWESSID;
2337 iwe.u.data.flags = 1;
2338 current_ev = iwe_stream_add_point(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, priv->BSSinfo[i].SSID);
2339
2340 iwe.cmd = SIOCGIWMODE;
2341 iwe.u.mode = priv->BSSinfo[i].BSStype;
2342 current_ev = iwe_stream_add_event(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, IW_EV_UINT_LEN);
2343
2344 iwe.cmd = SIOCGIWFREQ;
2345 iwe.u.freq.m = priv->BSSinfo[i].channel;
2346 iwe.u.freq.e = 0;
2347 current_ev = iwe_stream_add_event(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, IW_EV_FREQ_LEN);
2348
2349 iwe.cmd = SIOCGIWENCODE;
2350 if (priv->BSSinfo[i].UsingWEP)
2351 iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
2352 else
2353 iwe.u.data.flags = IW_ENCODE_DISABLED;
2354 iwe.u.data.length = 0;
2355 current_ev = iwe_stream_add_point(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, NULL);
2356 }
2357
2358 /* Length of data */
2359 dwrq->length = (current_ev - extra);
2360 dwrq->flags = 0;
2361
2362 return 0;
2363 }
2364
2365 static int atmel_get_range(struct net_device *dev,
2366 struct iw_request_info *info,
2367 struct iw_point *dwrq,
2368 char *extra)
2369 {
2370 struct atmel_private *priv = netdev_priv(dev);
2371 struct iw_range *range = (struct iw_range *) extra;
2372 int k, i, j;
2373
2374 dwrq->length = sizeof(struct iw_range);
2375 memset(range, 0, sizeof(struct iw_range));
2376 range->min_nwid = 0x0000;
2377 range->max_nwid = 0x0000;
2378 range->num_channels = 0;
2379 for (j = 0; j < sizeof(channel_table)/sizeof(channel_table[0]); j++)
2380 if (priv->reg_domain == channel_table[j].reg_domain) {
2381 range->num_channels = channel_table[j].max - channel_table[j].min + 1;
2382 break;
2383 }
2384 if (range->num_channels != 0) {
2385 for (k = 0, i = channel_table[j].min; i <= channel_table[j].max; i++) {
2386 range->freq[k].i = i; /* List index */
2387 range->freq[k].m = frequency_list[i - 1] * 100000;
2388 range->freq[k++].e = 1; /* Values in table in MHz -> * 10^5 * 10 */
2389 }
2390 range->num_frequency = k;
2391 }
2392
2393 range->max_qual.qual = 100;
2394 range->max_qual.level = 100;
2395 range->max_qual.noise = 0;
2396 range->max_qual.updated = IW_QUAL_NOISE_INVALID;
2397
2398 range->avg_qual.qual = 50;
2399 range->avg_qual.level = 50;
2400 range->avg_qual.noise = 0;
2401 range->avg_qual.updated = IW_QUAL_NOISE_INVALID;
2402
2403 range->sensitivity = 0;
2404
2405 range->bitrate[0] = 1000000;
2406 range->bitrate[1] = 2000000;
2407 range->bitrate[2] = 5500000;
2408 range->bitrate[3] = 11000000;
2409 range->num_bitrates = 4;
2410
2411 range->min_rts = 0;
2412 range->max_rts = 2347;
2413 range->min_frag = 256;
2414 range->max_frag = 2346;
2415
2416 range->encoding_size[0] = 5;
2417 range->encoding_size[1] = 13;
2418 range->num_encoding_sizes = 2;
2419 range->max_encoding_tokens = 4;
2420
2421 range->pmp_flags = IW_POWER_ON;
2422 range->pmt_flags = IW_POWER_ON;
2423 range->pm_capa = 0;
2424
2425 range->we_version_source = WIRELESS_EXT;
2426 range->we_version_compiled = WIRELESS_EXT;
2427 range->retry_capa = IW_RETRY_LIMIT ;
2428 range->retry_flags = IW_RETRY_LIMIT;
2429 range->r_time_flags = 0;
2430 range->min_retry = 1;
2431 range->max_retry = 65535;
2432
2433 return 0;
2434 }
2435
2436 static int atmel_set_wap(struct net_device *dev,
2437 struct iw_request_info *info,
2438 struct sockaddr *awrq,
2439 char *extra)
2440 {
2441 struct atmel_private *priv = netdev_priv(dev);
2442 int i;
2443 static const u8 any[] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
2444 static const u8 off[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
2445 unsigned long flags;
2446
2447 if (awrq->sa_family != ARPHRD_ETHER)
2448 return -EINVAL;
2449
2450 if (!memcmp(any, awrq->sa_data, 6) ||
2451 !memcmp(off, awrq->sa_data, 6)) {
2452 del_timer_sync(&priv->management_timer);
2453 spin_lock_irqsave(&priv->irqlock, flags);
2454 atmel_scan(priv, 1);
2455 spin_unlock_irqrestore(&priv->irqlock, flags);
2456 return 0;
2457 }
2458
2459 for (i = 0; i < priv->BSS_list_entries; i++) {
2460 if (memcmp(priv->BSSinfo[i].BSSID, awrq->sa_data, 6) == 0) {
2461 if (!priv->wep_is_on && priv->BSSinfo[i].UsingWEP) {
2462 return -EINVAL;
2463 } else if (priv->wep_is_on && !priv->BSSinfo[i].UsingWEP) {
2464 return -EINVAL;
2465 } else {
2466 del_timer_sync(&priv->management_timer);
2467 spin_lock_irqsave(&priv->irqlock, flags);
2468 atmel_join_bss(priv, i);
2469 spin_unlock_irqrestore(&priv->irqlock, flags);
2470 return 0;
2471 }
2472 }
2473 }
2474
2475 return -EINVAL;
2476 }
2477
2478 static int atmel_config_commit(struct net_device *dev,
2479 struct iw_request_info *info, /* NULL */
2480 void *zwrq, /* NULL */
2481 char *extra) /* NULL */
2482 {
2483 return atmel_open(dev);
2484 }
2485
2486 static const iw_handler atmel_handler[] =
2487 {
2488 (iw_handler) atmel_config_commit, /* SIOCSIWCOMMIT */
2489 (iw_handler) atmel_get_name, /* SIOCGIWNAME */
2490 (iw_handler) NULL, /* SIOCSIWNWID */
2491 (iw_handler) NULL, /* SIOCGIWNWID */
2492 (iw_handler) atmel_set_freq, /* SIOCSIWFREQ */
2493 (iw_handler) atmel_get_freq, /* SIOCGIWFREQ */
2494 (iw_handler) atmel_set_mode, /* SIOCSIWMODE */
2495 (iw_handler) atmel_get_mode, /* SIOCGIWMODE */
2496 (iw_handler) NULL, /* SIOCSIWSENS */
2497 (iw_handler) NULL, /* SIOCGIWSENS */
2498 (iw_handler) NULL, /* SIOCSIWRANGE */
2499 (iw_handler) atmel_get_range, /* SIOCGIWRANGE */
2500 (iw_handler) NULL, /* SIOCSIWPRIV */
2501 (iw_handler) NULL, /* SIOCGIWPRIV */
2502 (iw_handler) NULL, /* SIOCSIWSTATS */
2503 (iw_handler) NULL, /* SIOCGIWSTATS */
2504 (iw_handler) NULL, /* SIOCSIWSPY */
2505 (iw_handler) NULL, /* SIOCGIWSPY */
2506 (iw_handler) NULL, /* -- hole -- */
2507 (iw_handler) NULL, /* -- hole -- */
2508 (iw_handler) atmel_set_wap, /* SIOCSIWAP */
2509 (iw_handler) atmel_get_wap, /* SIOCGIWAP */
2510 (iw_handler) NULL, /* -- hole -- */
2511 (iw_handler) NULL, /* SIOCGIWAPLIST */
2512 (iw_handler) atmel_set_scan, /* SIOCSIWSCAN */
2513 (iw_handler) atmel_get_scan, /* SIOCGIWSCAN */
2514 (iw_handler) atmel_set_essid, /* SIOCSIWESSID */
2515 (iw_handler) atmel_get_essid, /* SIOCGIWESSID */
2516 (iw_handler) NULL, /* SIOCSIWNICKN */
2517 (iw_handler) NULL, /* SIOCGIWNICKN */
2518 (iw_handler) NULL, /* -- hole -- */
2519 (iw_handler) NULL, /* -- hole -- */
2520 (iw_handler) atmel_set_rate, /* SIOCSIWRATE */
2521 (iw_handler) atmel_get_rate, /* SIOCGIWRATE */
2522 (iw_handler) atmel_set_rts, /* SIOCSIWRTS */
2523 (iw_handler) atmel_get_rts, /* SIOCGIWRTS */
2524 (iw_handler) atmel_set_frag, /* SIOCSIWFRAG */
2525 (iw_handler) atmel_get_frag, /* SIOCGIWFRAG */
2526 (iw_handler) NULL, /* SIOCSIWTXPOW */
2527 (iw_handler) NULL, /* SIOCGIWTXPOW */
2528 (iw_handler) atmel_set_retry, /* SIOCSIWRETRY */
2529 (iw_handler) atmel_get_retry, /* SIOCGIWRETRY */
2530 (iw_handler) atmel_set_encode, /* SIOCSIWENCODE */
2531 (iw_handler) atmel_get_encode, /* SIOCGIWENCODE */
2532 (iw_handler) atmel_set_power, /* SIOCSIWPOWER */
2533 (iw_handler) atmel_get_power, /* SIOCGIWPOWER */
2534 (iw_handler) NULL, /* -- hole -- */
2535 (iw_handler) NULL, /* -- hole -- */
2536 (iw_handler) NULL, /* SIOCSIWGENIE */
2537 (iw_handler) NULL, /* SIOCGIWGENIE */
2538 (iw_handler) atmel_set_auth, /* SIOCSIWAUTH */
2539 (iw_handler) atmel_get_auth, /* SIOCGIWAUTH */
2540 (iw_handler) atmel_set_encodeext, /* SIOCSIWENCODEEXT */
2541 (iw_handler) atmel_get_encodeext, /* SIOCGIWENCODEEXT */
2542 (iw_handler) NULL, /* SIOCSIWPMKSA */
2543 };
2544
2545 static const iw_handler atmel_private_handler[] =
2546 {
2547 NULL, /* SIOCIWFIRSTPRIV */
2548 };
2549
2550 typedef struct atmel_priv_ioctl {
2551 char id[32];
2552 unsigned char __user *data;
2553 unsigned short len;
2554 } atmel_priv_ioctl;
2555
2556 #define ATMELFWL SIOCIWFIRSTPRIV
2557 #define ATMELIDIFC ATMELFWL + 1
2558 #define ATMELRD ATMELFWL + 2
2559 #define ATMELMAGIC 0x51807
2560 #define REGDOMAINSZ 20
2561
2562 static const struct iw_priv_args atmel_private_args[] = {
2563 {
2564 .cmd = ATMELFWL,
2565 .set_args = IW_PRIV_TYPE_BYTE
2566 | IW_PRIV_SIZE_FIXED
2567 | sizeof (atmel_priv_ioctl),
2568 .get_args = IW_PRIV_TYPE_NONE,
2569 .name = "atmelfwl"
2570 }, {
2571 .cmd = ATMELIDIFC,
2572 .set_args = IW_PRIV_TYPE_NONE,
2573 .get_args = IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1,
2574 .name = "atmelidifc"
2575 }, {
2576 .cmd = ATMELRD,
2577 .set_args = IW_PRIV_TYPE_CHAR | REGDOMAINSZ,
2578 .get_args = IW_PRIV_TYPE_NONE,
2579 .name = "regdomain"
2580 },
2581 };
2582
2583 static const struct iw_handler_def atmel_handler_def =
2584 {
2585 .num_standard = sizeof(atmel_handler)/sizeof(iw_handler),
2586 .num_private = sizeof(atmel_private_handler)/sizeof(iw_handler),
2587 .num_private_args = sizeof(atmel_private_args)/sizeof(struct iw_priv_args),
2588 .standard = (iw_handler *) atmel_handler,
2589 .private = (iw_handler *) atmel_private_handler,
2590 .private_args = (struct iw_priv_args *) atmel_private_args,
2591 .get_wireless_stats = atmel_get_wireless_stats
2592 };
2593
2594 static int atmel_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2595 {
2596 int i, rc = 0;
2597 struct atmel_private *priv = netdev_priv(dev);
2598 atmel_priv_ioctl com;
2599 struct iwreq *wrq = (struct iwreq *) rq;
2600 unsigned char *new_firmware;
2601 char domain[REGDOMAINSZ + 1];
2602
2603 switch (cmd) {
2604 case ATMELIDIFC:
2605 wrq->u.param.value = ATMELMAGIC;
2606 break;
2607
2608 case ATMELFWL:
2609 if (copy_from_user(&com, rq->ifr_data, sizeof(com))) {
2610 rc = -EFAULT;
2611 break;
2612 }
2613
2614 if (!capable(CAP_NET_ADMIN)) {
2615 rc = -EPERM;
2616 break;
2617 }
2618
2619 if (!(new_firmware = kmalloc(com.len, GFP_KERNEL))) {
2620 rc = -ENOMEM;
2621 break;
2622 }
2623
2624 if (copy_from_user(new_firmware, com.data, com.len)) {
2625 kfree(new_firmware);
2626 rc = -EFAULT;
2627 break;
2628 }
2629
2630 kfree(priv->firmware);
2631
2632 priv->firmware = new_firmware;
2633 priv->firmware_length = com.len;
2634 strncpy(priv->firmware_id, com.id, 31);
2635 priv->firmware_id[31] = '\0';
2636 break;
2637
2638 case ATMELRD:
2639 if (copy_from_user(domain, rq->ifr_data, REGDOMAINSZ)) {
2640 rc = -EFAULT;
2641 break;
2642 }
2643
2644 if (!capable(CAP_NET_ADMIN)) {
2645 rc = -EPERM;
2646 break;
2647 }
2648
2649 domain[REGDOMAINSZ] = 0;
2650 rc = -EINVAL;
2651 for (i = 0; i < sizeof(channel_table)/sizeof(channel_table[0]); i++) {
2652 /* strcasecmp doesn't exist in the library */
2653 char *a = channel_table[i].name;
2654 char *b = domain;
2655 while (*a) {
2656 char c1 = *a++;
2657 char c2 = *b++;
2658 if (tolower(c1) != tolower(c2))
2659 break;
2660 }
2661 if (!*a && !*b) {
2662 priv->config_reg_domain = channel_table[i].reg_domain;
2663 rc = 0;
2664 }
2665 }
2666
2667 if (rc == 0 && priv->station_state != STATION_STATE_DOWN)
2668 rc = atmel_open(dev);
2669 break;
2670
2671 default:
2672 rc = -EOPNOTSUPP;
2673 }
2674
2675 return rc;
2676 }
2677
2678 struct auth_body {
2679 u16 alg;
2680 u16 trans_seq;
2681 u16 status;
2682 u8 el_id;
2683 u8 chall_text_len;
2684 u8 chall_text[253];
2685 };
2686
2687 static void atmel_enter_state(struct atmel_private *priv, int new_state)
2688 {
2689 int old_state = priv->station_state;
2690
2691 if (new_state == old_state)
2692 return;
2693
2694 priv->station_state = new_state;
2695
2696 if (new_state == STATION_STATE_READY) {
2697 netif_start_queue(priv->dev);
2698 netif_carrier_on(priv->dev);
2699 }
2700
2701 if (old_state == STATION_STATE_READY) {
2702 netif_carrier_off(priv->dev);
2703 if (netif_running(priv->dev))
2704 netif_stop_queue(priv->dev);
2705 priv->last_beacon_timestamp = 0;
2706 }
2707 }
2708
2709 static void atmel_scan(struct atmel_private *priv, int specific_ssid)
2710 {
2711 struct {
2712 u8 BSSID[6];
2713 u8 SSID[MAX_SSID_LENGTH];
2714 u8 scan_type;
2715 u8 channel;
2716 u16 BSS_type;
2717 u16 min_channel_time;
2718 u16 max_channel_time;
2719 u8 options;
2720 u8 SSID_size;
2721 } cmd;
2722
2723 memset(cmd.BSSID, 0xff, 6);
2724
2725 if (priv->fast_scan) {
2726 cmd.SSID_size = priv->SSID_size;
2727 memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2728 cmd.min_channel_time = cpu_to_le16(10);
2729 cmd.max_channel_time = cpu_to_le16(50);
2730 } else {
2731 priv->BSS_list_entries = 0;
2732 cmd.SSID_size = 0;
2733 cmd.min_channel_time = cpu_to_le16(10);
2734 cmd.max_channel_time = cpu_to_le16(120);
2735 }
2736
2737 cmd.options = 0;
2738
2739 if (!specific_ssid)
2740 cmd.options |= SCAN_OPTIONS_SITE_SURVEY;
2741
2742 cmd.channel = (priv->channel & 0x7f);
2743 cmd.scan_type = SCAN_TYPE_ACTIVE;
2744 cmd.BSS_type = cpu_to_le16(priv->operating_mode == IW_MODE_ADHOC ?
2745 BSS_TYPE_AD_HOC : BSS_TYPE_INFRASTRUCTURE);
2746
2747 atmel_send_command(priv, CMD_Scan, &cmd, sizeof(cmd));
2748
2749 /* This must come after all hardware access to avoid being messed up
2750 by stuff happening in interrupt context after we leave STATE_DOWN */
2751 atmel_enter_state(priv, STATION_STATE_SCANNING);
2752 }
2753
2754 static void join(struct atmel_private *priv, int type)
2755 {
2756 struct {
2757 u8 BSSID[6];
2758 u8 SSID[MAX_SSID_LENGTH];
2759 u8 BSS_type; /* this is a short in a scan command - weird */
2760 u8 channel;
2761 u16 timeout;
2762 u8 SSID_size;
2763 u8 reserved;
2764 } cmd;
2765
2766 cmd.SSID_size = priv->SSID_size;
2767 memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2768 memcpy(cmd.BSSID, priv->CurrentBSSID, 6);
2769 cmd.channel = (priv->channel & 0x7f);
2770 cmd.BSS_type = type;
2771 cmd.timeout = cpu_to_le16(2000);
2772
2773 atmel_send_command(priv, CMD_Join, &cmd, sizeof(cmd));
2774 }
2775
2776 static void start(struct atmel_private *priv, int type)
2777 {
2778 struct {
2779 u8 BSSID[6];
2780 u8 SSID[MAX_SSID_LENGTH];
2781 u8 BSS_type;
2782 u8 channel;
2783 u8 SSID_size;
2784 u8 reserved[3];
2785 } cmd;
2786
2787 cmd.SSID_size = priv->SSID_size;
2788 memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2789 memcpy(cmd.BSSID, priv->BSSID, 6);
2790 cmd.BSS_type = type;
2791 cmd.channel = (priv->channel & 0x7f);
2792
2793 atmel_send_command(priv, CMD_Start, &cmd, sizeof(cmd));
2794 }
2795
2796 static void handle_beacon_probe(struct atmel_private *priv, u16 capability,
2797 u8 channel)
2798 {
2799 int rejoin = 0;
2800 int new = capability & MFIE_TYPE_POWER_CONSTRAINT ?
2801 SHORT_PREAMBLE : LONG_PREAMBLE;
2802
2803 if (priv->preamble != new) {
2804 priv->preamble = new;
2805 rejoin = 1;
2806 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_PREAMBLE_TYPE, new);
2807 }
2808
2809 if (priv->channel != channel) {
2810 priv->channel = channel;
2811 rejoin = 1;
2812 atmel_set_mib8(priv, Phy_Mib_Type, PHY_MIB_CHANNEL_POS, channel);
2813 }
2814
2815 if (rejoin) {
2816 priv->station_is_associated = 0;
2817 atmel_enter_state(priv, STATION_STATE_JOINNING);
2818
2819 if (priv->operating_mode == IW_MODE_INFRA)
2820 join(priv, BSS_TYPE_INFRASTRUCTURE);
2821 else
2822 join(priv, BSS_TYPE_AD_HOC);
2823 }
2824 }
2825
2826 static void send_authentication_request(struct atmel_private *priv, u16 system,
2827 u8 *challenge, int challenge_len)
2828 {
2829 struct ieee80211_hdr_4addr header;
2830 struct auth_body auth;
2831
2832 header.frame_ctl = cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_AUTH);
2833 header.duration_id = cpu_to_le16(0x8000);
2834 header.seq_ctl = 0;
2835 memcpy(header.addr1, priv->CurrentBSSID, 6);
2836 memcpy(header.addr2, priv->dev->dev_addr, 6);
2837 memcpy(header.addr3, priv->CurrentBSSID, 6);
2838
2839 if (priv->wep_is_on && priv->CurrentAuthentTransactionSeqNum != 1)
2840 /* no WEP for authentication frames with TrSeqNo 1 */
2841 header.frame_ctl |= cpu_to_le16(IEEE80211_FCTL_PROTECTED);
2842
2843 auth.alg = cpu_to_le16(system);
2844
2845 auth.status = 0;
2846 auth.trans_seq = cpu_to_le16(priv->CurrentAuthentTransactionSeqNum);
2847 priv->ExpectedAuthentTransactionSeqNum = priv->CurrentAuthentTransactionSeqNum+1;
2848 priv->CurrentAuthentTransactionSeqNum += 2;
2849
2850 if (challenge_len != 0) {
2851 auth.el_id = 16; /* challenge_text */
2852 auth.chall_text_len = challenge_len;
2853 memcpy(auth.chall_text, challenge, challenge_len);
2854 atmel_transmit_management_frame(priv, &header, (u8 *)&auth, 8 + challenge_len);
2855 } else {
2856 atmel_transmit_management_frame(priv, &header, (u8 *)&auth, 6);
2857 }
2858 }
2859
2860 static void send_association_request(struct atmel_private *priv, int is_reassoc)
2861 {
2862 u8 *ssid_el_p;
2863 int bodysize;
2864 struct ieee80211_hdr_4addr header;
2865 struct ass_req_format {
2866 u16 capability;
2867 u16 listen_interval;
2868 u8 ap[6]; /* nothing after here directly accessible */
2869 u8 ssid_el_id;
2870 u8 ssid_len;
2871 u8 ssid[MAX_SSID_LENGTH];
2872 u8 sup_rates_el_id;
2873 u8 sup_rates_len;
2874 u8 rates[4];
2875 } body;
2876
2877 header.frame_ctl = cpu_to_le16(IEEE80211_FTYPE_MGMT |
2878 (is_reassoc ? IEEE80211_STYPE_REASSOC_REQ : IEEE80211_STYPE_ASSOC_REQ));
2879 header.duration_id = cpu_to_le16(0x8000);
2880 header.seq_ctl = 0;
2881
2882 memcpy(header.addr1, priv->CurrentBSSID, 6);
2883 memcpy(header.addr2, priv->dev->dev_addr, 6);
2884 memcpy(header.addr3, priv->CurrentBSSID, 6);
2885
2886 body.capability = cpu_to_le16(WLAN_CAPABILITY_ESS);
2887 if (priv->wep_is_on)
2888 body.capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
2889 if (priv->preamble == SHORT_PREAMBLE)
2890 body.capability |= cpu_to_le16(MFIE_TYPE_POWER_CONSTRAINT);
2891
2892 body.listen_interval = cpu_to_le16(priv->listen_interval * priv->beacon_period);
2893
2894 /* current AP address - only in reassoc frame */
2895 if (is_reassoc) {
2896 memcpy(body.ap, priv->CurrentBSSID, 6);
2897 ssid_el_p = (u8 *)&body.ssid_el_id;
2898 bodysize = 18 + priv->SSID_size;
2899 } else {
2900 ssid_el_p = (u8 *)&body.ap[0];
2901 bodysize = 12 + priv->SSID_size;
2902 }
2903
2904 ssid_el_p[0] = MFIE_TYPE_SSID;
2905 ssid_el_p[1] = priv->SSID_size;
2906 memcpy(ssid_el_p + 2, priv->SSID, priv->SSID_size);
2907 ssid_el_p[2 + priv->SSID_size] = MFIE_TYPE_RATES;
2908 ssid_el_p[3 + priv->SSID_size] = 4; /* len of suported rates */
2909 memcpy(ssid_el_p + 4 + priv->SSID_size, atmel_basic_rates, 4);
2910
2911 atmel_transmit_management_frame(priv, &header, (void *)&body, bodysize);
2912 }
2913
2914 static int is_frame_from_current_bss(struct atmel_private *priv,
2915 struct ieee80211_hdr_4addr *header)
2916 {
2917 if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS)
2918 return memcmp(header->addr3, priv->CurrentBSSID, 6) == 0;
2919 else
2920 return memcmp(header->addr2, priv->CurrentBSSID, 6) == 0;
2921 }
2922
2923 static int retrieve_bss(struct atmel_private *priv)
2924 {
2925 int i;
2926 int max_rssi = -128;
2927 int max_index = -1;
2928
2929 if (priv->BSS_list_entries == 0)
2930 return -1;
2931
2932 if (priv->connect_to_any_BSS) {
2933 /* Select a BSS with the max-RSSI but of the same type and of
2934 the same WEP mode and that it is not marked as 'bad' (i.e.
2935 we had previously failed to connect to this BSS with the
2936 settings that we currently use) */
2937 priv->current_BSS = 0;
2938 for (i = 0; i < priv->BSS_list_entries; i++) {
2939 if (priv->operating_mode == priv->BSSinfo[i].BSStype &&
2940 ((!priv->wep_is_on && !priv->BSSinfo[i].UsingWEP) ||
2941 (priv->wep_is_on && priv->BSSinfo[i].UsingWEP)) &&
2942 !(priv->BSSinfo[i].channel & 0x80)) {
2943 max_rssi = priv->BSSinfo[i].RSSI;
2944 priv->current_BSS = max_index = i;
2945 }
2946 }
2947 return max_index;
2948 }
2949
2950 for (i = 0; i < priv->BSS_list_entries; i++) {
2951 if (priv->SSID_size == priv->BSSinfo[i].SSIDsize &&
2952 memcmp(priv->SSID, priv->BSSinfo[i].SSID, priv->SSID_size) == 0 &&
2953 priv->operating_mode == priv->BSSinfo[i].BSStype &&
2954 atmel_validate_channel(priv, priv->BSSinfo[i].channel) == 0) {
2955 if (priv->BSSinfo[i].RSSI >= max_rssi) {
2956 max_rssi = priv->BSSinfo[i].RSSI;
2957 max_index = i;
2958 }
2959 }
2960 }
2961 return max_index;
2962 }
2963
2964 static void store_bss_info(struct atmel_private *priv,
2965 struct ieee80211_hdr_4addr *header, u16 capability,
2966 u16 beacon_period, u8 channel, u8 rssi, u8 ssid_len,
2967 u8 *ssid, int is_beacon)
2968 {
2969 u8 *bss = capability & WLAN_CAPABILITY_ESS ? header->addr2 : header->addr3;
2970 int i, index;
2971
2972 for (index = -1, i = 0; i < priv->BSS_list_entries; i++)
2973 if (memcmp(bss, priv->BSSinfo[i].BSSID, 6) == 0)
2974 index = i;
2975
2976 /* If we process a probe and an entry from this BSS exists
2977 we will update the BSS entry with the info from this BSS.
2978 If we process a beacon we will only update RSSI */
2979
2980 if (index == -1) {
2981 if (priv->BSS_list_entries == MAX_BSS_ENTRIES)
2982 return;
2983 index = priv->BSS_list_entries++;
2984 memcpy(priv->BSSinfo[index].BSSID, bss, 6);
2985 priv->BSSinfo[index].RSSI = rssi;
2986 } else {
2987 if (rssi > priv->BSSinfo[index].RSSI)
2988 priv->BSSinfo[index].RSSI = rssi;
2989 if (is_beacon)
2990 return;
2991 }
2992
2993 priv->BSSinfo[index].channel = channel;
2994 priv->BSSinfo[index].beacon_period = beacon_period;
2995 priv->BSSinfo[index].UsingWEP = capability & WLAN_CAPABILITY_PRIVACY;
2996 memcpy(priv->BSSinfo[index].SSID, ssid, ssid_len);
2997 priv->BSSinfo[index].SSIDsize = ssid_len;
2998
2999 if (capability & WLAN_CAPABILITY_IBSS)
3000 priv->BSSinfo[index].BSStype = IW_MODE_ADHOC;
3001 else if (capability & WLAN_CAPABILITY_ESS)
3002 priv->BSSinfo[index].BSStype =IW_MODE_INFRA;
3003
3004 priv->BSSinfo[index].preamble = capability & MFIE_TYPE_POWER_CONSTRAINT ?
3005 SHORT_PREAMBLE : LONG_PREAMBLE;
3006 }
3007
3008 static void authenticate(struct atmel_private *priv, u16 frame_len)
3009 {
3010 struct auth_body *auth = (struct auth_body *)priv->rx_buf;
3011 u16 status = le16_to_cpu(auth->status);
3012 u16 trans_seq_no = le16_to_cpu(auth->trans_seq);
3013 u16 system = le16_to_cpu(auth->alg);
3014
3015 if (status == WLAN_STATUS_SUCCESS && !priv->wep_is_on) {
3016 /* no WEP */
3017 if (priv->station_was_associated) {
3018 atmel_enter_state(priv, STATION_STATE_REASSOCIATING);
3019 send_association_request(priv, 1);
3020 return;
3021 } else {
3022 atmel_enter_state(priv, STATION_STATE_ASSOCIATING);
3023 send_association_request(priv, 0);
3024 return;
3025 }
3026 }
3027
3028 if (status == WLAN_STATUS_SUCCESS && priv->wep_is_on) {
3029 int should_associate = 0;
3030 /* WEP */
3031 if (trans_seq_no != priv->ExpectedAuthentTransactionSeqNum)
3032 return;
3033
3034 if (system == WLAN_AUTH_OPEN) {
3035 if (trans_seq_no == 0x0002) {
3036 should_associate = 1;
3037 }
3038 } else if (system == WLAN_AUTH_SHARED_KEY) {
3039 if (trans_seq_no == 0x0002 &&
3040 auth->el_id == MFIE_TYPE_CHALLENGE) {
3041 send_authentication_request(priv, system, auth->chall_text, auth->chall_text_len);
3042 return;
3043 } else if (trans_seq_no == 0x0004) {
3044 should_associate = 1;
3045 }
3046 }
3047
3048 if (should_associate) {
3049 if(priv->station_was_associated) {
3050 atmel_enter_state(priv, STATION_STATE_REASSOCIATING);
3051 send_association_request(priv, 1);
3052 return;
3053 } else {
3054 atmel_enter_state(priv, STATION_STATE_ASSOCIATING);
3055 send_association_request(priv, 0);
3056 return;
3057 }
3058 }
3059 }
3060
3061 if (status == WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG) {
3062 /* Do opensystem first, then try sharedkey */
3063 if (system == WLAN_AUTH_OPEN) {
3064 priv->CurrentAuthentTransactionSeqNum = 0x001;
3065 priv->exclude_unencrypted = 1;
3066 send_authentication_request(priv, WLAN_AUTH_SHARED_KEY, NULL, 0);
3067 return;
3068 } else if (priv->connect_to_any_BSS) {
3069 int bss_index;
3070
3071 priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
3072
3073 if ((bss_index = retrieve_bss(priv)) != -1) {
3074 atmel_join_bss(priv, bss_index);
3075 return;
3076 }
3077 }
3078 }
3079
3080 priv->AuthenticationRequestRetryCnt = 0;
3081 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3082 priv->station_is_associated = 0;
3083 }
3084
3085 static void associate(struct atmel_private *priv, u16 frame_len, u16 subtype)
3086 {
3087 struct ass_resp_format {
3088 u16 capability;
3089 u16 status;
3090 u16 ass_id;
3091 u8 el_id;
3092 u8 length;
3093 u8 rates[4];
3094 } *ass_resp = (struct ass_resp_format *)priv->rx_buf;
3095
3096 u16 status = le16_to_cpu(ass_resp->status);
3097 u16 ass_id = le16_to_cpu(ass_resp->ass_id);
3098 u16 rates_len = ass_resp->length > 4 ? 4 : ass_resp->length;
3099
3100 union iwreq_data wrqu;
3101
3102 if (frame_len < 8 + rates_len)
3103 return;
3104
3105 if (status == WLAN_STATUS_SUCCESS) {
3106 if (subtype == IEEE80211_STYPE_ASSOC_RESP)
3107 priv->AssociationRequestRetryCnt = 0;
3108 else
3109 priv->ReAssociationRequestRetryCnt = 0;
3110
3111 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3112 MAC_MGMT_MIB_STATION_ID_POS, ass_id & 0x3fff);
3113 atmel_set_mib(priv, Phy_Mib_Type,
3114 PHY_MIB_RATE_SET_POS, ass_resp->rates, rates_len);
3115 if (priv->power_mode == 0) {
3116 priv->listen_interval = 1;
3117 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type,
3118 MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE);
3119 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3120 MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
3121 } else {
3122 priv->listen_interval = 2;
3123 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type,
3124 MAC_MGMT_MIB_PS_MODE_POS, PS_MODE);
3125 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3126 MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 2);
3127 }
3128
3129 priv->station_is_associated = 1;
3130 priv->station_was_associated = 1;
3131 atmel_enter_state(priv, STATION_STATE_READY);
3132
3133 /* Send association event to userspace */
3134 wrqu.data.length = 0;
3135 wrqu.data.flags = 0;
3136 memcpy(wrqu.ap_addr.sa_data, priv->CurrentBSSID, ETH_ALEN);
3137 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
3138 wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL);
3139
3140 return;
3141 }
3142
3143 if (subtype == IEEE80211_STYPE_ASSOC_RESP &&
3144 status != WLAN_STATUS_ASSOC_DENIED_RATES &&
3145 status != WLAN_STATUS_CAPS_UNSUPPORTED &&
3146 priv->AssociationRequestRetryCnt < MAX_ASSOCIATION_RETRIES) {
3147 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3148 priv->AssociationRequestRetryCnt++;
3149 send_association_request(priv, 0);
3150 return;
3151 }
3152
3153 if (subtype == IEEE80211_STYPE_REASSOC_RESP &&
3154 status != WLAN_STATUS_ASSOC_DENIED_RATES &&
3155 status != WLAN_STATUS_CAPS_UNSUPPORTED &&
3156 priv->AssociationRequestRetryCnt < MAX_ASSOCIATION_RETRIES) {
3157 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3158 priv->ReAssociationRequestRetryCnt++;
3159 send_association_request(priv, 1);
3160 return;
3161 }
3162
3163 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3164 priv->station_is_associated = 0;
3165
3166 if (priv->connect_to_any_BSS) {
3167 int bss_index;
3168 priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
3169
3170 if ((bss_index = retrieve_bss(priv)) != -1)
3171 atmel_join_bss(priv, bss_index);
3172 }
3173 }
3174
3175 void atmel_join_bss(struct atmel_private *priv, int bss_index)
3176 {
3177 struct bss_info *bss = &priv->BSSinfo[bss_index];
3178
3179 memcpy(priv->CurrentBSSID, bss->BSSID, 6);
3180 memcpy(priv->SSID, bss->SSID, priv->SSID_size = bss->SSIDsize);
3181
3182 /* The WPA stuff cares about the current AP address */
3183 if (priv->use_wpa)
3184 build_wpa_mib(priv);
3185
3186 /* When switching to AdHoc turn OFF Power Save if needed */
3187
3188 if (bss->BSStype == IW_MODE_ADHOC &&
3189 priv->operating_mode != IW_MODE_ADHOC &&
3190 priv->power_mode) {
3191 priv->power_mode = 0;
3192 priv->listen_interval = 1;
3193 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type,
3194 MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE);
3195 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3196 MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
3197 }
3198
3199 priv->operating_mode = bss->BSStype;
3200 priv->channel = bss->channel & 0x7f;
3201 priv->beacon_period = bss->beacon_period;
3202
3203 if (priv->preamble != bss->preamble) {
3204 priv->preamble = bss->preamble;
3205 atmel_set_mib8(priv, Local_Mib_Type,
3206 LOCAL_MIB_PREAMBLE_TYPE, bss->preamble);
3207 }
3208
3209 if (!priv->wep_is_on && bss->UsingWEP) {
3210 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3211 priv->station_is_associated = 0;
3212 return;
3213 }
3214
3215 if (priv->wep_is_on && !bss->UsingWEP) {
3216 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3217 priv->station_is_associated = 0;
3218 return;
3219 }
3220
3221 atmel_enter_state(priv, STATION_STATE_JOINNING);
3222
3223 if (priv->operating_mode == IW_MODE_INFRA)
3224 join(priv, BSS_TYPE_INFRASTRUCTURE);
3225 else
3226 join(priv, BSS_TYPE_AD_HOC);
3227 }
3228
3229 static void restart_search(struct atmel_private *priv)
3230 {
3231 int bss_index;
3232
3233 if (!priv->connect_to_any_BSS) {
3234 atmel_scan(priv, 1);
3235 } else {
3236 priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
3237
3238 if ((bss_index = retrieve_bss(priv)) != -1)
3239 atmel_join_bss(priv, bss_index);
3240 else
3241 atmel_scan(priv, 0);
3242 }
3243 }
3244
3245 static void smooth_rssi(struct atmel_private *priv, u8 rssi)
3246 {
3247 u8 old = priv->wstats.qual.level;
3248 u8 max_rssi = 42; /* 502-rmfd-revd max by experiment, default for now */
3249
3250 switch (priv->firmware_type) {
3251 case ATMEL_FW_TYPE_502E:
3252 max_rssi = 63; /* 502-rmfd-reve max by experiment */
3253 break;
3254 default:
3255 break;
3256 }
3257
3258 rssi = rssi * 100 / max_rssi;
3259 if ((rssi + old) % 2)
3260 priv->wstats.qual.level = (rssi + old) / 2 + 1;
3261 else
3262 priv->wstats.qual.level = (rssi + old) / 2;
3263 priv->wstats.qual.updated |= IW_QUAL_LEVEL_UPDATED;
3264 priv->wstats.qual.updated &= ~IW_QUAL_LEVEL_INVALID;
3265 }
3266
3267 static void atmel_smooth_qual(struct atmel_private *priv)
3268 {
3269 unsigned long time_diff = (jiffies - priv->last_qual) / HZ;
3270 while (time_diff--) {
3271 priv->last_qual += HZ;
3272 priv->wstats.qual.qual = priv->wstats.qual.qual / 2;
3273 priv->wstats.qual.qual +=
3274 priv->beacons_this_sec * priv->beacon_period * (priv->wstats.qual.level + 100) / 4000;
3275 priv->beacons_this_sec = 0;
3276 }
3277 priv->wstats.qual.updated |= IW_QUAL_QUAL_UPDATED;
3278 priv->wstats.qual.updated &= ~IW_QUAL_QUAL_INVALID;
3279 }
3280
3281 /* deals with incoming managment frames. */
3282 static void atmel_management_frame(struct atmel_private *priv,
3283 struct ieee80211_hdr_4addr *header,
3284 u16 frame_len, u8 rssi)
3285 {
3286 u16 subtype;
3287
3288 subtype = le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_STYPE;
3289 switch (subtype) {
3290 case IEEE80211_STYPE_BEACON:
3291 case IEEE80211_STYPE_PROBE_RESP:
3292
3293 /* beacon frame has multiple variable-length fields -
3294 never let an engineer loose with a data structure design. */
3295 {
3296 struct beacon_format {
3297 u64 timestamp;
3298 u16 interval;
3299 u16 capability;
3300 u8 ssid_el_id;
3301 u8 ssid_length;
3302 /* ssid here */
3303 u8 rates_el_id;
3304 u8 rates_length;
3305 /* rates here */
3306 u8 ds_el_id;
3307 u8 ds_length;
3308 /* ds here */
3309 } *beacon = (struct beacon_format *)priv->rx_buf;
3310
3311 u8 channel, rates_length, ssid_length;
3312 u64 timestamp = le64_to_cpu(beacon->timestamp);
3313 u16 beacon_interval = le16_to_cpu(beacon->interval);
3314 u16 capability = le16_to_cpu(beacon->capability);
3315 u8 *beaconp = priv->rx_buf;
3316 ssid_length = beacon->ssid_length;
3317 /* this blows chunks. */
3318 if (frame_len < 14 || frame_len < ssid_length + 15)
3319 return;
3320 rates_length = beaconp[beacon->ssid_length + 15];
3321 if (frame_len < ssid_length + rates_length + 18)
3322 return;
3323 if (ssid_length > MAX_SSID_LENGTH)
3324 return;
3325 channel = beaconp[ssid_length + rates_length + 18];
3326
3327 if (priv->station_state == STATION_STATE_READY) {
3328 smooth_rssi(priv, rssi);
3329 if (is_frame_from_current_bss(priv, header)) {
3330 priv->beacons_this_sec++;
3331 atmel_smooth_qual(priv);
3332 if (priv->last_beacon_timestamp) {
3333 /* Note truncate this to 32 bits - kernel can't divide a long long */
3334 u32 beacon_delay = timestamp - priv->last_beacon_timestamp;
3335 int beacons = beacon_delay / (beacon_interval * 1000);
3336 if (beacons > 1)
3337 priv->wstats.miss.beacon += beacons - 1;
3338 }
3339 priv->last_beacon_timestamp = timestamp;
3340 handle_beacon_probe(priv, capability, channel);
3341 }
3342 }
3343
3344 if (priv->station_state == STATION_STATE_SCANNING)
3345 store_bss_info(priv, header, capability,
3346 beacon_interval, channel, rssi,
3347 ssid_length,
3348 &beacon->rates_el_id,
3349 subtype == IEEE80211_STYPE_BEACON);
3350 }
3351 break;
3352
3353 case IEEE80211_STYPE_AUTH:
3354
3355 if (priv->station_state == STATION_STATE_AUTHENTICATING)
3356 authenticate(priv, frame_len);
3357
3358 break;
3359
3360 case IEEE80211_STYPE_ASSOC_RESP:
3361 case IEEE80211_STYPE_REASSOC_RESP:
3362
3363 if (priv->station_state == STATION_STATE_ASSOCIATING ||
3364 priv->station_state == STATION_STATE_REASSOCIATING)
3365 associate(priv, frame_len, subtype);
3366
3367 break;
3368
3369 case IEEE80211_STYPE_DISASSOC:
3370 if (priv->station_is_associated &&
3371 priv->operating_mode == IW_MODE_INFRA &&
3372 is_frame_from_current_bss(priv, header)) {
3373 priv->station_was_associated = 0;
3374 priv->station_is_associated = 0;
3375
3376 atmel_enter_state(priv, STATION_STATE_JOINNING);
3377 join(priv, BSS_TYPE_INFRASTRUCTURE);
3378 }
3379
3380 break;
3381
3382 case IEEE80211_STYPE_DEAUTH:
3383 if (priv->operating_mode == IW_MODE_INFRA &&
3384 is_frame_from_current_bss(priv, header)) {
3385 priv->station_was_associated = 0;
3386
3387 atmel_enter_state(priv, STATION_STATE_JOINNING);
3388 join(priv, BSS_TYPE_INFRASTRUCTURE);
3389 }
3390
3391 break;
3392 }
3393 }
3394
3395 /* run when timer expires */
3396 static void atmel_management_timer(u_long a)
3397 {
3398 struct net_device *dev = (struct net_device *) a;
3399 struct atmel_private *priv = netdev_priv(dev);
3400 unsigned long flags;
3401
3402 /* Check if the card has been yanked. */
3403 if (priv->card && priv->present_callback &&
3404 !(*priv->present_callback)(priv->card))
3405 return;
3406
3407 spin_lock_irqsave(&priv->irqlock, flags);
3408
3409 switch (priv->station_state) {
3410
3411 case STATION_STATE_AUTHENTICATING:
3412 if (priv->AuthenticationRequestRetryCnt >= MAX_AUTHENTICATION_RETRIES) {
3413 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3414 priv->station_is_associated = 0;
3415 priv->AuthenticationRequestRetryCnt = 0;
3416 restart_search(priv);
3417 } else {
3418 int auth = WLAN_AUTH_OPEN;
3419 priv->AuthenticationRequestRetryCnt++;
3420 priv->CurrentAuthentTransactionSeqNum = 0x0001;
3421 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3422 if (priv->wep_is_on && priv->exclude_unencrypted)
3423 auth = WLAN_AUTH_SHARED_KEY;
3424 send_authentication_request(priv, auth, NULL, 0);
3425 }
3426 break;
3427
3428 case STATION_STATE_ASSOCIATING:
3429 if (priv->AssociationRequestRetryCnt == MAX_ASSOCIATION_RETRIES) {
3430 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3431 priv->station_is_associated = 0;
3432 priv->AssociationRequestRetryCnt = 0;
3433 restart_search(priv);
3434 } else {
3435 priv->AssociationRequestRetryCnt++;
3436 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3437 send_association_request(priv, 0);
3438 }
3439 break;
3440
3441 case STATION_STATE_REASSOCIATING:
3442 if (priv->ReAssociationRequestRetryCnt == MAX_ASSOCIATION_RETRIES) {
3443 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3444 priv->station_is_associated = 0;
3445 priv->ReAssociationRequestRetryCnt = 0;
3446 restart_search(priv);
3447 } else {
3448 priv->ReAssociationRequestRetryCnt++;
3449 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3450 send_association_request(priv, 1);
3451 }
3452 break;
3453
3454 default:
3455 break;
3456 }
3457
3458 spin_unlock_irqrestore(&priv->irqlock, flags);
3459 }
3460
3461 static void atmel_command_irq(struct atmel_private *priv)
3462 {
3463 u8 status = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET));
3464 u8 command = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_COMMAND_OFFSET));
3465 int fast_scan;
3466 union iwreq_data wrqu;
3467
3468 if (status == CMD_STATUS_IDLE ||
3469 status == CMD_STATUS_IN_PROGRESS)
3470 return;
3471
3472 switch (command){
3473
3474 case CMD_Start:
3475 if (status == CMD_STATUS_COMPLETE) {
3476 priv->station_was_associated = priv->station_is_associated;
3477 atmel_get_mib(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_BSSID_POS,
3478 (u8 *)priv->CurrentBSSID, 6);
3479 atmel_enter_state(priv, STATION_STATE_READY);
3480 }
3481 break;
3482
3483 case CMD_Scan:
3484 fast_scan = priv->fast_scan;
3485 priv->fast_scan = 0;
3486
3487 if (status != CMD_STATUS_COMPLETE) {
3488 atmel_scan(priv, 1);
3489 } else {
3490 int bss_index = retrieve_bss(priv);
3491 int notify_scan_complete = 1;
3492 if (bss_index != -1) {
3493 atmel_join_bss(priv, bss_index);
3494 } else if (priv->operating_mode == IW_MODE_ADHOC &&
3495 priv->SSID_size != 0) {
3496 start(priv, BSS_TYPE_AD_HOC);
3497 } else {
3498 priv->fast_scan = !fast_scan;
3499 atmel_scan(priv, 1);
3500 notify_scan_complete = 0;
3501 }
3502 priv->site_survey_state = SITE_SURVEY_COMPLETED;
3503 if (notify_scan_complete) {
3504 wrqu.data.length = 0;
3505 wrqu.data.flags = 0;
3506 wireless_send_event(priv->dev, SIOCGIWSCAN, &wrqu, NULL);
3507 }
3508 }
3509 break;
3510
3511 case CMD_SiteSurvey:
3512 priv->fast_scan = 0;
3513
3514 if (status != CMD_STATUS_COMPLETE)
3515 return;
3516
3517 priv->site_survey_state = SITE_SURVEY_COMPLETED;
3518 if (priv->station_is_associated) {
3519 atmel_enter_state(priv, STATION_STATE_READY);
3520 wrqu.data.length = 0;
3521 wrqu.data.flags = 0;
3522 wireless_send_event(priv->dev, SIOCGIWSCAN, &wrqu, NULL);
3523 } else {
3524 atmel_scan(priv, 1);
3525 }
3526 break;
3527
3528 case CMD_Join:
3529 if (status == CMD_STATUS_COMPLETE) {
3530 if (priv->operating_mode == IW_MODE_ADHOC) {
3531 priv->station_was_associated = priv->station_is_associated;
3532 atmel_enter_state(priv, STATION_STATE_READY);
3533 } else {
3534 int auth = WLAN_AUTH_OPEN;
3535 priv->AuthenticationRequestRetryCnt = 0;
3536 atmel_enter_state(priv, STATION_STATE_AUTHENTICATING);
3537
3538 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3539 priv->CurrentAuthentTransactionSeqNum = 0x0001;
3540 if (priv->wep_is_on && priv->exclude_unencrypted)
3541 auth = WLAN_AUTH_SHARED_KEY;
3542 send_authentication_request(priv, auth, NULL, 0);
3543 }
3544 return;
3545 }
3546
3547 atmel_scan(priv, 1);
3548 }
3549 }
3550
3551 static int atmel_wakeup_firmware(struct atmel_private *priv)
3552 {
3553 struct host_info_struct *iface = &priv->host_info;
3554 u16 mr1, mr3;
3555 int i;
3556
3557 if (priv->card_type == CARD_TYPE_SPI_FLASH)
3558 atmel_set_gcr(priv->dev, GCR_REMAP);
3559
3560 /* wake up on-board processor */
3561 atmel_clear_gcr(priv->dev, 0x0040);
3562 atmel_write16(priv->dev, BSR, BSS_SRAM);
3563
3564 if (priv->card_type == CARD_TYPE_SPI_FLASH)
3565 mdelay(100);
3566
3567 /* and wait for it */
3568 for (i = LOOP_RETRY_LIMIT; i; i--) {
3569 mr1 = atmel_read16(priv->dev, MR1);
3570 mr3 = atmel_read16(priv->dev, MR3);
3571
3572 if (mr3 & MAC_BOOT_COMPLETE)
3573 break;
3574 if (mr1 & MAC_BOOT_COMPLETE &&
3575 priv->bus_type == BUS_TYPE_PCCARD)
3576 break;
3577 }
3578
3579 if (i == 0) {
3580 printk(KERN_ALERT "%s: MAC failed to boot.\n", priv->dev->name);
3581 return 0;
3582 }
3583
3584 if ((priv->host_info_base = atmel_read16(priv->dev, MR2)) == 0xffff) {
3585 printk(KERN_ALERT "%s: card missing.\n", priv->dev->name);
3586 return 0;
3587 }
3588
3589 /* now check for completion of MAC initialization through
3590 the FunCtrl field of the IFACE, poll MR1 to detect completion of
3591 MAC initialization, check completion status, set interrupt mask,
3592 enables interrupts and calls Tx and Rx initialization functions */
3593
3594 atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET), FUNC_CTRL_INIT_COMPLETE);
3595
3596 for (i = LOOP_RETRY_LIMIT; i; i--) {
3597 mr1 = atmel_read16(priv->dev, MR1);
3598 mr3 = atmel_read16(priv->dev, MR3);
3599
3600 if (mr3 & MAC_INIT_COMPLETE)
3601 break;
3602 if (mr1 & MAC_INIT_COMPLETE &&
3603 priv->bus_type == BUS_TYPE_PCCARD)
3604 break;
3605 }
3606
3607 if (i == 0) {
3608 printk(KERN_ALERT "%s: MAC failed to initialise.\n",
3609 priv->dev->name);
3610 return 0;
3611 }
3612
3613 /* Check for MAC_INIT_OK only on the register that the MAC_INIT_OK was set */
3614 if ((mr3 & MAC_INIT_COMPLETE) &&
3615 !(atmel_read16(priv->dev, MR3) & MAC_INIT_OK)) {
3616 printk(KERN_ALERT "%s: MAC failed MR3 self-test.\n", priv->dev->name);
3617 return 0;
3618 }
3619 if ((mr1 & MAC_INIT_COMPLETE) &&
3620 !(atmel_read16(priv->dev, MR1) & MAC_INIT_OK)) {
3621 printk(KERN_ALERT "%s: MAC failed MR1 self-test.\n", priv->dev->name);
3622 return 0;
3623 }
3624
3625 atmel_copy_to_host(priv->dev, (unsigned char *)iface,
3626 priv->host_info_base, sizeof(*iface));
3627
3628 iface->tx_buff_pos = le16_to_cpu(iface->tx_buff_pos);
3629 iface->tx_buff_size = le16_to_cpu(iface->tx_buff_size);
3630 iface->tx_desc_pos = le16_to_cpu(iface->tx_desc_pos);
3631 iface->tx_desc_count = le16_to_cpu(iface->tx_desc_count);
3632 iface->rx_buff_pos = le16_to_cpu(iface->rx_buff_pos);
3633 iface->rx_buff_size = le16_to_cpu(iface->rx_buff_size);
3634 iface->rx_desc_pos = le16_to_cpu(iface->rx_desc_pos);
3635 iface->rx_desc_count = le16_to_cpu(iface->rx_desc_count);
3636 iface->build_version = le16_to_cpu(iface->build_version);
3637 iface->command_pos = le16_to_cpu(iface->command_pos);
3638 iface->major_version = le16_to_cpu(iface->major_version);
3639 iface->minor_version = le16_to_cpu(iface->minor_version);
3640 iface->func_ctrl = le16_to_cpu(iface->func_ctrl);
3641 iface->mac_status = le16_to_cpu(iface->mac_status);
3642
3643 return 1;
3644 }
3645
3646 /* determine type of memory and MAC address */
3647 static int probe_atmel_card(struct net_device *dev)
3648 {
3649 int rc = 0;
3650 struct atmel_private *priv = netdev_priv(dev);
3651
3652 /* reset pccard */
3653 if (priv->bus_type == BUS_TYPE_PCCARD)
3654 atmel_write16(dev, GCR, 0x0060);
3655
3656 atmel_write16(dev, GCR, 0x0040);
3657 mdelay(500);
3658
3659 if (atmel_read16(dev, MR2) == 0) {
3660 /* No stored firmware so load a small stub which just
3661 tells us the MAC address */
3662 int i;
3663 priv->card_type = CARD_TYPE_EEPROM;
3664 atmel_write16(dev, BSR, BSS_IRAM);
3665 atmel_copy_to_card(dev, 0, mac_reader, sizeof(mac_reader));
3666 atmel_set_gcr(dev, GCR_REMAP);
3667 atmel_clear_gcr(priv->dev, 0x0040);
3668 atmel_write16(dev, BSR, BSS_SRAM);
3669 for (i = LOOP_RETRY_LIMIT; i; i--)
3670 if (atmel_read16(dev, MR3) & MAC_BOOT_COMPLETE)
3671 break;
3672 if (i == 0) {
3673 printk(KERN_ALERT "%s: MAC failed to boot MAC address reader.\n", dev->name);
3674 } else {
3675 atmel_copy_to_host(dev, dev->dev_addr, atmel_read16(dev, MR2), 6);
3676 /* got address, now squash it again until the network
3677 interface is opened */
3678 if (priv->bus_type == BUS_TYPE_PCCARD)
3679 atmel_write16(dev, GCR, 0x0060);
3680 atmel_write16(dev, GCR, 0x0040);
3681 rc = 1;
3682 }
3683 } else if (atmel_read16(dev, MR4) == 0) {
3684 /* Mac address easy in this case. */
3685 priv->card_type = CARD_TYPE_PARALLEL_FLASH;
3686 atmel_write16(dev, BSR, 1);
3687 atmel_copy_to_host(dev, dev->dev_addr, 0xc000, 6);
3688 atmel_write16(dev, BSR, 0x200);
3689 rc = 1;
3690 } else {
3691 /* Standard firmware in flash, boot it up and ask
3692 for the Mac Address */
3693 priv->card_type = CARD_TYPE_SPI_FLASH;
3694 if (atmel_wakeup_firmware(priv)) {
3695 atmel_get_mib(priv, Mac_Address_Mib_Type, 0, dev->dev_addr, 6);
3696
3697 /* got address, now squash it again until the network
3698 interface is opened */
3699 if (priv->bus_type == BUS_TYPE_PCCARD)
3700 atmel_write16(dev, GCR, 0x0060);
3701 atmel_write16(dev, GCR, 0x0040);
3702 rc = 1;
3703 }
3704 }
3705
3706 if (rc) {
3707 if (dev->dev_addr[0] == 0xFF) {
3708 u8 default_mac[] = {0x00,0x04, 0x25, 0x00, 0x00, 0x00};
3709 printk(KERN_ALERT "%s: *** Invalid MAC address. UPGRADE Firmware ****\n", dev->name);
3710 memcpy(dev->dev_addr, default_mac, 6);
3711 }
3712 }
3713
3714 return rc;
3715 }
3716
3717 /* Move the encyption information on the MIB structure.
3718 This routine is for the pre-WPA firmware: later firmware has
3719 a different format MIB and a different routine. */
3720 static void build_wep_mib(struct atmel_private *priv)
3721 {
3722 struct { /* NB this is matched to the hardware, don't change. */
3723 u8 wep_is_on;
3724 u8 default_key; /* 0..3 */
3725 u8 reserved;
3726 u8 exclude_unencrypted;
3727
3728 u32 WEPICV_error_count;
3729 u32 WEP_excluded_count;
3730
3731 u8 wep_keys[MAX_ENCRYPTION_KEYS][13];
3732 u8 encryption_level; /* 0, 1, 2 */
3733 u8 reserved2[3];
3734 } mib;
3735 int i;
3736
3737 mib.wep_is_on = priv->wep_is_on;
3738 if (priv->wep_is_on) {
3739 if (priv->wep_key_len[priv->default_key] > 5)
3740 mib.encryption_level = 2;
3741 else
3742 mib.encryption_level = 1;
3743 } else {
3744 mib.encryption_level = 0;
3745 }
3746
3747 mib.default_key = priv->default_key;
3748 mib.exclude_unencrypted = priv->exclude_unencrypted;
3749
3750 for (i = 0; i < MAX_ENCRYPTION_KEYS; i++)
3751 memcpy(mib.wep_keys[i], priv->wep_keys[i], 13);
3752
3753 atmel_set_mib(priv, Mac_Wep_Mib_Type, 0, (u8 *)&mib, sizeof(mib));
3754 }
3755
3756 static void build_wpa_mib(struct atmel_private *priv)
3757 {
3758 /* This is for the later (WPA enabled) firmware. */
3759
3760 struct { /* NB this is matched to the hardware, don't change. */
3761 u8 cipher_default_key_value[MAX_ENCRYPTION_KEYS][MAX_ENCRYPTION_KEY_SIZE];
3762 u8 receiver_address[6];
3763 u8 wep_is_on;
3764 u8 default_key; /* 0..3 */
3765 u8 group_key;
3766 u8 exclude_unencrypted;
3767 u8 encryption_type;
3768 u8 reserved;
3769
3770 u32 WEPICV_error_count;
3771 u32 WEP_excluded_count;
3772
3773 u8 key_RSC[4][8];
3774 } mib;
3775
3776 int i;
3777
3778 mib.wep_is_on = priv->wep_is_on;
3779 mib.exclude_unencrypted = priv->exclude_unencrypted;
3780 memcpy(mib.receiver_address, priv->CurrentBSSID, 6);
3781
3782 /* zero all the keys before adding in valid ones. */
3783 memset(mib.cipher_default_key_value, 0, sizeof(mib.cipher_default_key_value));
3784
3785 if (priv->wep_is_on) {
3786 /* There's a comment in the Atmel code to the effect that this
3787 is only valid when still using WEP, it may need to be set to
3788 something to use WPA */
3789 memset(mib.key_RSC, 0, sizeof(mib.key_RSC));
3790
3791 mib.default_key = mib.group_key = 255;
3792 for (i = 0; i < MAX_ENCRYPTION_KEYS; i++) {
3793 if (priv->wep_key_len[i] > 0) {
3794 memcpy(mib.cipher_default_key_value[i], priv->wep_keys[i], MAX_ENCRYPTION_KEY_SIZE);
3795 if (i == priv->default_key) {
3796 mib.default_key = i;
3797 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-1] = 7;
3798 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-2] = priv->pairwise_cipher_suite;
3799 } else {
3800 mib.group_key = i;
3801 priv->group_cipher_suite = priv->pairwise_cipher_suite;
3802 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-1] = 1;
3803 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-2] = priv->group_cipher_suite;
3804 }
3805 }
3806 }
3807 if (mib.default_key == 255)
3808 mib.default_key = mib.group_key != 255 ? mib.group_key : 0;
3809 if (mib.group_key == 255)
3810 mib.group_key = mib.default_key;
3811
3812 }
3813
3814 atmel_set_mib(priv, Mac_Wep_Mib_Type, 0, (u8 *)&mib, sizeof(mib));
3815 }
3816
3817 static int reset_atmel_card(struct net_device *dev)
3818 {
3819 /* do everything necessary to wake up the hardware, including
3820 waiting for the lightning strike and throwing the knife switch....
3821
3822 set all the Mib values which matter in the card to match
3823 their settings in the atmel_private structure. Some of these
3824 can be altered on the fly, but many (WEP, infrastucture or ad-hoc)
3825 can only be changed by tearing down the world and coming back through
3826 here.
3827
3828 This routine is also responsible for initialising some
3829 hardware-specific fields in the atmel_private structure,
3830 including a copy of the firmware's hostinfo stucture
3831 which is the route into the rest of the firmare datastructures. */
3832
3833 struct atmel_private *priv = netdev_priv(dev);
3834 u8 configuration;
3835 int old_state = priv->station_state;
3836
3837 /* data to add to the firmware names, in priority order
3838 this implemenents firmware versioning */
3839
3840 static char *firmware_modifier[] = {
3841 "-wpa",
3842 "",
3843 NULL
3844 };
3845
3846 /* reset pccard */
3847 if (priv->bus_type == BUS_TYPE_PCCARD)
3848 atmel_write16(priv->dev, GCR, 0x0060);
3849
3850 /* stop card , disable interrupts */
3851 atmel_write16(priv->dev, GCR, 0x0040);
3852
3853 if (priv->card_type == CARD_TYPE_EEPROM) {
3854 /* copy in firmware if needed */
3855 const struct firmware *fw_entry = NULL;
3856 unsigned char *fw;
3857 int len = priv->firmware_length;
3858 if (!(fw = priv->firmware)) {
3859 if (priv->firmware_type == ATMEL_FW_TYPE_NONE) {
3860 if (strlen(priv->firmware_id) == 0) {
3861 printk(KERN_INFO
3862 "%s: card type is unknown: assuming at76c502 firmware is OK.\n",
3863 dev->name);
3864 printk(KERN_INFO
3865 "%s: if not, use the firmware= module parameter.\n",
3866 dev->name);
3867 strcpy(priv->firmware_id, "atmel_at76c502.bin");
3868 }
3869 if (request_firmware(&fw_entry, priv->firmware_id, priv->sys_dev) != 0) {
3870 printk(KERN_ALERT
3871 "%s: firmware %s is missing, cannot continue.\n",
3872 dev->name, priv->firmware_id);
3873 return 0;
3874 }
3875 } else {
3876 int fw_index = 0;
3877 int success = 0;
3878
3879 /* get firmware filename entry based on firmware type ID */
3880 while (fw_table[fw_index].fw_type != priv->firmware_type
3881 && fw_table[fw_index].fw_type != ATMEL_FW_TYPE_NONE)
3882 fw_index++;
3883
3884 /* construct the actual firmware file name */
3885 if (fw_table[fw_index].fw_type != ATMEL_FW_TYPE_NONE) {
3886 int i;
3887 for (i = 0; firmware_modifier[i]; i++) {
3888 snprintf(priv->firmware_id, 32, "%s%s.%s", fw_table[fw_index].fw_file,
3889 firmware_modifier[i], fw_table[fw_index].fw_file_ext);
3890 priv->firmware_id[31] = '\0';
3891 if (request_firmware(&fw_entry, priv->firmware_id, priv->sys_dev) == 0) {
3892 success = 1;
3893 break;
3894 }
3895 }
3896 }
3897 if (!success) {
3898 printk(KERN_ALERT
3899 "%s: firmware %s is missing, cannot start.\n",
3900 dev->name, priv->firmware_id);
3901 priv->firmware_id[0] = '\0';
3902 return 0;
3903 }
3904 }
3905
3906 fw = fw_entry->data;
3907 len = fw_entry->size;
3908 }
3909
3910 if (len <= 0x6000) {
3911 atmel_write16(priv->dev, BSR, BSS_IRAM);
3912 atmel_copy_to_card(priv->dev, 0, fw, len);
3913 atmel_set_gcr(priv->dev, GCR_REMAP);
3914 } else {
3915 /* Remap */
3916 atmel_set_gcr(priv->dev, GCR_REMAP);
3917 atmel_write16(priv->dev, BSR, BSS_IRAM);
3918 atmel_copy_to_card(priv->dev, 0, fw, 0x6000);
3919 atmel_write16(priv->dev, BSR, 0x2ff);
3920 atmel_copy_to_card(priv->dev, 0x8000, &fw[0x6000], len - 0x6000);
3921 }
3922
3923 if (fw_entry)
3924 release_firmware(fw_entry);
3925 }
3926
3927 if (!atmel_wakeup_firmware(priv))
3928 return 0;
3929
3930 /* Check the version and set the correct flag for wpa stuff,
3931 old and new firmware is incompatible.
3932 The pre-wpa 3com firmware reports major version 5,
3933 the wpa 3com firmware is major version 4 and doesn't need
3934 the 3com broken-ness filter. */
3935 priv->use_wpa = (priv->host_info.major_version == 4);
3936 priv->radio_on_broken = (priv->host_info.major_version == 5);
3937
3938 /* unmask all irq sources */
3939 atmel_wmem8(priv, atmel_hi(priv, IFACE_INT_MASK_OFFSET), 0xff);
3940
3941 /* int Tx system and enable Tx */
3942 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, 0), 0);
3943 atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, 0), 0x80000000L);
3944 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_POS_OFFSET, 0), 0);
3945 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, 0), 0);
3946
3947 priv->tx_desc_free = priv->host_info.tx_desc_count;
3948 priv->tx_desc_head = 0;
3949 priv->tx_desc_tail = 0;
3950 priv->tx_desc_previous = 0;
3951 priv->tx_free_mem = priv->host_info.tx_buff_size;
3952 priv->tx_buff_head = 0;
3953 priv->tx_buff_tail = 0;
3954
3955 configuration = atmel_rmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET));
3956 atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET),
3957 configuration | FUNC_CTRL_TxENABLE);
3958
3959 /* init Rx system and enable */
3960 priv->rx_desc_head = 0;
3961
3962 configuration = atmel_rmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET));
3963 atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET),
3964 configuration | FUNC_CTRL_RxENABLE);
3965
3966 if (!priv->radio_on_broken) {
3967 if (atmel_send_command_wait(priv, CMD_EnableRadio, NULL, 0) ==
3968 CMD_STATUS_REJECTED_RADIO_OFF) {
3969 printk(KERN_INFO
3970 "%s: cannot turn the radio on. (Hey radio, you're beautiful!)\n",
3971 dev->name);
3972 return 0;
3973 }
3974 }
3975
3976 /* set up enough MIB values to run. */
3977 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_AUTO_TX_RATE_POS, priv->auto_tx_rate);
3978 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_TX_PROMISCUOUS_POS, PROM_MODE_OFF);
3979 atmel_set_mib16(priv, Mac_Mib_Type, MAC_MIB_RTS_THRESHOLD_POS, priv->rts_threshold);
3980 atmel_set_mib16(priv, Mac_Mib_Type, MAC_MIB_FRAG_THRESHOLD_POS, priv->frag_threshold);
3981 atmel_set_mib8(priv, Mac_Mib_Type, MAC_MIB_SHORT_RETRY_POS, priv->short_retry);
3982 atmel_set_mib8(priv, Mac_Mib_Type, MAC_MIB_LONG_RETRY_POS, priv->long_retry);
3983 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_PREAMBLE_TYPE, priv->preamble);
3984 atmel_set_mib(priv, Mac_Address_Mib_Type, MAC_ADDR_MIB_MAC_ADDR_POS,
3985 priv->dev->dev_addr, 6);
3986 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE);
3987 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
3988 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_BEACON_PER_POS, priv->default_beacon_period);
3989 atmel_set_mib(priv, Phy_Mib_Type, PHY_MIB_RATE_SET_POS, atmel_basic_rates, 4);
3990 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_PRIVACY_POS, priv->wep_is_on);
3991 if (priv->use_wpa)
3992 build_wpa_mib(priv);
3993 else
3994 build_wep_mib(priv);
3995
3996 if (old_state == STATION_STATE_READY)
3997 {
3998 union iwreq_data wrqu;
3999
4000 wrqu.data.length = 0;
4001 wrqu.data.flags = 0;
4002 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
4003 memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
4004 wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL);
4005 }
4006
4007 return 1;
4008 }
4009
4010 static void atmel_send_command(struct atmel_private *priv, int command,
4011 void *cmd, int cmd_size)
4012 {
4013 if (cmd)
4014 atmel_copy_to_card(priv->dev, atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET),
4015 cmd, cmd_size);
4016
4017 atmel_wmem8(priv, atmel_co(priv, CMD_BLOCK_COMMAND_OFFSET), command);
4018 atmel_wmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET), 0);
4019 }
4020
4021 static int atmel_send_command_wait(struct atmel_private *priv, int command,
4022 void *cmd, int cmd_size)
4023 {
4024 int i, status;
4025
4026 atmel_send_command(priv, command, cmd, cmd_size);
4027
4028 for (i = 5000; i; i--) {
4029 status = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET));
4030 if (status != CMD_STATUS_IDLE &&
4031 status != CMD_STATUS_IN_PROGRESS)
4032 break;
4033 udelay(20);
4034 }
4035
4036 if (i == 0) {
4037 printk(KERN_ALERT "%s: failed to contact MAC.\n", priv->dev->name);
4038 status = CMD_STATUS_HOST_ERROR;
4039 } else {
4040 if (command != CMD_EnableRadio)
4041 status = CMD_STATUS_COMPLETE;
4042 }
4043
4044 return status;
4045 }
4046
4047 static u8 atmel_get_mib8(struct atmel_private *priv, u8 type, u8 index)
4048 {
4049 struct get_set_mib m;
4050 m.type = type;
4051 m.size = 1;
4052 m.index = index;
4053
4054 atmel_send_command_wait(priv, CMD_Get_MIB_Vars, &m, MIB_HEADER_SIZE + 1);
4055 return atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET + MIB_HEADER_SIZE));
4056 }
4057
4058 static void atmel_set_mib8(struct atmel_private *priv, u8 type, u8 index, u8 data)
4059 {
4060 struct get_set_mib m;
4061 m.type = type;
4062 m.size = 1;
4063 m.index = index;
4064 m.data[0] = data;
4065
4066 atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + 1);
4067 }
4068
4069 static void atmel_set_mib16(struct atmel_private *priv, u8 type, u8 index,
4070 u16 data)
4071 {
4072 struct get_set_mib m;
4073 m.type = type;
4074 m.size = 2;
4075 m.index = index;
4076 m.data[0] = data;
4077 m.data[1] = data >> 8;
4078
4079 atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + 2);
4080 }
4081
4082 static void atmel_set_mib(struct atmel_private *priv, u8 type, u8 index,
4083 u8 *data, int data_len)
4084 {
4085 struct get_set_mib m;
4086 m.type = type;
4087 m.size = data_len;
4088 m.index = index;
4089
4090 if (data_len > MIB_MAX_DATA_BYTES)
4091 printk(KERN_ALERT "%s: MIB buffer too small.\n", priv->dev->name);
4092
4093 memcpy(m.data, data, data_len);
4094 atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + data_len);
4095 }
4096
4097 static void atmel_get_mib(struct atmel_private *priv, u8 type, u8 index,
4098 u8 *data, int data_len)
4099 {
4100 struct get_set_mib m;
4101 m.type = type;
4102 m.size = data_len;
4103 m.index = index;
4104
4105 if (data_len > MIB_MAX_DATA_BYTES)
4106 printk(KERN_ALERT "%s: MIB buffer too small.\n", priv->dev->name);
4107
4108 atmel_send_command_wait(priv, CMD_Get_MIB_Vars, &m, MIB_HEADER_SIZE + data_len);
4109 atmel_copy_to_host(priv->dev, data,
4110 atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET + MIB_HEADER_SIZE), data_len);
4111 }
4112
4113 static void atmel_writeAR(struct net_device *dev, u16 data)
4114 {
4115 int i;
4116 outw(data, dev->base_addr + AR);
4117 /* Address register appears to need some convincing..... */
4118 for (i = 0; data != inw(dev->base_addr + AR) && i < 10; i++)
4119 outw(data, dev->base_addr + AR);
4120 }
4121
4122 static void atmel_copy_to_card(struct net_device *dev, u16 dest,
4123 unsigned char *src, u16 len)
4124 {
4125 int i;
4126 atmel_writeAR(dev, dest);
4127 if (dest % 2) {
4128 atmel_write8(dev, DR, *src);
4129 src++; len--;
4130 }
4131 for (i = len; i > 1 ; i -= 2) {
4132 u8 lb = *src++;
4133 u8 hb = *src++;
4134 atmel_write16(dev, DR, lb | (hb << 8));
4135 }
4136 if (i)
4137 atmel_write8(dev, DR, *src);
4138 }
4139
4140 static void atmel_copy_to_host(struct net_device *dev, unsigned char *dest,
4141 u16 src, u16 len)
4142 {
4143 int i;
4144 atmel_writeAR(dev, src);
4145 if (src % 2) {
4146 *dest = atmel_read8(dev, DR);
4147 dest++; len--;
4148 }
4149 for (i = len; i > 1 ; i -= 2) {
4150 u16 hw = atmel_read16(dev, DR);
4151 *dest++ = hw;
4152 *dest++ = hw >> 8;
4153 }
4154 if (i)
4155 *dest = atmel_read8(dev, DR);
4156 }
4157
4158 static void atmel_set_gcr(struct net_device *dev, u16 mask)
4159 {
4160 outw(inw(dev->base_addr + GCR) | mask, dev->base_addr + GCR);
4161 }
4162
4163 static void atmel_clear_gcr(struct net_device *dev, u16 mask)
4164 {
4165 outw(inw(dev->base_addr + GCR) & ~mask, dev->base_addr + GCR);
4166 }
4167
4168 static int atmel_lock_mac(struct atmel_private *priv)
4169 {
4170 int i, j = 20;
4171 retry:
4172 for (i = 5000; i; i--) {
4173 if (!atmel_rmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_HOST_OFFSET)))
4174 break;
4175 udelay(20);
4176 }
4177
4178 if (!i)
4179 return 0; /* timed out */
4180
4181 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 1);
4182 if (atmel_rmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_HOST_OFFSET))) {
4183 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
4184 if (!j--)
4185 return 0; /* timed out */
4186 goto retry;
4187 }
4188
4189 return 1;
4190 }
4191
4192 static void atmel_wmem32(struct atmel_private *priv, u16 pos, u32 data)
4193 {
4194 atmel_writeAR(priv->dev, pos);
4195 atmel_write16(priv->dev, DR, data); /* card is little-endian */
4196 atmel_write16(priv->dev, DR, data >> 16);
4197 }
4198
4199 /***************************************************************************/
4200 /* There follows the source form of the MAC address reading firmware */
4201 /***************************************************************************/
4202 #if 0
4203
4204 /* Copyright 2003 Matthew T. Russotto */
4205 /* But derived from the Atmel 76C502 firmware written by Atmel and */
4206 /* included in "atmel wireless lan drivers" package */
4207 /**
4208 This file is part of net.russotto.AtmelMACFW, hereto referred to
4209 as AtmelMACFW
4210
4211 AtmelMACFW is free software; you can redistribute it and/or modify
4212 it under the terms of the GNU General Public License version 2
4213 as published by the Free Software Foundation.
4214
4215 AtmelMACFW is distributed in the hope that it will be useful,
4216 but WITHOUT ANY WARRANTY; without even the implied warranty of
4217 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4218 GNU General Public License for more details.
4219
4220 You should have received a copy of the GNU General Public License
4221 along with AtmelMACFW; if not, write to the Free Software
4222 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
4223
4224 ****************************************************************************/
4225 /* This firmware should work on the 76C502 RFMD, RFMD_D, and RFMD_E */
4226 /* It will probably work on the 76C504 and 76C502 RFMD_3COM */
4227 /* It only works on SPI EEPROM versions of the card. */
4228
4229 /* This firmware initializes the SPI controller and clock, reads the MAC */
4230 /* address from the EEPROM into SRAM, and puts the SRAM offset of the MAC */
4231 /* address in MR2, and sets MR3 to 0x10 to indicate it is done */
4232 /* It also puts a complete copy of the EEPROM in SRAM with the offset in */
4233 /* MR4, for investigational purposes (maybe we can determine chip type */
4234 /* from that?) */
4235
4236 .org 0
4237 .set MRBASE, 0x8000000
4238 .set CPSR_INITIAL, 0xD3 /* IRQ/FIQ disabled, ARM mode, Supervisor state */
4239 .set CPSR_USER, 0xD1 /* IRQ/FIQ disabled, ARM mode, USER state */
4240 .set SRAM_BASE, 0x02000000
4241 .set SP_BASE, 0x0F300000
4242 .set UNK_BASE, 0x0F000000 /* Some internal device, but which one? */
4243 .set SPI_CGEN_BASE, 0x0E000000 /* Some internal device, but which one? */
4244 .set UNK3_BASE, 0x02014000 /* Some internal device, but which one? */
4245 .set STACK_BASE, 0x5600
4246 .set SP_SR, 0x10
4247 .set SP_TDRE, 2 /* status register bit -- TDR empty */
4248 .set SP_RDRF, 1 /* status register bit -- RDR full */
4249 .set SP_SWRST, 0x80
4250 .set SP_SPIEN, 0x1
4251 .set SP_CR, 0 /* control register */
4252 .set SP_MR, 4 /* mode register */
4253 .set SP_RDR, 0x08 /* Read Data Register */
4254 .set SP_TDR, 0x0C /* Transmit Data Register */
4255 .set SP_CSR0, 0x30 /* chip select registers */
4256 .set SP_CSR1, 0x34
4257 .set SP_CSR2, 0x38
4258 .set SP_CSR3, 0x3C
4259 .set NVRAM_CMD_RDSR, 5 /* read status register */
4260 .set NVRAM_CMD_READ, 3 /* read data */
4261 .set NVRAM_SR_RDY, 1 /* RDY bit. This bit is inverted */
4262 .set SPI_8CLOCKS, 0xFF /* Writing this to the TDR doesn't do anything to the
4263 serial output, since SO is normally high. But it
4264 does cause 8 clock cycles and thus 8 bits to be
4265 clocked in to the chip. See Atmel's SPI
4266 controller (e.g. AT91M55800) timing and 4K
4267 SPI EEPROM manuals */
4268
4269 .set NVRAM_SCRATCH, 0x02000100 /* arbitrary area for scratchpad memory */
4270 .set NVRAM_IMAGE, 0x02000200
4271 .set NVRAM_LENGTH, 0x0200
4272 .set MAC_ADDRESS_MIB, SRAM_BASE
4273 .set MAC_ADDRESS_LENGTH, 6
4274 .set MAC_BOOT_FLAG, 0x10
4275 .set MR1, 0
4276 .set MR2, 4
4277 .set MR3, 8
4278 .set MR4, 0xC
4279 RESET_VECTOR:
4280 b RESET_HANDLER
4281 UNDEF_VECTOR:
4282 b HALT1
4283 SWI_VECTOR:
4284 b HALT1
4285 IABORT_VECTOR:
4286 b HALT1
4287 DABORT_VECTOR:
4288 RESERVED_VECTOR:
4289 b HALT1
4290 IRQ_VECTOR:
4291 b HALT1
4292 FIQ_VECTOR:
4293 b HALT1
4294 HALT1: b HALT1
4295 RESET_HANDLER:
4296 mov r0, #CPSR_INITIAL
4297 msr CPSR_c, r0 /* This is probably unnecessary */
4298
4299 /* I'm guessing this is initializing clock generator electronics for SPI */
4300 ldr r0, =SPI_CGEN_BASE
4301 mov r1, #0
4302 mov r1, r1, lsl #3
4303 orr r1,r1, #0
4304 str r1, [r0]
4305 ldr r1, [r0, #28]
4306 bic r1, r1, #16
4307 str r1, [r0, #28]
4308 mov r1, #1
4309 str r1, [r0, #8]
4310
4311 ldr r0, =MRBASE
4312 mov r1, #0
4313 strh r1, [r0, #MR1]
4314 strh r1, [r0, #MR2]
4315 strh r1, [r0, #MR3]
4316 strh r1, [r0, #MR4]
4317
4318 mov sp, #STACK_BASE
4319 bl SP_INIT
4320 mov r0, #10
4321 bl DELAY9
4322 bl GET_MAC_ADDR
4323 bl GET_WHOLE_NVRAM
4324 ldr r0, =MRBASE
4325 ldr r1, =MAC_ADDRESS_MIB
4326 strh r1, [r0, #MR2]
4327 ldr r1, =NVRAM_IMAGE
4328 strh r1, [r0, #MR4]
4329 mov r1, #MAC_BOOT_FLAG
4330 strh r1, [r0, #MR3]
4331 HALT2: b HALT2
4332 .func Get_Whole_NVRAM, GET_WHOLE_NVRAM
4333 GET_WHOLE_NVRAM:
4334 stmdb sp!, {lr}
4335 mov r2, #0 /* 0th bytes of NVRAM */
4336 mov r3, #NVRAM_LENGTH
4337 mov r1, #0 /* not used in routine */
4338 ldr r0, =NVRAM_IMAGE
4339 bl NVRAM_XFER
4340 ldmia sp!, {lr}
4341 bx lr
4342 .endfunc
4343
4344 .func Get_MAC_Addr, GET_MAC_ADDR
4345 GET_MAC_ADDR:
4346 stmdb sp!, {lr}
4347 mov r2, #0x120 /* address of MAC Address within NVRAM */
4348 mov r3, #MAC_ADDRESS_LENGTH
4349 mov r1, #0 /* not used in routine */
4350 ldr r0, =MAC_ADDRESS_MIB
4351 bl NVRAM_XFER
4352 ldmia sp!, {lr}
4353 bx lr
4354 .endfunc
4355 .ltorg
4356 .func Delay9, DELAY9
4357 DELAY9:
4358 adds r0, r0, r0, LSL #3 /* r0 = r0 * 9 */
4359 DELAYLOOP:
4360 beq DELAY9_done
4361 subs r0, r0, #1
4362 b DELAYLOOP
4363 DELAY9_done:
4364 bx lr
4365 .endfunc
4366
4367 .func SP_Init, SP_INIT
4368 SP_INIT:
4369 mov r1, #SP_SWRST
4370 ldr r0, =SP_BASE
4371 str r1, [r0, #SP_CR] /* reset the SPI */
4372 mov r1, #0
4373 str r1, [r0, #SP_CR] /* release SPI from reset state */
4374 mov r1, #SP_SPIEN
4375 str r1, [r0, #SP_MR] /* set the SPI to MASTER mode*/
4376 str r1, [r0, #SP_CR] /* enable the SPI */
4377
4378 /* My guess would be this turns on the SPI clock */
4379 ldr r3, =SPI_CGEN_BASE
4380 ldr r1, [r3, #28]
4381 orr r1, r1, #0x2000
4382 str r1, [r3, #28]
4383
4384 ldr r1, =0x2000c01
4385 str r1, [r0, #SP_CSR0]
4386 ldr r1, =0x2000201
4387 str r1, [r0, #SP_CSR1]
4388 str r1, [r0, #SP_CSR2]
4389 str r1, [r0, #SP_CSR3]
4390 ldr r1, [r0, #SP_SR]
4391 ldr r0, [r0, #SP_RDR]
4392 bx lr
4393 .endfunc
4394 .func NVRAM_Init, NVRAM_INIT
4395 NVRAM_INIT:
4396 ldr r1, =SP_BASE
4397 ldr r0, [r1, #SP_RDR]
4398 mov r0, #NVRAM_CMD_RDSR
4399 str r0, [r1, #SP_TDR]
4400 SP_loop1:
4401 ldr r0, [r1, #SP_SR]
4402 tst r0, #SP_TDRE
4403 beq SP_loop1
4404
4405 mov r0, #SPI_8CLOCKS
4406 str r0, [r1, #SP_TDR]
4407 SP_loop2:
4408 ldr r0, [r1, #SP_SR]
4409 tst r0, #SP_TDRE
4410 beq SP_loop2
4411
4412 ldr r0, [r1, #SP_RDR]
4413 SP_loop3:
4414 ldr r0, [r1, #SP_SR]
4415 tst r0, #SP_RDRF
4416 beq SP_loop3
4417
4418 ldr r0, [r1, #SP_RDR]
4419 and r0, r0, #255
4420 bx lr
4421 .endfunc
4422
4423 .func NVRAM_Xfer, NVRAM_XFER
4424 /* r0 = dest address */
4425 /* r1 = not used */
4426 /* r2 = src address within NVRAM */
4427 /* r3 = length */
4428 NVRAM_XFER:
4429 stmdb sp!, {r4, r5, lr}
4430 mov r5, r0 /* save r0 (dest address) */
4431 mov r4, r3 /* save r3 (length) */
4432 mov r0, r2, LSR #5 /* SPI memories put A8 in the command field */
4433 and r0, r0, #8
4434 add r0, r0, #NVRAM_CMD_READ
4435 ldr r1, =NVRAM_SCRATCH
4436 strb r0, [r1, #0] /* save command in NVRAM_SCRATCH[0] */
4437 strb r2, [r1, #1] /* save low byte of source address in NVRAM_SCRATCH[1] */
4438 _local1:
4439 bl NVRAM_INIT
4440 tst r0, #NVRAM_SR_RDY
4441 bne _local1
4442 mov r0, #20
4443 bl DELAY9
4444 mov r2, r4 /* length */
4445 mov r1, r5 /* dest address */
4446 mov r0, #2 /* bytes to transfer in command */
4447 bl NVRAM_XFER2
4448 ldmia sp!, {r4, r5, lr}
4449 bx lr
4450 .endfunc
4451
4452 .func NVRAM_Xfer2, NVRAM_XFER2
4453 NVRAM_XFER2:
4454 stmdb sp!, {r4, r5, r6, lr}
4455 ldr r4, =SP_BASE
4456 mov r3, #0
4457 cmp r0, #0
4458 bls _local2
4459 ldr r5, =NVRAM_SCRATCH
4460 _local4:
4461 ldrb r6, [r5, r3]
4462 str r6, [r4, #SP_TDR]
4463 _local3:
4464 ldr r6, [r4, #SP_SR]
4465 tst r6, #SP_TDRE
4466 beq _local3
4467 add r3, r3, #1
4468 cmp r3, r0 /* r0 is # of bytes to send out (command+addr) */
4469 blo _local4
4470 _local2:
4471 mov r3, #SPI_8CLOCKS
4472 str r3, [r4, #SP_TDR]
4473 ldr r0, [r4, #SP_RDR]
4474 _local5:
4475 ldr r0, [r4, #SP_SR]
4476 tst r0, #SP_RDRF
4477 beq _local5
4478 ldr r0, [r4, #SP_RDR] /* what's this byte? It's the byte read while writing the TDR -- nonsense, because the NVRAM doesn't read and write at the same time */
4479 mov r0, #0
4480 cmp r2, #0 /* r2 is # of bytes to copy in */
4481 bls _local6
4482 _local7:
4483 ldr r5, [r4, #SP_SR]
4484 tst r5, #SP_TDRE
4485 beq _local7
4486 str r3, [r4, #SP_TDR] /* r3 has SPI_8CLOCKS */
4487 _local8:
4488 ldr r5, [r4, #SP_SR]
4489 tst r5, #SP_RDRF
4490 beq _local8
4491 ldr r5, [r4, #SP_RDR] /* but didn't we read this byte above? */
4492 strb r5, [r1], #1 /* postindexed */
4493 add r0, r0, #1
4494 cmp r0, r2
4495 blo _local7 /* since we don't send another address, the NVRAM must be capable of sequential reads */
4496 _local6:
4497 mov r0, #200
4498 bl DELAY9
4499 ldmia sp!, {r4, r5, r6, lr}
4500 bx lr
4501 #endif
Support for the Chinese Samsung S3C2440 based development boards