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x86: move es7000_plat closer to its user
[linux-2.6/mini2440.git] / drivers / char / hpet.c
blob1399971be6890c2167aea675a51b77bfce3f41d5
1 /*
2 * Intel & MS High Precision Event Timer Implementation.
3 *
4 * Copyright (C) 2003 Intel Corporation
5 * Venki Pallipadi
6 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
7 * Bob Picco <robert.picco@hp.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/types.h>
18 #include <linux/miscdevice.h>
19 #include <linux/major.h>
20 #include <linux/ioport.h>
21 #include <linux/fcntl.h>
22 #include <linux/init.h>
23 #include <linux/poll.h>
24 #include <linux/mm.h>
25 #include <linux/proc_fs.h>
26 #include <linux/spinlock.h>
27 #include <linux/sysctl.h>
28 #include <linux/wait.h>
29 #include <linux/bcd.h>
30 #include <linux/seq_file.h>
31 #include <linux/bitops.h>
32 #include <linux/clocksource.h>
33
34 #include <asm/current.h>
35 #include <asm/uaccess.h>
36 #include <asm/system.h>
37 #include <asm/io.h>
38 #include <asm/irq.h>
39 #include <asm/div64.h>
40
41 #include <linux/acpi.h>
42 #include <acpi/acpi_bus.h>
43 #include <linux/hpet.h>
44
45 /*
46 * The High Precision Event Timer driver.
47 * This driver is closely modelled after the rtc.c driver.
48 * http://www.intel.com/hardwaredesign/hpetspec.htm
49 */
50 #define HPET_USER_FREQ (64)
51 #define HPET_DRIFT (500)
52
53 #define HPET_RANGE_SIZE 1024 /* from HPET spec */
54
55 #if BITS_PER_LONG == 64
56 #define write_counter(V, MC) writeq(V, MC)
57 #define read_counter(MC) readq(MC)
58 #else
59 #define write_counter(V, MC) writel(V, MC)
60 #define read_counter(MC) readl(MC)
61 #endif
62
63 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
64
65 /* This clocksource driver currently only works on ia64 */
66 #ifdef CONFIG_IA64
67 static void __iomem *hpet_mctr;
68
69 static cycle_t read_hpet(void)
70 {
71 return (cycle_t)read_counter((void __iomem *)hpet_mctr);
72 }
73
74 static struct clocksource clocksource_hpet = {
75 .name = "hpet",
76 .rating = 250,
77 .read = read_hpet,
78 .mask = CLOCKSOURCE_MASK(64),
79 .mult = 0, /*to be caluclated*/
80 .shift = 10,
81 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
82 };
83 static struct clocksource *hpet_clocksource;
84 #endif
85
86 /* A lock for concurrent access by app and isr hpet activity. */
87 static DEFINE_SPINLOCK(hpet_lock);
88 /* A lock for concurrent intermodule access to hpet and isr hpet activity. */
89 static DEFINE_SPINLOCK(hpet_task_lock);
90
91 #define HPET_DEV_NAME (7)
92
93 struct hpet_dev {
94 struct hpets *hd_hpets;
95 struct hpet __iomem *hd_hpet;
96 struct hpet_timer __iomem *hd_timer;
97 unsigned long hd_ireqfreq;
98 unsigned long hd_irqdata;
99 wait_queue_head_t hd_waitqueue;
100 struct fasync_struct *hd_async_queue;
101 struct hpet_task *hd_task;
102 unsigned int hd_flags;
103 unsigned int hd_irq;
104 unsigned int hd_hdwirq;
105 char hd_name[HPET_DEV_NAME];
106 };
107
108 struct hpets {
109 struct hpets *hp_next;
110 struct hpet __iomem *hp_hpet;
111 unsigned long hp_hpet_phys;
112 struct clocksource *hp_clocksource;
113 unsigned long long hp_tick_freq;
114 unsigned long hp_delta;
115 unsigned int hp_ntimer;
116 unsigned int hp_which;
117 struct hpet_dev hp_dev[1];
118 };
119
120 static struct hpets *hpets;
121
122 #define HPET_OPEN 0x0001
123 #define HPET_IE 0x0002 /* interrupt enabled */
124 #define HPET_PERIODIC 0x0004
125 #define HPET_SHARED_IRQ 0x0008
126
127
128 #ifndef readq
129 static inline unsigned long long readq(void __iomem *addr)
130 {
131 return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
132 }
133 #endif
134
135 #ifndef writeq
136 static inline void writeq(unsigned long long v, void __iomem *addr)
137 {
138 writel(v & 0xffffffff, addr);
139 writel(v >> 32, addr + 4);
140 }
141 #endif
142
143 static irqreturn_t hpet_interrupt(int irq, void *data)
144 {
145 struct hpet_dev *devp;
146 unsigned long isr;
147
148 devp = data;
149 isr = 1 << (devp - devp->hd_hpets->hp_dev);
150
151 if ((devp->hd_flags & HPET_SHARED_IRQ) &&
152 !(isr & readl(&devp->hd_hpet->hpet_isr)))
153 return IRQ_NONE;
154
155 spin_lock(&hpet_lock);
156 devp->hd_irqdata++;
157
158 /*
159 * For non-periodic timers, increment the accumulator.
160 * This has the effect of treating non-periodic like periodic.
161 */
162 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
163 unsigned long m, t;
164
165 t = devp->hd_ireqfreq;
166 m = read_counter(&devp->hd_hpet->hpet_mc);
167 write_counter(t + m + devp->hd_hpets->hp_delta,
168 &devp->hd_timer->hpet_compare);
169 }
170
171 if (devp->hd_flags & HPET_SHARED_IRQ)
172 writel(isr, &devp->hd_hpet->hpet_isr);
173 spin_unlock(&hpet_lock);
174
175 spin_lock(&hpet_task_lock);
176 if (devp->hd_task)
177 devp->hd_task->ht_func(devp->hd_task->ht_data);
178 spin_unlock(&hpet_task_lock);
179
180 wake_up_interruptible(&devp->hd_waitqueue);
181
182 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
183
184 return IRQ_HANDLED;
185 }
186
187 static int hpet_open(struct inode *inode, struct file *file)
188 {
189 struct hpet_dev *devp;
190 struct hpets *hpetp;
191 int i;
192
193 if (file->f_mode & FMODE_WRITE)
194 return -EINVAL;
195
196 spin_lock_irq(&hpet_lock);
197
198 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
199 for (i = 0; i < hpetp->hp_ntimer; i++)
200 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN
201 || hpetp->hp_dev[i].hd_task)
202 continue;
203 else {
204 devp = &hpetp->hp_dev[i];
205 break;
206 }
207
208 if (!devp) {
209 spin_unlock_irq(&hpet_lock);
210 return -EBUSY;
211 }
212
213 file->private_data = devp;
214 devp->hd_irqdata = 0;
215 devp->hd_flags |= HPET_OPEN;
216 spin_unlock_irq(&hpet_lock);
217
218 return 0;
219 }
220
221 static ssize_t
222 hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
223 {
224 DECLARE_WAITQUEUE(wait, current);
225 unsigned long data;
226 ssize_t retval;
227 struct hpet_dev *devp;
228
229 devp = file->private_data;
230 if (!devp->hd_ireqfreq)
231 return -EIO;
232
233 if (count < sizeof(unsigned long))
234 return -EINVAL;
235
236 add_wait_queue(&devp->hd_waitqueue, &wait);
237
238 for ( ; ; ) {
239 set_current_state(TASK_INTERRUPTIBLE);
240
241 spin_lock_irq(&hpet_lock);
242 data = devp->hd_irqdata;
243 devp->hd_irqdata = 0;
244 spin_unlock_irq(&hpet_lock);
245
246 if (data)
247 break;
248 else if (file->f_flags & O_NONBLOCK) {
249 retval = -EAGAIN;
250 goto out;
251 } else if (signal_pending(current)) {
252 retval = -ERESTARTSYS;
253 goto out;
254 }
255 schedule();
256 }
257
258 retval = put_user(data, (unsigned long __user *)buf);
259 if (!retval)
260 retval = sizeof(unsigned long);
261 out:
262 __set_current_state(TASK_RUNNING);
263 remove_wait_queue(&devp->hd_waitqueue, &wait);
264
265 return retval;
266 }
267
268 static unsigned int hpet_poll(struct file *file, poll_table * wait)
269 {
270 unsigned long v;
271 struct hpet_dev *devp;
272
273 devp = file->private_data;
274
275 if (!devp->hd_ireqfreq)
276 return 0;
277
278 poll_wait(file, &devp->hd_waitqueue, wait);
279
280 spin_lock_irq(&hpet_lock);
281 v = devp->hd_irqdata;
282 spin_unlock_irq(&hpet_lock);
283
284 if (v != 0)
285 return POLLIN | POLLRDNORM;
286
287 return 0;
288 }
289
290 static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
291 {
292 #ifdef CONFIG_HPET_MMAP
293 struct hpet_dev *devp;
294 unsigned long addr;
295
296 if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff)
297 return -EINVAL;
298
299 devp = file->private_data;
300 addr = devp->hd_hpets->hp_hpet_phys;
301
302 if (addr & (PAGE_SIZE - 1))
303 return -ENOSYS;
304
305 vma->vm_flags |= VM_IO;
306 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
307
308 if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT,
309 PAGE_SIZE, vma->vm_page_prot)) {
310 printk(KERN_ERR "%s: io_remap_pfn_range failed\n",
311 __FUNCTION__);
312 return -EAGAIN;
313 }
314
315 return 0;
316 #else
317 return -ENOSYS;
318 #endif
319 }
320
321 static int hpet_fasync(int fd, struct file *file, int on)
322 {
323 struct hpet_dev *devp;
324
325 devp = file->private_data;
326
327 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
328 return 0;
329 else
330 return -EIO;
331 }
332
333 static int hpet_release(struct inode *inode, struct file *file)
334 {
335 struct hpet_dev *devp;
336 struct hpet_timer __iomem *timer;
337 int irq = 0;
338
339 devp = file->private_data;
340 timer = devp->hd_timer;
341
342 spin_lock_irq(&hpet_lock);
343
344 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
345 &timer->hpet_config);
346
347 irq = devp->hd_irq;
348 devp->hd_irq = 0;
349
350 devp->hd_ireqfreq = 0;
351
352 if (devp->hd_flags & HPET_PERIODIC
353 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
354 unsigned long v;
355
356 v = readq(&timer->hpet_config);
357 v ^= Tn_TYPE_CNF_MASK;
358 writeq(v, &timer->hpet_config);
359 }
360
361 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
362 spin_unlock_irq(&hpet_lock);
363
364 if (irq)
365 free_irq(irq, devp);
366
367 if (file->f_flags & FASYNC)
368 hpet_fasync(-1, file, 0);
369
370 file->private_data = NULL;
371 return 0;
372 }
373
374 static int hpet_ioctl_common(struct hpet_dev *, int, unsigned long, int);
375
376 static int
377 hpet_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
378 unsigned long arg)
379 {
380 struct hpet_dev *devp;
381
382 devp = file->private_data;
383 return hpet_ioctl_common(devp, cmd, arg, 0);
384 }
385
386 static int hpet_ioctl_ieon(struct hpet_dev *devp)
387 {
388 struct hpet_timer __iomem *timer;
389 struct hpet __iomem *hpet;
390 struct hpets *hpetp;
391 int irq;
392 unsigned long g, v, t, m;
393 unsigned long flags, isr;
394
395 timer = devp->hd_timer;
396 hpet = devp->hd_hpet;
397 hpetp = devp->hd_hpets;
398
399 if (!devp->hd_ireqfreq)
400 return -EIO;
401
402 spin_lock_irq(&hpet_lock);
403
404 if (devp->hd_flags & HPET_IE) {
405 spin_unlock_irq(&hpet_lock);
406 return -EBUSY;
407 }
408
409 devp->hd_flags |= HPET_IE;
410
411 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
412 devp->hd_flags |= HPET_SHARED_IRQ;
413 spin_unlock_irq(&hpet_lock);
414
415 irq = devp->hd_hdwirq;
416
417 if (irq) {
418 unsigned long irq_flags;
419
420 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
421 irq_flags = devp->hd_flags & HPET_SHARED_IRQ
422 ? IRQF_SHARED : IRQF_DISABLED;
423 if (request_irq(irq, hpet_interrupt, irq_flags,
424 devp->hd_name, (void *)devp)) {
425 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
426 irq = 0;
427 }
428 }
429
430 if (irq == 0) {
431 spin_lock_irq(&hpet_lock);
432 devp->hd_flags ^= HPET_IE;
433 spin_unlock_irq(&hpet_lock);
434 return -EIO;
435 }
436
437 devp->hd_irq = irq;
438 t = devp->hd_ireqfreq;
439 v = readq(&timer->hpet_config);
440 g = v | Tn_INT_ENB_CNF_MASK;
441
442 if (devp->hd_flags & HPET_PERIODIC) {
443 write_counter(t, &timer->hpet_compare);
444 g |= Tn_TYPE_CNF_MASK;
445 v |= Tn_TYPE_CNF_MASK;
446 writeq(v, &timer->hpet_config);
447 v |= Tn_VAL_SET_CNF_MASK;
448 writeq(v, &timer->hpet_config);
449 local_irq_save(flags);
450 m = read_counter(&hpet->hpet_mc);
451 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
452 } else {
453 local_irq_save(flags);
454 m = read_counter(&hpet->hpet_mc);
455 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
456 }
457
458 if (devp->hd_flags & HPET_SHARED_IRQ) {
459 isr = 1 << (devp - devp->hd_hpets->hp_dev);
460 writel(isr, &hpet->hpet_isr);
461 }
462 writeq(g, &timer->hpet_config);
463 local_irq_restore(flags);
464
465 return 0;
466 }
467
468 /* converts Hz to number of timer ticks */
469 static inline unsigned long hpet_time_div(struct hpets *hpets,
470 unsigned long dis)
471 {
472 unsigned long long m;
473
474 m = hpets->hp_tick_freq + (dis >> 1);
475 do_div(m, dis);
476 return (unsigned long)m;
477 }
478
479 static int
480 hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg, int kernel)
481 {
482 struct hpet_timer __iomem *timer;
483 struct hpet __iomem *hpet;
484 struct hpets *hpetp;
485 int err;
486 unsigned long v;
487
488 switch (cmd) {
489 case HPET_IE_OFF:
490 case HPET_INFO:
491 case HPET_EPI:
492 case HPET_DPI:
493 case HPET_IRQFREQ:
494 timer = devp->hd_timer;
495 hpet = devp->hd_hpet;
496 hpetp = devp->hd_hpets;
497 break;
498 case HPET_IE_ON:
499 return hpet_ioctl_ieon(devp);
500 default:
501 return -EINVAL;
502 }
503
504 err = 0;
505
506 switch (cmd) {
507 case HPET_IE_OFF:
508 if ((devp->hd_flags & HPET_IE) == 0)
509 break;
510 v = readq(&timer->hpet_config);
511 v &= ~Tn_INT_ENB_CNF_MASK;
512 writeq(v, &timer->hpet_config);
513 if (devp->hd_irq) {
514 free_irq(devp->hd_irq, devp);
515 devp->hd_irq = 0;
516 }
517 devp->hd_flags ^= HPET_IE;
518 break;
519 case HPET_INFO:
520 {
521 struct hpet_info info;
522
523 if (devp->hd_ireqfreq)
524 info.hi_ireqfreq =
525 hpet_time_div(hpetp, devp->hd_ireqfreq);
526 else
527 info.hi_ireqfreq = 0;
528 info.hi_flags =
529 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
530 info.hi_hpet = hpetp->hp_which;
531 info.hi_timer = devp - hpetp->hp_dev;
532 if (kernel)
533 memcpy((void *)arg, &info, sizeof(info));
534 else
535 if (copy_to_user((void __user *)arg, &info,
536 sizeof(info)))
537 err = -EFAULT;
538 break;
539 }
540 case HPET_EPI:
541 v = readq(&timer->hpet_config);
542 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
543 err = -ENXIO;
544 break;
545 }
546 devp->hd_flags |= HPET_PERIODIC;
547 break;
548 case HPET_DPI:
549 v = readq(&timer->hpet_config);
550 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
551 err = -ENXIO;
552 break;
553 }
554 if (devp->hd_flags & HPET_PERIODIC &&
555 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
556 v = readq(&timer->hpet_config);
557 v ^= Tn_TYPE_CNF_MASK;
558 writeq(v, &timer->hpet_config);
559 }
560 devp->hd_flags &= ~HPET_PERIODIC;
561 break;
562 case HPET_IRQFREQ:
563 if (!kernel && (arg > hpet_max_freq) &&
564 !capable(CAP_SYS_RESOURCE)) {
565 err = -EACCES;
566 break;
567 }
568
569 if (!arg) {
570 err = -EINVAL;
571 break;
572 }
573
574 devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
575 }
576
577 return err;
578 }
579
580 static const struct file_operations hpet_fops = {
581 .owner = THIS_MODULE,
582 .llseek = no_llseek,
583 .read = hpet_read,
584 .poll = hpet_poll,
585 .ioctl = hpet_ioctl,
586 .open = hpet_open,
587 .release = hpet_release,
588 .fasync = hpet_fasync,
589 .mmap = hpet_mmap,
590 };
591
592 static int hpet_is_known(struct hpet_data *hdp)
593 {
594 struct hpets *hpetp;
595
596 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
597 if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
598 return 1;
599
600 return 0;
601 }
602
603 static inline int hpet_tpcheck(struct hpet_task *tp)
604 {
605 struct hpet_dev *devp;
606 struct hpets *hpetp;
607
608 devp = tp->ht_opaque;
609
610 if (!devp)
611 return -ENXIO;
612
613 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
614 if (devp >= hpetp->hp_dev
615 && devp < (hpetp->hp_dev + hpetp->hp_ntimer)
616 && devp->hd_hpet == hpetp->hp_hpet)
617 return 0;
618
619 return -ENXIO;
620 }
621
622 int hpet_unregister(struct hpet_task *tp)
623 {
624 struct hpet_dev *devp;
625 struct hpet_timer __iomem *timer;
626 int err;
627
628 if ((err = hpet_tpcheck(tp)))
629 return err;
630
631 spin_lock_irq(&hpet_task_lock);
632 spin_lock(&hpet_lock);
633
634 devp = tp->ht_opaque;
635 if (devp->hd_task != tp) {
636 spin_unlock(&hpet_lock);
637 spin_unlock_irq(&hpet_task_lock);
638 return -ENXIO;
639 }
640
641 timer = devp->hd_timer;
642 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
643 &timer->hpet_config);
644 devp->hd_flags &= ~(HPET_IE | HPET_PERIODIC);
645 devp->hd_task = NULL;
646 spin_unlock(&hpet_lock);
647 spin_unlock_irq(&hpet_task_lock);
648
649 return 0;
650 }
651
652 static ctl_table hpet_table[] = {
653 {
654 .ctl_name = CTL_UNNUMBERED,
655 .procname = "max-user-freq",
656 .data = &hpet_max_freq,
657 .maxlen = sizeof(int),
658 .mode = 0644,
659 .proc_handler = &proc_dointvec,
660 },
661 {.ctl_name = 0}
662 };
663
664 static ctl_table hpet_root[] = {
665 {
666 .ctl_name = CTL_UNNUMBERED,
667 .procname = "hpet",
668 .maxlen = 0,
669 .mode = 0555,
670 .child = hpet_table,
671 },
672 {.ctl_name = 0}
673 };
674
675 static ctl_table dev_root[] = {
676 {
677 .ctl_name = CTL_DEV,
678 .procname = "dev",
679 .maxlen = 0,
680 .mode = 0555,
681 .child = hpet_root,
682 },
683 {.ctl_name = 0}
684 };
685
686 static struct ctl_table_header *sysctl_header;
687
688 /*
689 * Adjustment for when arming the timer with
690 * initial conditions. That is, main counter
691 * ticks expired before interrupts are enabled.
692 */
693 #define TICK_CALIBRATE (1000UL)
694
695 static unsigned long hpet_calibrate(struct hpets *hpetp)
696 {
697 struct hpet_timer __iomem *timer = NULL;
698 unsigned long t, m, count, i, flags, start;
699 struct hpet_dev *devp;
700 int j;
701 struct hpet __iomem *hpet;
702
703 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
704 if ((devp->hd_flags & HPET_OPEN) == 0) {
705 timer = devp->hd_timer;
706 break;
707 }
708
709 if (!timer)
710 return 0;
711
712 hpet = hpetp->hp_hpet;
713 t = read_counter(&timer->hpet_compare);
714
715 i = 0;
716 count = hpet_time_div(hpetp, TICK_CALIBRATE);
717
718 local_irq_save(flags);
719
720 start = read_counter(&hpet->hpet_mc);
721
722 do {
723 m = read_counter(&hpet->hpet_mc);
724 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
725 } while (i++, (m - start) < count);
726
727 local_irq_restore(flags);
728
729 return (m - start) / i;
730 }
731
732 int hpet_alloc(struct hpet_data *hdp)
733 {
734 u64 cap, mcfg;
735 struct hpet_dev *devp;
736 u32 i, ntimer;
737 struct hpets *hpetp;
738 size_t siz;
739 struct hpet __iomem *hpet;
740 static struct hpets *last = NULL;
741 unsigned long period;
742 unsigned long long temp;
743
744 /*
745 * hpet_alloc can be called by platform dependent code.
746 * If platform dependent code has allocated the hpet that
747 * ACPI has also reported, then we catch it here.
748 */
749 if (hpet_is_known(hdp)) {
750 printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
751 __FUNCTION__);
752 return 0;
753 }
754
755 siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
756 sizeof(struct hpet_dev));
757
758 hpetp = kzalloc(siz, GFP_KERNEL);
759
760 if (!hpetp)
761 return -ENOMEM;
762
763 hpetp->hp_which = hpet_nhpet++;
764 hpetp->hp_hpet = hdp->hd_address;
765 hpetp->hp_hpet_phys = hdp->hd_phys_address;
766
767 hpetp->hp_ntimer = hdp->hd_nirqs;
768
769 for (i = 0; i < hdp->hd_nirqs; i++)
770 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
771
772 hpet = hpetp->hp_hpet;
773
774 cap = readq(&hpet->hpet_cap);
775
776 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
777
778 if (hpetp->hp_ntimer != ntimer) {
779 printk(KERN_WARNING "hpet: number irqs doesn't agree"
780 " with number of timers\n");
781 kfree(hpetp);
782 return -ENODEV;
783 }
784
785 if (last)
786 last->hp_next = hpetp;
787 else
788 hpets = hpetp;
789
790 last = hpetp;
791
792 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
793 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
794 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
795 temp += period >> 1; /* round */
796 do_div(temp, period);
797 hpetp->hp_tick_freq = temp; /* ticks per second */
798
799 printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
800 hpetp->hp_which, hdp->hd_phys_address,
801 hpetp->hp_ntimer > 1 ? "s" : "");
802 for (i = 0; i < hpetp->hp_ntimer; i++)
803 printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
804 printk("\n");
805
806 printk(KERN_INFO "hpet%u: %u %d-bit timers, %Lu Hz\n",
807 hpetp->hp_which, hpetp->hp_ntimer,
808 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32, hpetp->hp_tick_freq);
809
810 mcfg = readq(&hpet->hpet_config);
811 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
812 write_counter(0L, &hpet->hpet_mc);
813 mcfg |= HPET_ENABLE_CNF_MASK;
814 writeq(mcfg, &hpet->hpet_config);
815 }
816
817 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
818 struct hpet_timer __iomem *timer;
819
820 timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
821
822 devp->hd_hpets = hpetp;
823 devp->hd_hpet = hpet;
824 devp->hd_timer = timer;
825
826 /*
827 * If the timer was reserved by platform code,
828 * then make timer unavailable for opens.
829 */
830 if (hdp->hd_state & (1 << i)) {
831 devp->hd_flags = HPET_OPEN;
832 continue;
833 }
834
835 init_waitqueue_head(&devp->hd_waitqueue);
836 }
837
838 hpetp->hp_delta = hpet_calibrate(hpetp);
839
840 /* This clocksource driver currently only works on ia64 */
841 #ifdef CONFIG_IA64
842 if (!hpet_clocksource) {
843 hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
844 CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr);
845 clocksource_hpet.mult = clocksource_hz2mult(hpetp->hp_tick_freq,
846 clocksource_hpet.shift);
847 clocksource_register(&clocksource_hpet);
848 hpetp->hp_clocksource = &clocksource_hpet;
849 hpet_clocksource = &clocksource_hpet;
850 }
851 #endif
852
853 return 0;
854 }
855
856 static acpi_status hpet_resources(struct acpi_resource *res, void *data)
857 {
858 struct hpet_data *hdp;
859 acpi_status status;
860 struct acpi_resource_address64 addr;
861
862 hdp = data;
863
864 status = acpi_resource_to_address64(res, &addr);
865
866 if (ACPI_SUCCESS(status)) {
867 hdp->hd_phys_address = addr.minimum;
868 hdp->hd_address = ioremap(addr.minimum, addr.address_length);
869
870 if (hpet_is_known(hdp)) {
871 printk(KERN_DEBUG "%s: 0x%lx is busy\n",
872 __FUNCTION__, hdp->hd_phys_address);
873 iounmap(hdp->hd_address);
874 return AE_ALREADY_EXISTS;
875 }
876 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
877 struct acpi_resource_fixed_memory32 *fixmem32;
878
879 fixmem32 = &res->data.fixed_memory32;
880 if (!fixmem32)
881 return AE_NO_MEMORY;
882
883 hdp->hd_phys_address = fixmem32->address;
884 hdp->hd_address = ioremap(fixmem32->address,
885 HPET_RANGE_SIZE);
886
887 if (hpet_is_known(hdp)) {
888 printk(KERN_DEBUG "%s: 0x%lx is busy\n",
889 __FUNCTION__, hdp->hd_phys_address);
890 iounmap(hdp->hd_address);
891 return AE_ALREADY_EXISTS;
892 }
893 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
894 struct acpi_resource_extended_irq *irqp;
895 int i, irq;
896
897 irqp = &res->data.extended_irq;
898
899 for (i = 0; i < irqp->interrupt_count; i++) {
900 irq = acpi_register_gsi(irqp->interrupts[i],
901 irqp->triggering, irqp->polarity);
902 if (irq < 0)
903 return AE_ERROR;
904
905 hdp->hd_irq[hdp->hd_nirqs] = irq;
906 hdp->hd_nirqs++;
907 }
908 }
909
910 return AE_OK;
911 }
912
913 static int hpet_acpi_add(struct acpi_device *device)
914 {
915 acpi_status result;
916 struct hpet_data data;
917
918 memset(&data, 0, sizeof(data));
919
920 result =
921 acpi_walk_resources(device->handle, METHOD_NAME__CRS,
922 hpet_resources, &data);
923
924 if (ACPI_FAILURE(result))
925 return -ENODEV;
926
927 if (!data.hd_address || !data.hd_nirqs) {
928 printk("%s: no address or irqs in _CRS\n", __FUNCTION__);
929 return -ENODEV;
930 }
931
932 return hpet_alloc(&data);
933 }
934
935 static int hpet_acpi_remove(struct acpi_device *device, int type)
936 {
937 /* XXX need to unregister clocksource, dealloc mem, etc */
938 return -EINVAL;
939 }
940
941 static const struct acpi_device_id hpet_device_ids[] = {
942 {"PNP0103", 0},
943 {"", 0},
944 };
945 MODULE_DEVICE_TABLE(acpi, hpet_device_ids);
946
947 static struct acpi_driver hpet_acpi_driver = {
948 .name = "hpet",
949 .ids = hpet_device_ids,
950 .ops = {
951 .add = hpet_acpi_add,
952 .remove = hpet_acpi_remove,
953 },
954 };
955
956 static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
957
958 static int __init hpet_init(void)
959 {
960 int result;
961
962 result = misc_register(&hpet_misc);
963 if (result < 0)
964 return -ENODEV;
965
966 sysctl_header = register_sysctl_table(dev_root);
967
968 result = acpi_bus_register_driver(&hpet_acpi_driver);
969 if (result < 0) {
970 if (sysctl_header)
971 unregister_sysctl_table(sysctl_header);
972 misc_deregister(&hpet_misc);
973 return result;
974 }
975
976 return 0;
977 }
978
979 static void __exit hpet_exit(void)
980 {
981 acpi_bus_unregister_driver(&hpet_acpi_driver);
982
983 if (sysctl_header)
984 unregister_sysctl_table(sysctl_header);
985 misc_deregister(&hpet_misc);
986
987 return;
988 }
989
990 module_init(hpet_init);
991 module_exit(hpet_exit);
992 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
993 MODULE_LICENSE("GPL");
Support for the Chinese Samsung S3C2440 based development boards