2 =========================================================================
3 r8169.c: A RealTek RTL-8169 Gigabit Ethernet driver for Linux kernel 2.4.x.
4 --------------------------------------------------------------------
7 Feb 4 2002 - created initially by ShuChen <shuchen@realtek.com.tw>.
8 May 20 2002 - Add link status force-mode and TBI mode support.
9 2004 - Massive updates. See kernel SCM system for details.
10 =========================================================================
11 1. [DEPRECATED: use ethtool instead] The media can be forced in 5 modes.
12 Command: 'insmod r8169 media = SET_MEDIA'
13 Ex: 'insmod r8169 media = 0x04' will force PHY to operate in 100Mpbs Half-duplex.
23 =========================================================================
24 VERSION 1.1 <2002/10/4>
26 The bit4:0 of MII register 4 is called "selector field", and have to be
27 00001b to indicate support of IEEE std 802.3 during NWay process of
28 exchanging Link Code Word (FLP).
30 VERSION 1.2 <2002/11/30>
33 - Use ether_crc in stock kernel (linux/crc32.h)
34 - Copy mc_filter setup code from 8139cp
35 (includes an optimization, and avoids set_bit use)
37 VERSION 1.6LK <2004/04/14>
39 - Merge of Realtek's version 1.6
40 - Conversion to DMA API
45 VERSION 2.2LK <2005/01/25>
47 - RX csum, TX csum/SG, TSO
49 - baby (< 7200) Jumbo frames support
50 - Merge of Realtek's version 2.2 (new phy)
53 #include <linux/module.h>
54 #include <linux/moduleparam.h>
55 #include <linux/pci.h>
56 #include <linux/netdevice.h>
57 #include <linux/etherdevice.h>
58 #include <linux/delay.h>
59 #include <linux/ethtool.h>
60 #include <linux/mii.h>
61 #include <linux/if_vlan.h>
62 #include <linux/crc32.h>
65 #include <linux/tcp.h>
66 #include <linux/init.h>
67 #include <linux/dma-mapping.h>
69 #include <asm/system.h>
73 #ifdef CONFIG_R8169_NAPI
74 #define NAPI_SUFFIX "-NAPI"
76 #define NAPI_SUFFIX ""
79 #define RTL8169_VERSION "2.2LK" NAPI_SUFFIX
80 #define MODULENAME "r8169"
81 #define PFX MODULENAME ": "
84 #define assert(expr) \
86 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
87 #expr,__FILE__,__FUNCTION__,__LINE__); \
89 #define dprintk(fmt, args...) do { printk(PFX fmt, ## args); } while (0)
91 #define assert(expr) do {} while (0)
92 #define dprintk(fmt, args...) do {} while (0)
93 #endif /* RTL8169_DEBUG */
95 #define R8169_MSG_DEFAULT \
96 (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
98 #define TX_BUFFS_AVAIL(tp) \
99 (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1)
101 #ifdef CONFIG_R8169_NAPI
102 #define rtl8169_rx_skb netif_receive_skb
103 #define rtl8169_rx_hwaccel_skb vlan_hwaccel_receive_skb
104 #define rtl8169_rx_quota(count, quota) min(count, quota)
106 #define rtl8169_rx_skb netif_rx
107 #define rtl8169_rx_hwaccel_skb vlan_hwaccel_rx
108 #define rtl8169_rx_quota(count, quota) count
113 static int media
[MAX_UNITS
] = { -1, -1, -1, -1, -1, -1, -1, -1 };
114 static int num_media
= 0;
116 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
117 static const int max_interrupt_work
= 20;
119 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
120 The RTL chips use a 64 element hash table based on the Ethernet CRC. */
121 static const int multicast_filter_limit
= 32;
123 /* MAC address length */
124 #define MAC_ADDR_LEN 6
126 #define RX_FIFO_THRESH 7 /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
127 #define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
128 #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
129 #define EarlyTxThld 0x3F /* 0x3F means NO early transmit */
130 #define RxPacketMaxSize 0x3FE8 /* 16K - 1 - ETH_HLEN - VLAN - CRC... */
131 #define SafeMtu 0x1c20 /* ... actually life sucks beyond ~7k */
132 #define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */
134 #define R8169_REGS_SIZE 256
135 #define R8169_NAPI_WEIGHT 64
136 #define NUM_TX_DESC 64 /* Number of Tx descriptor registers */
137 #define NUM_RX_DESC 256 /* Number of Rx descriptor registers */
138 #define RX_BUF_SIZE 1536 /* Rx Buffer size */
139 #define R8169_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
140 #define R8169_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))
142 #define RTL8169_TX_TIMEOUT (6*HZ)
143 #define RTL8169_PHY_TIMEOUT (10*HZ)
145 /* write/read MMIO register */
146 #define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg))
147 #define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg))
148 #define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg))
149 #define RTL_R8(reg) readb (ioaddr + (reg))
150 #define RTL_R16(reg) readw (ioaddr + (reg))
151 #define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg)))
154 RTL_GIGA_MAC_VER_01
= 0x00,
155 RTL_GIGA_MAC_VER_02
= 0x01,
156 RTL_GIGA_MAC_VER_03
= 0x02,
157 RTL_GIGA_MAC_VER_04
= 0x03,
158 RTL_GIGA_MAC_VER_05
= 0x04,
159 RTL_GIGA_MAC_VER_11
= 0x0b, // 8168Bb
160 RTL_GIGA_MAC_VER_12
= 0x0c, // 8168Be 8168Bf
161 RTL_GIGA_MAC_VER_13
= 0x0d,
162 RTL_GIGA_MAC_VER_14
= 0x0e,
163 RTL_GIGA_MAC_VER_15
= 0x0f
167 RTL_GIGA_PHY_VER_C
= 0x03, /* PHY Reg 0x03 bit0-3 == 0x0000 */
168 RTL_GIGA_PHY_VER_D
= 0x04, /* PHY Reg 0x03 bit0-3 == 0x0000 */
169 RTL_GIGA_PHY_VER_E
= 0x05, /* PHY Reg 0x03 bit0-3 == 0x0000 */
170 RTL_GIGA_PHY_VER_F
= 0x06, /* PHY Reg 0x03 bit0-3 == 0x0001 */
171 RTL_GIGA_PHY_VER_G
= 0x07, /* PHY Reg 0x03 bit0-3 == 0x0002 */
172 RTL_GIGA_PHY_VER_H
= 0x08, /* PHY Reg 0x03 bit0-3 == 0x0003 */
175 #define _R(NAME,MAC,MASK) \
176 { .name = NAME, .mac_version = MAC, .RxConfigMask = MASK }
178 static const struct {
181 u32 RxConfigMask
; /* Clears the bits supported by this chip */
182 } rtl_chip_info
[] = {
183 _R("RTL8169", RTL_GIGA_MAC_VER_01
, 0xff7e1880),
184 _R("RTL8169s/8110s", RTL_GIGA_MAC_VER_02
, 0xff7e1880),
185 _R("RTL8169s/8110s", RTL_GIGA_MAC_VER_03
, 0xff7e1880),
186 _R("RTL8169sb/8110sb", RTL_GIGA_MAC_VER_04
, 0xff7e1880),
187 _R("RTL8169sc/8110sc", RTL_GIGA_MAC_VER_05
, 0xff7e1880),
188 _R("RTL8168b/8111b", RTL_GIGA_MAC_VER_11
, 0xff7e1880), // PCI-E
189 _R("RTL8168b/8111b", RTL_GIGA_MAC_VER_12
, 0xff7e1880), // PCI-E
190 _R("RTL8101e", RTL_GIGA_MAC_VER_13
, 0xff7e1880), // PCI-E 8139
191 _R("RTL8100e", RTL_GIGA_MAC_VER_14
, 0xff7e1880), // PCI-E 8139
192 _R("RTL8100e", RTL_GIGA_MAC_VER_15
, 0xff7e1880) // PCI-E 8139
202 static void rtl_hw_start_8169(struct net_device
*);
203 static void rtl_hw_start_8168(struct net_device
*);
204 static void rtl_hw_start_8101(struct net_device
*);
206 static const struct {
207 void (*hw_start
)(struct net_device
*);
211 [RTL_CFG_0
] = { rtl_hw_start_8169
, 1, NET_IP_ALIGN
},
212 [RTL_CFG_1
] = { rtl_hw_start_8168
, 2, 8 },
213 [RTL_CFG_2
] = { rtl_hw_start_8101
, 2, 8 }
216 static struct pci_device_id rtl8169_pci_tbl
[] = {
217 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK
, 0x8129), 0, 0, RTL_CFG_0
},
218 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK
, 0x8136), 0, 0, RTL_CFG_2
},
219 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK
, 0x8167), 0, 0, RTL_CFG_0
},
220 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK
, 0x8168), 0, 0, RTL_CFG_1
},
221 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK
, 0x8169), 0, 0, RTL_CFG_0
},
222 { PCI_DEVICE(PCI_VENDOR_ID_DLINK
, 0x4300), 0, 0, RTL_CFG_0
},
223 { PCI_DEVICE(0x1259, 0xc107), 0, 0, RTL_CFG_0
},
224 { PCI_DEVICE(0x16ec, 0x0116), 0, 0, RTL_CFG_0
},
225 { PCI_VENDOR_ID_LINKSYS
, 0x1032,
226 PCI_ANY_ID
, 0x0024, 0, 0, RTL_CFG_0
},
230 MODULE_DEVICE_TABLE(pci
, rtl8169_pci_tbl
);
232 static int rx_copybreak
= 200;
238 enum RTL8169_registers
{
239 MAC0
= 0, /* Ethernet hardware address. */
240 MAR0
= 8, /* Multicast filter. */
241 CounterAddrLow
= 0x10,
242 CounterAddrHigh
= 0x14,
243 TxDescStartAddrLow
= 0x20,
244 TxDescStartAddrHigh
= 0x24,
245 TxHDescStartAddrLow
= 0x28,
246 TxHDescStartAddrHigh
= 0x2c,
272 RxDescAddrLow
= 0xE4,
273 RxDescAddrHigh
= 0xE8,
276 FuncEventMask
= 0xF4,
277 FuncPresetState
= 0xF8,
278 FuncForceEvent
= 0xFC,
281 enum RTL8169_register_content
{
282 /* InterruptStatusBits */
286 TxDescUnavail
= 0x80,
310 Cfg9346_Unlock
= 0xC0,
315 AcceptBroadcast
= 0x08,
316 AcceptMulticast
= 0x04,
318 AcceptAllPhys
= 0x01,
325 TxInterFrameGapShift
= 24,
326 TxDMAShift
= 8, /* DMA burst value (0-7) is shift this many bits */
328 /* Config1 register p.24 */
329 PMEnable
= (1 << 0), /* Power Management Enable */
331 /* Config3 register p.25 */
332 MagicPacket
= (1 << 5), /* Wake up when receives a Magic Packet */
333 LinkUp
= (1 << 4), /* Wake up when the cable connection is re-established */
335 /* Config5 register p.27 */
336 BWF
= (1 << 6), /* Accept Broadcast wakeup frame */
337 MWF
= (1 << 5), /* Accept Multicast wakeup frame */
338 UWF
= (1 << 4), /* Accept Unicast wakeup frame */
339 LanWake
= (1 << 1), /* LanWake enable/disable */
340 PMEStatus
= (1 << 0), /* PME status can be reset by PCI RST# */
343 TBIReset
= 0x80000000,
344 TBILoopback
= 0x40000000,
345 TBINwEnable
= 0x20000000,
346 TBINwRestart
= 0x10000000,
347 TBILinkOk
= 0x02000000,
348 TBINwComplete
= 0x01000000,
356 /* rtl8169_PHYstatus */
374 TBILinkOK
= 0x02000000,
376 /* DumpCounterCommand */
380 enum _DescStatusBit
{
381 DescOwn
= (1 << 31), /* Descriptor is owned by NIC */
382 RingEnd
= (1 << 30), /* End of descriptor ring */
383 FirstFrag
= (1 << 29), /* First segment of a packet */
384 LastFrag
= (1 << 28), /* Final segment of a packet */
387 LargeSend
= (1 << 27), /* TCP Large Send Offload (TSO) */
388 MSSShift
= 16, /* MSS value position */
389 MSSMask
= 0xfff, /* MSS value + LargeSend bit: 12 bits */
390 IPCS
= (1 << 18), /* Calculate IP checksum */
391 UDPCS
= (1 << 17), /* Calculate UDP/IP checksum */
392 TCPCS
= (1 << 16), /* Calculate TCP/IP checksum */
393 TxVlanTag
= (1 << 17), /* Add VLAN tag */
396 PID1
= (1 << 18), /* Protocol ID bit 1/2 */
397 PID0
= (1 << 17), /* Protocol ID bit 2/2 */
399 #define RxProtoUDP (PID1)
400 #define RxProtoTCP (PID0)
401 #define RxProtoIP (PID1 | PID0)
402 #define RxProtoMask RxProtoIP
404 IPFail
= (1 << 16), /* IP checksum failed */
405 UDPFail
= (1 << 15), /* UDP/IP checksum failed */
406 TCPFail
= (1 << 14), /* TCP/IP checksum failed */
407 RxVlanTag
= (1 << 16), /* VLAN tag available */
410 #define RsvdMask 0x3fffc000
427 u8 __pad
[sizeof(void *) - sizeof(u32
)];
430 struct rtl8169_private
{
431 void __iomem
*mmio_addr
; /* memory map physical address */
432 struct pci_dev
*pci_dev
; /* Index of PCI device */
433 struct net_device
*dev
;
434 struct net_device_stats stats
; /* statistics of net device */
435 spinlock_t lock
; /* spin lock flag */
440 u32 cur_rx
; /* Index into the Rx descriptor buffer of next Rx pkt. */
441 u32 cur_tx
; /* Index into the Tx descriptor buffer of next Rx pkt. */
444 struct TxDesc
*TxDescArray
; /* 256-aligned Tx descriptor ring */
445 struct RxDesc
*RxDescArray
; /* 256-aligned Rx descriptor ring */
446 dma_addr_t TxPhyAddr
;
447 dma_addr_t RxPhyAddr
;
448 struct sk_buff
*Rx_skbuff
[NUM_RX_DESC
]; /* Rx data buffers */
449 struct ring_info tx_skb
[NUM_TX_DESC
]; /* Tx data buffers */
452 struct timer_list timer
;
455 int phy_auto_nego_reg
;
456 int phy_1000_ctrl_reg
;
457 #ifdef CONFIG_R8169_VLAN
458 struct vlan_group
*vlgrp
;
460 int (*set_speed
)(struct net_device
*, u8 autoneg
, u16 speed
, u8 duplex
);
461 void (*get_settings
)(struct net_device
*, struct ethtool_cmd
*);
462 void (*phy_reset_enable
)(void __iomem
*);
463 void (*hw_start
)(struct net_device
*);
464 unsigned int (*phy_reset_pending
)(void __iomem
*);
465 unsigned int (*link_ok
)(void __iomem
*);
466 struct delayed_work task
;
467 unsigned wol_enabled
: 1;
470 MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>");
471 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
472 module_param_array(media
, int, &num_media
, 0);
473 MODULE_PARM_DESC(media
, "force phy operation. Deprecated by ethtool (8).");
474 module_param(rx_copybreak
, int, 0);
475 MODULE_PARM_DESC(rx_copybreak
, "Copy breakpoint for copy-only-tiny-frames");
476 module_param(use_dac
, int, 0);
477 MODULE_PARM_DESC(use_dac
, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
478 module_param_named(debug
, debug
.msg_enable
, int, 0);
479 MODULE_PARM_DESC(debug
, "Debug verbosity level (0=none, ..., 16=all)");
480 MODULE_LICENSE("GPL");
481 MODULE_VERSION(RTL8169_VERSION
);
483 static int rtl8169_open(struct net_device
*dev
);
484 static int rtl8169_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
);
485 static irqreturn_t
rtl8169_interrupt(int irq
, void *dev_instance
);
486 static int rtl8169_init_ring(struct net_device
*dev
);
487 static void rtl_hw_start(struct net_device
*dev
);
488 static int rtl8169_close(struct net_device
*dev
);
489 static void rtl_set_rx_mode(struct net_device
*dev
);
490 static void rtl8169_tx_timeout(struct net_device
*dev
);
491 static struct net_device_stats
*rtl8169_get_stats(struct net_device
*dev
);
492 static int rtl8169_rx_interrupt(struct net_device
*, struct rtl8169_private
*,
494 static int rtl8169_change_mtu(struct net_device
*dev
, int new_mtu
);
495 static void rtl8169_down(struct net_device
*dev
);
496 static void rtl8169_rx_clear(struct rtl8169_private
*tp
);
498 #ifdef CONFIG_R8169_NAPI
499 static int rtl8169_poll(struct net_device
*dev
, int *budget
);
502 static const u16 rtl8169_intr_mask
=
503 SYSErr
| LinkChg
| RxOverflow
| RxFIFOOver
| TxErr
| TxOK
| RxErr
| RxOK
;
504 static const u16 rtl8169_napi_event
=
505 RxOK
| RxOverflow
| RxFIFOOver
| TxOK
| TxErr
;
506 static const unsigned int rtl8169_rx_config
=
507 (RX_FIFO_THRESH
<< RxCfgFIFOShift
) | (RX_DMA_BURST
<< RxCfgDMAShift
);
509 static void mdio_write(void __iomem
*ioaddr
, int RegAddr
, int value
)
513 RTL_W32(PHYAR
, 0x80000000 | (RegAddr
& 0xFF) << 16 | value
);
515 for (i
= 20; i
> 0; i
--) {
516 /* Check if the RTL8169 has completed writing to the specified MII register */
517 if (!(RTL_R32(PHYAR
) & 0x80000000))
523 static int mdio_read(void __iomem
*ioaddr
, int RegAddr
)
527 RTL_W32(PHYAR
, 0x0 | (RegAddr
& 0xFF) << 16);
529 for (i
= 20; i
> 0; i
--) {
530 /* Check if the RTL8169 has completed retrieving data from the specified MII register */
531 if (RTL_R32(PHYAR
) & 0x80000000) {
532 value
= (int) (RTL_R32(PHYAR
) & 0xFFFF);
540 static void rtl8169_irq_mask_and_ack(void __iomem
*ioaddr
)
542 RTL_W16(IntrMask
, 0x0000);
544 RTL_W16(IntrStatus
, 0xffff);
547 static void rtl8169_asic_down(void __iomem
*ioaddr
)
549 RTL_W8(ChipCmd
, 0x00);
550 rtl8169_irq_mask_and_ack(ioaddr
);
554 static unsigned int rtl8169_tbi_reset_pending(void __iomem
*ioaddr
)
556 return RTL_R32(TBICSR
) & TBIReset
;
559 static unsigned int rtl8169_xmii_reset_pending(void __iomem
*ioaddr
)
561 return mdio_read(ioaddr
, MII_BMCR
) & BMCR_RESET
;
564 static unsigned int rtl8169_tbi_link_ok(void __iomem
*ioaddr
)
566 return RTL_R32(TBICSR
) & TBILinkOk
;
569 static unsigned int rtl8169_xmii_link_ok(void __iomem
*ioaddr
)
571 return RTL_R8(PHYstatus
) & LinkStatus
;
574 static void rtl8169_tbi_reset_enable(void __iomem
*ioaddr
)
576 RTL_W32(TBICSR
, RTL_R32(TBICSR
) | TBIReset
);
579 static void rtl8169_xmii_reset_enable(void __iomem
*ioaddr
)
583 val
= mdio_read(ioaddr
, MII_BMCR
) | BMCR_RESET
;
584 mdio_write(ioaddr
, MII_BMCR
, val
& 0xffff);
587 static void rtl8169_check_link_status(struct net_device
*dev
,
588 struct rtl8169_private
*tp
, void __iomem
*ioaddr
)
592 spin_lock_irqsave(&tp
->lock
, flags
);
593 if (tp
->link_ok(ioaddr
)) {
594 netif_carrier_on(dev
);
595 if (netif_msg_ifup(tp
))
596 printk(KERN_INFO PFX
"%s: link up\n", dev
->name
);
598 if (netif_msg_ifdown(tp
))
599 printk(KERN_INFO PFX
"%s: link down\n", dev
->name
);
600 netif_carrier_off(dev
);
602 spin_unlock_irqrestore(&tp
->lock
, flags
);
605 static void rtl8169_link_option(int idx
, u8
*autoneg
, u16
*speed
, u8
*duplex
)
612 } link_settings
[] = {
613 { SPEED_10
, DUPLEX_HALF
, AUTONEG_DISABLE
, _10_Half
},
614 { SPEED_10
, DUPLEX_FULL
, AUTONEG_DISABLE
, _10_Full
},
615 { SPEED_100
, DUPLEX_HALF
, AUTONEG_DISABLE
, _100_Half
},
616 { SPEED_100
, DUPLEX_FULL
, AUTONEG_DISABLE
, _100_Full
},
617 { SPEED_1000
, DUPLEX_FULL
, AUTONEG_DISABLE
, _1000_Full
},
619 { SPEED_1000
, DUPLEX_FULL
, AUTONEG_ENABLE
, 0xff }
621 unsigned char option
;
623 option
= ((idx
< MAX_UNITS
) && (idx
>= 0)) ? media
[idx
] : 0xff;
625 if ((option
!= 0xff) && !idx
&& netif_msg_drv(&debug
))
626 printk(KERN_WARNING PFX
"media option is deprecated.\n");
628 for (p
= link_settings
; p
->media
!= 0xff; p
++) {
629 if (p
->media
== option
)
632 *autoneg
= p
->autoneg
;
637 static void rtl8169_get_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
639 struct rtl8169_private
*tp
= netdev_priv(dev
);
640 void __iomem
*ioaddr
= tp
->mmio_addr
;
645 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
646 wol
->supported
= WAKE_ANY
;
648 spin_lock_irq(&tp
->lock
);
650 options
= RTL_R8(Config1
);
651 if (!(options
& PMEnable
))
654 options
= RTL_R8(Config3
);
655 if (options
& LinkUp
)
656 wol
->wolopts
|= WAKE_PHY
;
657 if (options
& MagicPacket
)
658 wol
->wolopts
|= WAKE_MAGIC
;
660 options
= RTL_R8(Config5
);
662 wol
->wolopts
|= WAKE_UCAST
;
664 wol
->wolopts
|= WAKE_BCAST
;
666 wol
->wolopts
|= WAKE_MCAST
;
669 spin_unlock_irq(&tp
->lock
);
672 static int rtl8169_set_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
674 struct rtl8169_private
*tp
= netdev_priv(dev
);
675 void __iomem
*ioaddr
= tp
->mmio_addr
;
682 { WAKE_ANY
, Config1
, PMEnable
},
683 { WAKE_PHY
, Config3
, LinkUp
},
684 { WAKE_MAGIC
, Config3
, MagicPacket
},
685 { WAKE_UCAST
, Config5
, UWF
},
686 { WAKE_BCAST
, Config5
, BWF
},
687 { WAKE_MCAST
, Config5
, MWF
},
688 { WAKE_ANY
, Config5
, LanWake
}
691 spin_lock_irq(&tp
->lock
);
693 RTL_W8(Cfg9346
, Cfg9346_Unlock
);
695 for (i
= 0; i
< ARRAY_SIZE(cfg
); i
++) {
696 u8 options
= RTL_R8(cfg
[i
].reg
) & ~cfg
[i
].mask
;
697 if (wol
->wolopts
& cfg
[i
].opt
)
698 options
|= cfg
[i
].mask
;
699 RTL_W8(cfg
[i
].reg
, options
);
702 RTL_W8(Cfg9346
, Cfg9346_Lock
);
704 tp
->wol_enabled
= (wol
->wolopts
) ? 1 : 0;
706 spin_unlock_irq(&tp
->lock
);
711 static void rtl8169_get_drvinfo(struct net_device
*dev
,
712 struct ethtool_drvinfo
*info
)
714 struct rtl8169_private
*tp
= netdev_priv(dev
);
716 strcpy(info
->driver
, MODULENAME
);
717 strcpy(info
->version
, RTL8169_VERSION
);
718 strcpy(info
->bus_info
, pci_name(tp
->pci_dev
));
721 static int rtl8169_get_regs_len(struct net_device
*dev
)
723 return R8169_REGS_SIZE
;
726 static int rtl8169_set_speed_tbi(struct net_device
*dev
,
727 u8 autoneg
, u16 speed
, u8 duplex
)
729 struct rtl8169_private
*tp
= netdev_priv(dev
);
730 void __iomem
*ioaddr
= tp
->mmio_addr
;
734 reg
= RTL_R32(TBICSR
);
735 if ((autoneg
== AUTONEG_DISABLE
) && (speed
== SPEED_1000
) &&
736 (duplex
== DUPLEX_FULL
)) {
737 RTL_W32(TBICSR
, reg
& ~(TBINwEnable
| TBINwRestart
));
738 } else if (autoneg
== AUTONEG_ENABLE
)
739 RTL_W32(TBICSR
, reg
| TBINwEnable
| TBINwRestart
);
741 if (netif_msg_link(tp
)) {
742 printk(KERN_WARNING
"%s: "
743 "incorrect speed setting refused in TBI mode\n",
752 static int rtl8169_set_speed_xmii(struct net_device
*dev
,
753 u8 autoneg
, u16 speed
, u8 duplex
)
755 struct rtl8169_private
*tp
= netdev_priv(dev
);
756 void __iomem
*ioaddr
= tp
->mmio_addr
;
757 int auto_nego
, giga_ctrl
;
759 auto_nego
= mdio_read(ioaddr
, MII_ADVERTISE
);
760 auto_nego
&= ~(ADVERTISE_10HALF
| ADVERTISE_10FULL
|
761 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
762 giga_ctrl
= mdio_read(ioaddr
, MII_CTRL1000
);
763 giga_ctrl
&= ~(ADVERTISE_1000FULL
| ADVERTISE_1000HALF
);
765 if (autoneg
== AUTONEG_ENABLE
) {
766 auto_nego
|= (ADVERTISE_10HALF
| ADVERTISE_10FULL
|
767 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
768 giga_ctrl
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
770 if (speed
== SPEED_10
)
771 auto_nego
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
772 else if (speed
== SPEED_100
)
773 auto_nego
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
774 else if (speed
== SPEED_1000
)
775 giga_ctrl
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
777 if (duplex
== DUPLEX_HALF
)
778 auto_nego
&= ~(ADVERTISE_10FULL
| ADVERTISE_100FULL
);
780 if (duplex
== DUPLEX_FULL
)
781 auto_nego
&= ~(ADVERTISE_10HALF
| ADVERTISE_100HALF
);
783 /* This tweak comes straight from Realtek's driver. */
784 if ((speed
== SPEED_100
) && (duplex
== DUPLEX_HALF
) &&
785 (tp
->mac_version
== RTL_GIGA_MAC_VER_13
)) {
786 auto_nego
= ADVERTISE_100HALF
| ADVERTISE_CSMA
;
790 /* The 8100e/8101e do Fast Ethernet only. */
791 if ((tp
->mac_version
== RTL_GIGA_MAC_VER_13
) ||
792 (tp
->mac_version
== RTL_GIGA_MAC_VER_14
) ||
793 (tp
->mac_version
== RTL_GIGA_MAC_VER_15
)) {
794 if ((giga_ctrl
& (ADVERTISE_1000FULL
| ADVERTISE_1000HALF
)) &&
795 netif_msg_link(tp
)) {
796 printk(KERN_INFO
"%s: PHY does not support 1000Mbps.\n",
799 giga_ctrl
&= ~(ADVERTISE_1000FULL
| ADVERTISE_1000HALF
);
802 auto_nego
|= ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
;
804 tp
->phy_auto_nego_reg
= auto_nego
;
805 tp
->phy_1000_ctrl_reg
= giga_ctrl
;
807 mdio_write(ioaddr
, MII_ADVERTISE
, auto_nego
);
808 mdio_write(ioaddr
, MII_CTRL1000
, giga_ctrl
);
809 mdio_write(ioaddr
, MII_BMCR
, BMCR_ANENABLE
| BMCR_ANRESTART
);
813 static int rtl8169_set_speed(struct net_device
*dev
,
814 u8 autoneg
, u16 speed
, u8 duplex
)
816 struct rtl8169_private
*tp
= netdev_priv(dev
);
819 ret
= tp
->set_speed(dev
, autoneg
, speed
, duplex
);
821 if (netif_running(dev
) && (tp
->phy_1000_ctrl_reg
& ADVERTISE_1000FULL
))
822 mod_timer(&tp
->timer
, jiffies
+ RTL8169_PHY_TIMEOUT
);
827 static int rtl8169_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
829 struct rtl8169_private
*tp
= netdev_priv(dev
);
833 spin_lock_irqsave(&tp
->lock
, flags
);
834 ret
= rtl8169_set_speed(dev
, cmd
->autoneg
, cmd
->speed
, cmd
->duplex
);
835 spin_unlock_irqrestore(&tp
->lock
, flags
);
840 static u32
rtl8169_get_rx_csum(struct net_device
*dev
)
842 struct rtl8169_private
*tp
= netdev_priv(dev
);
844 return tp
->cp_cmd
& RxChkSum
;
847 static int rtl8169_set_rx_csum(struct net_device
*dev
, u32 data
)
849 struct rtl8169_private
*tp
= netdev_priv(dev
);
850 void __iomem
*ioaddr
= tp
->mmio_addr
;
853 spin_lock_irqsave(&tp
->lock
, flags
);
856 tp
->cp_cmd
|= RxChkSum
;
858 tp
->cp_cmd
&= ~RxChkSum
;
860 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
863 spin_unlock_irqrestore(&tp
->lock
, flags
);
868 #ifdef CONFIG_R8169_VLAN
870 static inline u32
rtl8169_tx_vlan_tag(struct rtl8169_private
*tp
,
873 return (tp
->vlgrp
&& vlan_tx_tag_present(skb
)) ?
874 TxVlanTag
| swab16(vlan_tx_tag_get(skb
)) : 0x00;
877 static void rtl8169_vlan_rx_register(struct net_device
*dev
,
878 struct vlan_group
*grp
)
880 struct rtl8169_private
*tp
= netdev_priv(dev
);
881 void __iomem
*ioaddr
= tp
->mmio_addr
;
884 spin_lock_irqsave(&tp
->lock
, flags
);
887 tp
->cp_cmd
|= RxVlan
;
889 tp
->cp_cmd
&= ~RxVlan
;
890 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
892 spin_unlock_irqrestore(&tp
->lock
, flags
);
895 static int rtl8169_rx_vlan_skb(struct rtl8169_private
*tp
, struct RxDesc
*desc
,
898 u32 opts2
= le32_to_cpu(desc
->opts2
);
901 if (tp
->vlgrp
&& (opts2
& RxVlanTag
)) {
902 rtl8169_rx_hwaccel_skb(skb
, tp
->vlgrp
,
903 swab16(opts2
& 0xffff));
911 #else /* !CONFIG_R8169_VLAN */
913 static inline u32
rtl8169_tx_vlan_tag(struct rtl8169_private
*tp
,
919 static int rtl8169_rx_vlan_skb(struct rtl8169_private
*tp
, struct RxDesc
*desc
,
927 static void rtl8169_gset_tbi(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
929 struct rtl8169_private
*tp
= netdev_priv(dev
);
930 void __iomem
*ioaddr
= tp
->mmio_addr
;
934 SUPPORTED_1000baseT_Full
| SUPPORTED_Autoneg
| SUPPORTED_FIBRE
;
935 cmd
->port
= PORT_FIBRE
;
936 cmd
->transceiver
= XCVR_INTERNAL
;
938 status
= RTL_R32(TBICSR
);
939 cmd
->advertising
= (status
& TBINwEnable
) ? ADVERTISED_Autoneg
: 0;
940 cmd
->autoneg
= !!(status
& TBINwEnable
);
942 cmd
->speed
= SPEED_1000
;
943 cmd
->duplex
= DUPLEX_FULL
; /* Always set */
946 static void rtl8169_gset_xmii(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
948 struct rtl8169_private
*tp
= netdev_priv(dev
);
949 void __iomem
*ioaddr
= tp
->mmio_addr
;
952 cmd
->supported
= SUPPORTED_10baseT_Half
|
953 SUPPORTED_10baseT_Full
|
954 SUPPORTED_100baseT_Half
|
955 SUPPORTED_100baseT_Full
|
956 SUPPORTED_1000baseT_Full
|
961 cmd
->advertising
= ADVERTISED_TP
| ADVERTISED_Autoneg
;
963 if (tp
->phy_auto_nego_reg
& ADVERTISE_10HALF
)
964 cmd
->advertising
|= ADVERTISED_10baseT_Half
;
965 if (tp
->phy_auto_nego_reg
& ADVERTISE_10FULL
)
966 cmd
->advertising
|= ADVERTISED_10baseT_Full
;
967 if (tp
->phy_auto_nego_reg
& ADVERTISE_100HALF
)
968 cmd
->advertising
|= ADVERTISED_100baseT_Half
;
969 if (tp
->phy_auto_nego_reg
& ADVERTISE_100FULL
)
970 cmd
->advertising
|= ADVERTISED_100baseT_Full
;
971 if (tp
->phy_1000_ctrl_reg
& ADVERTISE_1000FULL
)
972 cmd
->advertising
|= ADVERTISED_1000baseT_Full
;
974 status
= RTL_R8(PHYstatus
);
976 if (status
& _1000bpsF
)
977 cmd
->speed
= SPEED_1000
;
978 else if (status
& _100bps
)
979 cmd
->speed
= SPEED_100
;
980 else if (status
& _10bps
)
981 cmd
->speed
= SPEED_10
;
983 if (status
& TxFlowCtrl
)
984 cmd
->advertising
|= ADVERTISED_Asym_Pause
;
985 if (status
& RxFlowCtrl
)
986 cmd
->advertising
|= ADVERTISED_Pause
;
988 cmd
->duplex
= ((status
& _1000bpsF
) || (status
& FullDup
)) ?
989 DUPLEX_FULL
: DUPLEX_HALF
;
992 static int rtl8169_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
994 struct rtl8169_private
*tp
= netdev_priv(dev
);
997 spin_lock_irqsave(&tp
->lock
, flags
);
999 tp
->get_settings(dev
, cmd
);
1001 spin_unlock_irqrestore(&tp
->lock
, flags
);
1005 static void rtl8169_get_regs(struct net_device
*dev
, struct ethtool_regs
*regs
,
1008 struct rtl8169_private
*tp
= netdev_priv(dev
);
1009 unsigned long flags
;
1011 if (regs
->len
> R8169_REGS_SIZE
)
1012 regs
->len
= R8169_REGS_SIZE
;
1014 spin_lock_irqsave(&tp
->lock
, flags
);
1015 memcpy_fromio(p
, tp
->mmio_addr
, regs
->len
);
1016 spin_unlock_irqrestore(&tp
->lock
, flags
);
1019 static u32
rtl8169_get_msglevel(struct net_device
*dev
)
1021 struct rtl8169_private
*tp
= netdev_priv(dev
);
1023 return tp
->msg_enable
;
1026 static void rtl8169_set_msglevel(struct net_device
*dev
, u32 value
)
1028 struct rtl8169_private
*tp
= netdev_priv(dev
);
1030 tp
->msg_enable
= value
;
1033 static const char rtl8169_gstrings
[][ETH_GSTRING_LEN
] = {
1040 "tx_single_collisions",
1041 "tx_multi_collisions",
1049 struct rtl8169_counters
{
1056 u32 tx_one_collision
;
1057 u32 tx_multi_collision
;
1065 static int rtl8169_get_stats_count(struct net_device
*dev
)
1067 return ARRAY_SIZE(rtl8169_gstrings
);
1070 static void rtl8169_get_ethtool_stats(struct net_device
*dev
,
1071 struct ethtool_stats
*stats
, u64
*data
)
1073 struct rtl8169_private
*tp
= netdev_priv(dev
);
1074 void __iomem
*ioaddr
= tp
->mmio_addr
;
1075 struct rtl8169_counters
*counters
;
1081 counters
= pci_alloc_consistent(tp
->pci_dev
, sizeof(*counters
), &paddr
);
1085 RTL_W32(CounterAddrHigh
, (u64
)paddr
>> 32);
1086 cmd
= (u64
)paddr
& DMA_32BIT_MASK
;
1087 RTL_W32(CounterAddrLow
, cmd
);
1088 RTL_W32(CounterAddrLow
, cmd
| CounterDump
);
1090 while (RTL_R32(CounterAddrLow
) & CounterDump
) {
1091 if (msleep_interruptible(1))
1095 RTL_W32(CounterAddrLow
, 0);
1096 RTL_W32(CounterAddrHigh
, 0);
1098 data
[0] = le64_to_cpu(counters
->tx_packets
);
1099 data
[1] = le64_to_cpu(counters
->rx_packets
);
1100 data
[2] = le64_to_cpu(counters
->tx_errors
);
1101 data
[3] = le32_to_cpu(counters
->rx_errors
);
1102 data
[4] = le16_to_cpu(counters
->rx_missed
);
1103 data
[5] = le16_to_cpu(counters
->align_errors
);
1104 data
[6] = le32_to_cpu(counters
->tx_one_collision
);
1105 data
[7] = le32_to_cpu(counters
->tx_multi_collision
);
1106 data
[8] = le64_to_cpu(counters
->rx_unicast
);
1107 data
[9] = le64_to_cpu(counters
->rx_broadcast
);
1108 data
[10] = le32_to_cpu(counters
->rx_multicast
);
1109 data
[11] = le16_to_cpu(counters
->tx_aborted
);
1110 data
[12] = le16_to_cpu(counters
->tx_underun
);
1112 pci_free_consistent(tp
->pci_dev
, sizeof(*counters
), counters
, paddr
);
1115 static void rtl8169_get_strings(struct net_device
*dev
, u32 stringset
, u8
*data
)
1119 memcpy(data
, *rtl8169_gstrings
, sizeof(rtl8169_gstrings
));
1125 static const struct ethtool_ops rtl8169_ethtool_ops
= {
1126 .get_drvinfo
= rtl8169_get_drvinfo
,
1127 .get_regs_len
= rtl8169_get_regs_len
,
1128 .get_link
= ethtool_op_get_link
,
1129 .get_settings
= rtl8169_get_settings
,
1130 .set_settings
= rtl8169_set_settings
,
1131 .get_msglevel
= rtl8169_get_msglevel
,
1132 .set_msglevel
= rtl8169_set_msglevel
,
1133 .get_rx_csum
= rtl8169_get_rx_csum
,
1134 .set_rx_csum
= rtl8169_set_rx_csum
,
1135 .get_tx_csum
= ethtool_op_get_tx_csum
,
1136 .set_tx_csum
= ethtool_op_set_tx_csum
,
1137 .get_sg
= ethtool_op_get_sg
,
1138 .set_sg
= ethtool_op_set_sg
,
1139 .get_tso
= ethtool_op_get_tso
,
1140 .set_tso
= ethtool_op_set_tso
,
1141 .get_regs
= rtl8169_get_regs
,
1142 .get_wol
= rtl8169_get_wol
,
1143 .set_wol
= rtl8169_set_wol
,
1144 .get_strings
= rtl8169_get_strings
,
1145 .get_stats_count
= rtl8169_get_stats_count
,
1146 .get_ethtool_stats
= rtl8169_get_ethtool_stats
,
1147 .get_perm_addr
= ethtool_op_get_perm_addr
,
1150 static void rtl8169_write_gmii_reg_bit(void __iomem
*ioaddr
, int reg
, int bitnum
,
1155 val
= mdio_read(ioaddr
, reg
);
1156 val
= (bitval
== 1) ?
1157 val
| (bitval
<< bitnum
) : val
& ~(0x0001 << bitnum
);
1158 mdio_write(ioaddr
, reg
, val
& 0xffff);
1161 static void rtl8169_get_mac_version(struct rtl8169_private
*tp
, void __iomem
*ioaddr
)
1167 { 0x38800000, RTL_GIGA_MAC_VER_15
},
1168 { 0x38000000, RTL_GIGA_MAC_VER_12
},
1169 { 0x34000000, RTL_GIGA_MAC_VER_13
},
1170 { 0x30800000, RTL_GIGA_MAC_VER_14
},
1171 { 0x30000000, RTL_GIGA_MAC_VER_11
},
1172 { 0x18000000, RTL_GIGA_MAC_VER_05
},
1173 { 0x10000000, RTL_GIGA_MAC_VER_04
},
1174 { 0x04000000, RTL_GIGA_MAC_VER_03
},
1175 { 0x00800000, RTL_GIGA_MAC_VER_02
},
1176 { 0x00000000, RTL_GIGA_MAC_VER_01
} /* Catch-all */
1180 reg
= RTL_R32(TxConfig
) & 0x7c800000;
1181 while ((reg
& p
->mask
) != p
->mask
)
1183 tp
->mac_version
= p
->mac_version
;
1186 static void rtl8169_print_mac_version(struct rtl8169_private
*tp
)
1188 dprintk("mac_version = 0x%02x\n", tp
->mac_version
);
1191 static void rtl8169_get_phy_version(struct rtl8169_private
*tp
, void __iomem
*ioaddr
)
1198 { 0x000f, 0x0002, RTL_GIGA_PHY_VER_G
},
1199 { 0x000f, 0x0001, RTL_GIGA_PHY_VER_F
},
1200 { 0x000f, 0x0000, RTL_GIGA_PHY_VER_E
},
1201 { 0x0000, 0x0000, RTL_GIGA_PHY_VER_D
} /* Catch-all */
1205 reg
= mdio_read(ioaddr
, MII_PHYSID2
) & 0xffff;
1206 while ((reg
& p
->mask
) != p
->set
)
1208 tp
->phy_version
= p
->phy_version
;
1211 static void rtl8169_print_phy_version(struct rtl8169_private
*tp
)
1218 { RTL_GIGA_PHY_VER_G
, "RTL_GIGA_PHY_VER_G", 0x0002 },
1219 { RTL_GIGA_PHY_VER_F
, "RTL_GIGA_PHY_VER_F", 0x0001 },
1220 { RTL_GIGA_PHY_VER_E
, "RTL_GIGA_PHY_VER_E", 0x0000 },
1221 { RTL_GIGA_PHY_VER_D
, "RTL_GIGA_PHY_VER_D", 0x0000 },
1225 for (p
= phy_print
; p
->msg
; p
++) {
1226 if (tp
->phy_version
== p
->version
) {
1227 dprintk("phy_version == %s (%04x)\n", p
->msg
, p
->reg
);
1231 dprintk("phy_version == Unknown\n");
1234 static void rtl8169_hw_phy_config(struct net_device
*dev
)
1236 struct rtl8169_private
*tp
= netdev_priv(dev
);
1237 void __iomem
*ioaddr
= tp
->mmio_addr
;
1239 u16 regs
[5]; /* Beware of bit-sign propagation */
1240 } phy_magic
[5] = { {
1241 { 0x0000, //w 4 15 12 0
1242 0x00a1, //w 3 15 0 00a1
1243 0x0008, //w 2 15 0 0008
1244 0x1020, //w 1 15 0 1020
1245 0x1000 } },{ //w 0 15 0 1000
1246 { 0x7000, //w 4 15 12 7
1247 0xff41, //w 3 15 0 ff41
1248 0xde60, //w 2 15 0 de60
1249 0x0140, //w 1 15 0 0140
1250 0x0077 } },{ //w 0 15 0 0077
1251 { 0xa000, //w 4 15 12 a
1252 0xdf01, //w 3 15 0 df01
1253 0xdf20, //w 2 15 0 df20
1254 0xff95, //w 1 15 0 ff95
1255 0xfa00 } },{ //w 0 15 0 fa00
1256 { 0xb000, //w 4 15 12 b
1257 0xff41, //w 3 15 0 ff41
1258 0xde20, //w 2 15 0 de20
1259 0x0140, //w 1 15 0 0140
1260 0x00bb } },{ //w 0 15 0 00bb
1261 { 0xf000, //w 4 15 12 f
1262 0xdf01, //w 3 15 0 df01
1263 0xdf20, //w 2 15 0 df20
1264 0xff95, //w 1 15 0 ff95
1265 0xbf00 } //w 0 15 0 bf00
1270 rtl8169_print_mac_version(tp
);
1271 rtl8169_print_phy_version(tp
);
1273 if (tp
->mac_version
<= RTL_GIGA_MAC_VER_01
)
1275 if (tp
->phy_version
>= RTL_GIGA_PHY_VER_H
)
1278 dprintk("MAC version != 0 && PHY version == 0 or 1\n");
1279 dprintk("Do final_reg2.cfg\n");
1283 if (tp
->mac_version
== RTL_GIGA_MAC_VER_04
) {
1284 mdio_write(ioaddr
, 31, 0x0002);
1285 mdio_write(ioaddr
, 1, 0x90d0);
1286 mdio_write(ioaddr
, 31, 0x0000);
1290 /* phy config for RTL8169s mac_version C chip */
1291 mdio_write(ioaddr
, 31, 0x0001); //w 31 2 0 1
1292 mdio_write(ioaddr
, 21, 0x1000); //w 21 15 0 1000
1293 mdio_write(ioaddr
, 24, 0x65c7); //w 24 15 0 65c7
1294 rtl8169_write_gmii_reg_bit(ioaddr
, 4, 11, 0); //w 4 11 11 0
1296 for (i
= 0; i
< ARRAY_SIZE(phy_magic
); i
++, p
++) {
1299 val
= (mdio_read(ioaddr
, pos
) & 0x0fff) | (p
->regs
[0] & 0xffff);
1300 mdio_write(ioaddr
, pos
, val
);
1302 mdio_write(ioaddr
, pos
, p
->regs
[4 - pos
] & 0xffff);
1303 rtl8169_write_gmii_reg_bit(ioaddr
, 4, 11, 1); //w 4 11 11 1
1304 rtl8169_write_gmii_reg_bit(ioaddr
, 4, 11, 0); //w 4 11 11 0
1306 mdio_write(ioaddr
, 31, 0x0000); //w 31 2 0 0
1309 static void rtl8169_phy_timer(unsigned long __opaque
)
1311 struct net_device
*dev
= (struct net_device
*)__opaque
;
1312 struct rtl8169_private
*tp
= netdev_priv(dev
);
1313 struct timer_list
*timer
= &tp
->timer
;
1314 void __iomem
*ioaddr
= tp
->mmio_addr
;
1315 unsigned long timeout
= RTL8169_PHY_TIMEOUT
;
1317 assert(tp
->mac_version
> RTL_GIGA_MAC_VER_01
);
1318 assert(tp
->phy_version
< RTL_GIGA_PHY_VER_H
);
1320 if (!(tp
->phy_1000_ctrl_reg
& ADVERTISE_1000FULL
))
1323 spin_lock_irq(&tp
->lock
);
1325 if (tp
->phy_reset_pending(ioaddr
)) {
1327 * A busy loop could burn quite a few cycles on nowadays CPU.
1328 * Let's delay the execution of the timer for a few ticks.
1334 if (tp
->link_ok(ioaddr
))
1337 if (netif_msg_link(tp
))
1338 printk(KERN_WARNING
"%s: PHY reset until link up\n", dev
->name
);
1340 tp
->phy_reset_enable(ioaddr
);
1343 mod_timer(timer
, jiffies
+ timeout
);
1345 spin_unlock_irq(&tp
->lock
);
1348 static inline void rtl8169_delete_timer(struct net_device
*dev
)
1350 struct rtl8169_private
*tp
= netdev_priv(dev
);
1351 struct timer_list
*timer
= &tp
->timer
;
1353 if ((tp
->mac_version
<= RTL_GIGA_MAC_VER_01
) ||
1354 (tp
->phy_version
>= RTL_GIGA_PHY_VER_H
))
1357 del_timer_sync(timer
);
1360 static inline void rtl8169_request_timer(struct net_device
*dev
)
1362 struct rtl8169_private
*tp
= netdev_priv(dev
);
1363 struct timer_list
*timer
= &tp
->timer
;
1365 if ((tp
->mac_version
<= RTL_GIGA_MAC_VER_01
) ||
1366 (tp
->phy_version
>= RTL_GIGA_PHY_VER_H
))
1369 mod_timer(timer
, jiffies
+ RTL8169_PHY_TIMEOUT
);
1372 #ifdef CONFIG_NET_POLL_CONTROLLER
1374 * Polling 'interrupt' - used by things like netconsole to send skbs
1375 * without having to re-enable interrupts. It's not called while
1376 * the interrupt routine is executing.
1378 static void rtl8169_netpoll(struct net_device
*dev
)
1380 struct rtl8169_private
*tp
= netdev_priv(dev
);
1381 struct pci_dev
*pdev
= tp
->pci_dev
;
1383 disable_irq(pdev
->irq
);
1384 rtl8169_interrupt(pdev
->irq
, dev
);
1385 enable_irq(pdev
->irq
);
1389 static void rtl8169_release_board(struct pci_dev
*pdev
, struct net_device
*dev
,
1390 void __iomem
*ioaddr
)
1393 pci_release_regions(pdev
);
1394 pci_disable_device(pdev
);
1398 static void rtl8169_phy_reset(struct net_device
*dev
,
1399 struct rtl8169_private
*tp
)
1401 void __iomem
*ioaddr
= tp
->mmio_addr
;
1404 tp
->phy_reset_enable(ioaddr
);
1405 for (i
= 0; i
< 100; i
++) {
1406 if (!tp
->phy_reset_pending(ioaddr
))
1410 if (netif_msg_link(tp
))
1411 printk(KERN_ERR
"%s: PHY reset failed.\n", dev
->name
);
1414 static void rtl8169_init_phy(struct net_device
*dev
, struct rtl8169_private
*tp
)
1416 void __iomem
*ioaddr
= tp
->mmio_addr
;
1417 static int board_idx
= -1;
1423 rtl8169_hw_phy_config(dev
);
1425 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1428 if (tp
->mac_version
< RTL_GIGA_MAC_VER_03
) {
1429 dprintk("Set PCI Latency=0x40\n");
1430 pci_write_config_byte(tp
->pci_dev
, PCI_LATENCY_TIMER
, 0x40);
1433 if (tp
->mac_version
== RTL_GIGA_MAC_VER_02
) {
1434 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1436 dprintk("Set PHY Reg 0x0bh = 0x00h\n");
1437 mdio_write(ioaddr
, 0x0b, 0x0000); //w 0x0b 15 0 0
1440 rtl8169_link_option(board_idx
, &autoneg
, &speed
, &duplex
);
1442 rtl8169_phy_reset(dev
, tp
);
1444 rtl8169_set_speed(dev
, autoneg
, speed
, duplex
);
1446 if ((RTL_R8(PHYstatus
) & TBI_Enable
) && netif_msg_link(tp
))
1447 printk(KERN_INFO PFX
"%s: TBI auto-negotiating\n", dev
->name
);
1450 static int rtl8169_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
1452 struct rtl8169_private
*tp
= netdev_priv(dev
);
1453 struct mii_ioctl_data
*data
= if_mii(ifr
);
1455 if (!netif_running(dev
))
1460 data
->phy_id
= 32; /* Internal PHY */
1464 data
->val_out
= mdio_read(tp
->mmio_addr
, data
->reg_num
& 0x1f);
1468 if (!capable(CAP_NET_ADMIN
))
1470 mdio_write(tp
->mmio_addr
, data
->reg_num
& 0x1f, data
->val_in
);
1476 static int __devinit
1477 rtl8169_init_one(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
1479 const unsigned int region
= rtl_cfg_info
[ent
->driver_data
].region
;
1480 struct rtl8169_private
*tp
;
1481 struct net_device
*dev
;
1482 void __iomem
*ioaddr
;
1483 unsigned int pm_cap
;
1486 if (netif_msg_drv(&debug
)) {
1487 printk(KERN_INFO
"%s Gigabit Ethernet driver %s loaded\n",
1488 MODULENAME
, RTL8169_VERSION
);
1491 dev
= alloc_etherdev(sizeof (*tp
));
1493 if (netif_msg_drv(&debug
))
1494 dev_err(&pdev
->dev
, "unable to alloc new ethernet\n");
1499 SET_MODULE_OWNER(dev
);
1500 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1501 tp
= netdev_priv(dev
);
1503 tp
->msg_enable
= netif_msg_init(debug
.msg_enable
, R8169_MSG_DEFAULT
);
1505 /* enable device (incl. PCI PM wakeup and hotplug setup) */
1506 rc
= pci_enable_device(pdev
);
1508 if (netif_msg_probe(tp
))
1509 dev_err(&pdev
->dev
, "enable failure\n");
1510 goto err_out_free_dev_1
;
1513 rc
= pci_set_mwi(pdev
);
1515 goto err_out_disable_2
;
1517 /* save power state before pci_enable_device overwrites it */
1518 pm_cap
= pci_find_capability(pdev
, PCI_CAP_ID_PM
);
1520 u16 pwr_command
, acpi_idle_state
;
1522 pci_read_config_word(pdev
, pm_cap
+ PCI_PM_CTRL
, &pwr_command
);
1523 acpi_idle_state
= pwr_command
& PCI_PM_CTRL_STATE_MASK
;
1525 if (netif_msg_probe(tp
)) {
1527 "PowerManagement capability not found.\n");
1531 /* make sure PCI base addr 1 is MMIO */
1532 if (!(pci_resource_flags(pdev
, region
) & IORESOURCE_MEM
)) {
1533 if (netif_msg_probe(tp
)) {
1535 "region #%d not an MMIO resource, aborting\n",
1542 /* check for weird/broken PCI region reporting */
1543 if (pci_resource_len(pdev
, region
) < R8169_REGS_SIZE
) {
1544 if (netif_msg_probe(tp
)) {
1546 "Invalid PCI region size(s), aborting\n");
1552 rc
= pci_request_regions(pdev
, MODULENAME
);
1554 if (netif_msg_probe(tp
))
1555 dev_err(&pdev
->dev
, "could not request regions.\n");
1559 tp
->cp_cmd
= PCIMulRW
| RxChkSum
;
1561 if ((sizeof(dma_addr_t
) > 4) &&
1562 !pci_set_dma_mask(pdev
, DMA_64BIT_MASK
) && use_dac
) {
1563 tp
->cp_cmd
|= PCIDAC
;
1564 dev
->features
|= NETIF_F_HIGHDMA
;
1566 rc
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
1568 if (netif_msg_probe(tp
)) {
1570 "DMA configuration failed.\n");
1572 goto err_out_free_res_4
;
1576 pci_set_master(pdev
);
1578 /* ioremap MMIO region */
1579 ioaddr
= ioremap(pci_resource_start(pdev
, region
), R8169_REGS_SIZE
);
1581 if (netif_msg_probe(tp
))
1582 dev_err(&pdev
->dev
, "cannot remap MMIO, aborting\n");
1584 goto err_out_free_res_4
;
1587 /* Unneeded ? Don't mess with Mrs. Murphy. */
1588 rtl8169_irq_mask_and_ack(ioaddr
);
1590 /* Soft reset the chip. */
1591 RTL_W8(ChipCmd
, CmdReset
);
1593 /* Check that the chip has finished the reset. */
1594 for (i
= 100; i
> 0; i
--) {
1595 if ((RTL_R8(ChipCmd
) & CmdReset
) == 0)
1597 msleep_interruptible(1);
1600 /* Identify chip attached to board */
1601 rtl8169_get_mac_version(tp
, ioaddr
);
1602 rtl8169_get_phy_version(tp
, ioaddr
);
1604 rtl8169_print_mac_version(tp
);
1605 rtl8169_print_phy_version(tp
);
1607 for (i
= ARRAY_SIZE(rtl_chip_info
) - 1; i
>= 0; i
--) {
1608 if (tp
->mac_version
== rtl_chip_info
[i
].mac_version
)
1612 /* Unknown chip: assume array element #0, original RTL-8169 */
1613 if (netif_msg_probe(tp
)) {
1614 dev_printk(KERN_DEBUG
, &pdev
->dev
,
1615 "unknown chip version, assuming %s\n",
1616 rtl_chip_info
[0].name
);
1622 RTL_W8(Cfg9346
, Cfg9346_Unlock
);
1623 RTL_W8(Config1
, RTL_R8(Config1
) | PMEnable
);
1624 RTL_W8(Config5
, RTL_R8(Config5
) & PMEStatus
);
1625 RTL_W8(Cfg9346
, Cfg9346_Lock
);
1627 if (RTL_R8(PHYstatus
) & TBI_Enable
) {
1628 tp
->set_speed
= rtl8169_set_speed_tbi
;
1629 tp
->get_settings
= rtl8169_gset_tbi
;
1630 tp
->phy_reset_enable
= rtl8169_tbi_reset_enable
;
1631 tp
->phy_reset_pending
= rtl8169_tbi_reset_pending
;
1632 tp
->link_ok
= rtl8169_tbi_link_ok
;
1634 tp
->phy_1000_ctrl_reg
= ADVERTISE_1000FULL
; /* Implied by TBI */
1636 tp
->set_speed
= rtl8169_set_speed_xmii
;
1637 tp
->get_settings
= rtl8169_gset_xmii
;
1638 tp
->phy_reset_enable
= rtl8169_xmii_reset_enable
;
1639 tp
->phy_reset_pending
= rtl8169_xmii_reset_pending
;
1640 tp
->link_ok
= rtl8169_xmii_link_ok
;
1642 dev
->do_ioctl
= rtl8169_ioctl
;
1645 /* Get MAC address. FIXME: read EEPROM */
1646 for (i
= 0; i
< MAC_ADDR_LEN
; i
++)
1647 dev
->dev_addr
[i
] = RTL_R8(MAC0
+ i
);
1648 memcpy(dev
->perm_addr
, dev
->dev_addr
, dev
->addr_len
);
1650 dev
->open
= rtl8169_open
;
1651 dev
->hard_start_xmit
= rtl8169_start_xmit
;
1652 dev
->get_stats
= rtl8169_get_stats
;
1653 SET_ETHTOOL_OPS(dev
, &rtl8169_ethtool_ops
);
1654 dev
->stop
= rtl8169_close
;
1655 dev
->tx_timeout
= rtl8169_tx_timeout
;
1656 dev
->set_multicast_list
= rtl_set_rx_mode
;
1657 dev
->watchdog_timeo
= RTL8169_TX_TIMEOUT
;
1658 dev
->irq
= pdev
->irq
;
1659 dev
->base_addr
= (unsigned long) ioaddr
;
1660 dev
->change_mtu
= rtl8169_change_mtu
;
1662 #ifdef CONFIG_R8169_NAPI
1663 dev
->poll
= rtl8169_poll
;
1664 dev
->weight
= R8169_NAPI_WEIGHT
;
1667 #ifdef CONFIG_R8169_VLAN
1668 dev
->features
|= NETIF_F_HW_VLAN_TX
| NETIF_F_HW_VLAN_RX
;
1669 dev
->vlan_rx_register
= rtl8169_vlan_rx_register
;
1672 #ifdef CONFIG_NET_POLL_CONTROLLER
1673 dev
->poll_controller
= rtl8169_netpoll
;
1676 tp
->intr_mask
= 0xffff;
1678 tp
->mmio_addr
= ioaddr
;
1679 tp
->align
= rtl_cfg_info
[ent
->driver_data
].align
;
1681 init_timer(&tp
->timer
);
1682 tp
->timer
.data
= (unsigned long) dev
;
1683 tp
->timer
.function
= rtl8169_phy_timer
;
1685 tp
->hw_start
= rtl_cfg_info
[ent
->driver_data
].hw_start
;
1687 spin_lock_init(&tp
->lock
);
1689 rc
= register_netdev(dev
);
1691 goto err_out_unmap_5
;
1693 pci_set_drvdata(pdev
, dev
);
1695 if (netif_msg_probe(tp
)) {
1696 printk(KERN_INFO
"%s: %s at 0x%lx, "
1697 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
1700 rtl_chip_info
[tp
->chipset
].name
,
1702 dev
->dev_addr
[0], dev
->dev_addr
[1],
1703 dev
->dev_addr
[2], dev
->dev_addr
[3],
1704 dev
->dev_addr
[4], dev
->dev_addr
[5], dev
->irq
);
1707 rtl8169_init_phy(dev
, tp
);
1715 pci_release_regions(pdev
);
1717 pci_clear_mwi(pdev
);
1719 pci_disable_device(pdev
);
1725 static void __devexit
1726 rtl8169_remove_one(struct pci_dev
*pdev
)
1728 struct net_device
*dev
= pci_get_drvdata(pdev
);
1729 struct rtl8169_private
*tp
= netdev_priv(dev
);
1731 assert(dev
!= NULL
);
1734 flush_scheduled_work();
1736 unregister_netdev(dev
);
1737 rtl8169_release_board(pdev
, dev
, tp
->mmio_addr
);
1738 pci_set_drvdata(pdev
, NULL
);
1741 static void rtl8169_set_rxbufsize(struct rtl8169_private
*tp
,
1742 struct net_device
*dev
)
1744 unsigned int mtu
= dev
->mtu
;
1746 tp
->rx_buf_sz
= (mtu
> RX_BUF_SIZE
) ? mtu
+ ETH_HLEN
+ 8 : RX_BUF_SIZE
;
1749 static int rtl8169_open(struct net_device
*dev
)
1751 struct rtl8169_private
*tp
= netdev_priv(dev
);
1752 struct pci_dev
*pdev
= tp
->pci_dev
;
1753 int retval
= -ENOMEM
;
1756 rtl8169_set_rxbufsize(tp
, dev
);
1759 * Rx and Tx desscriptors needs 256 bytes alignment.
1760 * pci_alloc_consistent provides more.
1762 tp
->TxDescArray
= pci_alloc_consistent(pdev
, R8169_TX_RING_BYTES
,
1764 if (!tp
->TxDescArray
)
1767 tp
->RxDescArray
= pci_alloc_consistent(pdev
, R8169_RX_RING_BYTES
,
1769 if (!tp
->RxDescArray
)
1772 retval
= rtl8169_init_ring(dev
);
1776 INIT_DELAYED_WORK(&tp
->task
, NULL
);
1780 retval
= request_irq(dev
->irq
, rtl8169_interrupt
, IRQF_SHARED
,
1783 goto err_release_ring_2
;
1787 rtl8169_request_timer(dev
);
1789 rtl8169_check_link_status(dev
, tp
, tp
->mmio_addr
);
1794 rtl8169_rx_clear(tp
);
1796 pci_free_consistent(pdev
, R8169_RX_RING_BYTES
, tp
->RxDescArray
,
1799 pci_free_consistent(pdev
, R8169_TX_RING_BYTES
, tp
->TxDescArray
,
1804 static void rtl8169_hw_reset(void __iomem
*ioaddr
)
1806 /* Disable interrupts */
1807 rtl8169_irq_mask_and_ack(ioaddr
);
1809 /* Reset the chipset */
1810 RTL_W8(ChipCmd
, CmdReset
);
1816 static void rtl_set_rx_tx_config_registers(struct rtl8169_private
*tp
)
1818 void __iomem
*ioaddr
= tp
->mmio_addr
;
1819 u32 cfg
= rtl8169_rx_config
;
1821 cfg
|= (RTL_R32(RxConfig
) & rtl_chip_info
[tp
->chipset
].RxConfigMask
);
1822 RTL_W32(RxConfig
, cfg
);
1824 /* Set DMA burst size and Interframe Gap Time */
1825 RTL_W32(TxConfig
, (TX_DMA_BURST
<< TxDMAShift
) |
1826 (InterFrameGap
<< TxInterFrameGapShift
));
1829 static void rtl_hw_start(struct net_device
*dev
)
1831 struct rtl8169_private
*tp
= netdev_priv(dev
);
1832 void __iomem
*ioaddr
= tp
->mmio_addr
;
1835 /* Soft reset the chip. */
1836 RTL_W8(ChipCmd
, CmdReset
);
1838 /* Check that the chip has finished the reset. */
1839 for (i
= 100; i
> 0; i
--) {
1840 if ((RTL_R8(ChipCmd
) & CmdReset
) == 0)
1842 msleep_interruptible(1);
1847 /* Enable all known interrupts by setting the interrupt mask. */
1848 RTL_W16(IntrMask
, rtl8169_intr_mask
);
1850 netif_start_queue(dev
);
1854 static void rtl_set_rx_tx_desc_registers(struct rtl8169_private
*tp
,
1855 void __iomem
*ioaddr
)
1858 * Magic spell: some iop3xx ARM board needs the TxDescAddrHigh
1859 * register to be written before TxDescAddrLow to work.
1860 * Switching from MMIO to I/O access fixes the issue as well.
1862 RTL_W32(TxDescStartAddrHigh
, ((u64
) tp
->TxPhyAddr
) >> 32);
1863 RTL_W32(TxDescStartAddrLow
, ((u64
) tp
->TxPhyAddr
) & DMA_32BIT_MASK
);
1864 RTL_W32(RxDescAddrHigh
, ((u64
) tp
->RxPhyAddr
) >> 32);
1865 RTL_W32(RxDescAddrLow
, ((u64
) tp
->RxPhyAddr
) & DMA_32BIT_MASK
);
1868 static u16
rtl_rw_cpluscmd(void __iomem
*ioaddr
)
1872 cmd
= RTL_R16(CPlusCmd
);
1873 RTL_W16(CPlusCmd
, cmd
);
1877 static void rtl_set_rx_max_size(void __iomem
*ioaddr
)
1879 /* Low hurts. Let's disable the filtering. */
1880 RTL_W16(RxMaxSize
, 16383);
1883 static void rtl_hw_start_8169(struct net_device
*dev
)
1885 struct rtl8169_private
*tp
= netdev_priv(dev
);
1886 void __iomem
*ioaddr
= tp
->mmio_addr
;
1887 struct pci_dev
*pdev
= tp
->pci_dev
;
1890 if (tp
->mac_version
== RTL_GIGA_MAC_VER_05
) {
1891 RTL_W16(CPlusCmd
, RTL_R16(CPlusCmd
) | PCIMulRW
);
1892 pci_write_config_byte(pdev
, PCI_CACHE_LINE_SIZE
, 0x08);
1895 if (tp
->mac_version
== RTL_GIGA_MAC_VER_13
) {
1896 pci_write_config_word(pdev
, 0x68, 0x00);
1897 pci_write_config_word(pdev
, 0x69, 0x08);
1900 /* Undocumented stuff. */
1901 if (tp
->mac_version
== RTL_GIGA_MAC_VER_05
) {
1902 /* Realtek's r1000_n.c driver uses '&& 0x01' here. Well... */
1903 if ((RTL_R8(Config2
) & 0x07) & 0x01)
1904 RTL_W32(0x7c, 0x0007ffff);
1906 RTL_W32(0x7c, 0x0007ff00);
1908 pci_read_config_word(pdev
, PCI_COMMAND
, &cmd
);
1910 pci_write_config_word(pdev
, PCI_COMMAND
, cmd
);
1913 RTL_W8(Cfg9346
, Cfg9346_Unlock
);
1914 if ((tp
->mac_version
== RTL_GIGA_MAC_VER_01
) ||
1915 (tp
->mac_version
== RTL_GIGA_MAC_VER_02
) ||
1916 (tp
->mac_version
== RTL_GIGA_MAC_VER_03
) ||
1917 (tp
->mac_version
== RTL_GIGA_MAC_VER_04
))
1918 RTL_W8(ChipCmd
, CmdTxEnb
| CmdRxEnb
);
1920 RTL_W8(EarlyTxThres
, EarlyTxThld
);
1922 rtl_set_rx_max_size(ioaddr
);
1924 if ((tp
->mac_version
== RTL_GIGA_MAC_VER_01
) ||
1925 (tp
->mac_version
== RTL_GIGA_MAC_VER_02
) ||
1926 (tp
->mac_version
== RTL_GIGA_MAC_VER_03
) ||
1927 (tp
->mac_version
== RTL_GIGA_MAC_VER_04
))
1928 rtl_set_rx_tx_config_registers(tp
);
1930 tp
->cp_cmd
|= rtl_rw_cpluscmd(ioaddr
) | PCIMulRW
;
1932 if ((tp
->mac_version
== RTL_GIGA_MAC_VER_02
) ||
1933 (tp
->mac_version
== RTL_GIGA_MAC_VER_03
)) {
1934 dprintk(KERN_INFO PFX
"Set MAC Reg C+CR Offset 0xE0. "
1935 "Bit-3 and bit-14 MUST be 1\n");
1936 tp
->cp_cmd
|= (1 << 14);
1939 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
1942 * Undocumented corner. Supposedly:
1943 * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
1945 RTL_W16(IntrMitigate
, 0x0000);
1947 rtl_set_rx_tx_desc_registers(tp
, ioaddr
);
1949 if ((tp
->mac_version
!= RTL_GIGA_MAC_VER_01
) &&
1950 (tp
->mac_version
!= RTL_GIGA_MAC_VER_02
) &&
1951 (tp
->mac_version
!= RTL_GIGA_MAC_VER_03
) &&
1952 (tp
->mac_version
!= RTL_GIGA_MAC_VER_04
)) {
1953 RTL_W8(ChipCmd
, CmdTxEnb
| CmdRxEnb
);
1954 rtl_set_rx_tx_config_registers(tp
);
1957 RTL_W8(Cfg9346
, Cfg9346_Lock
);
1959 /* Initially a 10 us delay. Turned it into a PCI commit. - FR */
1962 RTL_W32(RxMissed
, 0);
1964 rtl_set_rx_mode(dev
);
1966 /* no early-rx interrupts */
1967 RTL_W16(MultiIntr
, RTL_R16(MultiIntr
) & 0xF000);
1970 static void rtl_hw_start_8168(struct net_device
*dev
)
1972 struct rtl8169_private
*tp
= netdev_priv(dev
);
1973 void __iomem
*ioaddr
= tp
->mmio_addr
;
1975 RTL_W8(Cfg9346
, Cfg9346_Unlock
);
1977 RTL_W8(EarlyTxThres
, EarlyTxThld
);
1979 rtl_set_rx_max_size(ioaddr
);
1981 tp
->cp_cmd
|= rtl_rw_cpluscmd(ioaddr
) | PCIMulRW
;
1983 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
1985 RTL_W16(IntrMitigate
, 0x0000);
1987 rtl_set_rx_tx_desc_registers(tp
, ioaddr
);
1989 RTL_W8(ChipCmd
, CmdTxEnb
| CmdRxEnb
);
1990 rtl_set_rx_tx_config_registers(tp
);
1992 RTL_W8(Cfg9346
, Cfg9346_Lock
);
1996 RTL_W32(RxMissed
, 0);
1998 rtl_set_rx_mode(dev
);
2000 RTL_W16(MultiIntr
, RTL_R16(MultiIntr
) & 0xF000);
2003 static void rtl_hw_start_8101(struct net_device
*dev
)
2005 rtl_hw_start_8169(dev
);
2008 static int rtl8169_change_mtu(struct net_device
*dev
, int new_mtu
)
2010 struct rtl8169_private
*tp
= netdev_priv(dev
);
2013 if (new_mtu
< ETH_ZLEN
|| new_mtu
> SafeMtu
)
2018 if (!netif_running(dev
))
2023 rtl8169_set_rxbufsize(tp
, dev
);
2025 ret
= rtl8169_init_ring(dev
);
2029 netif_poll_enable(dev
);
2033 rtl8169_request_timer(dev
);
2039 static inline void rtl8169_make_unusable_by_asic(struct RxDesc
*desc
)
2041 desc
->addr
= 0x0badbadbadbadbadull
;
2042 desc
->opts1
&= ~cpu_to_le32(DescOwn
| RsvdMask
);
2045 static void rtl8169_free_rx_skb(struct rtl8169_private
*tp
,
2046 struct sk_buff
**sk_buff
, struct RxDesc
*desc
)
2048 struct pci_dev
*pdev
= tp
->pci_dev
;
2050 pci_unmap_single(pdev
, le64_to_cpu(desc
->addr
), tp
->rx_buf_sz
,
2051 PCI_DMA_FROMDEVICE
);
2052 dev_kfree_skb(*sk_buff
);
2054 rtl8169_make_unusable_by_asic(desc
);
2057 static inline void rtl8169_mark_to_asic(struct RxDesc
*desc
, u32 rx_buf_sz
)
2059 u32 eor
= le32_to_cpu(desc
->opts1
) & RingEnd
;
2061 desc
->opts1
= cpu_to_le32(DescOwn
| eor
| rx_buf_sz
);
2064 static inline void rtl8169_map_to_asic(struct RxDesc
*desc
, dma_addr_t mapping
,
2067 desc
->addr
= cpu_to_le64(mapping
);
2069 rtl8169_mark_to_asic(desc
, rx_buf_sz
);
2072 static struct sk_buff
*rtl8169_alloc_rx_skb(struct pci_dev
*pdev
,
2073 struct net_device
*dev
,
2074 struct RxDesc
*desc
, int rx_buf_sz
,
2077 struct sk_buff
*skb
;
2080 skb
= netdev_alloc_skb(dev
, rx_buf_sz
+ align
);
2084 skb_reserve(skb
, (align
- 1) & (unsigned long)skb
->data
);
2086 mapping
= pci_map_single(pdev
, skb
->data
, rx_buf_sz
,
2087 PCI_DMA_FROMDEVICE
);
2089 rtl8169_map_to_asic(desc
, mapping
, rx_buf_sz
);
2094 rtl8169_make_unusable_by_asic(desc
);
2098 static void rtl8169_rx_clear(struct rtl8169_private
*tp
)
2102 for (i
= 0; i
< NUM_RX_DESC
; i
++) {
2103 if (tp
->Rx_skbuff
[i
]) {
2104 rtl8169_free_rx_skb(tp
, tp
->Rx_skbuff
+ i
,
2105 tp
->RxDescArray
+ i
);
2110 static u32
rtl8169_rx_fill(struct rtl8169_private
*tp
, struct net_device
*dev
,
2115 for (cur
= start
; end
- cur
!= 0; cur
++) {
2116 struct sk_buff
*skb
;
2117 unsigned int i
= cur
% NUM_RX_DESC
;
2119 WARN_ON((s32
)(end
- cur
) < 0);
2121 if (tp
->Rx_skbuff
[i
])
2124 skb
= rtl8169_alloc_rx_skb(tp
->pci_dev
, dev
,
2125 tp
->RxDescArray
+ i
,
2126 tp
->rx_buf_sz
, tp
->align
);
2130 tp
->Rx_skbuff
[i
] = skb
;
2135 static inline void rtl8169_mark_as_last_descriptor(struct RxDesc
*desc
)
2137 desc
->opts1
|= cpu_to_le32(RingEnd
);
2140 static void rtl8169_init_ring_indexes(struct rtl8169_private
*tp
)
2142 tp
->dirty_tx
= tp
->dirty_rx
= tp
->cur_tx
= tp
->cur_rx
= 0;
2145 static int rtl8169_init_ring(struct net_device
*dev
)
2147 struct rtl8169_private
*tp
= netdev_priv(dev
);
2149 rtl8169_init_ring_indexes(tp
);
2151 memset(tp
->tx_skb
, 0x0, NUM_TX_DESC
* sizeof(struct ring_info
));
2152 memset(tp
->Rx_skbuff
, 0x0, NUM_RX_DESC
* sizeof(struct sk_buff
*));
2154 if (rtl8169_rx_fill(tp
, dev
, 0, NUM_RX_DESC
) != NUM_RX_DESC
)
2157 rtl8169_mark_as_last_descriptor(tp
->RxDescArray
+ NUM_RX_DESC
- 1);
2162 rtl8169_rx_clear(tp
);
2166 static void rtl8169_unmap_tx_skb(struct pci_dev
*pdev
, struct ring_info
*tx_skb
,
2167 struct TxDesc
*desc
)
2169 unsigned int len
= tx_skb
->len
;
2171 pci_unmap_single(pdev
, le64_to_cpu(desc
->addr
), len
, PCI_DMA_TODEVICE
);
2178 static void rtl8169_tx_clear(struct rtl8169_private
*tp
)
2182 for (i
= tp
->dirty_tx
; i
< tp
->dirty_tx
+ NUM_TX_DESC
; i
++) {
2183 unsigned int entry
= i
% NUM_TX_DESC
;
2184 struct ring_info
*tx_skb
= tp
->tx_skb
+ entry
;
2185 unsigned int len
= tx_skb
->len
;
2188 struct sk_buff
*skb
= tx_skb
->skb
;
2190 rtl8169_unmap_tx_skb(tp
->pci_dev
, tx_skb
,
2191 tp
->TxDescArray
+ entry
);
2196 tp
->stats
.tx_dropped
++;
2199 tp
->cur_tx
= tp
->dirty_tx
= 0;
2202 static void rtl8169_schedule_work(struct net_device
*dev
, work_func_t task
)
2204 struct rtl8169_private
*tp
= netdev_priv(dev
);
2206 PREPARE_DELAYED_WORK(&tp
->task
, task
);
2207 schedule_delayed_work(&tp
->task
, 4);
2210 static void rtl8169_wait_for_quiescence(struct net_device
*dev
)
2212 struct rtl8169_private
*tp
= netdev_priv(dev
);
2213 void __iomem
*ioaddr
= tp
->mmio_addr
;
2215 synchronize_irq(dev
->irq
);
2217 /* Wait for any pending NAPI task to complete */
2218 netif_poll_disable(dev
);
2220 rtl8169_irq_mask_and_ack(ioaddr
);
2222 netif_poll_enable(dev
);
2225 static void rtl8169_reinit_task(struct work_struct
*work
)
2227 struct rtl8169_private
*tp
=
2228 container_of(work
, struct rtl8169_private
, task
.work
);
2229 struct net_device
*dev
= tp
->dev
;
2234 if (!netif_running(dev
))
2237 rtl8169_wait_for_quiescence(dev
);
2240 ret
= rtl8169_open(dev
);
2241 if (unlikely(ret
< 0)) {
2242 if (net_ratelimit()) {
2243 struct rtl8169_private
*tp
= netdev_priv(dev
);
2245 if (netif_msg_drv(tp
)) {
2247 "%s: reinit failure (status = %d)."
2248 " Rescheduling.\n", dev
->name
, ret
);
2251 rtl8169_schedule_work(dev
, rtl8169_reinit_task
);
2258 static void rtl8169_reset_task(struct work_struct
*work
)
2260 struct rtl8169_private
*tp
=
2261 container_of(work
, struct rtl8169_private
, task
.work
);
2262 struct net_device
*dev
= tp
->dev
;
2266 if (!netif_running(dev
))
2269 rtl8169_wait_for_quiescence(dev
);
2271 rtl8169_rx_interrupt(dev
, tp
, tp
->mmio_addr
);
2272 rtl8169_tx_clear(tp
);
2274 if (tp
->dirty_rx
== tp
->cur_rx
) {
2275 rtl8169_init_ring_indexes(tp
);
2277 netif_wake_queue(dev
);
2279 if (net_ratelimit()) {
2280 struct rtl8169_private
*tp
= netdev_priv(dev
);
2282 if (netif_msg_intr(tp
)) {
2283 printk(PFX KERN_EMERG
2284 "%s: Rx buffers shortage\n", dev
->name
);
2287 rtl8169_schedule_work(dev
, rtl8169_reset_task
);
2294 static void rtl8169_tx_timeout(struct net_device
*dev
)
2296 struct rtl8169_private
*tp
= netdev_priv(dev
);
2298 rtl8169_hw_reset(tp
->mmio_addr
);
2300 /* Let's wait a bit while any (async) irq lands on */
2301 rtl8169_schedule_work(dev
, rtl8169_reset_task
);
2304 static int rtl8169_xmit_frags(struct rtl8169_private
*tp
, struct sk_buff
*skb
,
2307 struct skb_shared_info
*info
= skb_shinfo(skb
);
2308 unsigned int cur_frag
, entry
;
2312 for (cur_frag
= 0; cur_frag
< info
->nr_frags
; cur_frag
++) {
2313 skb_frag_t
*frag
= info
->frags
+ cur_frag
;
2318 entry
= (entry
+ 1) % NUM_TX_DESC
;
2320 txd
= tp
->TxDescArray
+ entry
;
2322 addr
= ((void *) page_address(frag
->page
)) + frag
->page_offset
;
2323 mapping
= pci_map_single(tp
->pci_dev
, addr
, len
, PCI_DMA_TODEVICE
);
2325 /* anti gcc 2.95.3 bugware (sic) */
2326 status
= opts1
| len
| (RingEnd
* !((entry
+ 1) % NUM_TX_DESC
));
2328 txd
->opts1
= cpu_to_le32(status
);
2329 txd
->addr
= cpu_to_le64(mapping
);
2331 tp
->tx_skb
[entry
].len
= len
;
2335 tp
->tx_skb
[entry
].skb
= skb
;
2336 txd
->opts1
|= cpu_to_le32(LastFrag
);
2342 static inline u32
rtl8169_tso_csum(struct sk_buff
*skb
, struct net_device
*dev
)
2344 if (dev
->features
& NETIF_F_TSO
) {
2345 u32 mss
= skb_shinfo(skb
)->gso_size
;
2348 return LargeSend
| ((mss
& MSSMask
) << MSSShift
);
2350 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
2351 const struct iphdr
*ip
= ip_hdr(skb
);
2353 if (ip
->protocol
== IPPROTO_TCP
)
2354 return IPCS
| TCPCS
;
2355 else if (ip
->protocol
== IPPROTO_UDP
)
2356 return IPCS
| UDPCS
;
2357 WARN_ON(1); /* we need a WARN() */
2362 static int rtl8169_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
2364 struct rtl8169_private
*tp
= netdev_priv(dev
);
2365 unsigned int frags
, entry
= tp
->cur_tx
% NUM_TX_DESC
;
2366 struct TxDesc
*txd
= tp
->TxDescArray
+ entry
;
2367 void __iomem
*ioaddr
= tp
->mmio_addr
;
2371 int ret
= NETDEV_TX_OK
;
2373 if (unlikely(TX_BUFFS_AVAIL(tp
) < skb_shinfo(skb
)->nr_frags
)) {
2374 if (netif_msg_drv(tp
)) {
2376 "%s: BUG! Tx Ring full when queue awake!\n",
2382 if (unlikely(le32_to_cpu(txd
->opts1
) & DescOwn
))
2385 opts1
= DescOwn
| rtl8169_tso_csum(skb
, dev
);
2387 frags
= rtl8169_xmit_frags(tp
, skb
, opts1
);
2389 len
= skb_headlen(skb
);
2394 if (unlikely(len
< ETH_ZLEN
)) {
2395 if (skb_padto(skb
, ETH_ZLEN
))
2396 goto err_update_stats
;
2400 opts1
|= FirstFrag
| LastFrag
;
2401 tp
->tx_skb
[entry
].skb
= skb
;
2404 mapping
= pci_map_single(tp
->pci_dev
, skb
->data
, len
, PCI_DMA_TODEVICE
);
2406 tp
->tx_skb
[entry
].len
= len
;
2407 txd
->addr
= cpu_to_le64(mapping
);
2408 txd
->opts2
= cpu_to_le32(rtl8169_tx_vlan_tag(tp
, skb
));
2412 /* anti gcc 2.95.3 bugware (sic) */
2413 status
= opts1
| len
| (RingEnd
* !((entry
+ 1) % NUM_TX_DESC
));
2414 txd
->opts1
= cpu_to_le32(status
);
2416 dev
->trans_start
= jiffies
;
2418 tp
->cur_tx
+= frags
+ 1;
2422 RTL_W8(TxPoll
, 0x40); /* set polling bit */
2424 if (TX_BUFFS_AVAIL(tp
) < MAX_SKB_FRAGS
) {
2425 netif_stop_queue(dev
);
2427 if (TX_BUFFS_AVAIL(tp
) >= MAX_SKB_FRAGS
)
2428 netif_wake_queue(dev
);
2435 netif_stop_queue(dev
);
2436 ret
= NETDEV_TX_BUSY
;
2438 tp
->stats
.tx_dropped
++;
2442 static void rtl8169_pcierr_interrupt(struct net_device
*dev
)
2444 struct rtl8169_private
*tp
= netdev_priv(dev
);
2445 struct pci_dev
*pdev
= tp
->pci_dev
;
2446 void __iomem
*ioaddr
= tp
->mmio_addr
;
2447 u16 pci_status
, pci_cmd
;
2449 pci_read_config_word(pdev
, PCI_COMMAND
, &pci_cmd
);
2450 pci_read_config_word(pdev
, PCI_STATUS
, &pci_status
);
2452 if (netif_msg_intr(tp
)) {
2454 "%s: PCI error (cmd = 0x%04x, status = 0x%04x).\n",
2455 dev
->name
, pci_cmd
, pci_status
);
2459 * The recovery sequence below admits a very elaborated explanation:
2460 * - it seems to work;
2461 * - I did not see what else could be done;
2462 * - it makes iop3xx happy.
2464 * Feel free to adjust to your needs.
2466 if (pdev
->broken_parity_status
)
2467 pci_cmd
&= ~PCI_COMMAND_PARITY
;
2469 pci_cmd
|= PCI_COMMAND_SERR
| PCI_COMMAND_PARITY
;
2471 pci_write_config_word(pdev
, PCI_COMMAND
, pci_cmd
);
2473 pci_write_config_word(pdev
, PCI_STATUS
,
2474 pci_status
& (PCI_STATUS_DETECTED_PARITY
|
2475 PCI_STATUS_SIG_SYSTEM_ERROR
| PCI_STATUS_REC_MASTER_ABORT
|
2476 PCI_STATUS_REC_TARGET_ABORT
| PCI_STATUS_SIG_TARGET_ABORT
));
2478 /* The infamous DAC f*ckup only happens at boot time */
2479 if ((tp
->cp_cmd
& PCIDAC
) && !tp
->dirty_rx
&& !tp
->cur_rx
) {
2480 if (netif_msg_intr(tp
))
2481 printk(KERN_INFO
"%s: disabling PCI DAC.\n", dev
->name
);
2482 tp
->cp_cmd
&= ~PCIDAC
;
2483 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
2484 dev
->features
&= ~NETIF_F_HIGHDMA
;
2487 rtl8169_hw_reset(ioaddr
);
2489 rtl8169_schedule_work(dev
, rtl8169_reinit_task
);
2493 rtl8169_tx_interrupt(struct net_device
*dev
, struct rtl8169_private
*tp
,
2494 void __iomem
*ioaddr
)
2496 unsigned int dirty_tx
, tx_left
;
2498 assert(dev
!= NULL
);
2500 assert(ioaddr
!= NULL
);
2502 dirty_tx
= tp
->dirty_tx
;
2504 tx_left
= tp
->cur_tx
- dirty_tx
;
2506 while (tx_left
> 0) {
2507 unsigned int entry
= dirty_tx
% NUM_TX_DESC
;
2508 struct ring_info
*tx_skb
= tp
->tx_skb
+ entry
;
2509 u32 len
= tx_skb
->len
;
2513 status
= le32_to_cpu(tp
->TxDescArray
[entry
].opts1
);
2514 if (status
& DescOwn
)
2517 tp
->stats
.tx_bytes
+= len
;
2518 tp
->stats
.tx_packets
++;
2520 rtl8169_unmap_tx_skb(tp
->pci_dev
, tx_skb
, tp
->TxDescArray
+ entry
);
2522 if (status
& LastFrag
) {
2523 dev_kfree_skb_irq(tx_skb
->skb
);
2530 if (tp
->dirty_tx
!= dirty_tx
) {
2531 tp
->dirty_tx
= dirty_tx
;
2533 if (netif_queue_stopped(dev
) &&
2534 (TX_BUFFS_AVAIL(tp
) >= MAX_SKB_FRAGS
)) {
2535 netif_wake_queue(dev
);
2540 static inline int rtl8169_fragmented_frame(u32 status
)
2542 return (status
& (FirstFrag
| LastFrag
)) != (FirstFrag
| LastFrag
);
2545 static inline void rtl8169_rx_csum(struct sk_buff
*skb
, struct RxDesc
*desc
)
2547 u32 opts1
= le32_to_cpu(desc
->opts1
);
2548 u32 status
= opts1
& RxProtoMask
;
2550 if (((status
== RxProtoTCP
) && !(opts1
& TCPFail
)) ||
2551 ((status
== RxProtoUDP
) && !(opts1
& UDPFail
)) ||
2552 ((status
== RxProtoIP
) && !(opts1
& IPFail
)))
2553 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
2555 skb
->ip_summed
= CHECKSUM_NONE
;
2558 static inline bool rtl8169_try_rx_copy(struct sk_buff
**sk_buff
, int pkt_size
,
2559 struct pci_dev
*pdev
, dma_addr_t addr
,
2562 struct sk_buff
*skb
;
2565 if (pkt_size
>= rx_copybreak
)
2568 skb
= dev_alloc_skb(pkt_size
+ align
);
2572 pci_dma_sync_single_for_cpu(pdev
, addr
, pkt_size
, PCI_DMA_FROMDEVICE
);
2573 skb_reserve(skb
, (align
- 1) & (unsigned long)skb
->data
);
2574 skb_copy_from_linear_data(*sk_buff
, skb
->data
, pkt_size
);
2582 rtl8169_rx_interrupt(struct net_device
*dev
, struct rtl8169_private
*tp
,
2583 void __iomem
*ioaddr
)
2585 unsigned int cur_rx
, rx_left
;
2586 unsigned int delta
, count
;
2588 assert(dev
!= NULL
);
2590 assert(ioaddr
!= NULL
);
2592 cur_rx
= tp
->cur_rx
;
2593 rx_left
= NUM_RX_DESC
+ tp
->dirty_rx
- cur_rx
;
2594 rx_left
= rtl8169_rx_quota(rx_left
, (u32
) dev
->quota
);
2596 for (; rx_left
> 0; rx_left
--, cur_rx
++) {
2597 unsigned int entry
= cur_rx
% NUM_RX_DESC
;
2598 struct RxDesc
*desc
= tp
->RxDescArray
+ entry
;
2602 status
= le32_to_cpu(desc
->opts1
);
2604 if (status
& DescOwn
)
2606 if (unlikely(status
& RxRES
)) {
2607 if (netif_msg_rx_err(tp
)) {
2609 "%s: Rx ERROR. status = %08x\n",
2612 tp
->stats
.rx_errors
++;
2613 if (status
& (RxRWT
| RxRUNT
))
2614 tp
->stats
.rx_length_errors
++;
2616 tp
->stats
.rx_crc_errors
++;
2617 if (status
& RxFOVF
) {
2618 rtl8169_schedule_work(dev
, rtl8169_reset_task
);
2619 tp
->stats
.rx_fifo_errors
++;
2621 rtl8169_mark_to_asic(desc
, tp
->rx_buf_sz
);
2623 struct sk_buff
*skb
= tp
->Rx_skbuff
[entry
];
2624 dma_addr_t addr
= le64_to_cpu(desc
->addr
);
2625 int pkt_size
= (status
& 0x00001FFF) - 4;
2626 struct pci_dev
*pdev
= tp
->pci_dev
;
2629 * The driver does not support incoming fragmented
2630 * frames. They are seen as a symptom of over-mtu
2633 if (unlikely(rtl8169_fragmented_frame(status
))) {
2634 tp
->stats
.rx_dropped
++;
2635 tp
->stats
.rx_length_errors
++;
2636 rtl8169_mark_to_asic(desc
, tp
->rx_buf_sz
);
2640 rtl8169_rx_csum(skb
, desc
);
2642 if (rtl8169_try_rx_copy(&skb
, pkt_size
, pdev
, addr
,
2644 pci_dma_sync_single_for_device(pdev
, addr
,
2645 pkt_size
, PCI_DMA_FROMDEVICE
);
2646 rtl8169_mark_to_asic(desc
, tp
->rx_buf_sz
);
2648 pci_unmap_single(pdev
, addr
, pkt_size
,
2649 PCI_DMA_FROMDEVICE
);
2650 tp
->Rx_skbuff
[entry
] = NULL
;
2653 skb_put(skb
, pkt_size
);
2654 skb
->protocol
= eth_type_trans(skb
, dev
);
2656 if (rtl8169_rx_vlan_skb(tp
, desc
, skb
) < 0)
2657 rtl8169_rx_skb(skb
);
2659 dev
->last_rx
= jiffies
;
2660 tp
->stats
.rx_bytes
+= pkt_size
;
2661 tp
->stats
.rx_packets
++;
2665 count
= cur_rx
- tp
->cur_rx
;
2666 tp
->cur_rx
= cur_rx
;
2668 delta
= rtl8169_rx_fill(tp
, dev
, tp
->dirty_rx
, tp
->cur_rx
);
2669 if (!delta
&& count
&& netif_msg_intr(tp
))
2670 printk(KERN_INFO
"%s: no Rx buffer allocated\n", dev
->name
);
2671 tp
->dirty_rx
+= delta
;
2674 * FIXME: until there is periodic timer to try and refill the ring,
2675 * a temporary shortage may definitely kill the Rx process.
2676 * - disable the asic to try and avoid an overflow and kick it again
2678 * - how do others driver handle this condition (Uh oh...).
2680 if ((tp
->dirty_rx
+ NUM_RX_DESC
== tp
->cur_rx
) && netif_msg_intr(tp
))
2681 printk(KERN_EMERG
"%s: Rx buffers exhausted\n", dev
->name
);
2686 /* The interrupt handler does all of the Rx thread work and cleans up after the Tx thread. */
2688 rtl8169_interrupt(int irq
, void *dev_instance
)
2690 struct net_device
*dev
= (struct net_device
*) dev_instance
;
2691 struct rtl8169_private
*tp
= netdev_priv(dev
);
2692 int boguscnt
= max_interrupt_work
;
2693 void __iomem
*ioaddr
= tp
->mmio_addr
;
2698 status
= RTL_R16(IntrStatus
);
2700 /* hotplug/major error/no more work/shared irq */
2701 if ((status
== 0xFFFF) || !status
)
2706 if (unlikely(!netif_running(dev
))) {
2707 rtl8169_asic_down(ioaddr
);
2711 status
&= tp
->intr_mask
;
2713 (status
& RxFIFOOver
) ? (status
| RxOverflow
) : status
);
2715 if (!(status
& rtl8169_intr_mask
))
2718 if (unlikely(status
& SYSErr
)) {
2719 rtl8169_pcierr_interrupt(dev
);
2723 if (status
& LinkChg
)
2724 rtl8169_check_link_status(dev
, tp
, ioaddr
);
2726 #ifdef CONFIG_R8169_NAPI
2727 RTL_W16(IntrMask
, rtl8169_intr_mask
& ~rtl8169_napi_event
);
2728 tp
->intr_mask
= ~rtl8169_napi_event
;
2730 if (likely(netif_rx_schedule_prep(dev
)))
2731 __netif_rx_schedule(dev
);
2732 else if (netif_msg_intr(tp
)) {
2733 printk(KERN_INFO
"%s: interrupt %04x taken in poll\n",
2739 if (status
& (RxOK
| RxOverflow
| RxFIFOOver
)) {
2740 rtl8169_rx_interrupt(dev
, tp
, ioaddr
);
2743 if (status
& (TxOK
| TxErr
))
2744 rtl8169_tx_interrupt(dev
, tp
, ioaddr
);
2748 } while (boguscnt
> 0);
2750 if (boguscnt
<= 0) {
2751 if (netif_msg_intr(tp
) && net_ratelimit() ) {
2753 "%s: Too much work at interrupt!\n", dev
->name
);
2755 /* Clear all interrupt sources. */
2756 RTL_W16(IntrStatus
, 0xffff);
2759 return IRQ_RETVAL(handled
);
2762 #ifdef CONFIG_R8169_NAPI
2763 static int rtl8169_poll(struct net_device
*dev
, int *budget
)
2765 unsigned int work_done
, work_to_do
= min(*budget
, dev
->quota
);
2766 struct rtl8169_private
*tp
= netdev_priv(dev
);
2767 void __iomem
*ioaddr
= tp
->mmio_addr
;
2769 work_done
= rtl8169_rx_interrupt(dev
, tp
, ioaddr
);
2770 rtl8169_tx_interrupt(dev
, tp
, ioaddr
);
2772 *budget
-= work_done
;
2773 dev
->quota
-= work_done
;
2775 if (work_done
< work_to_do
) {
2776 netif_rx_complete(dev
);
2777 tp
->intr_mask
= 0xffff;
2779 * 20040426: the barrier is not strictly required but the
2780 * behavior of the irq handler could be less predictable
2781 * without it. Btw, the lack of flush for the posted pci
2782 * write is safe - FR
2785 RTL_W16(IntrMask
, rtl8169_intr_mask
);
2788 return (work_done
>= work_to_do
);
2792 static void rtl8169_down(struct net_device
*dev
)
2794 struct rtl8169_private
*tp
= netdev_priv(dev
);
2795 void __iomem
*ioaddr
= tp
->mmio_addr
;
2796 unsigned int poll_locked
= 0;
2797 unsigned int intrmask
;
2799 rtl8169_delete_timer(dev
);
2801 netif_stop_queue(dev
);
2804 spin_lock_irq(&tp
->lock
);
2806 rtl8169_asic_down(ioaddr
);
2808 /* Update the error counts. */
2809 tp
->stats
.rx_missed_errors
+= RTL_R32(RxMissed
);
2810 RTL_W32(RxMissed
, 0);
2812 spin_unlock_irq(&tp
->lock
);
2814 synchronize_irq(dev
->irq
);
2817 netif_poll_disable(dev
);
2821 /* Give a racing hard_start_xmit a few cycles to complete. */
2822 synchronize_sched(); /* FIXME: should this be synchronize_irq()? */
2825 * And now for the 50k$ question: are IRQ disabled or not ?
2827 * Two paths lead here:
2829 * -> netif_running() is available to sync the current code and the
2830 * IRQ handler. See rtl8169_interrupt for details.
2831 * 2) dev->change_mtu
2832 * -> rtl8169_poll can not be issued again and re-enable the
2833 * interruptions. Let's simply issue the IRQ down sequence again.
2835 * No loop if hotpluged or major error (0xffff).
2837 intrmask
= RTL_R16(IntrMask
);
2838 if (intrmask
&& (intrmask
!= 0xffff))
2841 rtl8169_tx_clear(tp
);
2843 rtl8169_rx_clear(tp
);
2846 static int rtl8169_close(struct net_device
*dev
)
2848 struct rtl8169_private
*tp
= netdev_priv(dev
);
2849 struct pci_dev
*pdev
= tp
->pci_dev
;
2853 free_irq(dev
->irq
, dev
);
2855 netif_poll_enable(dev
);
2857 pci_free_consistent(pdev
, R8169_RX_RING_BYTES
, tp
->RxDescArray
,
2859 pci_free_consistent(pdev
, R8169_TX_RING_BYTES
, tp
->TxDescArray
,
2861 tp
->TxDescArray
= NULL
;
2862 tp
->RxDescArray
= NULL
;
2867 static void rtl_set_rx_mode(struct net_device
*dev
)
2869 struct rtl8169_private
*tp
= netdev_priv(dev
);
2870 void __iomem
*ioaddr
= tp
->mmio_addr
;
2871 unsigned long flags
;
2872 u32 mc_filter
[2]; /* Multicast hash filter */
2876 if (dev
->flags
& IFF_PROMISC
) {
2877 /* Unconditionally log net taps. */
2878 if (netif_msg_link(tp
)) {
2879 printk(KERN_NOTICE
"%s: Promiscuous mode enabled.\n",
2883 AcceptBroadcast
| AcceptMulticast
| AcceptMyPhys
|
2885 mc_filter
[1] = mc_filter
[0] = 0xffffffff;
2886 } else if ((dev
->mc_count
> multicast_filter_limit
)
2887 || (dev
->flags
& IFF_ALLMULTI
)) {
2888 /* Too many to filter perfectly -- accept all multicasts. */
2889 rx_mode
= AcceptBroadcast
| AcceptMulticast
| AcceptMyPhys
;
2890 mc_filter
[1] = mc_filter
[0] = 0xffffffff;
2892 struct dev_mc_list
*mclist
;
2893 rx_mode
= AcceptBroadcast
| AcceptMyPhys
;
2894 mc_filter
[1] = mc_filter
[0] = 0;
2895 for (i
= 0, mclist
= dev
->mc_list
; mclist
&& i
< dev
->mc_count
;
2896 i
++, mclist
= mclist
->next
) {
2897 int bit_nr
= ether_crc(ETH_ALEN
, mclist
->dmi_addr
) >> 26;
2898 mc_filter
[bit_nr
>> 5] |= 1 << (bit_nr
& 31);
2899 rx_mode
|= AcceptMulticast
;
2903 spin_lock_irqsave(&tp
->lock
, flags
);
2905 tmp
= rtl8169_rx_config
| rx_mode
|
2906 (RTL_R32(RxConfig
) & rtl_chip_info
[tp
->chipset
].RxConfigMask
);
2908 if ((tp
->mac_version
== RTL_GIGA_MAC_VER_11
) ||
2909 (tp
->mac_version
== RTL_GIGA_MAC_VER_12
) ||
2910 (tp
->mac_version
== RTL_GIGA_MAC_VER_13
) ||
2911 (tp
->mac_version
== RTL_GIGA_MAC_VER_14
) ||
2912 (tp
->mac_version
== RTL_GIGA_MAC_VER_15
)) {
2913 mc_filter
[0] = 0xffffffff;
2914 mc_filter
[1] = 0xffffffff;
2917 RTL_W32(RxConfig
, tmp
);
2918 RTL_W32(MAR0
+ 0, mc_filter
[0]);
2919 RTL_W32(MAR0
+ 4, mc_filter
[1]);
2921 spin_unlock_irqrestore(&tp
->lock
, flags
);
2925 * rtl8169_get_stats - Get rtl8169 read/write statistics
2926 * @dev: The Ethernet Device to get statistics for
2928 * Get TX/RX statistics for rtl8169
2930 static struct net_device_stats
*rtl8169_get_stats(struct net_device
*dev
)
2932 struct rtl8169_private
*tp
= netdev_priv(dev
);
2933 void __iomem
*ioaddr
= tp
->mmio_addr
;
2934 unsigned long flags
;
2936 if (netif_running(dev
)) {
2937 spin_lock_irqsave(&tp
->lock
, flags
);
2938 tp
->stats
.rx_missed_errors
+= RTL_R32(RxMissed
);
2939 RTL_W32(RxMissed
, 0);
2940 spin_unlock_irqrestore(&tp
->lock
, flags
);
2948 static int rtl8169_suspend(struct pci_dev
*pdev
, pm_message_t state
)
2950 struct net_device
*dev
= pci_get_drvdata(pdev
);
2951 struct rtl8169_private
*tp
= netdev_priv(dev
);
2952 void __iomem
*ioaddr
= tp
->mmio_addr
;
2954 if (!netif_running(dev
))
2955 goto out_pci_suspend
;
2957 netif_device_detach(dev
);
2958 netif_stop_queue(dev
);
2960 spin_lock_irq(&tp
->lock
);
2962 rtl8169_asic_down(ioaddr
);
2964 tp
->stats
.rx_missed_errors
+= RTL_R32(RxMissed
);
2965 RTL_W32(RxMissed
, 0);
2967 spin_unlock_irq(&tp
->lock
);
2970 pci_save_state(pdev
);
2971 pci_enable_wake(pdev
, pci_choose_state(pdev
, state
), tp
->wol_enabled
);
2972 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
2977 static int rtl8169_resume(struct pci_dev
*pdev
)
2979 struct net_device
*dev
= pci_get_drvdata(pdev
);
2981 pci_set_power_state(pdev
, PCI_D0
);
2982 pci_restore_state(pdev
);
2983 pci_enable_wake(pdev
, PCI_D0
, 0);
2985 if (!netif_running(dev
))
2988 netif_device_attach(dev
);
2990 rtl8169_schedule_work(dev
, rtl8169_reset_task
);
2995 #endif /* CONFIG_PM */
2997 static struct pci_driver rtl8169_pci_driver
= {
2999 .id_table
= rtl8169_pci_tbl
,
3000 .probe
= rtl8169_init_one
,
3001 .remove
= __devexit_p(rtl8169_remove_one
),
3003 .suspend
= rtl8169_suspend
,
3004 .resume
= rtl8169_resume
,
3009 rtl8169_init_module(void)
3011 return pci_register_driver(&rtl8169_pci_driver
);
3015 rtl8169_cleanup_module(void)
3017 pci_unregister_driver(&rtl8169_pci_driver
);
3020 module_init(rtl8169_init_module
);
3021 module_exit(rtl8169_cleanup_module
);