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[PATCH] e1000: dynamic itr: take TSO and jumbo into account
[linux-2.6/mini2440.git] / drivers / net / e1000 / e1000_main.c
blob62ef267b3d64786be1040bfb354abbaddf3b2b0a
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30 #include <net/ip6_checksum.h>
31
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #ifndef CONFIG_E1000_NAPI
35 #define DRIVERNAPI
36 #else
37 #define DRIVERNAPI "-NAPI"
38 #endif
39 #define DRV_VERSION "7.3.15-k2"DRIVERNAPI
40 char e1000_driver_version[] = DRV_VERSION;
41 static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
42
43 /* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50 static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
76 INTEL_E1000_ETHERNET_DEVICE(0x1049),
77 INTEL_E1000_ETHERNET_DEVICE(0x104A),
78 INTEL_E1000_ETHERNET_DEVICE(0x104B),
79 INTEL_E1000_ETHERNET_DEVICE(0x104C),
80 INTEL_E1000_ETHERNET_DEVICE(0x104D),
81 INTEL_E1000_ETHERNET_DEVICE(0x105E),
82 INTEL_E1000_ETHERNET_DEVICE(0x105F),
83 INTEL_E1000_ETHERNET_DEVICE(0x1060),
84 INTEL_E1000_ETHERNET_DEVICE(0x1075),
85 INTEL_E1000_ETHERNET_DEVICE(0x1076),
86 INTEL_E1000_ETHERNET_DEVICE(0x1077),
87 INTEL_E1000_ETHERNET_DEVICE(0x1078),
88 INTEL_E1000_ETHERNET_DEVICE(0x1079),
89 INTEL_E1000_ETHERNET_DEVICE(0x107A),
90 INTEL_E1000_ETHERNET_DEVICE(0x107B),
91 INTEL_E1000_ETHERNET_DEVICE(0x107C),
92 INTEL_E1000_ETHERNET_DEVICE(0x107D),
93 INTEL_E1000_ETHERNET_DEVICE(0x107E),
94 INTEL_E1000_ETHERNET_DEVICE(0x107F),
95 INTEL_E1000_ETHERNET_DEVICE(0x108A),
96 INTEL_E1000_ETHERNET_DEVICE(0x108B),
97 INTEL_E1000_ETHERNET_DEVICE(0x108C),
98 INTEL_E1000_ETHERNET_DEVICE(0x1096),
99 INTEL_E1000_ETHERNET_DEVICE(0x1098),
100 INTEL_E1000_ETHERNET_DEVICE(0x1099),
101 INTEL_E1000_ETHERNET_DEVICE(0x109A),
102 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
103 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
104 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
105 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
106 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
107 INTEL_E1000_ETHERNET_DEVICE(0x10BC),
108 INTEL_E1000_ETHERNET_DEVICE(0x10C4),
109 INTEL_E1000_ETHERNET_DEVICE(0x10C5),
110 /* required last entry */
111 {0,}
112 };
113
114 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
115
116 int e1000_up(struct e1000_adapter *adapter);
117 void e1000_down(struct e1000_adapter *adapter);
118 void e1000_reinit_locked(struct e1000_adapter *adapter);
119 void e1000_reset(struct e1000_adapter *adapter);
120 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
121 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
122 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
123 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
124 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
125 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
126 struct e1000_tx_ring *txdr);
127 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
128 struct e1000_rx_ring *rxdr);
129 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
130 struct e1000_tx_ring *tx_ring);
131 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
132 struct e1000_rx_ring *rx_ring);
133 void e1000_update_stats(struct e1000_adapter *adapter);
134
135 static int e1000_init_module(void);
136 static void e1000_exit_module(void);
137 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
138 static void __devexit e1000_remove(struct pci_dev *pdev);
139 static int e1000_alloc_queues(struct e1000_adapter *adapter);
140 static int e1000_sw_init(struct e1000_adapter *adapter);
141 static int e1000_open(struct net_device *netdev);
142 static int e1000_close(struct net_device *netdev);
143 static void e1000_configure_tx(struct e1000_adapter *adapter);
144 static void e1000_configure_rx(struct e1000_adapter *adapter);
145 static void e1000_setup_rctl(struct e1000_adapter *adapter);
146 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
147 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
148 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
149 struct e1000_tx_ring *tx_ring);
150 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
151 struct e1000_rx_ring *rx_ring);
152 static void e1000_set_multi(struct net_device *netdev);
153 static void e1000_update_phy_info(unsigned long data);
154 static void e1000_watchdog(unsigned long data);
155 static void e1000_82547_tx_fifo_stall(unsigned long data);
156 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
157 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
158 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
159 static int e1000_set_mac(struct net_device *netdev, void *p);
160 static irqreturn_t e1000_intr(int irq, void *data);
161 #ifdef CONFIG_PCI_MSI
162 static irqreturn_t e1000_intr_msi(int irq, void *data);
163 #endif
164 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
165 struct e1000_tx_ring *tx_ring);
166 #ifdef CONFIG_E1000_NAPI
167 static int e1000_clean(struct net_device *poll_dev, int *budget);
168 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
169 struct e1000_rx_ring *rx_ring,
170 int *work_done, int work_to_do);
171 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
172 struct e1000_rx_ring *rx_ring,
173 int *work_done, int work_to_do);
174 #else
175 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
176 struct e1000_rx_ring *rx_ring);
177 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
178 struct e1000_rx_ring *rx_ring);
179 #endif
180 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
181 struct e1000_rx_ring *rx_ring,
182 int cleaned_count);
183 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
184 struct e1000_rx_ring *rx_ring,
185 int cleaned_count);
186 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
187 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
188 int cmd);
189 void e1000_set_ethtool_ops(struct net_device *netdev);
190 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
191 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
192 static void e1000_tx_timeout(struct net_device *dev);
193 static void e1000_reset_task(struct work_struct *work);
194 static void e1000_smartspeed(struct e1000_adapter *adapter);
195 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
196 struct sk_buff *skb);
197
198 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
199 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
200 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
201 static void e1000_restore_vlan(struct e1000_adapter *adapter);
202
203 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
204 #ifdef CONFIG_PM
205 static int e1000_resume(struct pci_dev *pdev);
206 #endif
207 static void e1000_shutdown(struct pci_dev *pdev);
208
209 #ifdef CONFIG_NET_POLL_CONTROLLER
210 /* for netdump / net console */
211 static void e1000_netpoll (struct net_device *netdev);
212 #endif
213
214 extern void e1000_check_options(struct e1000_adapter *adapter);
215
216 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
217 pci_channel_state_t state);
218 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
219 static void e1000_io_resume(struct pci_dev *pdev);
220
221 static struct pci_error_handlers e1000_err_handler = {
222 .error_detected = e1000_io_error_detected,
223 .slot_reset = e1000_io_slot_reset,
224 .resume = e1000_io_resume,
225 };
226
227 static struct pci_driver e1000_driver = {
228 .name = e1000_driver_name,
229 .id_table = e1000_pci_tbl,
230 .probe = e1000_probe,
231 .remove = __devexit_p(e1000_remove),
232 #ifdef CONFIG_PM
233 /* Power Managment Hooks */
234 .suspend = e1000_suspend,
235 .resume = e1000_resume,
236 #endif
237 .shutdown = e1000_shutdown,
238 .err_handler = &e1000_err_handler
239 };
240
241 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
242 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
243 MODULE_LICENSE("GPL");
244 MODULE_VERSION(DRV_VERSION);
245
246 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
247 module_param(debug, int, 0);
248 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
249
250 /**
251 * e1000_init_module - Driver Registration Routine
252 *
253 * e1000_init_module is the first routine called when the driver is
254 * loaded. All it does is register with the PCI subsystem.
255 **/
256
257 static int __init
258 e1000_init_module(void)
259 {
260 int ret;
261 printk(KERN_INFO "%s - version %s\n",
262 e1000_driver_string, e1000_driver_version);
263
264 printk(KERN_INFO "%s\n", e1000_copyright);
265
266 ret = pci_register_driver(&e1000_driver);
267
268 return ret;
269 }
270
271 module_init(e1000_init_module);
272
273 /**
274 * e1000_exit_module - Driver Exit Cleanup Routine
275 *
276 * e1000_exit_module is called just before the driver is removed
277 * from memory.
278 **/
279
280 static void __exit
281 e1000_exit_module(void)
282 {
283 pci_unregister_driver(&e1000_driver);
284 }
285
286 module_exit(e1000_exit_module);
287
288 static int e1000_request_irq(struct e1000_adapter *adapter)
289 {
290 struct net_device *netdev = adapter->netdev;
291 int flags, err = 0;
292
293 flags = IRQF_SHARED;
294 #ifdef CONFIG_PCI_MSI
295 if (adapter->hw.mac_type >= e1000_82571) {
296 adapter->have_msi = TRUE;
297 if ((err = pci_enable_msi(adapter->pdev))) {
298 DPRINTK(PROBE, ERR,
299 "Unable to allocate MSI interrupt Error: %d\n", err);
300 adapter->have_msi = FALSE;
301 }
302 }
303 if (adapter->have_msi) {
304 flags &= ~IRQF_SHARED;
305 err = request_irq(adapter->pdev->irq, &e1000_intr_msi, flags,
306 netdev->name, netdev);
307 if (err)
308 DPRINTK(PROBE, ERR,
309 "Unable to allocate interrupt Error: %d\n", err);
310 } else
311 #endif
312 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
313 netdev->name, netdev)))
314 DPRINTK(PROBE, ERR,
315 "Unable to allocate interrupt Error: %d\n", err);
316
317 return err;
318 }
319
320 static void e1000_free_irq(struct e1000_adapter *adapter)
321 {
322 struct net_device *netdev = adapter->netdev;
323
324 free_irq(adapter->pdev->irq, netdev);
325
326 #ifdef CONFIG_PCI_MSI
327 if (adapter->have_msi)
328 pci_disable_msi(adapter->pdev);
329 #endif
330 }
331
332 /**
333 * e1000_irq_disable - Mask off interrupt generation on the NIC
334 * @adapter: board private structure
335 **/
336
337 static void
338 e1000_irq_disable(struct e1000_adapter *adapter)
339 {
340 atomic_inc(&adapter->irq_sem);
341 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
342 E1000_WRITE_FLUSH(&adapter->hw);
343 synchronize_irq(adapter->pdev->irq);
344 }
345
346 /**
347 * e1000_irq_enable - Enable default interrupt generation settings
348 * @adapter: board private structure
349 **/
350
351 static void
352 e1000_irq_enable(struct e1000_adapter *adapter)
353 {
354 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
355 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
356 E1000_WRITE_FLUSH(&adapter->hw);
357 }
358 }
359
360 static void
361 e1000_update_mng_vlan(struct e1000_adapter *adapter)
362 {
363 struct net_device *netdev = adapter->netdev;
364 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
365 uint16_t old_vid = adapter->mng_vlan_id;
366 if (adapter->vlgrp) {
367 if (!adapter->vlgrp->vlan_devices[vid]) {
368 if (adapter->hw.mng_cookie.status &
369 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
370 e1000_vlan_rx_add_vid(netdev, vid);
371 adapter->mng_vlan_id = vid;
372 } else
373 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
374
375 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
376 (vid != old_vid) &&
377 !adapter->vlgrp->vlan_devices[old_vid])
378 e1000_vlan_rx_kill_vid(netdev, old_vid);
379 } else
380 adapter->mng_vlan_id = vid;
381 }
382 }
383
384 /**
385 * e1000_release_hw_control - release control of the h/w to f/w
386 * @adapter: address of board private structure
387 *
388 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
389 * For ASF and Pass Through versions of f/w this means that the
390 * driver is no longer loaded. For AMT version (only with 82573) i
391 * of the f/w this means that the network i/f is closed.
392 *
393 **/
394
395 static void
396 e1000_release_hw_control(struct e1000_adapter *adapter)
397 {
398 uint32_t ctrl_ext;
399 uint32_t swsm;
400 uint32_t extcnf;
401
402 /* Let firmware taken over control of h/w */
403 switch (adapter->hw.mac_type) {
404 case e1000_82571:
405 case e1000_82572:
406 case e1000_80003es2lan:
407 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
408 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
409 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
410 break;
411 case e1000_82573:
412 swsm = E1000_READ_REG(&adapter->hw, SWSM);
413 E1000_WRITE_REG(&adapter->hw, SWSM,
414 swsm & ~E1000_SWSM_DRV_LOAD);
415 case e1000_ich8lan:
416 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
417 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
418 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
419 break;
420 default:
421 break;
422 }
423 }
424
425 /**
426 * e1000_get_hw_control - get control of the h/w from f/w
427 * @adapter: address of board private structure
428 *
429 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
430 * For ASF and Pass Through versions of f/w this means that
431 * the driver is loaded. For AMT version (only with 82573)
432 * of the f/w this means that the network i/f is open.
433 *
434 **/
435
436 static void
437 e1000_get_hw_control(struct e1000_adapter *adapter)
438 {
439 uint32_t ctrl_ext;
440 uint32_t swsm;
441 uint32_t extcnf;
442
443 /* Let firmware know the driver has taken over */
444 switch (adapter->hw.mac_type) {
445 case e1000_82571:
446 case e1000_82572:
447 case e1000_80003es2lan:
448 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
449 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
450 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
451 break;
452 case e1000_82573:
453 swsm = E1000_READ_REG(&adapter->hw, SWSM);
454 E1000_WRITE_REG(&adapter->hw, SWSM,
455 swsm | E1000_SWSM_DRV_LOAD);
456 break;
457 case e1000_ich8lan:
458 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
459 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
460 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
461 break;
462 default:
463 break;
464 }
465 }
466
467 int
468 e1000_up(struct e1000_adapter *adapter)
469 {
470 struct net_device *netdev = adapter->netdev;
471 int i;
472
473 /* hardware has been reset, we need to reload some things */
474
475 e1000_set_multi(netdev);
476
477 e1000_restore_vlan(adapter);
478
479 e1000_configure_tx(adapter);
480 e1000_setup_rctl(adapter);
481 e1000_configure_rx(adapter);
482 /* call E1000_DESC_UNUSED which always leaves
483 * at least 1 descriptor unused to make sure
484 * next_to_use != next_to_clean */
485 for (i = 0; i < adapter->num_rx_queues; i++) {
486 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
487 adapter->alloc_rx_buf(adapter, ring,
488 E1000_DESC_UNUSED(ring));
489 }
490
491 adapter->tx_queue_len = netdev->tx_queue_len;
492
493 #ifdef CONFIG_E1000_NAPI
494 netif_poll_enable(netdev);
495 #endif
496 e1000_irq_enable(adapter);
497
498 clear_bit(__E1000_DOWN, &adapter->flags);
499
500 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
501 return 0;
502 }
503
504 /**
505 * e1000_power_up_phy - restore link in case the phy was powered down
506 * @adapter: address of board private structure
507 *
508 * The phy may be powered down to save power and turn off link when the
509 * driver is unloaded and wake on lan is not enabled (among others)
510 * *** this routine MUST be followed by a call to e1000_reset ***
511 *
512 **/
513
514 void e1000_power_up_phy(struct e1000_adapter *adapter)
515 {
516 uint16_t mii_reg = 0;
517
518 /* Just clear the power down bit to wake the phy back up */
519 if (adapter->hw.media_type == e1000_media_type_copper) {
520 /* according to the manual, the phy will retain its
521 * settings across a power-down/up cycle */
522 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
523 mii_reg &= ~MII_CR_POWER_DOWN;
524 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
525 }
526 }
527
528 static void e1000_power_down_phy(struct e1000_adapter *adapter)
529 {
530 /* Power down the PHY so no link is implied when interface is down *
531 * The PHY cannot be powered down if any of the following is TRUE *
532 * (a) WoL is enabled
533 * (b) AMT is active
534 * (c) SoL/IDER session is active */
535 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
536 adapter->hw.media_type == e1000_media_type_copper) {
537 uint16_t mii_reg = 0;
538
539 switch (adapter->hw.mac_type) {
540 case e1000_82540:
541 case e1000_82545:
542 case e1000_82545_rev_3:
543 case e1000_82546:
544 case e1000_82546_rev_3:
545 case e1000_82541:
546 case e1000_82541_rev_2:
547 case e1000_82547:
548 case e1000_82547_rev_2:
549 if (E1000_READ_REG(&adapter->hw, MANC) &
550 E1000_MANC_SMBUS_EN)
551 goto out;
552 break;
553 case e1000_82571:
554 case e1000_82572:
555 case e1000_82573:
556 case e1000_80003es2lan:
557 case e1000_ich8lan:
558 if (e1000_check_mng_mode(&adapter->hw) ||
559 e1000_check_phy_reset_block(&adapter->hw))
560 goto out;
561 break;
562 default:
563 goto out;
564 }
565 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
566 mii_reg |= MII_CR_POWER_DOWN;
567 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
568 mdelay(1);
569 }
570 out:
571 return;
572 }
573
574 void
575 e1000_down(struct e1000_adapter *adapter)
576 {
577 struct net_device *netdev = adapter->netdev;
578
579 /* signal that we're down so the interrupt handler does not
580 * reschedule our watchdog timer */
581 set_bit(__E1000_DOWN, &adapter->flags);
582
583 e1000_irq_disable(adapter);
584
585 del_timer_sync(&adapter->tx_fifo_stall_timer);
586 del_timer_sync(&adapter->watchdog_timer);
587 del_timer_sync(&adapter->phy_info_timer);
588
589 #ifdef CONFIG_E1000_NAPI
590 netif_poll_disable(netdev);
591 #endif
592 netdev->tx_queue_len = adapter->tx_queue_len;
593 adapter->link_speed = 0;
594 adapter->link_duplex = 0;
595 netif_carrier_off(netdev);
596 netif_stop_queue(netdev);
597
598 e1000_reset(adapter);
599 e1000_clean_all_tx_rings(adapter);
600 e1000_clean_all_rx_rings(adapter);
601 }
602
603 void
604 e1000_reinit_locked(struct e1000_adapter *adapter)
605 {
606 WARN_ON(in_interrupt());
607 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
608 msleep(1);
609 e1000_down(adapter);
610 e1000_up(adapter);
611 clear_bit(__E1000_RESETTING, &adapter->flags);
612 }
613
614 void
615 e1000_reset(struct e1000_adapter *adapter)
616 {
617 uint32_t pba, manc;
618 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
619
620 /* Repartition Pba for greater than 9k mtu
621 * To take effect CTRL.RST is required.
622 */
623
624 switch (adapter->hw.mac_type) {
625 case e1000_82547:
626 case e1000_82547_rev_2:
627 pba = E1000_PBA_30K;
628 break;
629 case e1000_82571:
630 case e1000_82572:
631 case e1000_80003es2lan:
632 pba = E1000_PBA_38K;
633 break;
634 case e1000_82573:
635 pba = E1000_PBA_12K;
636 break;
637 case e1000_ich8lan:
638 pba = E1000_PBA_8K;
639 break;
640 default:
641 pba = E1000_PBA_48K;
642 break;
643 }
644
645 if ((adapter->hw.mac_type != e1000_82573) &&
646 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
647 pba -= 8; /* allocate more FIFO for Tx */
648
649
650 if (adapter->hw.mac_type == e1000_82547) {
651 adapter->tx_fifo_head = 0;
652 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
653 adapter->tx_fifo_size =
654 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
655 atomic_set(&adapter->tx_fifo_stall, 0);
656 }
657
658 E1000_WRITE_REG(&adapter->hw, PBA, pba);
659
660 /* flow control settings */
661 /* Set the FC high water mark to 90% of the FIFO size.
662 * Required to clear last 3 LSB */
663 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
664 /* We can't use 90% on small FIFOs because the remainder
665 * would be less than 1 full frame. In this case, we size
666 * it to allow at least a full frame above the high water
667 * mark. */
668 if (pba < E1000_PBA_16K)
669 fc_high_water_mark = (pba * 1024) - 1600;
670
671 adapter->hw.fc_high_water = fc_high_water_mark;
672 adapter->hw.fc_low_water = fc_high_water_mark - 8;
673 if (adapter->hw.mac_type == e1000_80003es2lan)
674 adapter->hw.fc_pause_time = 0xFFFF;
675 else
676 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
677 adapter->hw.fc_send_xon = 1;
678 adapter->hw.fc = adapter->hw.original_fc;
679
680 /* Allow time for pending master requests to run */
681 e1000_reset_hw(&adapter->hw);
682 if (adapter->hw.mac_type >= e1000_82544)
683 E1000_WRITE_REG(&adapter->hw, WUC, 0);
684
685 if (e1000_init_hw(&adapter->hw))
686 DPRINTK(PROBE, ERR, "Hardware Error\n");
687 e1000_update_mng_vlan(adapter);
688 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
689 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
690
691 e1000_reset_adaptive(&adapter->hw);
692 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
693
694 if (!adapter->smart_power_down &&
695 (adapter->hw.mac_type == e1000_82571 ||
696 adapter->hw.mac_type == e1000_82572)) {
697 uint16_t phy_data = 0;
698 /* speed up time to link by disabling smart power down, ignore
699 * the return value of this function because there is nothing
700 * different we would do if it failed */
701 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
702 &phy_data);
703 phy_data &= ~IGP02E1000_PM_SPD;
704 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
705 phy_data);
706 }
707
708 if ((adapter->en_mng_pt) &&
709 (adapter->hw.mac_type >= e1000_82540) &&
710 (adapter->hw.mac_type < e1000_82571) &&
711 (adapter->hw.media_type == e1000_media_type_copper)) {
712 manc = E1000_READ_REG(&adapter->hw, MANC);
713 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
714 E1000_WRITE_REG(&adapter->hw, MANC, manc);
715 }
716 }
717
718 /**
719 * e1000_probe - Device Initialization Routine
720 * @pdev: PCI device information struct
721 * @ent: entry in e1000_pci_tbl
722 *
723 * Returns 0 on success, negative on failure
724 *
725 * e1000_probe initializes an adapter identified by a pci_dev structure.
726 * The OS initialization, configuring of the adapter private structure,
727 * and a hardware reset occur.
728 **/
729
730 static int __devinit
731 e1000_probe(struct pci_dev *pdev,
732 const struct pci_device_id *ent)
733 {
734 struct net_device *netdev;
735 struct e1000_adapter *adapter;
736 unsigned long mmio_start, mmio_len;
737 unsigned long flash_start, flash_len;
738
739 static int cards_found = 0;
740 static int global_quad_port_a = 0; /* global ksp3 port a indication */
741 int i, err, pci_using_dac;
742 uint16_t eeprom_data = 0;
743 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
744 if ((err = pci_enable_device(pdev)))
745 return err;
746
747 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
748 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
749 pci_using_dac = 1;
750 } else {
751 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
752 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
753 E1000_ERR("No usable DMA configuration, aborting\n");
754 goto err_dma;
755 }
756 pci_using_dac = 0;
757 }
758
759 if ((err = pci_request_regions(pdev, e1000_driver_name)))
760 goto err_pci_reg;
761
762 pci_set_master(pdev);
763
764 err = -ENOMEM;
765 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
766 if (!netdev)
767 goto err_alloc_etherdev;
768
769 SET_MODULE_OWNER(netdev);
770 SET_NETDEV_DEV(netdev, &pdev->dev);
771
772 pci_set_drvdata(pdev, netdev);
773 adapter = netdev_priv(netdev);
774 adapter->netdev = netdev;
775 adapter->pdev = pdev;
776 adapter->hw.back = adapter;
777 adapter->msg_enable = (1 << debug) - 1;
778
779 mmio_start = pci_resource_start(pdev, BAR_0);
780 mmio_len = pci_resource_len(pdev, BAR_0);
781
782 err = -EIO;
783 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
784 if (!adapter->hw.hw_addr)
785 goto err_ioremap;
786
787 for (i = BAR_1; i <= BAR_5; i++) {
788 if (pci_resource_len(pdev, i) == 0)
789 continue;
790 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
791 adapter->hw.io_base = pci_resource_start(pdev, i);
792 break;
793 }
794 }
795
796 netdev->open = &e1000_open;
797 netdev->stop = &e1000_close;
798 netdev->hard_start_xmit = &e1000_xmit_frame;
799 netdev->get_stats = &e1000_get_stats;
800 netdev->set_multicast_list = &e1000_set_multi;
801 netdev->set_mac_address = &e1000_set_mac;
802 netdev->change_mtu = &e1000_change_mtu;
803 netdev->do_ioctl = &e1000_ioctl;
804 e1000_set_ethtool_ops(netdev);
805 netdev->tx_timeout = &e1000_tx_timeout;
806 netdev->watchdog_timeo = 5 * HZ;
807 #ifdef CONFIG_E1000_NAPI
808 netdev->poll = &e1000_clean;
809 netdev->weight = 64;
810 #endif
811 netdev->vlan_rx_register = e1000_vlan_rx_register;
812 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
813 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
814 #ifdef CONFIG_NET_POLL_CONTROLLER
815 netdev->poll_controller = e1000_netpoll;
816 #endif
817 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
818
819 netdev->mem_start = mmio_start;
820 netdev->mem_end = mmio_start + mmio_len;
821 netdev->base_addr = adapter->hw.io_base;
822
823 adapter->bd_number = cards_found;
824
825 /* setup the private structure */
826
827 if ((err = e1000_sw_init(adapter)))
828 goto err_sw_init;
829
830 err = -EIO;
831 /* Flash BAR mapping must happen after e1000_sw_init
832 * because it depends on mac_type */
833 if ((adapter->hw.mac_type == e1000_ich8lan) &&
834 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
835 flash_start = pci_resource_start(pdev, 1);
836 flash_len = pci_resource_len(pdev, 1);
837 adapter->hw.flash_address = ioremap(flash_start, flash_len);
838 if (!adapter->hw.flash_address)
839 goto err_flashmap;
840 }
841
842 if (e1000_check_phy_reset_block(&adapter->hw))
843 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
844
845 if (adapter->hw.mac_type >= e1000_82543) {
846 netdev->features = NETIF_F_SG |
847 NETIF_F_HW_CSUM |
848 NETIF_F_HW_VLAN_TX |
849 NETIF_F_HW_VLAN_RX |
850 NETIF_F_HW_VLAN_FILTER;
851 if (adapter->hw.mac_type == e1000_ich8lan)
852 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
853 }
854
855 #ifdef NETIF_F_TSO
856 if ((adapter->hw.mac_type >= e1000_82544) &&
857 (adapter->hw.mac_type != e1000_82547))
858 netdev->features |= NETIF_F_TSO;
859
860 #ifdef NETIF_F_TSO6
861 if (adapter->hw.mac_type > e1000_82547_rev_2)
862 netdev->features |= NETIF_F_TSO6;
863 #endif
864 #endif
865 if (pci_using_dac)
866 netdev->features |= NETIF_F_HIGHDMA;
867
868 netdev->features |= NETIF_F_LLTX;
869
870 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
871
872 /* initialize eeprom parameters */
873
874 if (e1000_init_eeprom_params(&adapter->hw)) {
875 E1000_ERR("EEPROM initialization failed\n");
876 goto err_eeprom;
877 }
878
879 /* before reading the EEPROM, reset the controller to
880 * put the device in a known good starting state */
881
882 e1000_reset_hw(&adapter->hw);
883
884 /* make sure the EEPROM is good */
885
886 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
887 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
888 goto err_eeprom;
889 }
890
891 /* copy the MAC address out of the EEPROM */
892
893 if (e1000_read_mac_addr(&adapter->hw))
894 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
895 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
896 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
897
898 if (!is_valid_ether_addr(netdev->perm_addr)) {
899 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
900 goto err_eeprom;
901 }
902
903 e1000_get_bus_info(&adapter->hw);
904
905 init_timer(&adapter->tx_fifo_stall_timer);
906 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
907 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
908
909 init_timer(&adapter->watchdog_timer);
910 adapter->watchdog_timer.function = &e1000_watchdog;
911 adapter->watchdog_timer.data = (unsigned long) adapter;
912
913 init_timer(&adapter->phy_info_timer);
914 adapter->phy_info_timer.function = &e1000_update_phy_info;
915 adapter->phy_info_timer.data = (unsigned long) adapter;
916
917 INIT_WORK(&adapter->reset_task, e1000_reset_task);
918
919 e1000_check_options(adapter);
920
921 /* Initial Wake on LAN setting
922 * If APM wake is enabled in the EEPROM,
923 * enable the ACPI Magic Packet filter
924 */
925
926 switch (adapter->hw.mac_type) {
927 case e1000_82542_rev2_0:
928 case e1000_82542_rev2_1:
929 case e1000_82543:
930 break;
931 case e1000_82544:
932 e1000_read_eeprom(&adapter->hw,
933 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
934 eeprom_apme_mask = E1000_EEPROM_82544_APM;
935 break;
936 case e1000_ich8lan:
937 e1000_read_eeprom(&adapter->hw,
938 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
939 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
940 break;
941 case e1000_82546:
942 case e1000_82546_rev_3:
943 case e1000_82571:
944 case e1000_80003es2lan:
945 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
946 e1000_read_eeprom(&adapter->hw,
947 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
948 break;
949 }
950 /* Fall Through */
951 default:
952 e1000_read_eeprom(&adapter->hw,
953 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
954 break;
955 }
956 if (eeprom_data & eeprom_apme_mask)
957 adapter->eeprom_wol |= E1000_WUFC_MAG;
958
959 /* now that we have the eeprom settings, apply the special cases
960 * where the eeprom may be wrong or the board simply won't support
961 * wake on lan on a particular port */
962 switch (pdev->device) {
963 case E1000_DEV_ID_82546GB_PCIE:
964 adapter->eeprom_wol = 0;
965 break;
966 case E1000_DEV_ID_82546EB_FIBER:
967 case E1000_DEV_ID_82546GB_FIBER:
968 case E1000_DEV_ID_82571EB_FIBER:
969 /* Wake events only supported on port A for dual fiber
970 * regardless of eeprom setting */
971 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
972 adapter->eeprom_wol = 0;
973 break;
974 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
975 case E1000_DEV_ID_82571EB_QUAD_COPPER:
976 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
977 /* if quad port adapter, disable WoL on all but port A */
978 if (global_quad_port_a != 0)
979 adapter->eeprom_wol = 0;
980 else
981 adapter->quad_port_a = 1;
982 /* Reset for multiple quad port adapters */
983 if (++global_quad_port_a == 4)
984 global_quad_port_a = 0;
985 break;
986 }
987
988 /* initialize the wol settings based on the eeprom settings */
989 adapter->wol = adapter->eeprom_wol;
990
991 /* print bus type/speed/width info */
992 {
993 struct e1000_hw *hw = &adapter->hw;
994 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
995 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
996 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
997 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
998 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
999 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1000 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1001 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1002 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1003 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1004 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1005 "32-bit"));
1006 }
1007
1008 for (i = 0; i < 6; i++)
1009 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1010
1011 /* reset the hardware with the new settings */
1012 e1000_reset(adapter);
1013
1014 /* If the controller is 82573 and f/w is AMT, do not set
1015 * DRV_LOAD until the interface is up. For all other cases,
1016 * let the f/w know that the h/w is now under the control
1017 * of the driver. */
1018 if (adapter->hw.mac_type != e1000_82573 ||
1019 !e1000_check_mng_mode(&adapter->hw))
1020 e1000_get_hw_control(adapter);
1021
1022 strcpy(netdev->name, "eth%d");
1023 if ((err = register_netdev(netdev)))
1024 goto err_register;
1025
1026 /* tell the stack to leave us alone until e1000_open() is called */
1027 netif_carrier_off(netdev);
1028 netif_stop_queue(netdev);
1029
1030 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1031
1032 cards_found++;
1033 return 0;
1034
1035 err_register:
1036 e1000_release_hw_control(adapter);
1037 err_eeprom:
1038 if (!e1000_check_phy_reset_block(&adapter->hw))
1039 e1000_phy_hw_reset(&adapter->hw);
1040
1041 if (adapter->hw.flash_address)
1042 iounmap(adapter->hw.flash_address);
1043 err_flashmap:
1044 #ifdef CONFIG_E1000_NAPI
1045 for (i = 0; i < adapter->num_rx_queues; i++)
1046 dev_put(&adapter->polling_netdev[i]);
1047 #endif
1048
1049 kfree(adapter->tx_ring);
1050 kfree(adapter->rx_ring);
1051 #ifdef CONFIG_E1000_NAPI
1052 kfree(adapter->polling_netdev);
1053 #endif
1054 err_sw_init:
1055 iounmap(adapter->hw.hw_addr);
1056 err_ioremap:
1057 free_netdev(netdev);
1058 err_alloc_etherdev:
1059 pci_release_regions(pdev);
1060 err_pci_reg:
1061 err_dma:
1062 pci_disable_device(pdev);
1063 return err;
1064 }
1065
1066 /**
1067 * e1000_remove - Device Removal Routine
1068 * @pdev: PCI device information struct
1069 *
1070 * e1000_remove is called by the PCI subsystem to alert the driver
1071 * that it should release a PCI device. The could be caused by a
1072 * Hot-Plug event, or because the driver is going to be removed from
1073 * memory.
1074 **/
1075
1076 static void __devexit
1077 e1000_remove(struct pci_dev *pdev)
1078 {
1079 struct net_device *netdev = pci_get_drvdata(pdev);
1080 struct e1000_adapter *adapter = netdev_priv(netdev);
1081 uint32_t manc;
1082 #ifdef CONFIG_E1000_NAPI
1083 int i;
1084 #endif
1085
1086 flush_scheduled_work();
1087
1088 if (adapter->hw.mac_type >= e1000_82540 &&
1089 adapter->hw.mac_type < e1000_82571 &&
1090 adapter->hw.media_type == e1000_media_type_copper) {
1091 manc = E1000_READ_REG(&adapter->hw, MANC);
1092 if (manc & E1000_MANC_SMBUS_EN) {
1093 manc |= E1000_MANC_ARP_EN;
1094 E1000_WRITE_REG(&adapter->hw, MANC, manc);
1095 }
1096 }
1097
1098 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1099 * would have already happened in close and is redundant. */
1100 e1000_release_hw_control(adapter);
1101
1102 unregister_netdev(netdev);
1103 #ifdef CONFIG_E1000_NAPI
1104 for (i = 0; i < adapter->num_rx_queues; i++)
1105 dev_put(&adapter->polling_netdev[i]);
1106 #endif
1107
1108 if (!e1000_check_phy_reset_block(&adapter->hw))
1109 e1000_phy_hw_reset(&adapter->hw);
1110
1111 kfree(adapter->tx_ring);
1112 kfree(adapter->rx_ring);
1113 #ifdef CONFIG_E1000_NAPI
1114 kfree(adapter->polling_netdev);
1115 #endif
1116
1117 iounmap(adapter->hw.hw_addr);
1118 if (adapter->hw.flash_address)
1119 iounmap(adapter->hw.flash_address);
1120 pci_release_regions(pdev);
1121
1122 free_netdev(netdev);
1123
1124 pci_disable_device(pdev);
1125 }
1126
1127 /**
1128 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1129 * @adapter: board private structure to initialize
1130 *
1131 * e1000_sw_init initializes the Adapter private data structure.
1132 * Fields are initialized based on PCI device information and
1133 * OS network device settings (MTU size).
1134 **/
1135
1136 static int __devinit
1137 e1000_sw_init(struct e1000_adapter *adapter)
1138 {
1139 struct e1000_hw *hw = &adapter->hw;
1140 struct net_device *netdev = adapter->netdev;
1141 struct pci_dev *pdev = adapter->pdev;
1142 #ifdef CONFIG_E1000_NAPI
1143 int i;
1144 #endif
1145
1146 /* PCI config space info */
1147
1148 hw->vendor_id = pdev->vendor;
1149 hw->device_id = pdev->device;
1150 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1151 hw->subsystem_id = pdev->subsystem_device;
1152
1153 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1154
1155 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1156
1157 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1158 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1159 hw->max_frame_size = netdev->mtu +
1160 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1161 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1162
1163 /* identify the MAC */
1164
1165 if (e1000_set_mac_type(hw)) {
1166 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1167 return -EIO;
1168 }
1169
1170 switch (hw->mac_type) {
1171 default:
1172 break;
1173 case e1000_82541:
1174 case e1000_82547:
1175 case e1000_82541_rev_2:
1176 case e1000_82547_rev_2:
1177 hw->phy_init_script = 1;
1178 break;
1179 }
1180
1181 e1000_set_media_type(hw);
1182
1183 hw->wait_autoneg_complete = FALSE;
1184 hw->tbi_compatibility_en = TRUE;
1185 hw->adaptive_ifs = TRUE;
1186
1187 /* Copper options */
1188
1189 if (hw->media_type == e1000_media_type_copper) {
1190 hw->mdix = AUTO_ALL_MODES;
1191 hw->disable_polarity_correction = FALSE;
1192 hw->master_slave = E1000_MASTER_SLAVE;
1193 }
1194
1195 adapter->num_tx_queues = 1;
1196 adapter->num_rx_queues = 1;
1197
1198 if (e1000_alloc_queues(adapter)) {
1199 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1200 return -ENOMEM;
1201 }
1202
1203 #ifdef CONFIG_E1000_NAPI
1204 for (i = 0; i < adapter->num_rx_queues; i++) {
1205 adapter->polling_netdev[i].priv = adapter;
1206 adapter->polling_netdev[i].poll = &e1000_clean;
1207 adapter->polling_netdev[i].weight = 64;
1208 dev_hold(&adapter->polling_netdev[i]);
1209 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1210 }
1211 spin_lock_init(&adapter->tx_queue_lock);
1212 #endif
1213
1214 atomic_set(&adapter->irq_sem, 1);
1215 spin_lock_init(&adapter->stats_lock);
1216
1217 set_bit(__E1000_DOWN, &adapter->flags);
1218
1219 return 0;
1220 }
1221
1222 /**
1223 * e1000_alloc_queues - Allocate memory for all rings
1224 * @adapter: board private structure to initialize
1225 *
1226 * We allocate one ring per queue at run-time since we don't know the
1227 * number of queues at compile-time. The polling_netdev array is
1228 * intended for Multiqueue, but should work fine with a single queue.
1229 **/
1230
1231 static int __devinit
1232 e1000_alloc_queues(struct e1000_adapter *adapter)
1233 {
1234 int size;
1235
1236 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
1237 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1238 if (!adapter->tx_ring)
1239 return -ENOMEM;
1240 memset(adapter->tx_ring, 0, size);
1241
1242 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
1243 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1244 if (!adapter->rx_ring) {
1245 kfree(adapter->tx_ring);
1246 return -ENOMEM;
1247 }
1248 memset(adapter->rx_ring, 0, size);
1249
1250 #ifdef CONFIG_E1000_NAPI
1251 size = sizeof(struct net_device) * adapter->num_rx_queues;
1252 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1253 if (!adapter->polling_netdev) {
1254 kfree(adapter->tx_ring);
1255 kfree(adapter->rx_ring);
1256 return -ENOMEM;
1257 }
1258 memset(adapter->polling_netdev, 0, size);
1259 #endif
1260
1261 return E1000_SUCCESS;
1262 }
1263
1264 /**
1265 * e1000_open - Called when a network interface is made active
1266 * @netdev: network interface device structure
1267 *
1268 * Returns 0 on success, negative value on failure
1269 *
1270 * The open entry point is called when a network interface is made
1271 * active by the system (IFF_UP). At this point all resources needed
1272 * for transmit and receive operations are allocated, the interrupt
1273 * handler is registered with the OS, the watchdog timer is started,
1274 * and the stack is notified that the interface is ready.
1275 **/
1276
1277 static int
1278 e1000_open(struct net_device *netdev)
1279 {
1280 struct e1000_adapter *adapter = netdev_priv(netdev);
1281 int err;
1282
1283 /* disallow open during test */
1284 if (test_bit(__E1000_TESTING, &adapter->flags))
1285 return -EBUSY;
1286
1287 /* allocate transmit descriptors */
1288 if ((err = e1000_setup_all_tx_resources(adapter)))
1289 goto err_setup_tx;
1290
1291 /* allocate receive descriptors */
1292 if ((err = e1000_setup_all_rx_resources(adapter)))
1293 goto err_setup_rx;
1294
1295 err = e1000_request_irq(adapter);
1296 if (err)
1297 goto err_req_irq;
1298
1299 e1000_power_up_phy(adapter);
1300
1301 if ((err = e1000_up(adapter)))
1302 goto err_up;
1303 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1304 if ((adapter->hw.mng_cookie.status &
1305 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1306 e1000_update_mng_vlan(adapter);
1307 }
1308
1309 /* If AMT is enabled, let the firmware know that the network
1310 * interface is now open */
1311 if (adapter->hw.mac_type == e1000_82573 &&
1312 e1000_check_mng_mode(&adapter->hw))
1313 e1000_get_hw_control(adapter);
1314
1315 return E1000_SUCCESS;
1316
1317 err_up:
1318 e1000_power_down_phy(adapter);
1319 e1000_free_irq(adapter);
1320 err_req_irq:
1321 e1000_free_all_rx_resources(adapter);
1322 err_setup_rx:
1323 e1000_free_all_tx_resources(adapter);
1324 err_setup_tx:
1325 e1000_reset(adapter);
1326
1327 return err;
1328 }
1329
1330 /**
1331 * e1000_close - Disables a network interface
1332 * @netdev: network interface device structure
1333 *
1334 * Returns 0, this is not allowed to fail
1335 *
1336 * The close entry point is called when an interface is de-activated
1337 * by the OS. The hardware is still under the drivers control, but
1338 * needs to be disabled. A global MAC reset is issued to stop the
1339 * hardware, and all transmit and receive resources are freed.
1340 **/
1341
1342 static int
1343 e1000_close(struct net_device *netdev)
1344 {
1345 struct e1000_adapter *adapter = netdev_priv(netdev);
1346
1347 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1348 e1000_down(adapter);
1349 e1000_power_down_phy(adapter);
1350 e1000_free_irq(adapter);
1351
1352 e1000_free_all_tx_resources(adapter);
1353 e1000_free_all_rx_resources(adapter);
1354
1355 /* kill manageability vlan ID if supported, but not if a vlan with
1356 * the same ID is registered on the host OS (let 8021q kill it) */
1357 if ((adapter->hw.mng_cookie.status &
1358 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1359 !(adapter->vlgrp &&
1360 adapter->vlgrp->vlan_devices[adapter->mng_vlan_id])) {
1361 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1362 }
1363
1364 /* If AMT is enabled, let the firmware know that the network
1365 * interface is now closed */
1366 if (adapter->hw.mac_type == e1000_82573 &&
1367 e1000_check_mng_mode(&adapter->hw))
1368 e1000_release_hw_control(adapter);
1369
1370 return 0;
1371 }
1372
1373 /**
1374 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1375 * @adapter: address of board private structure
1376 * @start: address of beginning of memory
1377 * @len: length of memory
1378 **/
1379 static boolean_t
1380 e1000_check_64k_bound(struct e1000_adapter *adapter,
1381 void *start, unsigned long len)
1382 {
1383 unsigned long begin = (unsigned long) start;
1384 unsigned long end = begin + len;
1385
1386 /* First rev 82545 and 82546 need to not allow any memory
1387 * write location to cross 64k boundary due to errata 23 */
1388 if (adapter->hw.mac_type == e1000_82545 ||
1389 adapter->hw.mac_type == e1000_82546) {
1390 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1391 }
1392
1393 return TRUE;
1394 }
1395
1396 /**
1397 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1398 * @adapter: board private structure
1399 * @txdr: tx descriptor ring (for a specific queue) to setup
1400 *
1401 * Return 0 on success, negative on failure
1402 **/
1403
1404 static int
1405 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1406 struct e1000_tx_ring *txdr)
1407 {
1408 struct pci_dev *pdev = adapter->pdev;
1409 int size;
1410
1411 size = sizeof(struct e1000_buffer) * txdr->count;
1412 txdr->buffer_info = vmalloc(size);
1413 if (!txdr->buffer_info) {
1414 DPRINTK(PROBE, ERR,
1415 "Unable to allocate memory for the transmit descriptor ring\n");
1416 return -ENOMEM;
1417 }
1418 memset(txdr->buffer_info, 0, size);
1419
1420 /* round up to nearest 4K */
1421
1422 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1423 E1000_ROUNDUP(txdr->size, 4096);
1424
1425 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1426 if (!txdr->desc) {
1427 setup_tx_desc_die:
1428 vfree(txdr->buffer_info);
1429 DPRINTK(PROBE, ERR,
1430 "Unable to allocate memory for the transmit descriptor ring\n");
1431 return -ENOMEM;
1432 }
1433
1434 /* Fix for errata 23, can't cross 64kB boundary */
1435 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1436 void *olddesc = txdr->desc;
1437 dma_addr_t olddma = txdr->dma;
1438 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1439 "at %p\n", txdr->size, txdr->desc);
1440 /* Try again, without freeing the previous */
1441 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1442 /* Failed allocation, critical failure */
1443 if (!txdr->desc) {
1444 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1445 goto setup_tx_desc_die;
1446 }
1447
1448 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1449 /* give up */
1450 pci_free_consistent(pdev, txdr->size, txdr->desc,
1451 txdr->dma);
1452 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1453 DPRINTK(PROBE, ERR,
1454 "Unable to allocate aligned memory "
1455 "for the transmit descriptor ring\n");
1456 vfree(txdr->buffer_info);
1457 return -ENOMEM;
1458 } else {
1459 /* Free old allocation, new allocation was successful */
1460 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1461 }
1462 }
1463 memset(txdr->desc, 0, txdr->size);
1464
1465 txdr->next_to_use = 0;
1466 txdr->next_to_clean = 0;
1467 spin_lock_init(&txdr->tx_lock);
1468
1469 return 0;
1470 }
1471
1472 /**
1473 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1474 * (Descriptors) for all queues
1475 * @adapter: board private structure
1476 *
1477 * Return 0 on success, negative on failure
1478 **/
1479
1480 int
1481 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1482 {
1483 int i, err = 0;
1484
1485 for (i = 0; i < adapter->num_tx_queues; i++) {
1486 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1487 if (err) {
1488 DPRINTK(PROBE, ERR,
1489 "Allocation for Tx Queue %u failed\n", i);
1490 for (i-- ; i >= 0; i--)
1491 e1000_free_tx_resources(adapter,
1492 &adapter->tx_ring[i]);
1493 break;
1494 }
1495 }
1496
1497 return err;
1498 }
1499
1500 /**
1501 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1502 * @adapter: board private structure
1503 *
1504 * Configure the Tx unit of the MAC after a reset.
1505 **/
1506
1507 static void
1508 e1000_configure_tx(struct e1000_adapter *adapter)
1509 {
1510 uint64_t tdba;
1511 struct e1000_hw *hw = &adapter->hw;
1512 uint32_t tdlen, tctl, tipg, tarc;
1513 uint32_t ipgr1, ipgr2;
1514
1515 /* Setup the HW Tx Head and Tail descriptor pointers */
1516
1517 switch (adapter->num_tx_queues) {
1518 case 1:
1519 default:
1520 tdba = adapter->tx_ring[0].dma;
1521 tdlen = adapter->tx_ring[0].count *
1522 sizeof(struct e1000_tx_desc);
1523 E1000_WRITE_REG(hw, TDLEN, tdlen);
1524 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1525 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1526 E1000_WRITE_REG(hw, TDT, 0);
1527 E1000_WRITE_REG(hw, TDH, 0);
1528 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1529 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1530 break;
1531 }
1532
1533 /* Set the default values for the Tx Inter Packet Gap timer */
1534
1535 if (hw->media_type == e1000_media_type_fiber ||
1536 hw->media_type == e1000_media_type_internal_serdes)
1537 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1538 else
1539 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1540
1541 switch (hw->mac_type) {
1542 case e1000_82542_rev2_0:
1543 case e1000_82542_rev2_1:
1544 tipg = DEFAULT_82542_TIPG_IPGT;
1545 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1546 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1547 break;
1548 case e1000_80003es2lan:
1549 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1550 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1551 break;
1552 default:
1553 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1554 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1555 break;
1556 }
1557 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1558 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1559 E1000_WRITE_REG(hw, TIPG, tipg);
1560
1561 /* Set the Tx Interrupt Delay register */
1562
1563 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1564 if (hw->mac_type >= e1000_82540)
1565 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1566
1567 /* Program the Transmit Control Register */
1568
1569 tctl = E1000_READ_REG(hw, TCTL);
1570 tctl &= ~E1000_TCTL_CT;
1571 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1572 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1573
1574 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1575 tarc = E1000_READ_REG(hw, TARC0);
1576 /* set the speed mode bit, we'll clear it if we're not at
1577 * gigabit link later */
1578 tarc |= (1 << 21);
1579 E1000_WRITE_REG(hw, TARC0, tarc);
1580 } else if (hw->mac_type == e1000_80003es2lan) {
1581 tarc = E1000_READ_REG(hw, TARC0);
1582 tarc |= 1;
1583 E1000_WRITE_REG(hw, TARC0, tarc);
1584 tarc = E1000_READ_REG(hw, TARC1);
1585 tarc |= 1;
1586 E1000_WRITE_REG(hw, TARC1, tarc);
1587 }
1588
1589 e1000_config_collision_dist(hw);
1590
1591 /* Setup Transmit Descriptor Settings for eop descriptor */
1592 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1593
1594 /* only set IDE if we are delaying interrupts using the timers */
1595 if (adapter->tx_int_delay)
1596 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1597
1598 if (hw->mac_type < e1000_82543)
1599 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1600 else
1601 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1602
1603 /* Cache if we're 82544 running in PCI-X because we'll
1604 * need this to apply a workaround later in the send path. */
1605 if (hw->mac_type == e1000_82544 &&
1606 hw->bus_type == e1000_bus_type_pcix)
1607 adapter->pcix_82544 = 1;
1608
1609 E1000_WRITE_REG(hw, TCTL, tctl);
1610
1611 }
1612
1613 /**
1614 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1615 * @adapter: board private structure
1616 * @rxdr: rx descriptor ring (for a specific queue) to setup
1617 *
1618 * Returns 0 on success, negative on failure
1619 **/
1620
1621 static int
1622 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1623 struct e1000_rx_ring *rxdr)
1624 {
1625 struct pci_dev *pdev = adapter->pdev;
1626 int size, desc_len;
1627
1628 size = sizeof(struct e1000_buffer) * rxdr->count;
1629 rxdr->buffer_info = vmalloc(size);
1630 if (!rxdr->buffer_info) {
1631 DPRINTK(PROBE, ERR,
1632 "Unable to allocate memory for the receive descriptor ring\n");
1633 return -ENOMEM;
1634 }
1635 memset(rxdr->buffer_info, 0, size);
1636
1637 size = sizeof(struct e1000_ps_page) * rxdr->count;
1638 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
1639 if (!rxdr->ps_page) {
1640 vfree(rxdr->buffer_info);
1641 DPRINTK(PROBE, ERR,
1642 "Unable to allocate memory for the receive descriptor ring\n");
1643 return -ENOMEM;
1644 }
1645 memset(rxdr->ps_page, 0, size);
1646
1647 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1648 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
1649 if (!rxdr->ps_page_dma) {
1650 vfree(rxdr->buffer_info);
1651 kfree(rxdr->ps_page);
1652 DPRINTK(PROBE, ERR,
1653 "Unable to allocate memory for the receive descriptor ring\n");
1654 return -ENOMEM;
1655 }
1656 memset(rxdr->ps_page_dma, 0, size);
1657
1658 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1659 desc_len = sizeof(struct e1000_rx_desc);
1660 else
1661 desc_len = sizeof(union e1000_rx_desc_packet_split);
1662
1663 /* Round up to nearest 4K */
1664
1665 rxdr->size = rxdr->count * desc_len;
1666 E1000_ROUNDUP(rxdr->size, 4096);
1667
1668 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1669
1670 if (!rxdr->desc) {
1671 DPRINTK(PROBE, ERR,
1672 "Unable to allocate memory for the receive descriptor ring\n");
1673 setup_rx_desc_die:
1674 vfree(rxdr->buffer_info);
1675 kfree(rxdr->ps_page);
1676 kfree(rxdr->ps_page_dma);
1677 return -ENOMEM;
1678 }
1679
1680 /* Fix for errata 23, can't cross 64kB boundary */
1681 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1682 void *olddesc = rxdr->desc;
1683 dma_addr_t olddma = rxdr->dma;
1684 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1685 "at %p\n", rxdr->size, rxdr->desc);
1686 /* Try again, without freeing the previous */
1687 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1688 /* Failed allocation, critical failure */
1689 if (!rxdr->desc) {
1690 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1691 DPRINTK(PROBE, ERR,
1692 "Unable to allocate memory "
1693 "for the receive descriptor ring\n");
1694 goto setup_rx_desc_die;
1695 }
1696
1697 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1698 /* give up */
1699 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1700 rxdr->dma);
1701 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1702 DPRINTK(PROBE, ERR,
1703 "Unable to allocate aligned memory "
1704 "for the receive descriptor ring\n");
1705 goto setup_rx_desc_die;
1706 } else {
1707 /* Free old allocation, new allocation was successful */
1708 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1709 }
1710 }
1711 memset(rxdr->desc, 0, rxdr->size);
1712
1713 rxdr->next_to_clean = 0;
1714 rxdr->next_to_use = 0;
1715
1716 return 0;
1717 }
1718
1719 /**
1720 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1721 * (Descriptors) for all queues
1722 * @adapter: board private structure
1723 *
1724 * Return 0 on success, negative on failure
1725 **/
1726
1727 int
1728 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1729 {
1730 int i, err = 0;
1731
1732 for (i = 0; i < adapter->num_rx_queues; i++) {
1733 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1734 if (err) {
1735 DPRINTK(PROBE, ERR,
1736 "Allocation for Rx Queue %u failed\n", i);
1737 for (i-- ; i >= 0; i--)
1738 e1000_free_rx_resources(adapter,
1739 &adapter->rx_ring[i]);
1740 break;
1741 }
1742 }
1743
1744 return err;
1745 }
1746
1747 /**
1748 * e1000_setup_rctl - configure the receive control registers
1749 * @adapter: Board private structure
1750 **/
1751 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1752 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1753 static void
1754 e1000_setup_rctl(struct e1000_adapter *adapter)
1755 {
1756 uint32_t rctl, rfctl;
1757 uint32_t psrctl = 0;
1758 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1759 uint32_t pages = 0;
1760 #endif
1761
1762 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1763
1764 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1765
1766 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1767 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1768 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1769
1770 if (adapter->hw.tbi_compatibility_on == 1)
1771 rctl |= E1000_RCTL_SBP;
1772 else
1773 rctl &= ~E1000_RCTL_SBP;
1774
1775 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1776 rctl &= ~E1000_RCTL_LPE;
1777 else
1778 rctl |= E1000_RCTL_LPE;
1779
1780 /* Setup buffer sizes */
1781 rctl &= ~E1000_RCTL_SZ_4096;
1782 rctl |= E1000_RCTL_BSEX;
1783 switch (adapter->rx_buffer_len) {
1784 case E1000_RXBUFFER_256:
1785 rctl |= E1000_RCTL_SZ_256;
1786 rctl &= ~E1000_RCTL_BSEX;
1787 break;
1788 case E1000_RXBUFFER_512:
1789 rctl |= E1000_RCTL_SZ_512;
1790 rctl &= ~E1000_RCTL_BSEX;
1791 break;
1792 case E1000_RXBUFFER_1024:
1793 rctl |= E1000_RCTL_SZ_1024;
1794 rctl &= ~E1000_RCTL_BSEX;
1795 break;
1796 case E1000_RXBUFFER_2048:
1797 default:
1798 rctl |= E1000_RCTL_SZ_2048;
1799 rctl &= ~E1000_RCTL_BSEX;
1800 break;
1801 case E1000_RXBUFFER_4096:
1802 rctl |= E1000_RCTL_SZ_4096;
1803 break;
1804 case E1000_RXBUFFER_8192:
1805 rctl |= E1000_RCTL_SZ_8192;
1806 break;
1807 case E1000_RXBUFFER_16384:
1808 rctl |= E1000_RCTL_SZ_16384;
1809 break;
1810 }
1811
1812 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1813 /* 82571 and greater support packet-split where the protocol
1814 * header is placed in skb->data and the packet data is
1815 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1816 * In the case of a non-split, skb->data is linearly filled,
1817 * followed by the page buffers. Therefore, skb->data is
1818 * sized to hold the largest protocol header.
1819 */
1820 /* allocations using alloc_page take too long for regular MTU
1821 * so only enable packet split for jumbo frames */
1822 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1823 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1824 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
1825 adapter->rx_ps_pages = pages;
1826 else
1827 adapter->rx_ps_pages = 0;
1828 #endif
1829 if (adapter->rx_ps_pages) {
1830 /* Configure extra packet-split registers */
1831 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1832 rfctl |= E1000_RFCTL_EXTEN;
1833 /* disable packet split support for IPv6 extension headers,
1834 * because some malformed IPv6 headers can hang the RX */
1835 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1836 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1837
1838 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1839
1840 rctl |= E1000_RCTL_DTYP_PS;
1841
1842 psrctl |= adapter->rx_ps_bsize0 >>
1843 E1000_PSRCTL_BSIZE0_SHIFT;
1844
1845 switch (adapter->rx_ps_pages) {
1846 case 3:
1847 psrctl |= PAGE_SIZE <<
1848 E1000_PSRCTL_BSIZE3_SHIFT;
1849 case 2:
1850 psrctl |= PAGE_SIZE <<
1851 E1000_PSRCTL_BSIZE2_SHIFT;
1852 case 1:
1853 psrctl |= PAGE_SIZE >>
1854 E1000_PSRCTL_BSIZE1_SHIFT;
1855 break;
1856 }
1857
1858 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1859 }
1860
1861 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1862 }
1863
1864 /**
1865 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1866 * @adapter: board private structure
1867 *
1868 * Configure the Rx unit of the MAC after a reset.
1869 **/
1870
1871 static void
1872 e1000_configure_rx(struct e1000_adapter *adapter)
1873 {
1874 uint64_t rdba;
1875 struct e1000_hw *hw = &adapter->hw;
1876 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
1877
1878 if (adapter->rx_ps_pages) {
1879 /* this is a 32 byte descriptor */
1880 rdlen = adapter->rx_ring[0].count *
1881 sizeof(union e1000_rx_desc_packet_split);
1882 adapter->clean_rx = e1000_clean_rx_irq_ps;
1883 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1884 } else {
1885 rdlen = adapter->rx_ring[0].count *
1886 sizeof(struct e1000_rx_desc);
1887 adapter->clean_rx = e1000_clean_rx_irq;
1888 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1889 }
1890
1891 /* disable receives while setting up the descriptors */
1892 rctl = E1000_READ_REG(hw, RCTL);
1893 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1894
1895 /* set the Receive Delay Timer Register */
1896 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1897
1898 if (hw->mac_type >= e1000_82540) {
1899 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
1900 if (adapter->itr_setting != 0)
1901 E1000_WRITE_REG(hw, ITR,
1902 1000000000 / (adapter->itr * 256));
1903 }
1904
1905 if (hw->mac_type >= e1000_82571) {
1906 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1907 /* Reset delay timers after every interrupt */
1908 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1909 #ifdef CONFIG_E1000_NAPI
1910 /* Auto-Mask interrupts upon ICR access */
1911 ctrl_ext |= E1000_CTRL_EXT_IAME;
1912 E1000_WRITE_REG(hw, IAM, 0xffffffff);
1913 #endif
1914 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1915 E1000_WRITE_FLUSH(hw);
1916 }
1917
1918 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1919 * the Base and Length of the Rx Descriptor Ring */
1920 switch (adapter->num_rx_queues) {
1921 case 1:
1922 default:
1923 rdba = adapter->rx_ring[0].dma;
1924 E1000_WRITE_REG(hw, RDLEN, rdlen);
1925 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1926 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1927 E1000_WRITE_REG(hw, RDT, 0);
1928 E1000_WRITE_REG(hw, RDH, 0);
1929 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1930 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
1931 break;
1932 }
1933
1934 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
1935 if (hw->mac_type >= e1000_82543) {
1936 rxcsum = E1000_READ_REG(hw, RXCSUM);
1937 if (adapter->rx_csum == TRUE) {
1938 rxcsum |= E1000_RXCSUM_TUOFL;
1939
1940 /* Enable 82571 IPv4 payload checksum for UDP fragments
1941 * Must be used in conjunction with packet-split. */
1942 if ((hw->mac_type >= e1000_82571) &&
1943 (adapter->rx_ps_pages)) {
1944 rxcsum |= E1000_RXCSUM_IPPCSE;
1945 }
1946 } else {
1947 rxcsum &= ~E1000_RXCSUM_TUOFL;
1948 /* don't need to clear IPPCSE as it defaults to 0 */
1949 }
1950 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1951 }
1952
1953 /* enable early receives on 82573, only takes effect if using > 2048
1954 * byte total frame size. for example only for jumbo frames */
1955 #define E1000_ERT_2048 0x100
1956 if (hw->mac_type == e1000_82573)
1957 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
1958
1959 /* Enable Receives */
1960 E1000_WRITE_REG(hw, RCTL, rctl);
1961 }
1962
1963 /**
1964 * e1000_free_tx_resources - Free Tx Resources per Queue
1965 * @adapter: board private structure
1966 * @tx_ring: Tx descriptor ring for a specific queue
1967 *
1968 * Free all transmit software resources
1969 **/
1970
1971 static void
1972 e1000_free_tx_resources(struct e1000_adapter *adapter,
1973 struct e1000_tx_ring *tx_ring)
1974 {
1975 struct pci_dev *pdev = adapter->pdev;
1976
1977 e1000_clean_tx_ring(adapter, tx_ring);
1978
1979 vfree(tx_ring->buffer_info);
1980 tx_ring->buffer_info = NULL;
1981
1982 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1983
1984 tx_ring->desc = NULL;
1985 }
1986
1987 /**
1988 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1989 * @adapter: board private structure
1990 *
1991 * Free all transmit software resources
1992 **/
1993
1994 void
1995 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1996 {
1997 int i;
1998
1999 for (i = 0; i < adapter->num_tx_queues; i++)
2000 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2001 }
2002
2003 static void
2004 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2005 struct e1000_buffer *buffer_info)
2006 {
2007 if (buffer_info->dma) {
2008 pci_unmap_page(adapter->pdev,
2009 buffer_info->dma,
2010 buffer_info->length,
2011 PCI_DMA_TODEVICE);
2012 buffer_info->dma = 0;
2013 }
2014 if (buffer_info->skb) {
2015 dev_kfree_skb_any(buffer_info->skb);
2016 buffer_info->skb = NULL;
2017 }
2018 /* buffer_info must be completely set up in the transmit path */
2019 }
2020
2021 /**
2022 * e1000_clean_tx_ring - Free Tx Buffers
2023 * @adapter: board private structure
2024 * @tx_ring: ring to be cleaned
2025 **/
2026
2027 static void
2028 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2029 struct e1000_tx_ring *tx_ring)
2030 {
2031 struct e1000_buffer *buffer_info;
2032 unsigned long size;
2033 unsigned int i;
2034
2035 /* Free all the Tx ring sk_buffs */
2036
2037 for (i = 0; i < tx_ring->count; i++) {
2038 buffer_info = &tx_ring->buffer_info[i];
2039 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2040 }
2041
2042 size = sizeof(struct e1000_buffer) * tx_ring->count;
2043 memset(tx_ring->buffer_info, 0, size);
2044
2045 /* Zero out the descriptor ring */
2046
2047 memset(tx_ring->desc, 0, tx_ring->size);
2048
2049 tx_ring->next_to_use = 0;
2050 tx_ring->next_to_clean = 0;
2051 tx_ring->last_tx_tso = 0;
2052
2053 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2054 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2055 }
2056
2057 /**
2058 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2059 * @adapter: board private structure
2060 **/
2061
2062 static void
2063 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2064 {
2065 int i;
2066
2067 for (i = 0; i < adapter->num_tx_queues; i++)
2068 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2069 }
2070
2071 /**
2072 * e1000_free_rx_resources - Free Rx Resources
2073 * @adapter: board private structure
2074 * @rx_ring: ring to clean the resources from
2075 *
2076 * Free all receive software resources
2077 **/
2078
2079 static void
2080 e1000_free_rx_resources(struct e1000_adapter *adapter,
2081 struct e1000_rx_ring *rx_ring)
2082 {
2083 struct pci_dev *pdev = adapter->pdev;
2084
2085 e1000_clean_rx_ring(adapter, rx_ring);
2086
2087 vfree(rx_ring->buffer_info);
2088 rx_ring->buffer_info = NULL;
2089 kfree(rx_ring->ps_page);
2090 rx_ring->ps_page = NULL;
2091 kfree(rx_ring->ps_page_dma);
2092 rx_ring->ps_page_dma = NULL;
2093
2094 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2095
2096 rx_ring->desc = NULL;
2097 }
2098
2099 /**
2100 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2101 * @adapter: board private structure
2102 *
2103 * Free all receive software resources
2104 **/
2105
2106 void
2107 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2108 {
2109 int i;
2110
2111 for (i = 0; i < adapter->num_rx_queues; i++)
2112 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2113 }
2114
2115 /**
2116 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2117 * @adapter: board private structure
2118 * @rx_ring: ring to free buffers from
2119 **/
2120
2121 static void
2122 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2123 struct e1000_rx_ring *rx_ring)
2124 {
2125 struct e1000_buffer *buffer_info;
2126 struct e1000_ps_page *ps_page;
2127 struct e1000_ps_page_dma *ps_page_dma;
2128 struct pci_dev *pdev = adapter->pdev;
2129 unsigned long size;
2130 unsigned int i, j;
2131
2132 /* Free all the Rx ring sk_buffs */
2133 for (i = 0; i < rx_ring->count; i++) {
2134 buffer_info = &rx_ring->buffer_info[i];
2135 if (buffer_info->skb) {
2136 pci_unmap_single(pdev,
2137 buffer_info->dma,
2138 buffer_info->length,
2139 PCI_DMA_FROMDEVICE);
2140
2141 dev_kfree_skb(buffer_info->skb);
2142 buffer_info->skb = NULL;
2143 }
2144 ps_page = &rx_ring->ps_page[i];
2145 ps_page_dma = &rx_ring->ps_page_dma[i];
2146 for (j = 0; j < adapter->rx_ps_pages; j++) {
2147 if (!ps_page->ps_page[j]) break;
2148 pci_unmap_page(pdev,
2149 ps_page_dma->ps_page_dma[j],
2150 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2151 ps_page_dma->ps_page_dma[j] = 0;
2152 put_page(ps_page->ps_page[j]);
2153 ps_page->ps_page[j] = NULL;
2154 }
2155 }
2156
2157 size = sizeof(struct e1000_buffer) * rx_ring->count;
2158 memset(rx_ring->buffer_info, 0, size);
2159 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2160 memset(rx_ring->ps_page, 0, size);
2161 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2162 memset(rx_ring->ps_page_dma, 0, size);
2163
2164 /* Zero out the descriptor ring */
2165
2166 memset(rx_ring->desc, 0, rx_ring->size);
2167
2168 rx_ring->next_to_clean = 0;
2169 rx_ring->next_to_use = 0;
2170
2171 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2172 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2173 }
2174
2175 /**
2176 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2177 * @adapter: board private structure
2178 **/
2179
2180 static void
2181 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2182 {
2183 int i;
2184
2185 for (i = 0; i < adapter->num_rx_queues; i++)
2186 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2187 }
2188
2189 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2190 * and memory write and invalidate disabled for certain operations
2191 */
2192 static void
2193 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2194 {
2195 struct net_device *netdev = adapter->netdev;
2196 uint32_t rctl;
2197
2198 e1000_pci_clear_mwi(&adapter->hw);
2199
2200 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2201 rctl |= E1000_RCTL_RST;
2202 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2203 E1000_WRITE_FLUSH(&adapter->hw);
2204 mdelay(5);
2205
2206 if (netif_running(netdev))
2207 e1000_clean_all_rx_rings(adapter);
2208 }
2209
2210 static void
2211 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2212 {
2213 struct net_device *netdev = adapter->netdev;
2214 uint32_t rctl;
2215
2216 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2217 rctl &= ~E1000_RCTL_RST;
2218 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2219 E1000_WRITE_FLUSH(&adapter->hw);
2220 mdelay(5);
2221
2222 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2223 e1000_pci_set_mwi(&adapter->hw);
2224
2225 if (netif_running(netdev)) {
2226 /* No need to loop, because 82542 supports only 1 queue */
2227 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2228 e1000_configure_rx(adapter);
2229 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2230 }
2231 }
2232
2233 /**
2234 * e1000_set_mac - Change the Ethernet Address of the NIC
2235 * @netdev: network interface device structure
2236 * @p: pointer to an address structure
2237 *
2238 * Returns 0 on success, negative on failure
2239 **/
2240
2241 static int
2242 e1000_set_mac(struct net_device *netdev, void *p)
2243 {
2244 struct e1000_adapter *adapter = netdev_priv(netdev);
2245 struct sockaddr *addr = p;
2246
2247 if (!is_valid_ether_addr(addr->sa_data))
2248 return -EADDRNOTAVAIL;
2249
2250 /* 82542 2.0 needs to be in reset to write receive address registers */
2251
2252 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2253 e1000_enter_82542_rst(adapter);
2254
2255 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2256 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2257
2258 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2259
2260 /* With 82571 controllers, LAA may be overwritten (with the default)
2261 * due to controller reset from the other port. */
2262 if (adapter->hw.mac_type == e1000_82571) {
2263 /* activate the work around */
2264 adapter->hw.laa_is_present = 1;
2265
2266 /* Hold a copy of the LAA in RAR[14] This is done so that
2267 * between the time RAR[0] gets clobbered and the time it
2268 * gets fixed (in e1000_watchdog), the actual LAA is in one
2269 * of the RARs and no incoming packets directed to this port
2270 * are dropped. Eventaully the LAA will be in RAR[0] and
2271 * RAR[14] */
2272 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2273 E1000_RAR_ENTRIES - 1);
2274 }
2275
2276 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2277 e1000_leave_82542_rst(adapter);
2278
2279 return 0;
2280 }
2281
2282 /**
2283 * e1000_set_multi - Multicast and Promiscuous mode set
2284 * @netdev: network interface device structure
2285 *
2286 * The set_multi entry point is called whenever the multicast address
2287 * list or the network interface flags are updated. This routine is
2288 * responsible for configuring the hardware for proper multicast,
2289 * promiscuous mode, and all-multi behavior.
2290 **/
2291
2292 static void
2293 e1000_set_multi(struct net_device *netdev)
2294 {
2295 struct e1000_adapter *adapter = netdev_priv(netdev);
2296 struct e1000_hw *hw = &adapter->hw;
2297 struct dev_mc_list *mc_ptr;
2298 uint32_t rctl;
2299 uint32_t hash_value;
2300 int i, rar_entries = E1000_RAR_ENTRIES;
2301 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2302 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2303 E1000_NUM_MTA_REGISTERS;
2304
2305 if (adapter->hw.mac_type == e1000_ich8lan)
2306 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2307
2308 /* reserve RAR[14] for LAA over-write work-around */
2309 if (adapter->hw.mac_type == e1000_82571)
2310 rar_entries--;
2311
2312 /* Check for Promiscuous and All Multicast modes */
2313
2314 rctl = E1000_READ_REG(hw, RCTL);
2315
2316 if (netdev->flags & IFF_PROMISC) {
2317 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2318 } else if (netdev->flags & IFF_ALLMULTI) {
2319 rctl |= E1000_RCTL_MPE;
2320 rctl &= ~E1000_RCTL_UPE;
2321 } else {
2322 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2323 }
2324
2325 E1000_WRITE_REG(hw, RCTL, rctl);
2326
2327 /* 82542 2.0 needs to be in reset to write receive address registers */
2328
2329 if (hw->mac_type == e1000_82542_rev2_0)
2330 e1000_enter_82542_rst(adapter);
2331
2332 /* load the first 14 multicast address into the exact filters 1-14
2333 * RAR 0 is used for the station MAC adddress
2334 * if there are not 14 addresses, go ahead and clear the filters
2335 * -- with 82571 controllers only 0-13 entries are filled here
2336 */
2337 mc_ptr = netdev->mc_list;
2338
2339 for (i = 1; i < rar_entries; i++) {
2340 if (mc_ptr) {
2341 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2342 mc_ptr = mc_ptr->next;
2343 } else {
2344 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2345 E1000_WRITE_FLUSH(hw);
2346 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2347 E1000_WRITE_FLUSH(hw);
2348 }
2349 }
2350
2351 /* clear the old settings from the multicast hash table */
2352
2353 for (i = 0; i < mta_reg_count; i++) {
2354 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2355 E1000_WRITE_FLUSH(hw);
2356 }
2357
2358 /* load any remaining addresses into the hash table */
2359
2360 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2361 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2362 e1000_mta_set(hw, hash_value);
2363 }
2364
2365 if (hw->mac_type == e1000_82542_rev2_0)
2366 e1000_leave_82542_rst(adapter);
2367 }
2368
2369 /* Need to wait a few seconds after link up to get diagnostic information from
2370 * the phy */
2371
2372 static void
2373 e1000_update_phy_info(unsigned long data)
2374 {
2375 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2376 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2377 }
2378
2379 /**
2380 * e1000_82547_tx_fifo_stall - Timer Call-back
2381 * @data: pointer to adapter cast into an unsigned long
2382 **/
2383
2384 static void
2385 e1000_82547_tx_fifo_stall(unsigned long data)
2386 {
2387 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2388 struct net_device *netdev = adapter->netdev;
2389 uint32_t tctl;
2390
2391 if (atomic_read(&adapter->tx_fifo_stall)) {
2392 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2393 E1000_READ_REG(&adapter->hw, TDH)) &&
2394 (E1000_READ_REG(&adapter->hw, TDFT) ==
2395 E1000_READ_REG(&adapter->hw, TDFH)) &&
2396 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2397 E1000_READ_REG(&adapter->hw, TDFHS))) {
2398 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2399 E1000_WRITE_REG(&adapter->hw, TCTL,
2400 tctl & ~E1000_TCTL_EN);
2401 E1000_WRITE_REG(&adapter->hw, TDFT,
2402 adapter->tx_head_addr);
2403 E1000_WRITE_REG(&adapter->hw, TDFH,
2404 adapter->tx_head_addr);
2405 E1000_WRITE_REG(&adapter->hw, TDFTS,
2406 adapter->tx_head_addr);
2407 E1000_WRITE_REG(&adapter->hw, TDFHS,
2408 adapter->tx_head_addr);
2409 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2410 E1000_WRITE_FLUSH(&adapter->hw);
2411
2412 adapter->tx_fifo_head = 0;
2413 atomic_set(&adapter->tx_fifo_stall, 0);
2414 netif_wake_queue(netdev);
2415 } else {
2416 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2417 }
2418 }
2419 }
2420
2421 /**
2422 * e1000_watchdog - Timer Call-back
2423 * @data: pointer to adapter cast into an unsigned long
2424 **/
2425 static void
2426 e1000_watchdog(unsigned long data)
2427 {
2428 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2429 struct net_device *netdev = adapter->netdev;
2430 struct e1000_tx_ring *txdr = adapter->tx_ring;
2431 uint32_t link, tctl;
2432 int32_t ret_val;
2433
2434 ret_val = e1000_check_for_link(&adapter->hw);
2435 if ((ret_val == E1000_ERR_PHY) &&
2436 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2437 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2438 /* See e1000_kumeran_lock_loss_workaround() */
2439 DPRINTK(LINK, INFO,
2440 "Gigabit has been disabled, downgrading speed\n");
2441 }
2442
2443 if (adapter->hw.mac_type == e1000_82573) {
2444 e1000_enable_tx_pkt_filtering(&adapter->hw);
2445 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2446 e1000_update_mng_vlan(adapter);
2447 }
2448
2449 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2450 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2451 link = !adapter->hw.serdes_link_down;
2452 else
2453 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2454
2455 if (link) {
2456 if (!netif_carrier_ok(netdev)) {
2457 boolean_t txb2b = 1;
2458 e1000_get_speed_and_duplex(&adapter->hw,
2459 &adapter->link_speed,
2460 &adapter->link_duplex);
2461
2462 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2463 adapter->link_speed,
2464 adapter->link_duplex == FULL_DUPLEX ?
2465 "Full Duplex" : "Half Duplex");
2466
2467 /* tweak tx_queue_len according to speed/duplex
2468 * and adjust the timeout factor */
2469 netdev->tx_queue_len = adapter->tx_queue_len;
2470 adapter->tx_timeout_factor = 1;
2471 switch (adapter->link_speed) {
2472 case SPEED_10:
2473 txb2b = 0;
2474 netdev->tx_queue_len = 10;
2475 adapter->tx_timeout_factor = 8;
2476 break;
2477 case SPEED_100:
2478 txb2b = 0;
2479 netdev->tx_queue_len = 100;
2480 /* maybe add some timeout factor ? */
2481 break;
2482 }
2483
2484 if ((adapter->hw.mac_type == e1000_82571 ||
2485 adapter->hw.mac_type == e1000_82572) &&
2486 txb2b == 0) {
2487 uint32_t tarc0;
2488 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2489 tarc0 &= ~(1 << 21);
2490 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2491 }
2492
2493 #ifdef NETIF_F_TSO
2494 /* disable TSO for pcie and 10/100 speeds, to avoid
2495 * some hardware issues */
2496 if (!adapter->tso_force &&
2497 adapter->hw.bus_type == e1000_bus_type_pci_express){
2498 switch (adapter->link_speed) {
2499 case SPEED_10:
2500 case SPEED_100:
2501 DPRINTK(PROBE,INFO,
2502 "10/100 speed: disabling TSO\n");
2503 netdev->features &= ~NETIF_F_TSO;
2504 #ifdef NETIF_F_TSO6
2505 netdev->features &= ~NETIF_F_TSO6;
2506 #endif
2507 break;
2508 case SPEED_1000:
2509 netdev->features |= NETIF_F_TSO;
2510 #ifdef NETIF_F_TSO6
2511 netdev->features |= NETIF_F_TSO6;
2512 #endif
2513 break;
2514 default:
2515 /* oops */
2516 break;
2517 }
2518 }
2519 #endif
2520
2521 /* enable transmits in the hardware, need to do this
2522 * after setting TARC0 */
2523 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2524 tctl |= E1000_TCTL_EN;
2525 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2526
2527 netif_carrier_on(netdev);
2528 netif_wake_queue(netdev);
2529 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2530 adapter->smartspeed = 0;
2531 }
2532 } else {
2533 if (netif_carrier_ok(netdev)) {
2534 adapter->link_speed = 0;
2535 adapter->link_duplex = 0;
2536 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2537 netif_carrier_off(netdev);
2538 netif_stop_queue(netdev);
2539 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2540
2541 /* 80003ES2LAN workaround--
2542 * For packet buffer work-around on link down event;
2543 * disable receives in the ISR and
2544 * reset device here in the watchdog
2545 */
2546 if (adapter->hw.mac_type == e1000_80003es2lan)
2547 /* reset device */
2548 schedule_work(&adapter->reset_task);
2549 }
2550
2551 e1000_smartspeed(adapter);
2552 }
2553
2554 e1000_update_stats(adapter);
2555
2556 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2557 adapter->tpt_old = adapter->stats.tpt;
2558 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2559 adapter->colc_old = adapter->stats.colc;
2560
2561 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2562 adapter->gorcl_old = adapter->stats.gorcl;
2563 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2564 adapter->gotcl_old = adapter->stats.gotcl;
2565
2566 e1000_update_adaptive(&adapter->hw);
2567
2568 if (!netif_carrier_ok(netdev)) {
2569 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2570 /* We've lost link, so the controller stops DMA,
2571 * but we've got queued Tx work that's never going
2572 * to get done, so reset controller to flush Tx.
2573 * (Do the reset outside of interrupt context). */
2574 adapter->tx_timeout_count++;
2575 schedule_work(&adapter->reset_task);
2576 }
2577 }
2578
2579 /* Cause software interrupt to ensure rx ring is cleaned */
2580 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2581
2582 /* Force detection of hung controller every watchdog period */
2583 adapter->detect_tx_hung = TRUE;
2584
2585 /* With 82571 controllers, LAA may be overwritten due to controller
2586 * reset from the other port. Set the appropriate LAA in RAR[0] */
2587 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2588 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2589
2590 /* Reset the timer */
2591 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2592 }
2593
2594 enum latency_range {
2595 lowest_latency = 0,
2596 low_latency = 1,
2597 bulk_latency = 2,
2598 latency_invalid = 255
2599 };
2600
2601 /**
2602 * e1000_update_itr - update the dynamic ITR value based on statistics
2603 * Stores a new ITR value based on packets and byte
2604 * counts during the last interrupt. The advantage of per interrupt
2605 * computation is faster updates and more accurate ITR for the current
2606 * traffic pattern. Constants in this function were computed
2607 * based on theoretical maximum wire speed and thresholds were set based
2608 * on testing data as well as attempting to minimize response time
2609 * while increasing bulk throughput.
2610 * this functionality is controlled by the InterruptThrottleRate module
2611 * parameter (see e1000_param.c)
2612 * @adapter: pointer to adapter
2613 * @itr_setting: current adapter->itr
2614 * @packets: the number of packets during this measurement interval
2615 * @bytes: the number of bytes during this measurement interval
2616 **/
2617 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2618 uint16_t itr_setting,
2619 int packets,
2620 int bytes)
2621 {
2622 unsigned int retval = itr_setting;
2623 struct e1000_hw *hw = &adapter->hw;
2624
2625 if (unlikely(hw->mac_type < e1000_82540))
2626 goto update_itr_done;
2627
2628 if (packets == 0)
2629 goto update_itr_done;
2630
2631 switch (itr_setting) {
2632 case lowest_latency:
2633 /* jumbo frames get bulk treatment*/
2634 if (bytes/packets > 8000)
2635 retval = bulk_latency;
2636 else if ((packets < 5) && (bytes > 512))
2637 retval = low_latency;
2638 break;
2639 case low_latency: /* 50 usec aka 20000 ints/s */
2640 if (bytes > 10000) {
2641 /* jumbo frames need bulk latency setting */
2642 if (bytes/packets > 8000)
2643 retval = bulk_latency;
2644 else if ((packets < 10) || ((bytes/packets) > 1200))
2645 retval = bulk_latency;
2646 else if ((packets > 35))
2647 retval = lowest_latency;
2648 } else if (bytes/packets > 2000)
2649 retval = bulk_latency;
2650 else if (packets <= 2 && bytes < 512)
2651 retval = lowest_latency;
2652 break;
2653 case bulk_latency: /* 250 usec aka 4000 ints/s */
2654 if (bytes > 25000) {
2655 if (packets > 35)
2656 retval = low_latency;
2657 } else if (bytes < 6000) {
2658 retval = low_latency;
2659 }
2660 break;
2661 }
2662
2663 update_itr_done:
2664 return retval;
2665 }
2666
2667 static void e1000_set_itr(struct e1000_adapter *adapter)
2668 {
2669 struct e1000_hw *hw = &adapter->hw;
2670 uint16_t current_itr;
2671 uint32_t new_itr = adapter->itr;
2672
2673 if (unlikely(hw->mac_type < e1000_82540))
2674 return;
2675
2676 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2677 if (unlikely(adapter->link_speed != SPEED_1000)) {
2678 current_itr = 0;
2679 new_itr = 4000;
2680 goto set_itr_now;
2681 }
2682
2683 adapter->tx_itr = e1000_update_itr(adapter,
2684 adapter->tx_itr,
2685 adapter->total_tx_packets,
2686 adapter->total_tx_bytes);
2687 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2688 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2689 adapter->tx_itr = low_latency;
2690
2691 adapter->rx_itr = e1000_update_itr(adapter,
2692 adapter->rx_itr,
2693 adapter->total_rx_packets,
2694 adapter->total_rx_bytes);
2695 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2696 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2697 adapter->rx_itr = low_latency;
2698
2699 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2700
2701 switch (current_itr) {
2702 /* counts and packets in update_itr are dependent on these numbers */
2703 case lowest_latency:
2704 new_itr = 70000;
2705 break;
2706 case low_latency:
2707 new_itr = 20000; /* aka hwitr = ~200 */
2708 break;
2709 case bulk_latency:
2710 new_itr = 4000;
2711 break;
2712 default:
2713 break;
2714 }
2715
2716 set_itr_now:
2717 if (new_itr != adapter->itr) {
2718 /* this attempts to bias the interrupt rate towards Bulk
2719 * by adding intermediate steps when interrupt rate is
2720 * increasing */
2721 new_itr = new_itr > adapter->itr ?
2722 min(adapter->itr + (new_itr >> 2), new_itr) :
2723 new_itr;
2724 adapter->itr = new_itr;
2725 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2726 }
2727
2728 return;
2729 }
2730
2731 #define E1000_TX_FLAGS_CSUM 0x00000001
2732 #define E1000_TX_FLAGS_VLAN 0x00000002
2733 #define E1000_TX_FLAGS_TSO 0x00000004
2734 #define E1000_TX_FLAGS_IPV4 0x00000008
2735 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2736 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2737
2738 static int
2739 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2740 struct sk_buff *skb)
2741 {
2742 #ifdef NETIF_F_TSO
2743 struct e1000_context_desc *context_desc;
2744 struct e1000_buffer *buffer_info;
2745 unsigned int i;
2746 uint32_t cmd_length = 0;
2747 uint16_t ipcse = 0, tucse, mss;
2748 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2749 int err;
2750
2751 if (skb_is_gso(skb)) {
2752 if (skb_header_cloned(skb)) {
2753 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2754 if (err)
2755 return err;
2756 }
2757
2758 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2759 mss = skb_shinfo(skb)->gso_size;
2760 if (skb->protocol == htons(ETH_P_IP)) {
2761 skb->nh.iph->tot_len = 0;
2762 skb->nh.iph->check = 0;
2763 skb->h.th->check =
2764 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2765 skb->nh.iph->daddr,
2766 0,
2767 IPPROTO_TCP,
2768 0);
2769 cmd_length = E1000_TXD_CMD_IP;
2770 ipcse = skb->h.raw - skb->data - 1;
2771 #ifdef NETIF_F_TSO6
2772 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2773 skb->nh.ipv6h->payload_len = 0;
2774 skb->h.th->check =
2775 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2776 &skb->nh.ipv6h->daddr,
2777 0,
2778 IPPROTO_TCP,
2779 0);
2780 ipcse = 0;
2781 #endif
2782 }
2783 ipcss = skb->nh.raw - skb->data;
2784 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
2785 tucss = skb->h.raw - skb->data;
2786 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2787 tucse = 0;
2788
2789 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2790 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2791
2792 i = tx_ring->next_to_use;
2793 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2794 buffer_info = &tx_ring->buffer_info[i];
2795
2796 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2797 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2798 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2799 context_desc->upper_setup.tcp_fields.tucss = tucss;
2800 context_desc->upper_setup.tcp_fields.tucso = tucso;
2801 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2802 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2803 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2804 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2805
2806 buffer_info->time_stamp = jiffies;
2807 buffer_info->next_to_watch = i;
2808
2809 if (++i == tx_ring->count) i = 0;
2810 tx_ring->next_to_use = i;
2811
2812 return TRUE;
2813 }
2814 #endif
2815
2816 return FALSE;
2817 }
2818
2819 static boolean_t
2820 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2821 struct sk_buff *skb)
2822 {
2823 struct e1000_context_desc *context_desc;
2824 struct e1000_buffer *buffer_info;
2825 unsigned int i;
2826 uint8_t css;
2827
2828 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2829 css = skb->h.raw - skb->data;
2830
2831 i = tx_ring->next_to_use;
2832 buffer_info = &tx_ring->buffer_info[i];
2833 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2834
2835 context_desc->upper_setup.tcp_fields.tucss = css;
2836 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
2837 context_desc->upper_setup.tcp_fields.tucse = 0;
2838 context_desc->tcp_seg_setup.data = 0;
2839 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2840
2841 buffer_info->time_stamp = jiffies;
2842 buffer_info->next_to_watch = i;
2843
2844 if (unlikely(++i == tx_ring->count)) i = 0;
2845 tx_ring->next_to_use = i;
2846
2847 return TRUE;
2848 }
2849
2850 return FALSE;
2851 }
2852
2853 #define E1000_MAX_TXD_PWR 12
2854 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2855
2856 static int
2857 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2858 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2859 unsigned int nr_frags, unsigned int mss)
2860 {
2861 struct e1000_buffer *buffer_info;
2862 unsigned int len = skb->len;
2863 unsigned int offset = 0, size, count = 0, i;
2864 unsigned int f;
2865 len -= skb->data_len;
2866
2867 i = tx_ring->next_to_use;
2868
2869 while (len) {
2870 buffer_info = &tx_ring->buffer_info[i];
2871 size = min(len, max_per_txd);
2872 #ifdef NETIF_F_TSO
2873 /* Workaround for Controller erratum --
2874 * descriptor for non-tso packet in a linear SKB that follows a
2875 * tso gets written back prematurely before the data is fully
2876 * DMA'd to the controller */
2877 if (!skb->data_len && tx_ring->last_tx_tso &&
2878 !skb_is_gso(skb)) {
2879 tx_ring->last_tx_tso = 0;
2880 size -= 4;
2881 }
2882
2883 /* Workaround for premature desc write-backs
2884 * in TSO mode. Append 4-byte sentinel desc */
2885 if (unlikely(mss && !nr_frags && size == len && size > 8))
2886 size -= 4;
2887 #endif
2888 /* work-around for errata 10 and it applies
2889 * to all controllers in PCI-X mode
2890 * The fix is to make sure that the first descriptor of a
2891 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2892 */
2893 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2894 (size > 2015) && count == 0))
2895 size = 2015;
2896
2897 /* Workaround for potential 82544 hang in PCI-X. Avoid
2898 * terminating buffers within evenly-aligned dwords. */
2899 if (unlikely(adapter->pcix_82544 &&
2900 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2901 size > 4))
2902 size -= 4;
2903
2904 buffer_info->length = size;
2905 buffer_info->dma =
2906 pci_map_single(adapter->pdev,
2907 skb->data + offset,
2908 size,
2909 PCI_DMA_TODEVICE);
2910 buffer_info->time_stamp = jiffies;
2911 buffer_info->next_to_watch = i;
2912
2913 len -= size;
2914 offset += size;
2915 count++;
2916 if (unlikely(++i == tx_ring->count)) i = 0;
2917 }
2918
2919 for (f = 0; f < nr_frags; f++) {
2920 struct skb_frag_struct *frag;
2921
2922 frag = &skb_shinfo(skb)->frags[f];
2923 len = frag->size;
2924 offset = frag->page_offset;
2925
2926 while (len) {
2927 buffer_info = &tx_ring->buffer_info[i];
2928 size = min(len, max_per_txd);
2929 #ifdef NETIF_F_TSO
2930 /* Workaround for premature desc write-backs
2931 * in TSO mode. Append 4-byte sentinel desc */
2932 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
2933 size -= 4;
2934 #endif
2935 /* Workaround for potential 82544 hang in PCI-X.
2936 * Avoid terminating buffers within evenly-aligned
2937 * dwords. */
2938 if (unlikely(adapter->pcix_82544 &&
2939 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2940 size > 4))
2941 size -= 4;
2942
2943 buffer_info->length = size;
2944 buffer_info->dma =
2945 pci_map_page(adapter->pdev,
2946 frag->page,
2947 offset,
2948 size,
2949 PCI_DMA_TODEVICE);
2950 buffer_info->time_stamp = jiffies;
2951 buffer_info->next_to_watch = i;
2952
2953 len -= size;
2954 offset += size;
2955 count++;
2956 if (unlikely(++i == tx_ring->count)) i = 0;
2957 }
2958 }
2959
2960 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2961 tx_ring->buffer_info[i].skb = skb;
2962 tx_ring->buffer_info[first].next_to_watch = i;
2963
2964 return count;
2965 }
2966
2967 static void
2968 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2969 int tx_flags, int count)
2970 {
2971 struct e1000_tx_desc *tx_desc = NULL;
2972 struct e1000_buffer *buffer_info;
2973 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2974 unsigned int i;
2975
2976 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
2977 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2978 E1000_TXD_CMD_TSE;
2979 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2980
2981 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2982 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2983 }
2984
2985 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
2986 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2987 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2988 }
2989
2990 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
2991 txd_lower |= E1000_TXD_CMD_VLE;
2992 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2993 }
2994
2995 i = tx_ring->next_to_use;
2996
2997 while (count--) {
2998 buffer_info = &tx_ring->buffer_info[i];
2999 tx_desc = E1000_TX_DESC(*tx_ring, i);
3000 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3001 tx_desc->lower.data =
3002 cpu_to_le32(txd_lower | buffer_info->length);
3003 tx_desc->upper.data = cpu_to_le32(txd_upper);
3004 if (unlikely(++i == tx_ring->count)) i = 0;
3005 }
3006
3007 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3008
3009 /* Force memory writes to complete before letting h/w
3010 * know there are new descriptors to fetch. (Only
3011 * applicable for weak-ordered memory model archs,
3012 * such as IA-64). */
3013 wmb();
3014
3015 tx_ring->next_to_use = i;
3016 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
3017 /* we need this if more than one processor can write to our tail
3018 * at a time, it syncronizes IO on IA64/Altix systems */
3019 mmiowb();
3020 }
3021
3022 /**
3023 * 82547 workaround to avoid controller hang in half-duplex environment.
3024 * The workaround is to avoid queuing a large packet that would span
3025 * the internal Tx FIFO ring boundary by notifying the stack to resend
3026 * the packet at a later time. This gives the Tx FIFO an opportunity to
3027 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3028 * to the beginning of the Tx FIFO.
3029 **/
3030
3031 #define E1000_FIFO_HDR 0x10
3032 #define E1000_82547_PAD_LEN 0x3E0
3033
3034 static int
3035 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3036 {
3037 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3038 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3039
3040 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
3041
3042 if (adapter->link_duplex != HALF_DUPLEX)
3043 goto no_fifo_stall_required;
3044
3045 if (atomic_read(&adapter->tx_fifo_stall))
3046 return 1;
3047
3048 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3049 atomic_set(&adapter->tx_fifo_stall, 1);
3050 return 1;
3051 }
3052
3053 no_fifo_stall_required:
3054 adapter->tx_fifo_head += skb_fifo_len;
3055 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3056 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3057 return 0;
3058 }
3059
3060 #define MINIMUM_DHCP_PACKET_SIZE 282
3061 static int
3062 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3063 {
3064 struct e1000_hw *hw = &adapter->hw;
3065 uint16_t length, offset;
3066 if (vlan_tx_tag_present(skb)) {
3067 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
3068 ( adapter->hw.mng_cookie.status &
3069 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3070 return 0;
3071 }
3072 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3073 struct ethhdr *eth = (struct ethhdr *) skb->data;
3074 if ((htons(ETH_P_IP) == eth->h_proto)) {
3075 const struct iphdr *ip =
3076 (struct iphdr *)((uint8_t *)skb->data+14);
3077 if (IPPROTO_UDP == ip->protocol) {
3078 struct udphdr *udp =
3079 (struct udphdr *)((uint8_t *)ip +
3080 (ip->ihl << 2));
3081 if (ntohs(udp->dest) == 67) {
3082 offset = (uint8_t *)udp + 8 - skb->data;
3083 length = skb->len - offset;
3084
3085 return e1000_mng_write_dhcp_info(hw,
3086 (uint8_t *)udp + 8,
3087 length);
3088 }
3089 }
3090 }
3091 }
3092 return 0;
3093 }
3094
3095 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3096 {
3097 struct e1000_adapter *adapter = netdev_priv(netdev);
3098 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3099
3100 netif_stop_queue(netdev);
3101 /* Herbert's original patch had:
3102 * smp_mb__after_netif_stop_queue();
3103 * but since that doesn't exist yet, just open code it. */
3104 smp_mb();
3105
3106 /* We need to check again in a case another CPU has just
3107 * made room available. */
3108 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3109 return -EBUSY;
3110
3111 /* A reprieve! */
3112 netif_start_queue(netdev);
3113 ++adapter->restart_queue;
3114 return 0;
3115 }
3116
3117 static int e1000_maybe_stop_tx(struct net_device *netdev,
3118 struct e1000_tx_ring *tx_ring, int size)
3119 {
3120 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3121 return 0;
3122 return __e1000_maybe_stop_tx(netdev, size);
3123 }
3124
3125 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3126 static int
3127 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3128 {
3129 struct e1000_adapter *adapter = netdev_priv(netdev);
3130 struct e1000_tx_ring *tx_ring;
3131 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3132 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3133 unsigned int tx_flags = 0;
3134 unsigned int len = skb->len;
3135 unsigned long flags;
3136 unsigned int nr_frags = 0;
3137 unsigned int mss = 0;
3138 int count = 0;
3139 int tso;
3140 unsigned int f;
3141 len -= skb->data_len;
3142
3143 /* This goes back to the question of how to logically map a tx queue
3144 * to a flow. Right now, performance is impacted slightly negatively
3145 * if using multiple tx queues. If the stack breaks away from a
3146 * single qdisc implementation, we can look at this again. */
3147 tx_ring = adapter->tx_ring;
3148
3149 if (unlikely(skb->len <= 0)) {
3150 dev_kfree_skb_any(skb);
3151 return NETDEV_TX_OK;
3152 }
3153
3154 /* 82571 and newer doesn't need the workaround that limited descriptor
3155 * length to 4kB */
3156 if (adapter->hw.mac_type >= e1000_82571)
3157 max_per_txd = 8192;
3158
3159 #ifdef NETIF_F_TSO
3160 mss = skb_shinfo(skb)->gso_size;
3161 /* The controller does a simple calculation to
3162 * make sure there is enough room in the FIFO before
3163 * initiating the DMA for each buffer. The calc is:
3164 * 4 = ceil(buffer len/mss). To make sure we don't
3165 * overrun the FIFO, adjust the max buffer len if mss
3166 * drops. */
3167 if (mss) {
3168 uint8_t hdr_len;
3169 max_per_txd = min(mss << 2, max_per_txd);
3170 max_txd_pwr = fls(max_per_txd) - 1;
3171
3172 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3173 * points to just header, pull a few bytes of payload from
3174 * frags into skb->data */
3175 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
3176 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3177 switch (adapter->hw.mac_type) {
3178 unsigned int pull_size;
3179 case e1000_82571:
3180 case e1000_82572:
3181 case e1000_82573:
3182 case e1000_ich8lan:
3183 pull_size = min((unsigned int)4, skb->data_len);
3184 if (!__pskb_pull_tail(skb, pull_size)) {
3185 DPRINTK(DRV, ERR,
3186 "__pskb_pull_tail failed.\n");
3187 dev_kfree_skb_any(skb);
3188 return NETDEV_TX_OK;
3189 }
3190 len = skb->len - skb->data_len;
3191 break;
3192 default:
3193 /* do nothing */
3194 break;
3195 }
3196 }
3197 }
3198
3199 /* reserve a descriptor for the offload context */
3200 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3201 count++;
3202 count++;
3203 #else
3204 if (skb->ip_summed == CHECKSUM_PARTIAL)
3205 count++;
3206 #endif
3207
3208 #ifdef NETIF_F_TSO
3209 /* Controller Erratum workaround */
3210 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3211 count++;
3212 #endif
3213
3214 count += TXD_USE_COUNT(len, max_txd_pwr);
3215
3216 if (adapter->pcix_82544)
3217 count++;
3218
3219 /* work-around for errata 10 and it applies to all controllers
3220 * in PCI-X mode, so add one more descriptor to the count
3221 */
3222 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3223 (len > 2015)))
3224 count++;
3225
3226 nr_frags = skb_shinfo(skb)->nr_frags;
3227 for (f = 0; f < nr_frags; f++)
3228 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3229 max_txd_pwr);
3230 if (adapter->pcix_82544)
3231 count += nr_frags;
3232
3233
3234 if (adapter->hw.tx_pkt_filtering &&
3235 (adapter->hw.mac_type == e1000_82573))
3236 e1000_transfer_dhcp_info(adapter, skb);
3237
3238 local_irq_save(flags);
3239 if (!spin_trylock(&tx_ring->tx_lock)) {
3240 /* Collision - tell upper layer to requeue */
3241 local_irq_restore(flags);
3242 return NETDEV_TX_LOCKED;
3243 }
3244
3245 /* need: count + 2 desc gap to keep tail from touching
3246 * head, otherwise try next time */
3247 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3248 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3249 return NETDEV_TX_BUSY;
3250 }
3251
3252 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3253 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3254 netif_stop_queue(netdev);
3255 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3256 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3257 return NETDEV_TX_BUSY;
3258 }
3259 }
3260
3261 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3262 tx_flags |= E1000_TX_FLAGS_VLAN;
3263 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3264 }
3265
3266 first = tx_ring->next_to_use;
3267
3268 tso = e1000_tso(adapter, tx_ring, skb);
3269 if (tso < 0) {
3270 dev_kfree_skb_any(skb);
3271 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3272 return NETDEV_TX_OK;
3273 }
3274
3275 if (likely(tso)) {
3276 tx_ring->last_tx_tso = 1;
3277 tx_flags |= E1000_TX_FLAGS_TSO;
3278 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3279 tx_flags |= E1000_TX_FLAGS_CSUM;
3280
3281 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3282 * 82571 hardware supports TSO capabilities for IPv6 as well...
3283 * no longer assume, we must. */
3284 if (likely(skb->protocol == htons(ETH_P_IP)))
3285 tx_flags |= E1000_TX_FLAGS_IPV4;
3286
3287 e1000_tx_queue(adapter, tx_ring, tx_flags,
3288 e1000_tx_map(adapter, tx_ring, skb, first,
3289 max_per_txd, nr_frags, mss));
3290
3291 netdev->trans_start = jiffies;
3292
3293 /* Make sure there is space in the ring for the next send. */
3294 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3295
3296 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3297 return NETDEV_TX_OK;
3298 }
3299
3300 /**
3301 * e1000_tx_timeout - Respond to a Tx Hang
3302 * @netdev: network interface device structure
3303 **/
3304
3305 static void
3306 e1000_tx_timeout(struct net_device *netdev)
3307 {
3308 struct e1000_adapter *adapter = netdev_priv(netdev);
3309
3310 /* Do the reset outside of interrupt context */
3311 adapter->tx_timeout_count++;
3312 schedule_work(&adapter->reset_task);
3313 }
3314
3315 static void
3316 e1000_reset_task(struct work_struct *work)
3317 {
3318 struct e1000_adapter *adapter =
3319 container_of(work, struct e1000_adapter, reset_task);
3320
3321 e1000_reinit_locked(adapter);
3322 }
3323
3324 /**
3325 * e1000_get_stats - Get System Network Statistics
3326 * @netdev: network interface device structure
3327 *
3328 * Returns the address of the device statistics structure.
3329 * The statistics are actually updated from the timer callback.
3330 **/
3331
3332 static struct net_device_stats *
3333 e1000_get_stats(struct net_device *netdev)
3334 {
3335 struct e1000_adapter *adapter = netdev_priv(netdev);
3336
3337 /* only return the current stats */
3338 return &adapter->net_stats;
3339 }
3340
3341 /**
3342 * e1000_change_mtu - Change the Maximum Transfer Unit
3343 * @netdev: network interface device structure
3344 * @new_mtu: new value for maximum frame size
3345 *
3346 * Returns 0 on success, negative on failure
3347 **/
3348
3349 static int
3350 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3351 {
3352 struct e1000_adapter *adapter = netdev_priv(netdev);
3353 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3354 uint16_t eeprom_data = 0;
3355
3356 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3357 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3358 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3359 return -EINVAL;
3360 }
3361
3362 /* Adapter-specific max frame size limits. */
3363 switch (adapter->hw.mac_type) {
3364 case e1000_undefined ... e1000_82542_rev2_1:
3365 case e1000_ich8lan:
3366 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3367 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3368 return -EINVAL;
3369 }
3370 break;
3371 case e1000_82573:
3372 /* Jumbo Frames not supported if:
3373 * - this is not an 82573L device
3374 * - ASPM is enabled in any way (0x1A bits 3:2) */
3375 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3376 &eeprom_data);
3377 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3378 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3379 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3380 DPRINTK(PROBE, ERR,
3381 "Jumbo Frames not supported.\n");
3382 return -EINVAL;
3383 }
3384 break;
3385 }
3386 /* ERT will be enabled later to enable wire speed receives */
3387
3388 /* fall through to get support */
3389 case e1000_82571:
3390 case e1000_82572:
3391 case e1000_80003es2lan:
3392 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3393 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3394 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3395 return -EINVAL;
3396 }
3397 break;
3398 default:
3399 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3400 break;
3401 }
3402
3403 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3404 * means we reserve 2 more, this pushes us to allocate from the next
3405 * larger slab size
3406 * i.e. RXBUFFER_2048 --> size-4096 slab */
3407
3408 if (max_frame <= E1000_RXBUFFER_256)
3409 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3410 else if (max_frame <= E1000_RXBUFFER_512)
3411 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3412 else if (max_frame <= E1000_RXBUFFER_1024)
3413 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3414 else if (max_frame <= E1000_RXBUFFER_2048)
3415 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3416 else if (max_frame <= E1000_RXBUFFER_4096)
3417 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3418 else if (max_frame <= E1000_RXBUFFER_8192)
3419 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3420 else if (max_frame <= E1000_RXBUFFER_16384)
3421 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3422
3423 /* adjust allocation if LPE protects us, and we aren't using SBP */
3424 if (!adapter->hw.tbi_compatibility_on &&
3425 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3426 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3427 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3428
3429 netdev->mtu = new_mtu;
3430
3431 if (netif_running(netdev))
3432 e1000_reinit_locked(adapter);
3433
3434 adapter->hw.max_frame_size = max_frame;
3435
3436 return 0;
3437 }
3438
3439 /**
3440 * e1000_update_stats - Update the board statistics counters
3441 * @adapter: board private structure
3442 **/
3443
3444 void
3445 e1000_update_stats(struct e1000_adapter *adapter)
3446 {
3447 struct e1000_hw *hw = &adapter->hw;
3448 struct pci_dev *pdev = adapter->pdev;
3449 unsigned long flags;
3450 uint16_t phy_tmp;
3451
3452 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3453
3454 /*
3455 * Prevent stats update while adapter is being reset, or if the pci
3456 * connection is down.
3457 */
3458 if (adapter->link_speed == 0)
3459 return;
3460 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
3461 return;
3462
3463 spin_lock_irqsave(&adapter->stats_lock, flags);
3464
3465 /* these counters are modified from e1000_adjust_tbi_stats,
3466 * called from the interrupt context, so they must only
3467 * be written while holding adapter->stats_lock
3468 */
3469
3470 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3471 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3472 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3473 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3474 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3475 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3476 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3477
3478 if (adapter->hw.mac_type != e1000_ich8lan) {
3479 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3480 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3481 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3482 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3483 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3484 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3485 }
3486
3487 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3488 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3489 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3490 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3491 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3492 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3493 adapter->stats.dc += E1000_READ_REG(hw, DC);
3494 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3495 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3496 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3497 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3498 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3499 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3500 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3501 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3502 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3503 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3504 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3505 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3506 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3507 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3508 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3509 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3510 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3511 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3512 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3513
3514 if (adapter->hw.mac_type != e1000_ich8lan) {
3515 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3516 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3517 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3518 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3519 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3520 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3521 }
3522
3523 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3524 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3525
3526 /* used for adaptive IFS */
3527
3528 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3529 adapter->stats.tpt += hw->tx_packet_delta;
3530 hw->collision_delta = E1000_READ_REG(hw, COLC);
3531 adapter->stats.colc += hw->collision_delta;
3532
3533 if (hw->mac_type >= e1000_82543) {
3534 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3535 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3536 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3537 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3538 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3539 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3540 }
3541 if (hw->mac_type > e1000_82547_rev_2) {
3542 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3543 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3544
3545 if (adapter->hw.mac_type != e1000_ich8lan) {
3546 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3547 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3548 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3549 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3550 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3551 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3552 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3553 }
3554 }
3555
3556 /* Fill out the OS statistics structure */
3557 adapter->net_stats.rx_packets = adapter->stats.gprc;
3558 adapter->net_stats.tx_packets = adapter->stats.gptc;
3559 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3560 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3561 adapter->net_stats.multicast = adapter->stats.mprc;
3562 adapter->net_stats.collisions = adapter->stats.colc;
3563
3564 /* Rx Errors */
3565
3566 /* RLEC on some newer hardware can be incorrect so build
3567 * our own version based on RUC and ROC */
3568 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3569 adapter->stats.crcerrs + adapter->stats.algnerrc +
3570 adapter->stats.ruc + adapter->stats.roc +
3571 adapter->stats.cexterr;
3572 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3573 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3574 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3575 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3576 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3577
3578 /* Tx Errors */
3579 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3580 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3581 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3582 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3583 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3584
3585 /* Tx Dropped needs to be maintained elsewhere */
3586
3587 /* Phy Stats */
3588 if (hw->media_type == e1000_media_type_copper) {
3589 if ((adapter->link_speed == SPEED_1000) &&
3590 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3591 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3592 adapter->phy_stats.idle_errors += phy_tmp;
3593 }
3594
3595 if ((hw->mac_type <= e1000_82546) &&
3596 (hw->phy_type == e1000_phy_m88) &&
3597 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3598 adapter->phy_stats.receive_errors += phy_tmp;
3599 }
3600
3601 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3602 }
3603 #ifdef CONFIG_PCI_MSI
3604
3605 /**
3606 * e1000_intr_msi - Interrupt Handler
3607 * @irq: interrupt number
3608 * @data: pointer to a network interface device structure
3609 **/
3610
3611 static
3612 irqreturn_t e1000_intr_msi(int irq, void *data)
3613 {
3614 struct net_device *netdev = data;
3615 struct e1000_adapter *adapter = netdev_priv(netdev);
3616 struct e1000_hw *hw = &adapter->hw;
3617 #ifndef CONFIG_E1000_NAPI
3618 int i;
3619 #endif
3620
3621 /* this code avoids the read of ICR but has to get 1000 interrupts
3622 * at every link change event before it will notice the change */
3623 if (++adapter->detect_link >= 1000) {
3624 uint32_t icr = E1000_READ_REG(hw, ICR);
3625 #ifdef CONFIG_E1000_NAPI
3626 /* read ICR disables interrupts using IAM, so keep up with our
3627 * enable/disable accounting */
3628 atomic_inc(&adapter->irq_sem);
3629 #endif
3630 adapter->detect_link = 0;
3631 if ((icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) &&
3632 (icr & E1000_ICR_INT_ASSERTED)) {
3633 hw->get_link_status = 1;
3634 /* 80003ES2LAN workaround--
3635 * For packet buffer work-around on link down event;
3636 * disable receives here in the ISR and
3637 * reset adapter in watchdog
3638 */
3639 if (netif_carrier_ok(netdev) &&
3640 (adapter->hw.mac_type == e1000_80003es2lan)) {
3641 /* disable receives */
3642 uint32_t rctl = E1000_READ_REG(hw, RCTL);
3643 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3644 }
3645 /* guard against interrupt when we're going down */
3646 if (!test_bit(__E1000_DOWN, &adapter->flags))
3647 mod_timer(&adapter->watchdog_timer,
3648 jiffies + 1);
3649 }
3650 } else {
3651 E1000_WRITE_REG(hw, ICR, (0xffffffff & ~(E1000_ICR_RXSEQ |
3652 E1000_ICR_LSC)));
3653 /* bummer we have to flush here, but things break otherwise as
3654 * some event appears to be lost or delayed and throughput
3655 * drops. In almost all tests this flush is un-necessary */
3656 E1000_WRITE_FLUSH(hw);
3657 #ifdef CONFIG_E1000_NAPI
3658 /* Interrupt Auto-Mask (IAM)...upon writing ICR, interrupts are
3659 * masked. No need for the IMC write, but it does mean we
3660 * should account for it ASAP. */
3661 atomic_inc(&adapter->irq_sem);
3662 #endif
3663 }
3664
3665 #ifdef CONFIG_E1000_NAPI
3666 if (likely(netif_rx_schedule_prep(netdev))) {
3667 adapter->total_tx_bytes = 0;
3668 adapter->total_tx_packets = 0;
3669 adapter->total_rx_bytes = 0;
3670 adapter->total_rx_packets = 0;
3671 __netif_rx_schedule(netdev);
3672 } else
3673 e1000_irq_enable(adapter);
3674 #else
3675 adapter->total_tx_bytes = 0;
3676 adapter->total_rx_bytes = 0;
3677 adapter->total_tx_packets = 0;
3678 adapter->total_rx_packets = 0;
3679
3680 for (i = 0; i < E1000_MAX_INTR; i++)
3681 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3682 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3683 break;
3684
3685 if (likely(adapter->itr_setting & 3))
3686 e1000_set_itr(adapter);
3687 #endif
3688
3689 return IRQ_HANDLED;
3690 }
3691 #endif
3692
3693 /**
3694 * e1000_intr - Interrupt Handler
3695 * @irq: interrupt number
3696 * @data: pointer to a network interface device structure
3697 **/
3698
3699 static irqreturn_t
3700 e1000_intr(int irq, void *data)
3701 {
3702 struct net_device *netdev = data;
3703 struct e1000_adapter *adapter = netdev_priv(netdev);
3704 struct e1000_hw *hw = &adapter->hw;
3705 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3706 #ifndef CONFIG_E1000_NAPI
3707 int i;
3708 #endif
3709 if (unlikely(!icr))
3710 return IRQ_NONE; /* Not our interrupt */
3711
3712 #ifdef CONFIG_E1000_NAPI
3713 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3714 * not set, then the adapter didn't send an interrupt */
3715 if (unlikely(hw->mac_type >= e1000_82571 &&
3716 !(icr & E1000_ICR_INT_ASSERTED)))
3717 return IRQ_NONE;
3718
3719 /* Interrupt Auto-Mask...upon reading ICR,
3720 * interrupts are masked. No need for the
3721 * IMC write, but it does mean we should
3722 * account for it ASAP. */
3723 if (likely(hw->mac_type >= e1000_82571))
3724 atomic_inc(&adapter->irq_sem);
3725 #endif
3726
3727 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3728 hw->get_link_status = 1;
3729 /* 80003ES2LAN workaround--
3730 * For packet buffer work-around on link down event;
3731 * disable receives here in the ISR and
3732 * reset adapter in watchdog
3733 */
3734 if (netif_carrier_ok(netdev) &&
3735 (adapter->hw.mac_type == e1000_80003es2lan)) {
3736 /* disable receives */
3737 rctl = E1000_READ_REG(hw, RCTL);
3738 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3739 }
3740 /* guard against interrupt when we're going down */
3741 if (!test_bit(__E1000_DOWN, &adapter->flags))
3742 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3743 }
3744
3745 #ifdef CONFIG_E1000_NAPI
3746 if (unlikely(hw->mac_type < e1000_82571)) {
3747 /* disable interrupts, without the synchronize_irq bit */
3748 atomic_inc(&adapter->irq_sem);
3749 E1000_WRITE_REG(hw, IMC, ~0);
3750 E1000_WRITE_FLUSH(hw);
3751 }
3752 if (likely(netif_rx_schedule_prep(netdev))) {
3753 adapter->total_tx_bytes = 0;
3754 adapter->total_tx_packets = 0;
3755 adapter->total_rx_bytes = 0;
3756 adapter->total_rx_packets = 0;
3757 __netif_rx_schedule(netdev);
3758 } else
3759 /* this really should not happen! if it does it is basically a
3760 * bug, but not a hard error, so enable ints and continue */
3761 e1000_irq_enable(adapter);
3762 #else
3763 /* Writing IMC and IMS is needed for 82547.
3764 * Due to Hub Link bus being occupied, an interrupt
3765 * de-assertion message is not able to be sent.
3766 * When an interrupt assertion message is generated later,
3767 * two messages are re-ordered and sent out.
3768 * That causes APIC to think 82547 is in de-assertion
3769 * state, while 82547 is in assertion state, resulting
3770 * in dead lock. Writing IMC forces 82547 into
3771 * de-assertion state.
3772 */
3773 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3774 atomic_inc(&adapter->irq_sem);
3775 E1000_WRITE_REG(hw, IMC, ~0);
3776 }
3777
3778 adapter->total_tx_bytes = 0;
3779 adapter->total_rx_bytes = 0;
3780 adapter->total_tx_packets = 0;
3781 adapter->total_rx_packets = 0;
3782
3783 for (i = 0; i < E1000_MAX_INTR; i++)
3784 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3785 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3786 break;
3787
3788 if (likely(adapter->itr_setting & 3))
3789 e1000_set_itr(adapter);
3790
3791 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3792 e1000_irq_enable(adapter);
3793
3794 #endif
3795 return IRQ_HANDLED;
3796 }
3797
3798 #ifdef CONFIG_E1000_NAPI
3799 /**
3800 * e1000_clean - NAPI Rx polling callback
3801 * @adapter: board private structure
3802 **/
3803
3804 static int
3805 e1000_clean(struct net_device *poll_dev, int *budget)
3806 {
3807 struct e1000_adapter *adapter;
3808 int work_to_do = min(*budget, poll_dev->quota);
3809 int tx_cleaned = 0, work_done = 0;
3810
3811 /* Must NOT use netdev_priv macro here. */
3812 adapter = poll_dev->priv;
3813
3814 /* Keep link state information with original netdev */
3815 if (!netif_carrier_ok(poll_dev))
3816 goto quit_polling;
3817
3818 /* e1000_clean is called per-cpu. This lock protects
3819 * tx_ring[0] from being cleaned by multiple cpus
3820 * simultaneously. A failure obtaining the lock means
3821 * tx_ring[0] is currently being cleaned anyway. */
3822 if (spin_trylock(&adapter->tx_queue_lock)) {
3823 tx_cleaned = e1000_clean_tx_irq(adapter,
3824 &adapter->tx_ring[0]);
3825 spin_unlock(&adapter->tx_queue_lock);
3826 }
3827
3828 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3829 &work_done, work_to_do);
3830
3831 *budget -= work_done;
3832 poll_dev->quota -= work_done;
3833
3834 /* If no Tx and not enough Rx work done, exit the polling mode */
3835 if ((!tx_cleaned && (work_done == 0)) ||
3836 !netif_running(poll_dev)) {
3837 quit_polling:
3838 if (likely(adapter->itr_setting & 3))
3839 e1000_set_itr(adapter);
3840 netif_rx_complete(poll_dev);
3841 e1000_irq_enable(adapter);
3842 return 0;
3843 }
3844
3845 return 1;
3846 }
3847
3848 #endif
3849 /**
3850 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3851 * @adapter: board private structure
3852 **/
3853
3854 static boolean_t
3855 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3856 struct e1000_tx_ring *tx_ring)
3857 {
3858 struct net_device *netdev = adapter->netdev;
3859 struct e1000_tx_desc *tx_desc, *eop_desc;
3860 struct e1000_buffer *buffer_info;
3861 unsigned int i, eop;
3862 #ifdef CONFIG_E1000_NAPI
3863 unsigned int count = 0;
3864 #endif
3865 boolean_t cleaned = FALSE;
3866 unsigned int total_tx_bytes=0, total_tx_packets=0;
3867
3868 i = tx_ring->next_to_clean;
3869 eop = tx_ring->buffer_info[i].next_to_watch;
3870 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3871
3872 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3873 for (cleaned = FALSE; !cleaned; ) {
3874 tx_desc = E1000_TX_DESC(*tx_ring, i);
3875 buffer_info = &tx_ring->buffer_info[i];
3876 cleaned = (i == eop);
3877
3878 if (cleaned) {
3879 struct sk_buff *skb = buffer_info->skb;
3880 unsigned int segs = skb_shinfo(skb)->gso_segs;
3881 total_tx_packets += segs;
3882 total_tx_packets++;
3883 total_tx_bytes += skb->len;
3884 }
3885 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
3886 tx_desc->upper.data = 0;
3887
3888 if (unlikely(++i == tx_ring->count)) i = 0;
3889 }
3890
3891 eop = tx_ring->buffer_info[i].next_to_watch;
3892 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3893 #ifdef CONFIG_E1000_NAPI
3894 #define E1000_TX_WEIGHT 64
3895 /* weight of a sort for tx, to avoid endless transmit cleanup */
3896 if (count++ == E1000_TX_WEIGHT) break;
3897 #endif
3898 }
3899
3900 tx_ring->next_to_clean = i;
3901
3902 #define TX_WAKE_THRESHOLD 32
3903 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
3904 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3905 /* Make sure that anybody stopping the queue after this
3906 * sees the new next_to_clean.
3907 */
3908 smp_mb();
3909 if (netif_queue_stopped(netdev)) {
3910 netif_wake_queue(netdev);
3911 ++adapter->restart_queue;
3912 }
3913 }
3914
3915 if (adapter->detect_tx_hung) {
3916 /* Detect a transmit hang in hardware, this serializes the
3917 * check with the clearing of time_stamp and movement of i */
3918 adapter->detect_tx_hung = FALSE;
3919 if (tx_ring->buffer_info[eop].dma &&
3920 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
3921 (adapter->tx_timeout_factor * HZ))
3922 && !(E1000_READ_REG(&adapter->hw, STATUS) &
3923 E1000_STATUS_TXOFF)) {
3924
3925 /* detected Tx unit hang */
3926 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
3927 " Tx Queue <%lu>\n"
3928 " TDH <%x>\n"
3929 " TDT <%x>\n"
3930 " next_to_use <%x>\n"
3931 " next_to_clean <%x>\n"
3932 "buffer_info[next_to_clean]\n"
3933 " time_stamp <%lx>\n"
3934 " next_to_watch <%x>\n"
3935 " jiffies <%lx>\n"
3936 " next_to_watch.status <%x>\n",
3937 (unsigned long)((tx_ring - adapter->tx_ring) /
3938 sizeof(struct e1000_tx_ring)),
3939 readl(adapter->hw.hw_addr + tx_ring->tdh),
3940 readl(adapter->hw.hw_addr + tx_ring->tdt),
3941 tx_ring->next_to_use,
3942 tx_ring->next_to_clean,
3943 tx_ring->buffer_info[eop].time_stamp,
3944 eop,
3945 jiffies,
3946 eop_desc->upper.fields.status);
3947 netif_stop_queue(netdev);
3948 }
3949 }
3950 adapter->total_tx_bytes += total_tx_bytes;
3951 adapter->total_tx_packets += total_tx_packets;
3952 return cleaned;
3953 }
3954
3955 /**
3956 * e1000_rx_checksum - Receive Checksum Offload for 82543
3957 * @adapter: board private structure
3958 * @status_err: receive descriptor status and error fields
3959 * @csum: receive descriptor csum field
3960 * @sk_buff: socket buffer with received data
3961 **/
3962
3963 static void
3964 e1000_rx_checksum(struct e1000_adapter *adapter,
3965 uint32_t status_err, uint32_t csum,
3966 struct sk_buff *skb)
3967 {
3968 uint16_t status = (uint16_t)status_err;
3969 uint8_t errors = (uint8_t)(status_err >> 24);
3970 skb->ip_summed = CHECKSUM_NONE;
3971
3972 /* 82543 or newer only */
3973 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
3974 /* Ignore Checksum bit is set */
3975 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
3976 /* TCP/UDP checksum error bit is set */
3977 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
3978 /* let the stack verify checksum errors */
3979 adapter->hw_csum_err++;
3980 return;
3981 }
3982 /* TCP/UDP Checksum has not been calculated */
3983 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3984 if (!(status & E1000_RXD_STAT_TCPCS))
3985 return;
3986 } else {
3987 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
3988 return;
3989 }
3990 /* It must be a TCP or UDP packet with a valid checksum */
3991 if (likely(status & E1000_RXD_STAT_TCPCS)) {
3992 /* TCP checksum is good */
3993 skb->ip_summed = CHECKSUM_UNNECESSARY;
3994 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3995 /* IP fragment with UDP payload */
3996 /* Hardware complements the payload checksum, so we undo it
3997 * and then put the value in host order for further stack use.
3998 */
3999 csum = ntohl(csum ^ 0xFFFF);
4000 skb->csum = csum;
4001 skb->ip_summed = CHECKSUM_COMPLETE;
4002 }
4003 adapter->hw_csum_good++;
4004 }
4005
4006 /**
4007 * e1000_clean_rx_irq - Send received data up the network stack; legacy
4008 * @adapter: board private structure
4009 **/
4010
4011 static boolean_t
4012 #ifdef CONFIG_E1000_NAPI
4013 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4014 struct e1000_rx_ring *rx_ring,
4015 int *work_done, int work_to_do)
4016 #else
4017 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4018 struct e1000_rx_ring *rx_ring)
4019 #endif
4020 {
4021 struct net_device *netdev = adapter->netdev;
4022 struct pci_dev *pdev = adapter->pdev;
4023 struct e1000_rx_desc *rx_desc, *next_rxd;
4024 struct e1000_buffer *buffer_info, *next_buffer;
4025 unsigned long flags;
4026 uint32_t length;
4027 uint8_t last_byte;
4028 unsigned int i;
4029 int cleaned_count = 0;
4030 boolean_t cleaned = FALSE;
4031 unsigned int total_rx_bytes=0, total_rx_packets=0;
4032
4033 i = rx_ring->next_to_clean;
4034 rx_desc = E1000_RX_DESC(*rx_ring, i);
4035 buffer_info = &rx_ring->buffer_info[i];
4036
4037 while (rx_desc->status & E1000_RXD_STAT_DD) {
4038 struct sk_buff *skb;
4039 u8 status;
4040
4041 #ifdef CONFIG_E1000_NAPI
4042 if (*work_done >= work_to_do)
4043 break;
4044 (*work_done)++;
4045 #endif
4046 status = rx_desc->status;
4047 skb = buffer_info->skb;
4048 buffer_info->skb = NULL;
4049
4050 prefetch(skb->data - NET_IP_ALIGN);
4051
4052 if (++i == rx_ring->count) i = 0;
4053 next_rxd = E1000_RX_DESC(*rx_ring, i);
4054 prefetch(next_rxd);
4055
4056 next_buffer = &rx_ring->buffer_info[i];
4057
4058 cleaned = TRUE;
4059 cleaned_count++;
4060 pci_unmap_single(pdev,
4061 buffer_info->dma,
4062 buffer_info->length,
4063 PCI_DMA_FROMDEVICE);
4064
4065 length = le16_to_cpu(rx_desc->length);
4066
4067 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4068 /* All receives must fit into a single buffer */
4069 E1000_DBG("%s: Receive packet consumed multiple"
4070 " buffers\n", netdev->name);
4071 /* recycle */
4072 buffer_info->skb = skb;
4073 goto next_desc;
4074 }
4075
4076 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4077 last_byte = *(skb->data + length - 1);
4078 if (TBI_ACCEPT(&adapter->hw, status,
4079 rx_desc->errors, length, last_byte)) {
4080 spin_lock_irqsave(&adapter->stats_lock, flags);
4081 e1000_tbi_adjust_stats(&adapter->hw,
4082 &adapter->stats,
4083 length, skb->data);
4084 spin_unlock_irqrestore(&adapter->stats_lock,
4085 flags);
4086 length--;
4087 } else {
4088 /* recycle */
4089 buffer_info->skb = skb;
4090 goto next_desc;
4091 }
4092 }
4093
4094 /* adjust length to remove Ethernet CRC, this must be
4095 * done after the TBI_ACCEPT workaround above */
4096 length -= 4;
4097
4098 /* probably a little skewed due to removing CRC */
4099 total_rx_bytes += length;
4100 total_rx_packets++;
4101
4102 /* code added for copybreak, this should improve
4103 * performance for small packets with large amounts
4104 * of reassembly being done in the stack */
4105 #define E1000_CB_LENGTH 256
4106 if (length < E1000_CB_LENGTH) {
4107 struct sk_buff *new_skb =
4108 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4109 if (new_skb) {
4110 skb_reserve(new_skb, NET_IP_ALIGN);
4111 memcpy(new_skb->data - NET_IP_ALIGN,
4112 skb->data - NET_IP_ALIGN,
4113 length + NET_IP_ALIGN);
4114 /* save the skb in buffer_info as good */
4115 buffer_info->skb = skb;
4116 skb = new_skb;
4117 }
4118 /* else just continue with the old one */
4119 }
4120 /* end copybreak code */
4121 skb_put(skb, length);
4122
4123 /* Receive Checksum Offload */
4124 e1000_rx_checksum(adapter,
4125 (uint32_t)(status) |
4126 ((uint32_t)(rx_desc->errors) << 24),
4127 le16_to_cpu(rx_desc->csum), skb);
4128
4129 skb->protocol = eth_type_trans(skb, netdev);
4130 #ifdef CONFIG_E1000_NAPI
4131 if (unlikely(adapter->vlgrp &&
4132 (status & E1000_RXD_STAT_VP))) {
4133 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4134 le16_to_cpu(rx_desc->special) &
4135 E1000_RXD_SPC_VLAN_MASK);
4136 } else {
4137 netif_receive_skb(skb);
4138 }
4139 #else /* CONFIG_E1000_NAPI */
4140 if (unlikely(adapter->vlgrp &&
4141 (status & E1000_RXD_STAT_VP))) {
4142 vlan_hwaccel_rx(skb, adapter->vlgrp,
4143 le16_to_cpu(rx_desc->special) &
4144 E1000_RXD_SPC_VLAN_MASK);
4145 } else {
4146 netif_rx(skb);
4147 }
4148 #endif /* CONFIG_E1000_NAPI */
4149 netdev->last_rx = jiffies;
4150
4151 next_desc:
4152 rx_desc->status = 0;
4153
4154 /* return some buffers to hardware, one at a time is too slow */
4155 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4156 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4157 cleaned_count = 0;
4158 }
4159
4160 /* use prefetched values */
4161 rx_desc = next_rxd;
4162 buffer_info = next_buffer;
4163 }
4164 rx_ring->next_to_clean = i;
4165
4166 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4167 if (cleaned_count)
4168 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4169
4170 adapter->total_rx_packets += total_rx_packets;
4171 adapter->total_rx_bytes += total_rx_bytes;
4172 return cleaned;
4173 }
4174
4175 /**
4176 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4177 * @adapter: board private structure
4178 **/
4179
4180 static boolean_t
4181 #ifdef CONFIG_E1000_NAPI
4182 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4183 struct e1000_rx_ring *rx_ring,
4184 int *work_done, int work_to_do)
4185 #else
4186 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4187 struct e1000_rx_ring *rx_ring)
4188 #endif
4189 {
4190 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
4191 struct net_device *netdev = adapter->netdev;
4192 struct pci_dev *pdev = adapter->pdev;
4193 struct e1000_buffer *buffer_info, *next_buffer;
4194 struct e1000_ps_page *ps_page;
4195 struct e1000_ps_page_dma *ps_page_dma;
4196 struct sk_buff *skb;
4197 unsigned int i, j;
4198 uint32_t length, staterr;
4199 int cleaned_count = 0;
4200 boolean_t cleaned = FALSE;
4201 unsigned int total_rx_bytes=0, total_rx_packets=0;
4202
4203 i = rx_ring->next_to_clean;
4204 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4205 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4206 buffer_info = &rx_ring->buffer_info[i];
4207
4208 while (staterr & E1000_RXD_STAT_DD) {
4209 ps_page = &rx_ring->ps_page[i];
4210 ps_page_dma = &rx_ring->ps_page_dma[i];
4211 #ifdef CONFIG_E1000_NAPI
4212 if (unlikely(*work_done >= work_to_do))
4213 break;
4214 (*work_done)++;
4215 #endif
4216 skb = buffer_info->skb;
4217
4218 /* in the packet split case this is header only */
4219 prefetch(skb->data - NET_IP_ALIGN);
4220
4221 if (++i == rx_ring->count) i = 0;
4222 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
4223 prefetch(next_rxd);
4224
4225 next_buffer = &rx_ring->buffer_info[i];
4226
4227 cleaned = TRUE;
4228 cleaned_count++;
4229 pci_unmap_single(pdev, buffer_info->dma,
4230 buffer_info->length,
4231 PCI_DMA_FROMDEVICE);
4232
4233 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
4234 E1000_DBG("%s: Packet Split buffers didn't pick up"
4235 " the full packet\n", netdev->name);
4236 dev_kfree_skb_irq(skb);
4237 goto next_desc;
4238 }
4239
4240 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
4241 dev_kfree_skb_irq(skb);
4242 goto next_desc;
4243 }
4244
4245 length = le16_to_cpu(rx_desc->wb.middle.length0);
4246
4247 if (unlikely(!length)) {
4248 E1000_DBG("%s: Last part of the packet spanning"
4249 " multiple descriptors\n", netdev->name);
4250 dev_kfree_skb_irq(skb);
4251 goto next_desc;
4252 }
4253
4254 /* Good Receive */
4255 skb_put(skb, length);
4256
4257 {
4258 /* this looks ugly, but it seems compiler issues make it
4259 more efficient than reusing j */
4260 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4261
4262 /* page alloc/put takes too long and effects small packet
4263 * throughput, so unsplit small packets and save the alloc/put*/
4264 if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
4265 u8 *vaddr;
4266 /* there is no documentation about how to call
4267 * kmap_atomic, so we can't hold the mapping
4268 * very long */
4269 pci_dma_sync_single_for_cpu(pdev,
4270 ps_page_dma->ps_page_dma[0],
4271 PAGE_SIZE,
4272 PCI_DMA_FROMDEVICE);
4273 vaddr = kmap_atomic(ps_page->ps_page[0],
4274 KM_SKB_DATA_SOFTIRQ);
4275 memcpy(skb->tail, vaddr, l1);
4276 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4277 pci_dma_sync_single_for_device(pdev,
4278 ps_page_dma->ps_page_dma[0],
4279 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4280 /* remove the CRC */
4281 l1 -= 4;
4282 skb_put(skb, l1);
4283 goto copydone;
4284 } /* if */
4285 }
4286
4287 for (j = 0; j < adapter->rx_ps_pages; j++) {
4288 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
4289 break;
4290 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4291 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4292 ps_page_dma->ps_page_dma[j] = 0;
4293 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4294 length);
4295 ps_page->ps_page[j] = NULL;
4296 skb->len += length;
4297 skb->data_len += length;
4298 skb->truesize += length;
4299 }
4300
4301 /* strip the ethernet crc, problem is we're using pages now so
4302 * this whole operation can get a little cpu intensive */
4303 pskb_trim(skb, skb->len - 4);
4304
4305 copydone:
4306 total_rx_bytes += skb->len;
4307 total_rx_packets++;
4308
4309 e1000_rx_checksum(adapter, staterr,
4310 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4311 skb->protocol = eth_type_trans(skb, netdev);
4312
4313 if (likely(rx_desc->wb.upper.header_status &
4314 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4315 adapter->rx_hdr_split++;
4316 #ifdef CONFIG_E1000_NAPI
4317 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4318 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4319 le16_to_cpu(rx_desc->wb.middle.vlan) &
4320 E1000_RXD_SPC_VLAN_MASK);
4321 } else {
4322 netif_receive_skb(skb);
4323 }
4324 #else /* CONFIG_E1000_NAPI */
4325 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4326 vlan_hwaccel_rx(skb, adapter->vlgrp,
4327 le16_to_cpu(rx_desc->wb.middle.vlan) &
4328 E1000_RXD_SPC_VLAN_MASK);
4329 } else {
4330 netif_rx(skb);
4331 }
4332 #endif /* CONFIG_E1000_NAPI */
4333 netdev->last_rx = jiffies;
4334
4335 next_desc:
4336 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4337 buffer_info->skb = NULL;
4338
4339 /* return some buffers to hardware, one at a time is too slow */
4340 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4341 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4342 cleaned_count = 0;
4343 }
4344
4345 /* use prefetched values */
4346 rx_desc = next_rxd;
4347 buffer_info = next_buffer;
4348
4349 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4350 }
4351 rx_ring->next_to_clean = i;
4352
4353 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4354 if (cleaned_count)
4355 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4356
4357 adapter->total_rx_packets += total_rx_packets;
4358 adapter->total_rx_bytes += total_rx_bytes;
4359 return cleaned;
4360 }
4361
4362 /**
4363 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4364 * @adapter: address of board private structure
4365 **/
4366
4367 static void
4368 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4369 struct e1000_rx_ring *rx_ring,
4370 int cleaned_count)
4371 {
4372 struct net_device *netdev = adapter->netdev;
4373 struct pci_dev *pdev = adapter->pdev;
4374 struct e1000_rx_desc *rx_desc;
4375 struct e1000_buffer *buffer_info;
4376 struct sk_buff *skb;
4377 unsigned int i;
4378 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4379
4380 i = rx_ring->next_to_use;
4381 buffer_info = &rx_ring->buffer_info[i];
4382
4383 while (cleaned_count--) {
4384 skb = buffer_info->skb;
4385 if (skb) {
4386 skb_trim(skb, 0);
4387 goto map_skb;
4388 }
4389
4390 skb = netdev_alloc_skb(netdev, bufsz);
4391 if (unlikely(!skb)) {
4392 /* Better luck next round */
4393 adapter->alloc_rx_buff_failed++;
4394 break;
4395 }
4396
4397 /* Fix for errata 23, can't cross 64kB boundary */
4398 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4399 struct sk_buff *oldskb = skb;
4400 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4401 "at %p\n", bufsz, skb->data);
4402 /* Try again, without freeing the previous */
4403 skb = netdev_alloc_skb(netdev, bufsz);
4404 /* Failed allocation, critical failure */
4405 if (!skb) {
4406 dev_kfree_skb(oldskb);
4407 break;
4408 }
4409
4410 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4411 /* give up */
4412 dev_kfree_skb(skb);
4413 dev_kfree_skb(oldskb);
4414 break; /* while !buffer_info->skb */
4415 }
4416
4417 /* Use new allocation */
4418 dev_kfree_skb(oldskb);
4419 }
4420 /* Make buffer alignment 2 beyond a 16 byte boundary
4421 * this will result in a 16 byte aligned IP header after
4422 * the 14 byte MAC header is removed
4423 */
4424 skb_reserve(skb, NET_IP_ALIGN);
4425
4426 buffer_info->skb = skb;
4427 buffer_info->length = adapter->rx_buffer_len;
4428 map_skb:
4429 buffer_info->dma = pci_map_single(pdev,
4430 skb->data,
4431 adapter->rx_buffer_len,
4432 PCI_DMA_FROMDEVICE);
4433
4434 /* Fix for errata 23, can't cross 64kB boundary */
4435 if (!e1000_check_64k_bound(adapter,
4436 (void *)(unsigned long)buffer_info->dma,
4437 adapter->rx_buffer_len)) {
4438 DPRINTK(RX_ERR, ERR,
4439 "dma align check failed: %u bytes at %p\n",
4440 adapter->rx_buffer_len,
4441 (void *)(unsigned long)buffer_info->dma);
4442 dev_kfree_skb(skb);
4443 buffer_info->skb = NULL;
4444
4445 pci_unmap_single(pdev, buffer_info->dma,
4446 adapter->rx_buffer_len,
4447 PCI_DMA_FROMDEVICE);
4448
4449 break; /* while !buffer_info->skb */
4450 }
4451 rx_desc = E1000_RX_DESC(*rx_ring, i);
4452 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4453
4454 if (unlikely(++i == rx_ring->count))
4455 i = 0;
4456 buffer_info = &rx_ring->buffer_info[i];
4457 }
4458
4459 if (likely(rx_ring->next_to_use != i)) {
4460 rx_ring->next_to_use = i;
4461 if (unlikely(i-- == 0))
4462 i = (rx_ring->count - 1);
4463
4464 /* Force memory writes to complete before letting h/w
4465 * know there are new descriptors to fetch. (Only
4466 * applicable for weak-ordered memory model archs,
4467 * such as IA-64). */
4468 wmb();
4469 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4470 }
4471 }
4472
4473 /**
4474 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4475 * @adapter: address of board private structure
4476 **/
4477
4478 static void
4479 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4480 struct e1000_rx_ring *rx_ring,
4481 int cleaned_count)
4482 {
4483 struct net_device *netdev = adapter->netdev;
4484 struct pci_dev *pdev = adapter->pdev;
4485 union e1000_rx_desc_packet_split *rx_desc;
4486 struct e1000_buffer *buffer_info;
4487 struct e1000_ps_page *ps_page;
4488 struct e1000_ps_page_dma *ps_page_dma;
4489 struct sk_buff *skb;
4490 unsigned int i, j;
4491
4492 i = rx_ring->next_to_use;
4493 buffer_info = &rx_ring->buffer_info[i];
4494 ps_page = &rx_ring->ps_page[i];
4495 ps_page_dma = &rx_ring->ps_page_dma[i];
4496
4497 while (cleaned_count--) {
4498 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4499
4500 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4501 if (j < adapter->rx_ps_pages) {
4502 if (likely(!ps_page->ps_page[j])) {
4503 ps_page->ps_page[j] =
4504 alloc_page(GFP_ATOMIC);
4505 if (unlikely(!ps_page->ps_page[j])) {
4506 adapter->alloc_rx_buff_failed++;
4507 goto no_buffers;
4508 }
4509 ps_page_dma->ps_page_dma[j] =
4510 pci_map_page(pdev,
4511 ps_page->ps_page[j],
4512 0, PAGE_SIZE,
4513 PCI_DMA_FROMDEVICE);
4514 }
4515 /* Refresh the desc even if buffer_addrs didn't
4516 * change because each write-back erases
4517 * this info.
4518 */
4519 rx_desc->read.buffer_addr[j+1] =
4520 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4521 } else
4522 rx_desc->read.buffer_addr[j+1] = ~0;
4523 }
4524
4525 skb = netdev_alloc_skb(netdev,
4526 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4527
4528 if (unlikely(!skb)) {
4529 adapter->alloc_rx_buff_failed++;
4530 break;
4531 }
4532
4533 /* Make buffer alignment 2 beyond a 16 byte boundary
4534 * this will result in a 16 byte aligned IP header after
4535 * the 14 byte MAC header is removed
4536 */
4537 skb_reserve(skb, NET_IP_ALIGN);
4538
4539 buffer_info->skb = skb;
4540 buffer_info->length = adapter->rx_ps_bsize0;
4541 buffer_info->dma = pci_map_single(pdev, skb->data,
4542 adapter->rx_ps_bsize0,
4543 PCI_DMA_FROMDEVICE);
4544
4545 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4546
4547 if (unlikely(++i == rx_ring->count)) i = 0;
4548 buffer_info = &rx_ring->buffer_info[i];
4549 ps_page = &rx_ring->ps_page[i];
4550 ps_page_dma = &rx_ring->ps_page_dma[i];
4551 }
4552
4553 no_buffers:
4554 if (likely(rx_ring->next_to_use != i)) {
4555 rx_ring->next_to_use = i;
4556 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4557
4558 /* Force memory writes to complete before letting h/w
4559 * know there are new descriptors to fetch. (Only
4560 * applicable for weak-ordered memory model archs,
4561 * such as IA-64). */
4562 wmb();
4563 /* Hardware increments by 16 bytes, but packet split
4564 * descriptors are 32 bytes...so we increment tail
4565 * twice as much.
4566 */
4567 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4568 }
4569 }
4570
4571 /**
4572 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4573 * @adapter:
4574 **/
4575
4576 static void
4577 e1000_smartspeed(struct e1000_adapter *adapter)
4578 {
4579 uint16_t phy_status;
4580 uint16_t phy_ctrl;
4581
4582 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4583 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4584 return;
4585
4586 if (adapter->smartspeed == 0) {
4587 /* If Master/Slave config fault is asserted twice,
4588 * we assume back-to-back */
4589 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4590 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4591 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4592 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4593 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4594 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4595 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4596 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4597 phy_ctrl);
4598 adapter->smartspeed++;
4599 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4600 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4601 &phy_ctrl)) {
4602 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4603 MII_CR_RESTART_AUTO_NEG);
4604 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4605 phy_ctrl);
4606 }
4607 }
4608 return;
4609 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4610 /* If still no link, perhaps using 2/3 pair cable */
4611 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4612 phy_ctrl |= CR_1000T_MS_ENABLE;
4613 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4614 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4615 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4616 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4617 MII_CR_RESTART_AUTO_NEG);
4618 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4619 }
4620 }
4621 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4622 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4623 adapter->smartspeed = 0;
4624 }
4625
4626 /**
4627 * e1000_ioctl -
4628 * @netdev:
4629 * @ifreq:
4630 * @cmd:
4631 **/
4632
4633 static int
4634 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4635 {
4636 switch (cmd) {
4637 case SIOCGMIIPHY:
4638 case SIOCGMIIREG:
4639 case SIOCSMIIREG:
4640 return e1000_mii_ioctl(netdev, ifr, cmd);
4641 default:
4642 return -EOPNOTSUPP;
4643 }
4644 }
4645
4646 /**
4647 * e1000_mii_ioctl -
4648 * @netdev:
4649 * @ifreq:
4650 * @cmd:
4651 **/
4652
4653 static int
4654 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4655 {
4656 struct e1000_adapter *adapter = netdev_priv(netdev);
4657 struct mii_ioctl_data *data = if_mii(ifr);
4658 int retval;
4659 uint16_t mii_reg;
4660 uint16_t spddplx;
4661 unsigned long flags;
4662
4663 if (adapter->hw.media_type != e1000_media_type_copper)
4664 return -EOPNOTSUPP;
4665
4666 switch (cmd) {
4667 case SIOCGMIIPHY:
4668 data->phy_id = adapter->hw.phy_addr;
4669 break;
4670 case SIOCGMIIREG:
4671 if (!capable(CAP_NET_ADMIN))
4672 return -EPERM;
4673 spin_lock_irqsave(&adapter->stats_lock, flags);
4674 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4675 &data->val_out)) {
4676 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4677 return -EIO;
4678 }
4679 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4680 break;
4681 case SIOCSMIIREG:
4682 if (!capable(CAP_NET_ADMIN))
4683 return -EPERM;
4684 if (data->reg_num & ~(0x1F))
4685 return -EFAULT;
4686 mii_reg = data->val_in;
4687 spin_lock_irqsave(&adapter->stats_lock, flags);
4688 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4689 mii_reg)) {
4690 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4691 return -EIO;
4692 }
4693 if (adapter->hw.media_type == e1000_media_type_copper) {
4694 switch (data->reg_num) {
4695 case PHY_CTRL:
4696 if (mii_reg & MII_CR_POWER_DOWN)
4697 break;
4698 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4699 adapter->hw.autoneg = 1;
4700 adapter->hw.autoneg_advertised = 0x2F;
4701 } else {
4702 if (mii_reg & 0x40)
4703 spddplx = SPEED_1000;
4704 else if (mii_reg & 0x2000)
4705 spddplx = SPEED_100;
4706 else
4707 spddplx = SPEED_10;
4708 spddplx += (mii_reg & 0x100)
4709 ? DUPLEX_FULL :
4710 DUPLEX_HALF;
4711 retval = e1000_set_spd_dplx(adapter,
4712 spddplx);
4713 if (retval) {
4714 spin_unlock_irqrestore(
4715 &adapter->stats_lock,
4716 flags);
4717 return retval;
4718 }
4719 }
4720 if (netif_running(adapter->netdev))
4721 e1000_reinit_locked(adapter);
4722 else
4723 e1000_reset(adapter);
4724 break;
4725 case M88E1000_PHY_SPEC_CTRL:
4726 case M88E1000_EXT_PHY_SPEC_CTRL:
4727 if (e1000_phy_reset(&adapter->hw)) {
4728 spin_unlock_irqrestore(
4729 &adapter->stats_lock, flags);
4730 return -EIO;
4731 }
4732 break;
4733 }
4734 } else {
4735 switch (data->reg_num) {
4736 case PHY_CTRL:
4737 if (mii_reg & MII_CR_POWER_DOWN)
4738 break;
4739 if (netif_running(adapter->netdev))
4740 e1000_reinit_locked(adapter);
4741 else
4742 e1000_reset(adapter);
4743 break;
4744 }
4745 }
4746 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4747 break;
4748 default:
4749 return -EOPNOTSUPP;
4750 }
4751 return E1000_SUCCESS;
4752 }
4753
4754 void
4755 e1000_pci_set_mwi(struct e1000_hw *hw)
4756 {
4757 struct e1000_adapter *adapter = hw->back;
4758 int ret_val = pci_set_mwi(adapter->pdev);
4759
4760 if (ret_val)
4761 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4762 }
4763
4764 void
4765 e1000_pci_clear_mwi(struct e1000_hw *hw)
4766 {
4767 struct e1000_adapter *adapter = hw->back;
4768
4769 pci_clear_mwi(adapter->pdev);
4770 }
4771
4772 void
4773 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4774 {
4775 struct e1000_adapter *adapter = hw->back;
4776
4777 pci_read_config_word(adapter->pdev, reg, value);
4778 }
4779
4780 void
4781 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4782 {
4783 struct e1000_adapter *adapter = hw->back;
4784
4785 pci_write_config_word(adapter->pdev, reg, *value);
4786 }
4787
4788 int32_t
4789 e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4790 {
4791 struct e1000_adapter *adapter = hw->back;
4792 uint16_t cap_offset;
4793
4794 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4795 if (!cap_offset)
4796 return -E1000_ERR_CONFIG;
4797
4798 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4799
4800 return E1000_SUCCESS;
4801 }
4802
4803 void
4804 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4805 {
4806 outl(value, port);
4807 }
4808
4809 static void
4810 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4811 {
4812 struct e1000_adapter *adapter = netdev_priv(netdev);
4813 uint32_t ctrl, rctl;
4814
4815 e1000_irq_disable(adapter);
4816 adapter->vlgrp = grp;
4817
4818 if (grp) {
4819 /* enable VLAN tag insert/strip */
4820 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4821 ctrl |= E1000_CTRL_VME;
4822 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4823
4824 if (adapter->hw.mac_type != e1000_ich8lan) {
4825 /* enable VLAN receive filtering */
4826 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4827 rctl |= E1000_RCTL_VFE;
4828 rctl &= ~E1000_RCTL_CFIEN;
4829 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4830 e1000_update_mng_vlan(adapter);
4831 }
4832 } else {
4833 /* disable VLAN tag insert/strip */
4834 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4835 ctrl &= ~E1000_CTRL_VME;
4836 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4837
4838 if (adapter->hw.mac_type != e1000_ich8lan) {
4839 /* disable VLAN filtering */
4840 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4841 rctl &= ~E1000_RCTL_VFE;
4842 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4843 if (adapter->mng_vlan_id !=
4844 (uint16_t)E1000_MNG_VLAN_NONE) {
4845 e1000_vlan_rx_kill_vid(netdev,
4846 adapter->mng_vlan_id);
4847 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4848 }
4849 }
4850 }
4851
4852 e1000_irq_enable(adapter);
4853 }
4854
4855 static void
4856 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4857 {
4858 struct e1000_adapter *adapter = netdev_priv(netdev);
4859 uint32_t vfta, index;
4860
4861 if ((adapter->hw.mng_cookie.status &
4862 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4863 (vid == adapter->mng_vlan_id))
4864 return;
4865 /* add VID to filter table */
4866 index = (vid >> 5) & 0x7F;
4867 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4868 vfta |= (1 << (vid & 0x1F));
4869 e1000_write_vfta(&adapter->hw, index, vfta);
4870 }
4871
4872 static void
4873 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4874 {
4875 struct e1000_adapter *adapter = netdev_priv(netdev);
4876 uint32_t vfta, index;
4877
4878 e1000_irq_disable(adapter);
4879
4880 if (adapter->vlgrp)
4881 adapter->vlgrp->vlan_devices[vid] = NULL;
4882
4883 e1000_irq_enable(adapter);
4884
4885 if ((adapter->hw.mng_cookie.status &
4886 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4887 (vid == adapter->mng_vlan_id)) {
4888 /* release control to f/w */
4889 e1000_release_hw_control(adapter);
4890 return;
4891 }
4892
4893 /* remove VID from filter table */
4894 index = (vid >> 5) & 0x7F;
4895 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4896 vfta &= ~(1 << (vid & 0x1F));
4897 e1000_write_vfta(&adapter->hw, index, vfta);
4898 }
4899
4900 static void
4901 e1000_restore_vlan(struct e1000_adapter *adapter)
4902 {
4903 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4904
4905 if (adapter->vlgrp) {
4906 uint16_t vid;
4907 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4908 if (!adapter->vlgrp->vlan_devices[vid])
4909 continue;
4910 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4911 }
4912 }
4913 }
4914
4915 int
4916 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4917 {
4918 adapter->hw.autoneg = 0;
4919
4920 /* Fiber NICs only allow 1000 gbps Full duplex */
4921 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
4922 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4923 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4924 return -EINVAL;
4925 }
4926
4927 switch (spddplx) {
4928 case SPEED_10 + DUPLEX_HALF:
4929 adapter->hw.forced_speed_duplex = e1000_10_half;
4930 break;
4931 case SPEED_10 + DUPLEX_FULL:
4932 adapter->hw.forced_speed_duplex = e1000_10_full;
4933 break;
4934 case SPEED_100 + DUPLEX_HALF:
4935 adapter->hw.forced_speed_duplex = e1000_100_half;
4936 break;
4937 case SPEED_100 + DUPLEX_FULL:
4938 adapter->hw.forced_speed_duplex = e1000_100_full;
4939 break;
4940 case SPEED_1000 + DUPLEX_FULL:
4941 adapter->hw.autoneg = 1;
4942 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4943 break;
4944 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4945 default:
4946 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4947 return -EINVAL;
4948 }
4949 return 0;
4950 }
4951
4952 #ifdef CONFIG_PM
4953 /* Save/restore 16 or 64 dwords of PCI config space depending on which
4954 * bus we're on (PCI(X) vs. PCI-E)
4955 */
4956 #define PCIE_CONFIG_SPACE_LEN 256
4957 #define PCI_CONFIG_SPACE_LEN 64
4958 static int
4959 e1000_pci_save_state(struct e1000_adapter *adapter)
4960 {
4961 struct pci_dev *dev = adapter->pdev;
4962 int size;
4963 int i;
4964
4965 if (adapter->hw.mac_type >= e1000_82571)
4966 size = PCIE_CONFIG_SPACE_LEN;
4967 else
4968 size = PCI_CONFIG_SPACE_LEN;
4969
4970 WARN_ON(adapter->config_space != NULL);
4971
4972 adapter->config_space = kmalloc(size, GFP_KERNEL);
4973 if (!adapter->config_space) {
4974 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4975 return -ENOMEM;
4976 }
4977 for (i = 0; i < (size / 4); i++)
4978 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4979 return 0;
4980 }
4981
4982 static void
4983 e1000_pci_restore_state(struct e1000_adapter *adapter)
4984 {
4985 struct pci_dev *dev = adapter->pdev;
4986 int size;
4987 int i;
4988
4989 if (adapter->config_space == NULL)
4990 return;
4991
4992 if (adapter->hw.mac_type >= e1000_82571)
4993 size = PCIE_CONFIG_SPACE_LEN;
4994 else
4995 size = PCI_CONFIG_SPACE_LEN;
4996 for (i = 0; i < (size / 4); i++)
4997 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4998 kfree(adapter->config_space);
4999 adapter->config_space = NULL;
5000 return;
5001 }
5002 #endif /* CONFIG_PM */
5003
5004 static int
5005 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5006 {
5007 struct net_device *netdev = pci_get_drvdata(pdev);
5008 struct e1000_adapter *adapter = netdev_priv(netdev);
5009 uint32_t ctrl, ctrl_ext, rctl, manc, status;
5010 uint32_t wufc = adapter->wol;
5011 #ifdef CONFIG_PM
5012 int retval = 0;
5013 #endif
5014
5015 netif_device_detach(netdev);
5016
5017 if (netif_running(netdev)) {
5018 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
5019 e1000_down(adapter);
5020 }
5021
5022 #ifdef CONFIG_PM
5023 /* Implement our own version of pci_save_state(pdev) because pci-
5024 * express adapters have 256-byte config spaces. */
5025 retval = e1000_pci_save_state(adapter);
5026 if (retval)
5027 return retval;
5028 #endif
5029
5030 status = E1000_READ_REG(&adapter->hw, STATUS);
5031 if (status & E1000_STATUS_LU)
5032 wufc &= ~E1000_WUFC_LNKC;
5033
5034 if (wufc) {
5035 e1000_setup_rctl(adapter);
5036 e1000_set_multi(netdev);
5037
5038 /* turn on all-multi mode if wake on multicast is enabled */
5039 if (wufc & E1000_WUFC_MC) {
5040 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5041 rctl |= E1000_RCTL_MPE;
5042 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5043 }
5044
5045 if (adapter->hw.mac_type >= e1000_82540) {
5046 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5047 /* advertise wake from D3Cold */
5048 #define E1000_CTRL_ADVD3WUC 0x00100000
5049 /* phy power management enable */
5050 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5051 ctrl |= E1000_CTRL_ADVD3WUC |
5052 E1000_CTRL_EN_PHY_PWR_MGMT;
5053 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5054 }
5055
5056 if (adapter->hw.media_type == e1000_media_type_fiber ||
5057 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5058 /* keep the laser running in D3 */
5059 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5060 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5061 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5062 }
5063
5064 /* Allow time for pending master requests to run */
5065 e1000_disable_pciex_master(&adapter->hw);
5066
5067 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5068 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
5069 pci_enable_wake(pdev, PCI_D3hot, 1);
5070 pci_enable_wake(pdev, PCI_D3cold, 1);
5071 } else {
5072 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5073 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
5074 pci_enable_wake(pdev, PCI_D3hot, 0);
5075 pci_enable_wake(pdev, PCI_D3cold, 0);
5076 }
5077
5078 if (adapter->hw.mac_type >= e1000_82540 &&
5079 adapter->hw.mac_type < e1000_82571 &&
5080 adapter->hw.media_type == e1000_media_type_copper) {
5081 manc = E1000_READ_REG(&adapter->hw, MANC);
5082 if (manc & E1000_MANC_SMBUS_EN) {
5083 manc |= E1000_MANC_ARP_EN;
5084 E1000_WRITE_REG(&adapter->hw, MANC, manc);
5085 pci_enable_wake(pdev, PCI_D3hot, 1);
5086 pci_enable_wake(pdev, PCI_D3cold, 1);
5087 }
5088 }
5089
5090 if (adapter->hw.phy_type == e1000_phy_igp_3)
5091 e1000_phy_powerdown_workaround(&adapter->hw);
5092
5093 if (netif_running(netdev))
5094 e1000_free_irq(adapter);
5095
5096 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5097 * would have already happened in close and is redundant. */
5098 e1000_release_hw_control(adapter);
5099
5100 pci_disable_device(pdev);
5101
5102 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5103
5104 return 0;
5105 }
5106
5107 #ifdef CONFIG_PM
5108 static int
5109 e1000_resume(struct pci_dev *pdev)
5110 {
5111 struct net_device *netdev = pci_get_drvdata(pdev);
5112 struct e1000_adapter *adapter = netdev_priv(netdev);
5113 uint32_t manc, err;
5114
5115 pci_set_power_state(pdev, PCI_D0);
5116 e1000_pci_restore_state(adapter);
5117 if ((err = pci_enable_device(pdev))) {
5118 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5119 return err;
5120 }
5121 pci_set_master(pdev);
5122
5123 pci_enable_wake(pdev, PCI_D3hot, 0);
5124 pci_enable_wake(pdev, PCI_D3cold, 0);
5125
5126 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5127 return err;
5128
5129 e1000_power_up_phy(adapter);
5130 e1000_reset(adapter);
5131 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5132
5133 if (netif_running(netdev))
5134 e1000_up(adapter);
5135
5136 netif_device_attach(netdev);
5137
5138 if (adapter->hw.mac_type >= e1000_82540 &&
5139 adapter->hw.mac_type < e1000_82571 &&
5140 adapter->hw.media_type == e1000_media_type_copper) {
5141 manc = E1000_READ_REG(&adapter->hw, MANC);
5142 manc &= ~(E1000_MANC_ARP_EN);
5143 E1000_WRITE_REG(&adapter->hw, MANC, manc);
5144 }
5145
5146 /* If the controller is 82573 and f/w is AMT, do not set
5147 * DRV_LOAD until the interface is up. For all other cases,
5148 * let the f/w know that the h/w is now under the control
5149 * of the driver. */
5150 if (adapter->hw.mac_type != e1000_82573 ||
5151 !e1000_check_mng_mode(&adapter->hw))
5152 e1000_get_hw_control(adapter);
5153
5154 return 0;
5155 }
5156 #endif
5157
5158 static void e1000_shutdown(struct pci_dev *pdev)
5159 {
5160 e1000_suspend(pdev, PMSG_SUSPEND);
5161 }
5162
5163 #ifdef CONFIG_NET_POLL_CONTROLLER
5164 /*
5165 * Polling 'interrupt' - used by things like netconsole to send skbs
5166 * without having to re-enable interrupts. It's not called while
5167 * the interrupt routine is executing.
5168 */
5169 static void
5170 e1000_netpoll(struct net_device *netdev)
5171 {
5172 struct e1000_adapter *adapter = netdev_priv(netdev);
5173
5174 disable_irq(adapter->pdev->irq);
5175 e1000_intr(adapter->pdev->irq, netdev);
5176 e1000_clean_tx_irq(adapter, adapter->tx_ring);
5177 #ifndef CONFIG_E1000_NAPI
5178 adapter->clean_rx(adapter, adapter->rx_ring);
5179 #endif
5180 enable_irq(adapter->pdev->irq);
5181 }
5182 #endif
5183
5184 /**
5185 * e1000_io_error_detected - called when PCI error is detected
5186 * @pdev: Pointer to PCI device
5187 * @state: The current pci conneection state
5188 *
5189 * This function is called after a PCI bus error affecting
5190 * this device has been detected.
5191 */
5192 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5193 {
5194 struct net_device *netdev = pci_get_drvdata(pdev);
5195 struct e1000_adapter *adapter = netdev->priv;
5196
5197 netif_device_detach(netdev);
5198
5199 if (netif_running(netdev))
5200 e1000_down(adapter);
5201 pci_disable_device(pdev);
5202
5203 /* Request a slot slot reset. */
5204 return PCI_ERS_RESULT_NEED_RESET;
5205 }
5206
5207 /**
5208 * e1000_io_slot_reset - called after the pci bus has been reset.
5209 * @pdev: Pointer to PCI device
5210 *
5211 * Restart the card from scratch, as if from a cold-boot. Implementation
5212 * resembles the first-half of the e1000_resume routine.
5213 */
5214 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5215 {
5216 struct net_device *netdev = pci_get_drvdata(pdev);
5217 struct e1000_adapter *adapter = netdev->priv;
5218
5219 if (pci_enable_device(pdev)) {
5220 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5221 return PCI_ERS_RESULT_DISCONNECT;
5222 }
5223 pci_set_master(pdev);
5224
5225 pci_enable_wake(pdev, PCI_D3hot, 0);
5226 pci_enable_wake(pdev, PCI_D3cold, 0);
5227
5228 e1000_reset(adapter);
5229 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5230
5231 return PCI_ERS_RESULT_RECOVERED;
5232 }
5233
5234 /**
5235 * e1000_io_resume - called when traffic can start flowing again.
5236 * @pdev: Pointer to PCI device
5237 *
5238 * This callback is called when the error recovery driver tells us that
5239 * its OK to resume normal operation. Implementation resembles the
5240 * second-half of the e1000_resume routine.
5241 */
5242 static void e1000_io_resume(struct pci_dev *pdev)
5243 {
5244 struct net_device *netdev = pci_get_drvdata(pdev);
5245 struct e1000_adapter *adapter = netdev->priv;
5246 uint32_t manc, swsm;
5247
5248 if (netif_running(netdev)) {
5249 if (e1000_up(adapter)) {
5250 printk("e1000: can't bring device back up after reset\n");
5251 return;
5252 }
5253 }
5254
5255 netif_device_attach(netdev);
5256
5257 if (adapter->hw.mac_type >= e1000_82540 &&
5258 adapter->hw.mac_type < e1000_82571 &&
5259 adapter->hw.media_type == e1000_media_type_copper) {
5260 manc = E1000_READ_REG(&adapter->hw, MANC);
5261 manc &= ~(E1000_MANC_ARP_EN);
5262 E1000_WRITE_REG(&adapter->hw, MANC, manc);
5263 }
5264
5265 switch (adapter->hw.mac_type) {
5266 case e1000_82573:
5267 swsm = E1000_READ_REG(&adapter->hw, SWSM);
5268 E1000_WRITE_REG(&adapter->hw, SWSM,
5269 swsm | E1000_SWSM_DRV_LOAD);
5270 break;
5271 default:
5272 break;
5273 }
5274
5275 if (netif_running(netdev))
5276 mod_timer(&adapter->watchdog_timer, jiffies);
5277 }
5278
5279 /* e1000_main.c */
Support for the Chinese Samsung S3C2440 based development boards