ixgbe: cleanup defines
[linux-2.6/mini2440.git] / arch / sparc / kernel / sun4m_smp.c
bloba14a76ac7f36464642ea95f397326c29d3967002
1 /* sun4m_smp.c: Sparc SUN4M SMP support.
3 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
4 */
6 #include <asm/head.h>
8 #include <linux/kernel.h>
9 #include <linux/sched.h>
10 #include <linux/threads.h>
11 #include <linux/smp.h>
12 #include <linux/interrupt.h>
13 #include <linux/kernel_stat.h>
14 #include <linux/init.h>
15 #include <linux/spinlock.h>
16 #include <linux/mm.h>
17 #include <linux/swap.h>
18 #include <linux/profile.h>
19 #include <linux/delay.h>
21 #include <asm/cacheflush.h>
22 #include <asm/tlbflush.h>
23 #include <asm/irq_regs.h>
25 #include <asm/ptrace.h>
26 #include <asm/atomic.h>
28 #include <asm/irq.h>
29 #include <asm/page.h>
30 #include <asm/pgalloc.h>
31 #include <asm/pgtable.h>
32 #include <asm/oplib.h>
33 #include <asm/cpudata.h>
35 #include "irq.h"
37 #define IRQ_CROSS_CALL 15
39 extern ctxd_t *srmmu_ctx_table_phys;
41 extern volatile unsigned long cpu_callin_map[NR_CPUS];
42 extern unsigned char boot_cpu_id;
44 extern cpumask_t smp_commenced_mask;
46 extern int __smp4m_processor_id(void);
48 /*#define SMP_DEBUG*/
50 #ifdef SMP_DEBUG
51 #define SMP_PRINTK(x) printk x
52 #else
53 #define SMP_PRINTK(x)
54 #endif
56 static inline unsigned long swap(volatile unsigned long *ptr, unsigned long val)
58 __asm__ __volatile__("swap [%1], %0\n\t" :
59 "=&r" (val), "=&r" (ptr) :
60 "0" (val), "1" (ptr));
61 return val;
64 static void smp_setup_percpu_timer(void);
65 extern void cpu_probe(void);
67 void __cpuinit smp4m_callin(void)
69 int cpuid = hard_smp_processor_id();
71 local_flush_cache_all();
72 local_flush_tlb_all();
74 /* Get our local ticker going. */
75 smp_setup_percpu_timer();
77 calibrate_delay();
78 smp_store_cpu_info(cpuid);
80 local_flush_cache_all();
81 local_flush_tlb_all();
84 * Unblock the master CPU _only_ when the scheduler state
85 * of all secondary CPUs will be up-to-date, so after
86 * the SMP initialization the master will be just allowed
87 * to call the scheduler code.
89 /* Allow master to continue. */
90 swap(&cpu_callin_map[cpuid], 1);
92 /* XXX: What's up with all the flushes? */
93 local_flush_cache_all();
94 local_flush_tlb_all();
96 cpu_probe();
98 /* Fix idle thread fields. */
99 __asm__ __volatile__("ld [%0], %%g6\n\t"
100 : : "r" (&current_set[cpuid])
101 : "memory" /* paranoid */);
103 /* Attach to the address space of init_task. */
104 atomic_inc(&init_mm.mm_count);
105 current->active_mm = &init_mm;
107 while (!cpu_isset(cpuid, smp_commenced_mask))
108 mb();
110 local_irq_enable();
112 cpu_set(cpuid, cpu_online_map);
116 * Cycle through the processors asking the PROM to start each one.
119 extern struct linux_prom_registers smp_penguin_ctable;
120 extern unsigned long trapbase_cpu1[];
121 extern unsigned long trapbase_cpu2[];
122 extern unsigned long trapbase_cpu3[];
124 void __init smp4m_boot_cpus(void)
126 smp_setup_percpu_timer();
127 local_flush_cache_all();
130 int __cpuinit smp4m_boot_one_cpu(int i)
132 extern unsigned long sun4m_cpu_startup;
133 unsigned long *entry = &sun4m_cpu_startup;
134 struct task_struct *p;
135 int timeout;
136 int cpu_node;
138 cpu_find_by_mid(i, &cpu_node);
140 /* Cook up an idler for this guy. */
141 p = fork_idle(i);
142 current_set[i] = task_thread_info(p);
143 /* See trampoline.S for details... */
144 entry += ((i-1) * 3);
147 * Initialize the contexts table
148 * Since the call to prom_startcpu() trashes the structure,
149 * we need to re-initialize it for each cpu
151 smp_penguin_ctable.which_io = 0;
152 smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
153 smp_penguin_ctable.reg_size = 0;
155 /* whirrr, whirrr, whirrrrrrrrr... */
156 printk("Starting CPU %d at %p\n", i, entry);
157 local_flush_cache_all();
158 prom_startcpu(cpu_node,
159 &smp_penguin_ctable, 0, (char *)entry);
161 /* wheee... it's going... */
162 for(timeout = 0; timeout < 10000; timeout++) {
163 if(cpu_callin_map[i])
164 break;
165 udelay(200);
168 if (!(cpu_callin_map[i])) {
169 printk("Processor %d is stuck.\n", i);
170 return -ENODEV;
173 local_flush_cache_all();
174 return 0;
177 void __init smp4m_smp_done(void)
179 int i, first;
180 int *prev;
182 /* setup cpu list for irq rotation */
183 first = 0;
184 prev = &first;
185 for (i = 0; i < NR_CPUS; i++) {
186 if (cpu_online(i)) {
187 *prev = i;
188 prev = &cpu_data(i).next;
191 *prev = first;
192 local_flush_cache_all();
194 /* Free unneeded trap tables */
195 if (!cpu_isset(1, cpu_present_map)) {
196 ClearPageReserved(virt_to_page(trapbase_cpu1));
197 init_page_count(virt_to_page(trapbase_cpu1));
198 free_page((unsigned long)trapbase_cpu1);
199 totalram_pages++;
200 num_physpages++;
202 if (!cpu_isset(2, cpu_present_map)) {
203 ClearPageReserved(virt_to_page(trapbase_cpu2));
204 init_page_count(virt_to_page(trapbase_cpu2));
205 free_page((unsigned long)trapbase_cpu2);
206 totalram_pages++;
207 num_physpages++;
209 if (!cpu_isset(3, cpu_present_map)) {
210 ClearPageReserved(virt_to_page(trapbase_cpu3));
211 init_page_count(virt_to_page(trapbase_cpu3));
212 free_page((unsigned long)trapbase_cpu3);
213 totalram_pages++;
214 num_physpages++;
217 /* Ok, they are spinning and ready to go. */
220 /* At each hardware IRQ, we get this called to forward IRQ reception
221 * to the next processor. The caller must disable the IRQ level being
222 * serviced globally so that there are no double interrupts received.
224 * XXX See sparc64 irq.c.
226 void smp4m_irq_rotate(int cpu)
228 int next = cpu_data(cpu).next;
229 if (next != cpu)
230 set_irq_udt(next);
233 static struct smp_funcall {
234 smpfunc_t func;
235 unsigned long arg1;
236 unsigned long arg2;
237 unsigned long arg3;
238 unsigned long arg4;
239 unsigned long arg5;
240 unsigned long processors_in[SUN4M_NCPUS]; /* Set when ipi entered. */
241 unsigned long processors_out[SUN4M_NCPUS]; /* Set when ipi exited. */
242 } ccall_info;
244 static DEFINE_SPINLOCK(cross_call_lock);
246 /* Cross calls must be serialized, at least currently. */
247 static void smp4m_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,
248 unsigned long arg2, unsigned long arg3,
249 unsigned long arg4)
251 register int ncpus = SUN4M_NCPUS;
252 unsigned long flags;
254 spin_lock_irqsave(&cross_call_lock, flags);
256 /* Init function glue. */
257 ccall_info.func = func;
258 ccall_info.arg1 = arg1;
259 ccall_info.arg2 = arg2;
260 ccall_info.arg3 = arg3;
261 ccall_info.arg4 = arg4;
262 ccall_info.arg5 = 0;
264 /* Init receive/complete mapping, plus fire the IPI's off. */
266 register int i;
268 cpu_clear(smp_processor_id(), mask);
269 cpus_and(mask, cpu_online_map, mask);
270 for(i = 0; i < ncpus; i++) {
271 if (cpu_isset(i, mask)) {
272 ccall_info.processors_in[i] = 0;
273 ccall_info.processors_out[i] = 0;
274 set_cpu_int(i, IRQ_CROSS_CALL);
275 } else {
276 ccall_info.processors_in[i] = 1;
277 ccall_info.processors_out[i] = 1;
283 register int i;
285 i = 0;
286 do {
287 if (!cpu_isset(i, mask))
288 continue;
289 while(!ccall_info.processors_in[i])
290 barrier();
291 } while(++i < ncpus);
293 i = 0;
294 do {
295 if (!cpu_isset(i, mask))
296 continue;
297 while(!ccall_info.processors_out[i])
298 barrier();
299 } while(++i < ncpus);
302 spin_unlock_irqrestore(&cross_call_lock, flags);
305 /* Running cross calls. */
306 void smp4m_cross_call_irq(void)
308 int i = smp_processor_id();
310 ccall_info.processors_in[i] = 1;
311 ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
312 ccall_info.arg4, ccall_info.arg5);
313 ccall_info.processors_out[i] = 1;
316 void smp4m_percpu_timer_interrupt(struct pt_regs *regs)
318 struct pt_regs *old_regs;
319 int cpu = smp_processor_id();
321 old_regs = set_irq_regs(regs);
323 clear_profile_irq(cpu);
325 profile_tick(CPU_PROFILING);
327 if(!--prof_counter(cpu)) {
328 int user = user_mode(regs);
330 irq_enter();
331 update_process_times(user);
332 irq_exit();
334 prof_counter(cpu) = prof_multiplier(cpu);
336 set_irq_regs(old_regs);
339 extern unsigned int lvl14_resolution;
341 static void __init smp_setup_percpu_timer(void)
343 int cpu = smp_processor_id();
345 prof_counter(cpu) = prof_multiplier(cpu) = 1;
346 load_profile_irq(cpu, lvl14_resolution);
348 if(cpu == boot_cpu_id)
349 enable_pil_irq(14);
352 static void __init smp4m_blackbox_id(unsigned *addr)
354 int rd = *addr & 0x3e000000;
355 int rs1 = rd >> 11;
357 addr[0] = 0x81580000 | rd; /* rd %tbr, reg */
358 addr[1] = 0x8130200c | rd | rs1; /* srl reg, 0xc, reg */
359 addr[2] = 0x80082003 | rd | rs1; /* and reg, 3, reg */
362 static void __init smp4m_blackbox_current(unsigned *addr)
364 int rd = *addr & 0x3e000000;
365 int rs1 = rd >> 11;
367 addr[0] = 0x81580000 | rd; /* rd %tbr, reg */
368 addr[2] = 0x8130200a | rd | rs1; /* srl reg, 0xa, reg */
369 addr[4] = 0x8008200c | rd | rs1; /* and reg, 0xc, reg */
372 void __init sun4m_init_smp(void)
374 BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4m_blackbox_id);
375 BTFIXUPSET_BLACKBOX(load_current, smp4m_blackbox_current);
376 BTFIXUPSET_CALL(smp_cross_call, smp4m_cross_call, BTFIXUPCALL_NORM);
377 BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4m_processor_id, BTFIXUPCALL_NORM);