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KVM: MMU: Map device MMIO as UC in EPT
[linux-2.6/mini2440.git] / arch / x86 / kvm / mmu.c
blob2d4477c7147372c28ed84f5a513ca553dc46979c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
19
20 #include "mmu.h"
21
22 #include <linux/kvm_host.h>
23 #include <linux/types.h>
24 #include <linux/string.h>
25 #include <linux/mm.h>
26 #include <linux/highmem.h>
27 #include <linux/module.h>
28 #include <linux/swap.h>
29 #include <linux/hugetlb.h>
30 #include <linux/compiler.h>
31
32 #include <asm/page.h>
33 #include <asm/cmpxchg.h>
34 #include <asm/io.h>
35 #include <asm/vmx.h>
36
37 /*
38 * When setting this variable to true it enables Two-Dimensional-Paging
39 * where the hardware walks 2 page tables:
40 * 1. the guest-virtual to guest-physical
41 * 2. while doing 1. it walks guest-physical to host-physical
42 * If the hardware supports that we don't need to do shadow paging.
43 */
44 bool tdp_enabled = false;
45
46 #undef MMU_DEBUG
47
48 #undef AUDIT
49
50 #ifdef AUDIT
51 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
52 #else
53 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
54 #endif
55
56 #ifdef MMU_DEBUG
57
58 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
59 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
60
61 #else
62
63 #define pgprintk(x...) do { } while (0)
64 #define rmap_printk(x...) do { } while (0)
65
66 #endif
67
68 #if defined(MMU_DEBUG) || defined(AUDIT)
69 static int dbg = 0;
70 module_param(dbg, bool, 0644);
71 #endif
72
73 static int oos_shadow = 1;
74 module_param(oos_shadow, bool, 0644);
75
76 #ifndef MMU_DEBUG
77 #define ASSERT(x) do { } while (0)
78 #else
79 #define ASSERT(x) \
80 if (!(x)) { \
81 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
82 __FILE__, __LINE__, #x); \
83 }
84 #endif
85
86 #define PT_FIRST_AVAIL_BITS_SHIFT 9
87 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
88
89 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
90
91 #define PT64_LEVEL_BITS 9
92
93 #define PT64_LEVEL_SHIFT(level) \
94 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
95
96 #define PT64_LEVEL_MASK(level) \
97 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
98
99 #define PT64_INDEX(address, level)\
100 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
101
102
103 #define PT32_LEVEL_BITS 10
104
105 #define PT32_LEVEL_SHIFT(level) \
106 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
107
108 #define PT32_LEVEL_MASK(level) \
109 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
110
111 #define PT32_INDEX(address, level)\
112 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
113
114
115 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
116 #define PT64_DIR_BASE_ADDR_MASK \
117 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
118
119 #define PT32_BASE_ADDR_MASK PAGE_MASK
120 #define PT32_DIR_BASE_ADDR_MASK \
121 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
122
123 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
124 | PT64_NX_MASK)
125
126 #define PFERR_PRESENT_MASK (1U << 0)
127 #define PFERR_WRITE_MASK (1U << 1)
128 #define PFERR_USER_MASK (1U << 2)
129 #define PFERR_FETCH_MASK (1U << 4)
130
131 #define PT_DIRECTORY_LEVEL 2
132 #define PT_PAGE_TABLE_LEVEL 1
133
134 #define RMAP_EXT 4
135
136 #define ACC_EXEC_MASK 1
137 #define ACC_WRITE_MASK PT_WRITABLE_MASK
138 #define ACC_USER_MASK PT_USER_MASK
139 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
140
141 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
142
143 struct kvm_rmap_desc {
144 u64 *shadow_ptes[RMAP_EXT];
145 struct kvm_rmap_desc *more;
146 };
147
148 struct kvm_shadow_walk {
149 int (*entry)(struct kvm_shadow_walk *walk, struct kvm_vcpu *vcpu,
150 u64 addr, u64 *spte, int level);
151 };
152
153 struct kvm_unsync_walk {
154 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
155 };
156
157 typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
158
159 static struct kmem_cache *pte_chain_cache;
160 static struct kmem_cache *rmap_desc_cache;
161 static struct kmem_cache *mmu_page_header_cache;
162
163 static u64 __read_mostly shadow_trap_nonpresent_pte;
164 static u64 __read_mostly shadow_notrap_nonpresent_pte;
165 static u64 __read_mostly shadow_base_present_pte;
166 static u64 __read_mostly shadow_nx_mask;
167 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
168 static u64 __read_mostly shadow_user_mask;
169 static u64 __read_mostly shadow_accessed_mask;
170 static u64 __read_mostly shadow_dirty_mask;
171 static u64 __read_mostly shadow_mt_mask;
172
173 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
174 {
175 shadow_trap_nonpresent_pte = trap_pte;
176 shadow_notrap_nonpresent_pte = notrap_pte;
177 }
178 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
179
180 void kvm_mmu_set_base_ptes(u64 base_pte)
181 {
182 shadow_base_present_pte = base_pte;
183 }
184 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
185
186 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
187 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask)
188 {
189 shadow_user_mask = user_mask;
190 shadow_accessed_mask = accessed_mask;
191 shadow_dirty_mask = dirty_mask;
192 shadow_nx_mask = nx_mask;
193 shadow_x_mask = x_mask;
194 shadow_mt_mask = mt_mask;
195 }
196 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
197
198 static int is_write_protection(struct kvm_vcpu *vcpu)
199 {
200 return vcpu->arch.cr0 & X86_CR0_WP;
201 }
202
203 static int is_cpuid_PSE36(void)
204 {
205 return 1;
206 }
207
208 static int is_nx(struct kvm_vcpu *vcpu)
209 {
210 return vcpu->arch.shadow_efer & EFER_NX;
211 }
212
213 static int is_present_pte(unsigned long pte)
214 {
215 return pte & PT_PRESENT_MASK;
216 }
217
218 static int is_shadow_present_pte(u64 pte)
219 {
220 return pte != shadow_trap_nonpresent_pte
221 && pte != shadow_notrap_nonpresent_pte;
222 }
223
224 static int is_large_pte(u64 pte)
225 {
226 return pte & PT_PAGE_SIZE_MASK;
227 }
228
229 static int is_writeble_pte(unsigned long pte)
230 {
231 return pte & PT_WRITABLE_MASK;
232 }
233
234 static int is_dirty_pte(unsigned long pte)
235 {
236 return pte & shadow_dirty_mask;
237 }
238
239 static int is_rmap_pte(u64 pte)
240 {
241 return is_shadow_present_pte(pte);
242 }
243
244 static pfn_t spte_to_pfn(u64 pte)
245 {
246 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
247 }
248
249 static gfn_t pse36_gfn_delta(u32 gpte)
250 {
251 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
252
253 return (gpte & PT32_DIR_PSE36_MASK) << shift;
254 }
255
256 static void set_shadow_pte(u64 *sptep, u64 spte)
257 {
258 #ifdef CONFIG_X86_64
259 set_64bit((unsigned long *)sptep, spte);
260 #else
261 set_64bit((unsigned long long *)sptep, spte);
262 #endif
263 }
264
265 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
266 struct kmem_cache *base_cache, int min)
267 {
268 void *obj;
269
270 if (cache->nobjs >= min)
271 return 0;
272 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
273 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
274 if (!obj)
275 return -ENOMEM;
276 cache->objects[cache->nobjs++] = obj;
277 }
278 return 0;
279 }
280
281 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
282 {
283 while (mc->nobjs)
284 kfree(mc->objects[--mc->nobjs]);
285 }
286
287 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
288 int min)
289 {
290 struct page *page;
291
292 if (cache->nobjs >= min)
293 return 0;
294 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
295 page = alloc_page(GFP_KERNEL);
296 if (!page)
297 return -ENOMEM;
298 set_page_private(page, 0);
299 cache->objects[cache->nobjs++] = page_address(page);
300 }
301 return 0;
302 }
303
304 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
305 {
306 while (mc->nobjs)
307 free_page((unsigned long)mc->objects[--mc->nobjs]);
308 }
309
310 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
311 {
312 int r;
313
314 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
315 pte_chain_cache, 4);
316 if (r)
317 goto out;
318 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
319 rmap_desc_cache, 4);
320 if (r)
321 goto out;
322 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
323 if (r)
324 goto out;
325 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
326 mmu_page_header_cache, 4);
327 out:
328 return r;
329 }
330
331 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
332 {
333 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
334 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
335 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
336 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
337 }
338
339 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
340 size_t size)
341 {
342 void *p;
343
344 BUG_ON(!mc->nobjs);
345 p = mc->objects[--mc->nobjs];
346 memset(p, 0, size);
347 return p;
348 }
349
350 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
351 {
352 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
353 sizeof(struct kvm_pte_chain));
354 }
355
356 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
357 {
358 kfree(pc);
359 }
360
361 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
362 {
363 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
364 sizeof(struct kvm_rmap_desc));
365 }
366
367 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
368 {
369 kfree(rd);
370 }
371
372 /*
373 * Return the pointer to the largepage write count for a given
374 * gfn, handling slots that are not large page aligned.
375 */
376 static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
377 {
378 unsigned long idx;
379
380 idx = (gfn / KVM_PAGES_PER_HPAGE) -
381 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
382 return &slot->lpage_info[idx].write_count;
383 }
384
385 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
386 {
387 int *write_count;
388
389 gfn = unalias_gfn(kvm, gfn);
390 write_count = slot_largepage_idx(gfn,
391 gfn_to_memslot_unaliased(kvm, gfn));
392 *write_count += 1;
393 }
394
395 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
396 {
397 int *write_count;
398
399 gfn = unalias_gfn(kvm, gfn);
400 write_count = slot_largepage_idx(gfn,
401 gfn_to_memslot_unaliased(kvm, gfn));
402 *write_count -= 1;
403 WARN_ON(*write_count < 0);
404 }
405
406 static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
407 {
408 struct kvm_memory_slot *slot;
409 int *largepage_idx;
410
411 gfn = unalias_gfn(kvm, gfn);
412 slot = gfn_to_memslot_unaliased(kvm, gfn);
413 if (slot) {
414 largepage_idx = slot_largepage_idx(gfn, slot);
415 return *largepage_idx;
416 }
417
418 return 1;
419 }
420
421 static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
422 {
423 struct vm_area_struct *vma;
424 unsigned long addr;
425 int ret = 0;
426
427 addr = gfn_to_hva(kvm, gfn);
428 if (kvm_is_error_hva(addr))
429 return ret;
430
431 down_read(&current->mm->mmap_sem);
432 vma = find_vma(current->mm, addr);
433 if (vma && is_vm_hugetlb_page(vma))
434 ret = 1;
435 up_read(&current->mm->mmap_sem);
436
437 return ret;
438 }
439
440 static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
441 {
442 struct kvm_memory_slot *slot;
443
444 if (has_wrprotected_page(vcpu->kvm, large_gfn))
445 return 0;
446
447 if (!host_largepage_backed(vcpu->kvm, large_gfn))
448 return 0;
449
450 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
451 if (slot && slot->dirty_bitmap)
452 return 0;
453
454 return 1;
455 }
456
457 /*
458 * Take gfn and return the reverse mapping to it.
459 * Note: gfn must be unaliased before this function get called
460 */
461
462 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
463 {
464 struct kvm_memory_slot *slot;
465 unsigned long idx;
466
467 slot = gfn_to_memslot(kvm, gfn);
468 if (!lpage)
469 return &slot->rmap[gfn - slot->base_gfn];
470
471 idx = (gfn / KVM_PAGES_PER_HPAGE) -
472 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
473
474 return &slot->lpage_info[idx].rmap_pde;
475 }
476
477 /*
478 * Reverse mapping data structures:
479 *
480 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
481 * that points to page_address(page).
482 *
483 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
484 * containing more mappings.
485 */
486 static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
487 {
488 struct kvm_mmu_page *sp;
489 struct kvm_rmap_desc *desc;
490 unsigned long *rmapp;
491 int i;
492
493 if (!is_rmap_pte(*spte))
494 return;
495 gfn = unalias_gfn(vcpu->kvm, gfn);
496 sp = page_header(__pa(spte));
497 sp->gfns[spte - sp->spt] = gfn;
498 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
499 if (!*rmapp) {
500 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
501 *rmapp = (unsigned long)spte;
502 } else if (!(*rmapp & 1)) {
503 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
504 desc = mmu_alloc_rmap_desc(vcpu);
505 desc->shadow_ptes[0] = (u64 *)*rmapp;
506 desc->shadow_ptes[1] = spte;
507 *rmapp = (unsigned long)desc | 1;
508 } else {
509 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
510 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
511 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
512 desc = desc->more;
513 if (desc->shadow_ptes[RMAP_EXT-1]) {
514 desc->more = mmu_alloc_rmap_desc(vcpu);
515 desc = desc->more;
516 }
517 for (i = 0; desc->shadow_ptes[i]; ++i)
518 ;
519 desc->shadow_ptes[i] = spte;
520 }
521 }
522
523 static void rmap_desc_remove_entry(unsigned long *rmapp,
524 struct kvm_rmap_desc *desc,
525 int i,
526 struct kvm_rmap_desc *prev_desc)
527 {
528 int j;
529
530 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
531 ;
532 desc->shadow_ptes[i] = desc->shadow_ptes[j];
533 desc->shadow_ptes[j] = NULL;
534 if (j != 0)
535 return;
536 if (!prev_desc && !desc->more)
537 *rmapp = (unsigned long)desc->shadow_ptes[0];
538 else
539 if (prev_desc)
540 prev_desc->more = desc->more;
541 else
542 *rmapp = (unsigned long)desc->more | 1;
543 mmu_free_rmap_desc(desc);
544 }
545
546 static void rmap_remove(struct kvm *kvm, u64 *spte)
547 {
548 struct kvm_rmap_desc *desc;
549 struct kvm_rmap_desc *prev_desc;
550 struct kvm_mmu_page *sp;
551 pfn_t pfn;
552 unsigned long *rmapp;
553 int i;
554
555 if (!is_rmap_pte(*spte))
556 return;
557 sp = page_header(__pa(spte));
558 pfn = spte_to_pfn(*spte);
559 if (*spte & shadow_accessed_mask)
560 kvm_set_pfn_accessed(pfn);
561 if (is_writeble_pte(*spte))
562 kvm_release_pfn_dirty(pfn);
563 else
564 kvm_release_pfn_clean(pfn);
565 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
566 if (!*rmapp) {
567 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
568 BUG();
569 } else if (!(*rmapp & 1)) {
570 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
571 if ((u64 *)*rmapp != spte) {
572 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
573 spte, *spte);
574 BUG();
575 }
576 *rmapp = 0;
577 } else {
578 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
579 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
580 prev_desc = NULL;
581 while (desc) {
582 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
583 if (desc->shadow_ptes[i] == spte) {
584 rmap_desc_remove_entry(rmapp,
585 desc, i,
586 prev_desc);
587 return;
588 }
589 prev_desc = desc;
590 desc = desc->more;
591 }
592 BUG();
593 }
594 }
595
596 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
597 {
598 struct kvm_rmap_desc *desc;
599 struct kvm_rmap_desc *prev_desc;
600 u64 *prev_spte;
601 int i;
602
603 if (!*rmapp)
604 return NULL;
605 else if (!(*rmapp & 1)) {
606 if (!spte)
607 return (u64 *)*rmapp;
608 return NULL;
609 }
610 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
611 prev_desc = NULL;
612 prev_spte = NULL;
613 while (desc) {
614 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
615 if (prev_spte == spte)
616 return desc->shadow_ptes[i];
617 prev_spte = desc->shadow_ptes[i];
618 }
619 desc = desc->more;
620 }
621 return NULL;
622 }
623
624 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
625 {
626 unsigned long *rmapp;
627 u64 *spte;
628 int write_protected = 0;
629
630 gfn = unalias_gfn(kvm, gfn);
631 rmapp = gfn_to_rmap(kvm, gfn, 0);
632
633 spte = rmap_next(kvm, rmapp, NULL);
634 while (spte) {
635 BUG_ON(!spte);
636 BUG_ON(!(*spte & PT_PRESENT_MASK));
637 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
638 if (is_writeble_pte(*spte)) {
639 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
640 write_protected = 1;
641 }
642 spte = rmap_next(kvm, rmapp, spte);
643 }
644 if (write_protected) {
645 pfn_t pfn;
646
647 spte = rmap_next(kvm, rmapp, NULL);
648 pfn = spte_to_pfn(*spte);
649 kvm_set_pfn_dirty(pfn);
650 }
651
652 /* check for huge page mappings */
653 rmapp = gfn_to_rmap(kvm, gfn, 1);
654 spte = rmap_next(kvm, rmapp, NULL);
655 while (spte) {
656 BUG_ON(!spte);
657 BUG_ON(!(*spte & PT_PRESENT_MASK));
658 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
659 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
660 if (is_writeble_pte(*spte)) {
661 rmap_remove(kvm, spte);
662 --kvm->stat.lpages;
663 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
664 spte = NULL;
665 write_protected = 1;
666 }
667 spte = rmap_next(kvm, rmapp, spte);
668 }
669
670 return write_protected;
671 }
672
673 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
674 {
675 u64 *spte;
676 int need_tlb_flush = 0;
677
678 while ((spte = rmap_next(kvm, rmapp, NULL))) {
679 BUG_ON(!(*spte & PT_PRESENT_MASK));
680 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
681 rmap_remove(kvm, spte);
682 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
683 need_tlb_flush = 1;
684 }
685 return need_tlb_flush;
686 }
687
688 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
689 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
690 {
691 int i;
692 int retval = 0;
693
694 /*
695 * If mmap_sem isn't taken, we can look the memslots with only
696 * the mmu_lock by skipping over the slots with userspace_addr == 0.
697 */
698 for (i = 0; i < kvm->nmemslots; i++) {
699 struct kvm_memory_slot *memslot = &kvm->memslots[i];
700 unsigned long start = memslot->userspace_addr;
701 unsigned long end;
702
703 /* mmu_lock protects userspace_addr */
704 if (!start)
705 continue;
706
707 end = start + (memslot->npages << PAGE_SHIFT);
708 if (hva >= start && hva < end) {
709 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
710 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
711 retval |= handler(kvm,
712 &memslot->lpage_info[
713 gfn_offset /
714 KVM_PAGES_PER_HPAGE].rmap_pde);
715 }
716 }
717
718 return retval;
719 }
720
721 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
722 {
723 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
724 }
725
726 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
727 {
728 u64 *spte;
729 int young = 0;
730
731 /* always return old for EPT */
732 if (!shadow_accessed_mask)
733 return 0;
734
735 spte = rmap_next(kvm, rmapp, NULL);
736 while (spte) {
737 int _young;
738 u64 _spte = *spte;
739 BUG_ON(!(_spte & PT_PRESENT_MASK));
740 _young = _spte & PT_ACCESSED_MASK;
741 if (_young) {
742 young = 1;
743 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
744 }
745 spte = rmap_next(kvm, rmapp, spte);
746 }
747 return young;
748 }
749
750 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
751 {
752 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
753 }
754
755 #ifdef MMU_DEBUG
756 static int is_empty_shadow_page(u64 *spt)
757 {
758 u64 *pos;
759 u64 *end;
760
761 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
762 if (is_shadow_present_pte(*pos)) {
763 printk(KERN_ERR "%s: %p %llx\n", __func__,
764 pos, *pos);
765 return 0;
766 }
767 return 1;
768 }
769 #endif
770
771 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
772 {
773 ASSERT(is_empty_shadow_page(sp->spt));
774 list_del(&sp->link);
775 __free_page(virt_to_page(sp->spt));
776 __free_page(virt_to_page(sp->gfns));
777 kfree(sp);
778 ++kvm->arch.n_free_mmu_pages;
779 }
780
781 static unsigned kvm_page_table_hashfn(gfn_t gfn)
782 {
783 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
784 }
785
786 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
787 u64 *parent_pte)
788 {
789 struct kvm_mmu_page *sp;
790
791 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
792 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
793 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
794 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
795 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
796 INIT_LIST_HEAD(&sp->oos_link);
797 ASSERT(is_empty_shadow_page(sp->spt));
798 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
799 sp->multimapped = 0;
800 sp->global = 1;
801 sp->parent_pte = parent_pte;
802 --vcpu->kvm->arch.n_free_mmu_pages;
803 return sp;
804 }
805
806 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
807 struct kvm_mmu_page *sp, u64 *parent_pte)
808 {
809 struct kvm_pte_chain *pte_chain;
810 struct hlist_node *node;
811 int i;
812
813 if (!parent_pte)
814 return;
815 if (!sp->multimapped) {
816 u64 *old = sp->parent_pte;
817
818 if (!old) {
819 sp->parent_pte = parent_pte;
820 return;
821 }
822 sp->multimapped = 1;
823 pte_chain = mmu_alloc_pte_chain(vcpu);
824 INIT_HLIST_HEAD(&sp->parent_ptes);
825 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
826 pte_chain->parent_ptes[0] = old;
827 }
828 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
829 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
830 continue;
831 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
832 if (!pte_chain->parent_ptes[i]) {
833 pte_chain->parent_ptes[i] = parent_pte;
834 return;
835 }
836 }
837 pte_chain = mmu_alloc_pte_chain(vcpu);
838 BUG_ON(!pte_chain);
839 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
840 pte_chain->parent_ptes[0] = parent_pte;
841 }
842
843 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
844 u64 *parent_pte)
845 {
846 struct kvm_pte_chain *pte_chain;
847 struct hlist_node *node;
848 int i;
849
850 if (!sp->multimapped) {
851 BUG_ON(sp->parent_pte != parent_pte);
852 sp->parent_pte = NULL;
853 return;
854 }
855 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
856 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
857 if (!pte_chain->parent_ptes[i])
858 break;
859 if (pte_chain->parent_ptes[i] != parent_pte)
860 continue;
861 while (i + 1 < NR_PTE_CHAIN_ENTRIES
862 && pte_chain->parent_ptes[i + 1]) {
863 pte_chain->parent_ptes[i]
864 = pte_chain->parent_ptes[i + 1];
865 ++i;
866 }
867 pte_chain->parent_ptes[i] = NULL;
868 if (i == 0) {
869 hlist_del(&pte_chain->link);
870 mmu_free_pte_chain(pte_chain);
871 if (hlist_empty(&sp->parent_ptes)) {
872 sp->multimapped = 0;
873 sp->parent_pte = NULL;
874 }
875 }
876 return;
877 }
878 BUG();
879 }
880
881
882 static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
883 mmu_parent_walk_fn fn)
884 {
885 struct kvm_pte_chain *pte_chain;
886 struct hlist_node *node;
887 struct kvm_mmu_page *parent_sp;
888 int i;
889
890 if (!sp->multimapped && sp->parent_pte) {
891 parent_sp = page_header(__pa(sp->parent_pte));
892 fn(vcpu, parent_sp);
893 mmu_parent_walk(vcpu, parent_sp, fn);
894 return;
895 }
896 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
897 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
898 if (!pte_chain->parent_ptes[i])
899 break;
900 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
901 fn(vcpu, parent_sp);
902 mmu_parent_walk(vcpu, parent_sp, fn);
903 }
904 }
905
906 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
907 {
908 unsigned int index;
909 struct kvm_mmu_page *sp = page_header(__pa(spte));
910
911 index = spte - sp->spt;
912 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
913 sp->unsync_children++;
914 WARN_ON(!sp->unsync_children);
915 }
916
917 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
918 {
919 struct kvm_pte_chain *pte_chain;
920 struct hlist_node *node;
921 int i;
922
923 if (!sp->parent_pte)
924 return;
925
926 if (!sp->multimapped) {
927 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
928 return;
929 }
930
931 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
932 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
933 if (!pte_chain->parent_ptes[i])
934 break;
935 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
936 }
937 }
938
939 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
940 {
941 kvm_mmu_update_parents_unsync(sp);
942 return 1;
943 }
944
945 static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
946 struct kvm_mmu_page *sp)
947 {
948 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
949 kvm_mmu_update_parents_unsync(sp);
950 }
951
952 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
953 struct kvm_mmu_page *sp)
954 {
955 int i;
956
957 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
958 sp->spt[i] = shadow_trap_nonpresent_pte;
959 }
960
961 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
962 struct kvm_mmu_page *sp)
963 {
964 return 1;
965 }
966
967 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
968 {
969 }
970
971 #define KVM_PAGE_ARRAY_NR 16
972
973 struct kvm_mmu_pages {
974 struct mmu_page_and_offset {
975 struct kvm_mmu_page *sp;
976 unsigned int idx;
977 } page[KVM_PAGE_ARRAY_NR];
978 unsigned int nr;
979 };
980
981 #define for_each_unsync_children(bitmap, idx) \
982 for (idx = find_first_bit(bitmap, 512); \
983 idx < 512; \
984 idx = find_next_bit(bitmap, 512, idx+1))
985
986 int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
987 int idx)
988 {
989 int i;
990
991 if (sp->unsync)
992 for (i=0; i < pvec->nr; i++)
993 if (pvec->page[i].sp == sp)
994 return 0;
995
996 pvec->page[pvec->nr].sp = sp;
997 pvec->page[pvec->nr].idx = idx;
998 pvec->nr++;
999 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1000 }
1001
1002 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1003 struct kvm_mmu_pages *pvec)
1004 {
1005 int i, ret, nr_unsync_leaf = 0;
1006
1007 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1008 u64 ent = sp->spt[i];
1009
1010 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1011 struct kvm_mmu_page *child;
1012 child = page_header(ent & PT64_BASE_ADDR_MASK);
1013
1014 if (child->unsync_children) {
1015 if (mmu_pages_add(pvec, child, i))
1016 return -ENOSPC;
1017
1018 ret = __mmu_unsync_walk(child, pvec);
1019 if (!ret)
1020 __clear_bit(i, sp->unsync_child_bitmap);
1021 else if (ret > 0)
1022 nr_unsync_leaf += ret;
1023 else
1024 return ret;
1025 }
1026
1027 if (child->unsync) {
1028 nr_unsync_leaf++;
1029 if (mmu_pages_add(pvec, child, i))
1030 return -ENOSPC;
1031 }
1032 }
1033 }
1034
1035 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1036 sp->unsync_children = 0;
1037
1038 return nr_unsync_leaf;
1039 }
1040
1041 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1042 struct kvm_mmu_pages *pvec)
1043 {
1044 if (!sp->unsync_children)
1045 return 0;
1046
1047 mmu_pages_add(pvec, sp, 0);
1048 return __mmu_unsync_walk(sp, pvec);
1049 }
1050
1051 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1052 {
1053 unsigned index;
1054 struct hlist_head *bucket;
1055 struct kvm_mmu_page *sp;
1056 struct hlist_node *node;
1057
1058 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1059 index = kvm_page_table_hashfn(gfn);
1060 bucket = &kvm->arch.mmu_page_hash[index];
1061 hlist_for_each_entry(sp, node, bucket, hash_link)
1062 if (sp->gfn == gfn && !sp->role.metaphysical
1063 && !sp->role.invalid) {
1064 pgprintk("%s: found role %x\n",
1065 __func__, sp->role.word);
1066 return sp;
1067 }
1068 return NULL;
1069 }
1070
1071 static void kvm_unlink_unsync_global(struct kvm *kvm, struct kvm_mmu_page *sp)
1072 {
1073 list_del(&sp->oos_link);
1074 --kvm->stat.mmu_unsync_global;
1075 }
1076
1077 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1078 {
1079 WARN_ON(!sp->unsync);
1080 sp->unsync = 0;
1081 if (sp->global)
1082 kvm_unlink_unsync_global(kvm, sp);
1083 --kvm->stat.mmu_unsync;
1084 }
1085
1086 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1087
1088 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1089 {
1090 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1091 kvm_mmu_zap_page(vcpu->kvm, sp);
1092 return 1;
1093 }
1094
1095 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1096 kvm_flush_remote_tlbs(vcpu->kvm);
1097 kvm_unlink_unsync_page(vcpu->kvm, sp);
1098 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1099 kvm_mmu_zap_page(vcpu->kvm, sp);
1100 return 1;
1101 }
1102
1103 kvm_mmu_flush_tlb(vcpu);
1104 return 0;
1105 }
1106
1107 struct mmu_page_path {
1108 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1109 unsigned int idx[PT64_ROOT_LEVEL-1];
1110 };
1111
1112 #define for_each_sp(pvec, sp, parents, i) \
1113 for (i = mmu_pages_next(&pvec, &parents, -1), \
1114 sp = pvec.page[i].sp; \
1115 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1116 i = mmu_pages_next(&pvec, &parents, i))
1117
1118 int mmu_pages_next(struct kvm_mmu_pages *pvec, struct mmu_page_path *parents,
1119 int i)
1120 {
1121 int n;
1122
1123 for (n = i+1; n < pvec->nr; n++) {
1124 struct kvm_mmu_page *sp = pvec->page[n].sp;
1125
1126 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1127 parents->idx[0] = pvec->page[n].idx;
1128 return n;
1129 }
1130
1131 parents->parent[sp->role.level-2] = sp;
1132 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1133 }
1134
1135 return n;
1136 }
1137
1138 void mmu_pages_clear_parents(struct mmu_page_path *parents)
1139 {
1140 struct kvm_mmu_page *sp;
1141 unsigned int level = 0;
1142
1143 do {
1144 unsigned int idx = parents->idx[level];
1145
1146 sp = parents->parent[level];
1147 if (!sp)
1148 return;
1149
1150 --sp->unsync_children;
1151 WARN_ON((int)sp->unsync_children < 0);
1152 __clear_bit(idx, sp->unsync_child_bitmap);
1153 level++;
1154 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1155 }
1156
1157 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1158 struct mmu_page_path *parents,
1159 struct kvm_mmu_pages *pvec)
1160 {
1161 parents->parent[parent->role.level-1] = NULL;
1162 pvec->nr = 0;
1163 }
1164
1165 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1166 struct kvm_mmu_page *parent)
1167 {
1168 int i;
1169 struct kvm_mmu_page *sp;
1170 struct mmu_page_path parents;
1171 struct kvm_mmu_pages pages;
1172
1173 kvm_mmu_pages_init(parent, &parents, &pages);
1174 while (mmu_unsync_walk(parent, &pages)) {
1175 int protected = 0;
1176
1177 for_each_sp(pages, sp, parents, i)
1178 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1179
1180 if (protected)
1181 kvm_flush_remote_tlbs(vcpu->kvm);
1182
1183 for_each_sp(pages, sp, parents, i) {
1184 kvm_sync_page(vcpu, sp);
1185 mmu_pages_clear_parents(&parents);
1186 }
1187 cond_resched_lock(&vcpu->kvm->mmu_lock);
1188 kvm_mmu_pages_init(parent, &parents, &pages);
1189 }
1190 }
1191
1192 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1193 gfn_t gfn,
1194 gva_t gaddr,
1195 unsigned level,
1196 int metaphysical,
1197 unsigned access,
1198 u64 *parent_pte)
1199 {
1200 union kvm_mmu_page_role role;
1201 unsigned index;
1202 unsigned quadrant;
1203 struct hlist_head *bucket;
1204 struct kvm_mmu_page *sp;
1205 struct hlist_node *node, *tmp;
1206
1207 role.word = 0;
1208 role.glevels = vcpu->arch.mmu.root_level;
1209 role.level = level;
1210 role.metaphysical = metaphysical;
1211 role.access = access;
1212 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1213 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1214 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1215 role.quadrant = quadrant;
1216 }
1217 pgprintk("%s: looking gfn %lx role %x\n", __func__,
1218 gfn, role.word);
1219 index = kvm_page_table_hashfn(gfn);
1220 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1221 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1222 if (sp->gfn == gfn) {
1223 if (sp->unsync)
1224 if (kvm_sync_page(vcpu, sp))
1225 continue;
1226
1227 if (sp->role.word != role.word)
1228 continue;
1229
1230 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1231 if (sp->unsync_children) {
1232 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1233 kvm_mmu_mark_parents_unsync(vcpu, sp);
1234 }
1235 pgprintk("%s: found\n", __func__);
1236 return sp;
1237 }
1238 ++vcpu->kvm->stat.mmu_cache_miss;
1239 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1240 if (!sp)
1241 return sp;
1242 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
1243 sp->gfn = gfn;
1244 sp->role = role;
1245 hlist_add_head(&sp->hash_link, bucket);
1246 if (!metaphysical) {
1247 if (rmap_write_protect(vcpu->kvm, gfn))
1248 kvm_flush_remote_tlbs(vcpu->kvm);
1249 account_shadowed(vcpu->kvm, gfn);
1250 }
1251 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1252 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1253 else
1254 nonpaging_prefetch_page(vcpu, sp);
1255 return sp;
1256 }
1257
1258 static int walk_shadow(struct kvm_shadow_walk *walker,
1259 struct kvm_vcpu *vcpu, u64 addr)
1260 {
1261 hpa_t shadow_addr;
1262 int level;
1263 int r;
1264 u64 *sptep;
1265 unsigned index;
1266
1267 shadow_addr = vcpu->arch.mmu.root_hpa;
1268 level = vcpu->arch.mmu.shadow_root_level;
1269 if (level == PT32E_ROOT_LEVEL) {
1270 shadow_addr = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1271 shadow_addr &= PT64_BASE_ADDR_MASK;
1272 if (!shadow_addr)
1273 return 1;
1274 --level;
1275 }
1276
1277 while (level >= PT_PAGE_TABLE_LEVEL) {
1278 index = SHADOW_PT_INDEX(addr, level);
1279 sptep = ((u64 *)__va(shadow_addr)) + index;
1280 r = walker->entry(walker, vcpu, addr, sptep, level);
1281 if (r)
1282 return r;
1283 shadow_addr = *sptep & PT64_BASE_ADDR_MASK;
1284 --level;
1285 }
1286 return 0;
1287 }
1288
1289 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1290 struct kvm_mmu_page *sp)
1291 {
1292 unsigned i;
1293 u64 *pt;
1294 u64 ent;
1295
1296 pt = sp->spt;
1297
1298 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1299 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1300 if (is_shadow_present_pte(pt[i]))
1301 rmap_remove(kvm, &pt[i]);
1302 pt[i] = shadow_trap_nonpresent_pte;
1303 }
1304 return;
1305 }
1306
1307 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1308 ent = pt[i];
1309
1310 if (is_shadow_present_pte(ent)) {
1311 if (!is_large_pte(ent)) {
1312 ent &= PT64_BASE_ADDR_MASK;
1313 mmu_page_remove_parent_pte(page_header(ent),
1314 &pt[i]);
1315 } else {
1316 --kvm->stat.lpages;
1317 rmap_remove(kvm, &pt[i]);
1318 }
1319 }
1320 pt[i] = shadow_trap_nonpresent_pte;
1321 }
1322 }
1323
1324 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1325 {
1326 mmu_page_remove_parent_pte(sp, parent_pte);
1327 }
1328
1329 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1330 {
1331 int i;
1332
1333 for (i = 0; i < KVM_MAX_VCPUS; ++i)
1334 if (kvm->vcpus[i])
1335 kvm->vcpus[i]->arch.last_pte_updated = NULL;
1336 }
1337
1338 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1339 {
1340 u64 *parent_pte;
1341
1342 while (sp->multimapped || sp->parent_pte) {
1343 if (!sp->multimapped)
1344 parent_pte = sp->parent_pte;
1345 else {
1346 struct kvm_pte_chain *chain;
1347
1348 chain = container_of(sp->parent_ptes.first,
1349 struct kvm_pte_chain, link);
1350 parent_pte = chain->parent_ptes[0];
1351 }
1352 BUG_ON(!parent_pte);
1353 kvm_mmu_put_page(sp, parent_pte);
1354 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
1355 }
1356 }
1357
1358 static int mmu_zap_unsync_children(struct kvm *kvm,
1359 struct kvm_mmu_page *parent)
1360 {
1361 int i, zapped = 0;
1362 struct mmu_page_path parents;
1363 struct kvm_mmu_pages pages;
1364
1365 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1366 return 0;
1367
1368 kvm_mmu_pages_init(parent, &parents, &pages);
1369 while (mmu_unsync_walk(parent, &pages)) {
1370 struct kvm_mmu_page *sp;
1371
1372 for_each_sp(pages, sp, parents, i) {
1373 kvm_mmu_zap_page(kvm, sp);
1374 mmu_pages_clear_parents(&parents);
1375 }
1376 zapped += pages.nr;
1377 kvm_mmu_pages_init(parent, &parents, &pages);
1378 }
1379
1380 return zapped;
1381 }
1382
1383 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1384 {
1385 int ret;
1386 ++kvm->stat.mmu_shadow_zapped;
1387 ret = mmu_zap_unsync_children(kvm, sp);
1388 kvm_mmu_page_unlink_children(kvm, sp);
1389 kvm_mmu_unlink_parents(kvm, sp);
1390 kvm_flush_remote_tlbs(kvm);
1391 if (!sp->role.invalid && !sp->role.metaphysical)
1392 unaccount_shadowed(kvm, sp->gfn);
1393 if (sp->unsync)
1394 kvm_unlink_unsync_page(kvm, sp);
1395 if (!sp->root_count) {
1396 hlist_del(&sp->hash_link);
1397 kvm_mmu_free_page(kvm, sp);
1398 } else {
1399 sp->role.invalid = 1;
1400 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1401 kvm_reload_remote_mmus(kvm);
1402 }
1403 kvm_mmu_reset_last_pte_updated(kvm);
1404 return ret;
1405 }
1406
1407 /*
1408 * Changing the number of mmu pages allocated to the vm
1409 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1410 */
1411 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1412 {
1413 /*
1414 * If we set the number of mmu pages to be smaller be than the
1415 * number of actived pages , we must to free some mmu pages before we
1416 * change the value
1417 */
1418
1419 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
1420 kvm_nr_mmu_pages) {
1421 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
1422 - kvm->arch.n_free_mmu_pages;
1423
1424 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
1425 struct kvm_mmu_page *page;
1426
1427 page = container_of(kvm->arch.active_mmu_pages.prev,
1428 struct kvm_mmu_page, link);
1429 kvm_mmu_zap_page(kvm, page);
1430 n_used_mmu_pages--;
1431 }
1432 kvm->arch.n_free_mmu_pages = 0;
1433 }
1434 else
1435 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1436 - kvm->arch.n_alloc_mmu_pages;
1437
1438 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1439 }
1440
1441 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1442 {
1443 unsigned index;
1444 struct hlist_head *bucket;
1445 struct kvm_mmu_page *sp;
1446 struct hlist_node *node, *n;
1447 int r;
1448
1449 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1450 r = 0;
1451 index = kvm_page_table_hashfn(gfn);
1452 bucket = &kvm->arch.mmu_page_hash[index];
1453 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1454 if (sp->gfn == gfn && !sp->role.metaphysical) {
1455 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1456 sp->role.word);
1457 r = 1;
1458 if (kvm_mmu_zap_page(kvm, sp))
1459 n = bucket->first;
1460 }
1461 return r;
1462 }
1463
1464 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1465 {
1466 struct kvm_mmu_page *sp;
1467
1468 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
1469 pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
1470 kvm_mmu_zap_page(kvm, sp);
1471 }
1472 }
1473
1474 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1475 {
1476 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
1477 struct kvm_mmu_page *sp = page_header(__pa(pte));
1478
1479 __set_bit(slot, sp->slot_bitmap);
1480 }
1481
1482 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1483 {
1484 int i;
1485 u64 *pt = sp->spt;
1486
1487 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1488 return;
1489
1490 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1491 if (pt[i] == shadow_notrap_nonpresent_pte)
1492 set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
1493 }
1494 }
1495
1496 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1497 {
1498 struct page *page;
1499
1500 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
1501
1502 if (gpa == UNMAPPED_GVA)
1503 return NULL;
1504
1505 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1506
1507 return page;
1508 }
1509
1510 /*
1511 * The function is based on mtrr_type_lookup() in
1512 * arch/x86/kernel/cpu/mtrr/generic.c
1513 */
1514 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1515 u64 start, u64 end)
1516 {
1517 int i;
1518 u64 base, mask;
1519 u8 prev_match, curr_match;
1520 int num_var_ranges = KVM_NR_VAR_MTRR;
1521
1522 if (!mtrr_state->enabled)
1523 return 0xFF;
1524
1525 /* Make end inclusive end, instead of exclusive */
1526 end--;
1527
1528 /* Look in fixed ranges. Just return the type as per start */
1529 if (mtrr_state->have_fixed && (start < 0x100000)) {
1530 int idx;
1531
1532 if (start < 0x80000) {
1533 idx = 0;
1534 idx += (start >> 16);
1535 return mtrr_state->fixed_ranges[idx];
1536 } else if (start < 0xC0000) {
1537 idx = 1 * 8;
1538 idx += ((start - 0x80000) >> 14);
1539 return mtrr_state->fixed_ranges[idx];
1540 } else if (start < 0x1000000) {
1541 idx = 3 * 8;
1542 idx += ((start - 0xC0000) >> 12);
1543 return mtrr_state->fixed_ranges[idx];
1544 }
1545 }
1546
1547 /*
1548 * Look in variable ranges
1549 * Look of multiple ranges matching this address and pick type
1550 * as per MTRR precedence
1551 */
1552 if (!(mtrr_state->enabled & 2))
1553 return mtrr_state->def_type;
1554
1555 prev_match = 0xFF;
1556 for (i = 0; i < num_var_ranges; ++i) {
1557 unsigned short start_state, end_state;
1558
1559 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1560 continue;
1561
1562 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1563 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1564 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1565 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1566
1567 start_state = ((start & mask) == (base & mask));
1568 end_state = ((end & mask) == (base & mask));
1569 if (start_state != end_state)
1570 return 0xFE;
1571
1572 if ((start & mask) != (base & mask))
1573 continue;
1574
1575 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1576 if (prev_match == 0xFF) {
1577 prev_match = curr_match;
1578 continue;
1579 }
1580
1581 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1582 curr_match == MTRR_TYPE_UNCACHABLE)
1583 return MTRR_TYPE_UNCACHABLE;
1584
1585 if ((prev_match == MTRR_TYPE_WRBACK &&
1586 curr_match == MTRR_TYPE_WRTHROUGH) ||
1587 (prev_match == MTRR_TYPE_WRTHROUGH &&
1588 curr_match == MTRR_TYPE_WRBACK)) {
1589 prev_match = MTRR_TYPE_WRTHROUGH;
1590 curr_match = MTRR_TYPE_WRTHROUGH;
1591 }
1592
1593 if (prev_match != curr_match)
1594 return MTRR_TYPE_UNCACHABLE;
1595 }
1596
1597 if (prev_match != 0xFF)
1598 return prev_match;
1599
1600 return mtrr_state->def_type;
1601 }
1602
1603 static u8 get_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1604 {
1605 u8 mtrr;
1606
1607 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1608 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1609 if (mtrr == 0xfe || mtrr == 0xff)
1610 mtrr = MTRR_TYPE_WRBACK;
1611 return mtrr;
1612 }
1613
1614 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1615 {
1616 unsigned index;
1617 struct hlist_head *bucket;
1618 struct kvm_mmu_page *s;
1619 struct hlist_node *node, *n;
1620
1621 index = kvm_page_table_hashfn(sp->gfn);
1622 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1623 /* don't unsync if pagetable is shadowed with multiple roles */
1624 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1625 if (s->gfn != sp->gfn || s->role.metaphysical)
1626 continue;
1627 if (s->role.word != sp->role.word)
1628 return 1;
1629 }
1630 ++vcpu->kvm->stat.mmu_unsync;
1631 sp->unsync = 1;
1632
1633 if (sp->global) {
1634 list_add(&sp->oos_link, &vcpu->kvm->arch.oos_global_pages);
1635 ++vcpu->kvm->stat.mmu_unsync_global;
1636 } else
1637 kvm_mmu_mark_parents_unsync(vcpu, sp);
1638
1639 mmu_convert_notrap(sp);
1640 return 0;
1641 }
1642
1643 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1644 bool can_unsync)
1645 {
1646 struct kvm_mmu_page *shadow;
1647
1648 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1649 if (shadow) {
1650 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1651 return 1;
1652 if (shadow->unsync)
1653 return 0;
1654 if (can_unsync && oos_shadow)
1655 return kvm_unsync_page(vcpu, shadow);
1656 return 1;
1657 }
1658 return 0;
1659 }
1660
1661 static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1662 unsigned pte_access, int user_fault,
1663 int write_fault, int dirty, int largepage,
1664 int global, gfn_t gfn, pfn_t pfn, bool speculative,
1665 bool can_unsync)
1666 {
1667 u64 spte;
1668 int ret = 0;
1669 u64 mt_mask = shadow_mt_mask;
1670 struct kvm_mmu_page *sp = page_header(__pa(shadow_pte));
1671
1672 if (!(vcpu->arch.cr4 & X86_CR4_PGE))
1673 global = 0;
1674 if (!global && sp->global) {
1675 sp->global = 0;
1676 if (sp->unsync) {
1677 kvm_unlink_unsync_global(vcpu->kvm, sp);
1678 kvm_mmu_mark_parents_unsync(vcpu, sp);
1679 }
1680 }
1681
1682 /*
1683 * We don't set the accessed bit, since we sometimes want to see
1684 * whether the guest actually used the pte (in order to detect
1685 * demand paging).
1686 */
1687 spte = shadow_base_present_pte | shadow_dirty_mask;
1688 if (!speculative)
1689 spte |= shadow_accessed_mask;
1690 if (!dirty)
1691 pte_access &= ~ACC_WRITE_MASK;
1692 if (pte_access & ACC_EXEC_MASK)
1693 spte |= shadow_x_mask;
1694 else
1695 spte |= shadow_nx_mask;
1696 if (pte_access & ACC_USER_MASK)
1697 spte |= shadow_user_mask;
1698 if (largepage)
1699 spte |= PT_PAGE_SIZE_MASK;
1700 if (mt_mask) {
1701 if (!kvm_is_mmio_pfn(pfn)) {
1702 mt_mask = get_memory_type(vcpu, gfn) <<
1703 kvm_x86_ops->get_mt_mask_shift();
1704 mt_mask |= VMX_EPT_IGMT_BIT;
1705 } else
1706 mt_mask = MTRR_TYPE_UNCACHABLE <<
1707 kvm_x86_ops->get_mt_mask_shift();
1708 spte |= mt_mask;
1709 }
1710
1711 spte |= (u64)pfn << PAGE_SHIFT;
1712
1713 if ((pte_access & ACC_WRITE_MASK)
1714 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1715
1716 if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
1717 ret = 1;
1718 spte = shadow_trap_nonpresent_pte;
1719 goto set_pte;
1720 }
1721
1722 spte |= PT_WRITABLE_MASK;
1723
1724 /*
1725 * Optimization: for pte sync, if spte was writable the hash
1726 * lookup is unnecessary (and expensive). Write protection
1727 * is responsibility of mmu_get_page / kvm_sync_page.
1728 * Same reasoning can be applied to dirty page accounting.
1729 */
1730 if (!can_unsync && is_writeble_pte(*shadow_pte))
1731 goto set_pte;
1732
1733 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1734 pgprintk("%s: found shadow page for %lx, marking ro\n",
1735 __func__, gfn);
1736 ret = 1;
1737 pte_access &= ~ACC_WRITE_MASK;
1738 if (is_writeble_pte(spte))
1739 spte &= ~PT_WRITABLE_MASK;
1740 }
1741 }
1742
1743 if (pte_access & ACC_WRITE_MASK)
1744 mark_page_dirty(vcpu->kvm, gfn);
1745
1746 set_pte:
1747 set_shadow_pte(shadow_pte, spte);
1748 return ret;
1749 }
1750
1751 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1752 unsigned pt_access, unsigned pte_access,
1753 int user_fault, int write_fault, int dirty,
1754 int *ptwrite, int largepage, int global,
1755 gfn_t gfn, pfn_t pfn, bool speculative)
1756 {
1757 int was_rmapped = 0;
1758 int was_writeble = is_writeble_pte(*shadow_pte);
1759
1760 pgprintk("%s: spte %llx access %x write_fault %d"
1761 " user_fault %d gfn %lx\n",
1762 __func__, *shadow_pte, pt_access,
1763 write_fault, user_fault, gfn);
1764
1765 if (is_rmap_pte(*shadow_pte)) {
1766 /*
1767 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1768 * the parent of the now unreachable PTE.
1769 */
1770 if (largepage && !is_large_pte(*shadow_pte)) {
1771 struct kvm_mmu_page *child;
1772 u64 pte = *shadow_pte;
1773
1774 child = page_header(pte & PT64_BASE_ADDR_MASK);
1775 mmu_page_remove_parent_pte(child, shadow_pte);
1776 } else if (pfn != spte_to_pfn(*shadow_pte)) {
1777 pgprintk("hfn old %lx new %lx\n",
1778 spte_to_pfn(*shadow_pte), pfn);
1779 rmap_remove(vcpu->kvm, shadow_pte);
1780 } else {
1781 if (largepage)
1782 was_rmapped = is_large_pte(*shadow_pte);
1783 else
1784 was_rmapped = 1;
1785 }
1786 }
1787 if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
1788 dirty, largepage, global, gfn, pfn, speculative, true)) {
1789 if (write_fault)
1790 *ptwrite = 1;
1791 kvm_x86_ops->tlb_flush(vcpu);
1792 }
1793
1794 pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
1795 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1796 is_large_pte(*shadow_pte)? "2MB" : "4kB",
1797 is_present_pte(*shadow_pte)?"RW":"R", gfn,
1798 *shadow_pte, shadow_pte);
1799 if (!was_rmapped && is_large_pte(*shadow_pte))
1800 ++vcpu->kvm->stat.lpages;
1801
1802 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
1803 if (!was_rmapped) {
1804 rmap_add(vcpu, shadow_pte, gfn, largepage);
1805 if (!is_rmap_pte(*shadow_pte))
1806 kvm_release_pfn_clean(pfn);
1807 } else {
1808 if (was_writeble)
1809 kvm_release_pfn_dirty(pfn);
1810 else
1811 kvm_release_pfn_clean(pfn);
1812 }
1813 if (speculative) {
1814 vcpu->arch.last_pte_updated = shadow_pte;
1815 vcpu->arch.last_pte_gfn = gfn;
1816 }
1817 }
1818
1819 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1820 {
1821 }
1822
1823 struct direct_shadow_walk {
1824 struct kvm_shadow_walk walker;
1825 pfn_t pfn;
1826 int write;
1827 int largepage;
1828 int pt_write;
1829 };
1830
1831 static int direct_map_entry(struct kvm_shadow_walk *_walk,
1832 struct kvm_vcpu *vcpu,
1833 u64 addr, u64 *sptep, int level)
1834 {
1835 struct direct_shadow_walk *walk =
1836 container_of(_walk, struct direct_shadow_walk, walker);
1837 struct kvm_mmu_page *sp;
1838 gfn_t pseudo_gfn;
1839 gfn_t gfn = addr >> PAGE_SHIFT;
1840
1841 if (level == PT_PAGE_TABLE_LEVEL
1842 || (walk->largepage && level == PT_DIRECTORY_LEVEL)) {
1843 mmu_set_spte(vcpu, sptep, ACC_ALL, ACC_ALL,
1844 0, walk->write, 1, &walk->pt_write,
1845 walk->largepage, 0, gfn, walk->pfn, false);
1846 ++vcpu->stat.pf_fixed;
1847 return 1;
1848 }
1849
1850 if (*sptep == shadow_trap_nonpresent_pte) {
1851 pseudo_gfn = (addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1852 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, (gva_t)addr, level - 1,
1853 1, ACC_ALL, sptep);
1854 if (!sp) {
1855 pgprintk("nonpaging_map: ENOMEM\n");
1856 kvm_release_pfn_clean(walk->pfn);
1857 return -ENOMEM;
1858 }
1859
1860 set_shadow_pte(sptep,
1861 __pa(sp->spt)
1862 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1863 | shadow_user_mask | shadow_x_mask);
1864 }
1865 return 0;
1866 }
1867
1868 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1869 int largepage, gfn_t gfn, pfn_t pfn)
1870 {
1871 int r;
1872 struct direct_shadow_walk walker = {
1873 .walker = { .entry = direct_map_entry, },
1874 .pfn = pfn,
1875 .largepage = largepage,
1876 .write = write,
1877 .pt_write = 0,
1878 };
1879
1880 r = walk_shadow(&walker.walker, vcpu, gfn << PAGE_SHIFT);
1881 if (r < 0)
1882 return r;
1883 return walker.pt_write;
1884 }
1885
1886 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1887 {
1888 int r;
1889 int largepage = 0;
1890 pfn_t pfn;
1891 unsigned long mmu_seq;
1892
1893 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1894 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1895 largepage = 1;
1896 }
1897
1898 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1899 smp_rmb();
1900 pfn = gfn_to_pfn(vcpu->kvm, gfn);
1901
1902 /* mmio */
1903 if (is_error_pfn(pfn)) {
1904 kvm_release_pfn_clean(pfn);
1905 return 1;
1906 }
1907
1908 spin_lock(&vcpu->kvm->mmu_lock);
1909 if (mmu_notifier_retry(vcpu, mmu_seq))
1910 goto out_unlock;
1911 kvm_mmu_free_some_pages(vcpu);
1912 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
1913 spin_unlock(&vcpu->kvm->mmu_lock);
1914
1915
1916 return r;
1917
1918 out_unlock:
1919 spin_unlock(&vcpu->kvm->mmu_lock);
1920 kvm_release_pfn_clean(pfn);
1921 return 0;
1922 }
1923
1924
1925 static void mmu_free_roots(struct kvm_vcpu *vcpu)
1926 {
1927 int i;
1928 struct kvm_mmu_page *sp;
1929
1930 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1931 return;
1932 spin_lock(&vcpu->kvm->mmu_lock);
1933 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1934 hpa_t root = vcpu->arch.mmu.root_hpa;
1935
1936 sp = page_header(root);
1937 --sp->root_count;
1938 if (!sp->root_count && sp->role.invalid)
1939 kvm_mmu_zap_page(vcpu->kvm, sp);
1940 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1941 spin_unlock(&vcpu->kvm->mmu_lock);
1942 return;
1943 }
1944 for (i = 0; i < 4; ++i) {
1945 hpa_t root = vcpu->arch.mmu.pae_root[i];
1946
1947 if (root) {
1948 root &= PT64_BASE_ADDR_MASK;
1949 sp = page_header(root);
1950 --sp->root_count;
1951 if (!sp->root_count && sp->role.invalid)
1952 kvm_mmu_zap_page(vcpu->kvm, sp);
1953 }
1954 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
1955 }
1956 spin_unlock(&vcpu->kvm->mmu_lock);
1957 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1958 }
1959
1960 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1961 {
1962 int i;
1963 gfn_t root_gfn;
1964 struct kvm_mmu_page *sp;
1965 int metaphysical = 0;
1966
1967 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
1968
1969 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1970 hpa_t root = vcpu->arch.mmu.root_hpa;
1971
1972 ASSERT(!VALID_PAGE(root));
1973 if (tdp_enabled)
1974 metaphysical = 1;
1975 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
1976 PT64_ROOT_LEVEL, metaphysical,
1977 ACC_ALL, NULL);
1978 root = __pa(sp->spt);
1979 ++sp->root_count;
1980 vcpu->arch.mmu.root_hpa = root;
1981 return;
1982 }
1983 metaphysical = !is_paging(vcpu);
1984 if (tdp_enabled)
1985 metaphysical = 1;
1986 for (i = 0; i < 4; ++i) {
1987 hpa_t root = vcpu->arch.mmu.pae_root[i];
1988
1989 ASSERT(!VALID_PAGE(root));
1990 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1991 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1992 vcpu->arch.mmu.pae_root[i] = 0;
1993 continue;
1994 }
1995 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1996 } else if (vcpu->arch.mmu.root_level == 0)
1997 root_gfn = 0;
1998 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
1999 PT32_ROOT_LEVEL, metaphysical,
2000 ACC_ALL, NULL);
2001 root = __pa(sp->spt);
2002 ++sp->root_count;
2003 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2004 }
2005 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2006 }
2007
2008 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2009 {
2010 int i;
2011 struct kvm_mmu_page *sp;
2012
2013 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2014 return;
2015 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2016 hpa_t root = vcpu->arch.mmu.root_hpa;
2017 sp = page_header(root);
2018 mmu_sync_children(vcpu, sp);
2019 return;
2020 }
2021 for (i = 0; i < 4; ++i) {
2022 hpa_t root = vcpu->arch.mmu.pae_root[i];
2023
2024 if (root) {
2025 root &= PT64_BASE_ADDR_MASK;
2026 sp = page_header(root);
2027 mmu_sync_children(vcpu, sp);
2028 }
2029 }
2030 }
2031
2032 static void mmu_sync_global(struct kvm_vcpu *vcpu)
2033 {
2034 struct kvm *kvm = vcpu->kvm;
2035 struct kvm_mmu_page *sp, *n;
2036
2037 list_for_each_entry_safe(sp, n, &kvm->arch.oos_global_pages, oos_link)
2038 kvm_sync_page(vcpu, sp);
2039 }
2040
2041 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2042 {
2043 spin_lock(&vcpu->kvm->mmu_lock);
2044 mmu_sync_roots(vcpu);
2045 spin_unlock(&vcpu->kvm->mmu_lock);
2046 }
2047
2048 void kvm_mmu_sync_global(struct kvm_vcpu *vcpu)
2049 {
2050 spin_lock(&vcpu->kvm->mmu_lock);
2051 mmu_sync_global(vcpu);
2052 spin_unlock(&vcpu->kvm->mmu_lock);
2053 }
2054
2055 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2056 {
2057 return vaddr;
2058 }
2059
2060 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2061 u32 error_code)
2062 {
2063 gfn_t gfn;
2064 int r;
2065
2066 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2067 r = mmu_topup_memory_caches(vcpu);
2068 if (r)
2069 return r;
2070
2071 ASSERT(vcpu);
2072 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2073
2074 gfn = gva >> PAGE_SHIFT;
2075
2076 return nonpaging_map(vcpu, gva & PAGE_MASK,
2077 error_code & PFERR_WRITE_MASK, gfn);
2078 }
2079
2080 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2081 u32 error_code)
2082 {
2083 pfn_t pfn;
2084 int r;
2085 int largepage = 0;
2086 gfn_t gfn = gpa >> PAGE_SHIFT;
2087 unsigned long mmu_seq;
2088
2089 ASSERT(vcpu);
2090 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2091
2092 r = mmu_topup_memory_caches(vcpu);
2093 if (r)
2094 return r;
2095
2096 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
2097 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2098 largepage = 1;
2099 }
2100 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2101 smp_rmb();
2102 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2103 if (is_error_pfn(pfn)) {
2104 kvm_release_pfn_clean(pfn);
2105 return 1;
2106 }
2107 spin_lock(&vcpu->kvm->mmu_lock);
2108 if (mmu_notifier_retry(vcpu, mmu_seq))
2109 goto out_unlock;
2110 kvm_mmu_free_some_pages(vcpu);
2111 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2112 largepage, gfn, pfn);
2113 spin_unlock(&vcpu->kvm->mmu_lock);
2114
2115 return r;
2116
2117 out_unlock:
2118 spin_unlock(&vcpu->kvm->mmu_lock);
2119 kvm_release_pfn_clean(pfn);
2120 return 0;
2121 }
2122
2123 static void nonpaging_free(struct kvm_vcpu *vcpu)
2124 {
2125 mmu_free_roots(vcpu);
2126 }
2127
2128 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2129 {
2130 struct kvm_mmu *context = &vcpu->arch.mmu;
2131
2132 context->new_cr3 = nonpaging_new_cr3;
2133 context->page_fault = nonpaging_page_fault;
2134 context->gva_to_gpa = nonpaging_gva_to_gpa;
2135 context->free = nonpaging_free;
2136 context->prefetch_page = nonpaging_prefetch_page;
2137 context->sync_page = nonpaging_sync_page;
2138 context->invlpg = nonpaging_invlpg;
2139 context->root_level = 0;
2140 context->shadow_root_level = PT32E_ROOT_LEVEL;
2141 context->root_hpa = INVALID_PAGE;
2142 return 0;
2143 }
2144
2145 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2146 {
2147 ++vcpu->stat.tlb_flush;
2148 kvm_x86_ops->tlb_flush(vcpu);
2149 }
2150
2151 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2152 {
2153 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2154 mmu_free_roots(vcpu);
2155 }
2156
2157 static void inject_page_fault(struct kvm_vcpu *vcpu,
2158 u64 addr,
2159 u32 err_code)
2160 {
2161 kvm_inject_page_fault(vcpu, addr, err_code);
2162 }
2163
2164 static void paging_free(struct kvm_vcpu *vcpu)
2165 {
2166 nonpaging_free(vcpu);
2167 }
2168
2169 #define PTTYPE 64
2170 #include "paging_tmpl.h"
2171 #undef PTTYPE
2172
2173 #define PTTYPE 32
2174 #include "paging_tmpl.h"
2175 #undef PTTYPE
2176
2177 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2178 {
2179 struct kvm_mmu *context = &vcpu->arch.mmu;
2180
2181 ASSERT(is_pae(vcpu));
2182 context->new_cr3 = paging_new_cr3;
2183 context->page_fault = paging64_page_fault;
2184 context->gva_to_gpa = paging64_gva_to_gpa;
2185 context->prefetch_page = paging64_prefetch_page;
2186 context->sync_page = paging64_sync_page;
2187 context->invlpg = paging64_invlpg;
2188 context->free = paging_free;
2189 context->root_level = level;
2190 context->shadow_root_level = level;
2191 context->root_hpa = INVALID_PAGE;
2192 return 0;
2193 }
2194
2195 static int paging64_init_context(struct kvm_vcpu *vcpu)
2196 {
2197 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2198 }
2199
2200 static int paging32_init_context(struct kvm_vcpu *vcpu)
2201 {
2202 struct kvm_mmu *context = &vcpu->arch.mmu;
2203
2204 context->new_cr3 = paging_new_cr3;
2205 context->page_fault = paging32_page_fault;
2206 context->gva_to_gpa = paging32_gva_to_gpa;
2207 context->free = paging_free;
2208 context->prefetch_page = paging32_prefetch_page;
2209 context->sync_page = paging32_sync_page;
2210 context->invlpg = paging32_invlpg;
2211 context->root_level = PT32_ROOT_LEVEL;
2212 context->shadow_root_level = PT32E_ROOT_LEVEL;
2213 context->root_hpa = INVALID_PAGE;
2214 return 0;
2215 }
2216
2217 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2218 {
2219 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2220 }
2221
2222 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2223 {
2224 struct kvm_mmu *context = &vcpu->arch.mmu;
2225
2226 context->new_cr3 = nonpaging_new_cr3;
2227 context->page_fault = tdp_page_fault;
2228 context->free = nonpaging_free;
2229 context->prefetch_page = nonpaging_prefetch_page;
2230 context->sync_page = nonpaging_sync_page;
2231 context->invlpg = nonpaging_invlpg;
2232 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2233 context->root_hpa = INVALID_PAGE;
2234
2235 if (!is_paging(vcpu)) {
2236 context->gva_to_gpa = nonpaging_gva_to_gpa;
2237 context->root_level = 0;
2238 } else if (is_long_mode(vcpu)) {
2239 context->gva_to_gpa = paging64_gva_to_gpa;
2240 context->root_level = PT64_ROOT_LEVEL;
2241 } else if (is_pae(vcpu)) {
2242 context->gva_to_gpa = paging64_gva_to_gpa;
2243 context->root_level = PT32E_ROOT_LEVEL;
2244 } else {
2245 context->gva_to_gpa = paging32_gva_to_gpa;
2246 context->root_level = PT32_ROOT_LEVEL;
2247 }
2248
2249 return 0;
2250 }
2251
2252 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2253 {
2254 ASSERT(vcpu);
2255 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2256
2257 if (!is_paging(vcpu))
2258 return nonpaging_init_context(vcpu);
2259 else if (is_long_mode(vcpu))
2260 return paging64_init_context(vcpu);
2261 else if (is_pae(vcpu))
2262 return paging32E_init_context(vcpu);
2263 else
2264 return paging32_init_context(vcpu);
2265 }
2266
2267 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2268 {
2269 vcpu->arch.update_pte.pfn = bad_pfn;
2270
2271 if (tdp_enabled)
2272 return init_kvm_tdp_mmu(vcpu);
2273 else
2274 return init_kvm_softmmu(vcpu);
2275 }
2276
2277 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2278 {
2279 ASSERT(vcpu);
2280 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2281 vcpu->arch.mmu.free(vcpu);
2282 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2283 }
2284 }
2285
2286 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2287 {
2288 destroy_kvm_mmu(vcpu);
2289 return init_kvm_mmu(vcpu);
2290 }
2291 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2292
2293 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2294 {
2295 int r;
2296
2297 r = mmu_topup_memory_caches(vcpu);
2298 if (r)
2299 goto out;
2300 spin_lock(&vcpu->kvm->mmu_lock);
2301 kvm_mmu_free_some_pages(vcpu);
2302 mmu_alloc_roots(vcpu);
2303 mmu_sync_roots(vcpu);
2304 spin_unlock(&vcpu->kvm->mmu_lock);
2305 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2306 kvm_mmu_flush_tlb(vcpu);
2307 out:
2308 return r;
2309 }
2310 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2311
2312 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2313 {
2314 mmu_free_roots(vcpu);
2315 }
2316
2317 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2318 struct kvm_mmu_page *sp,
2319 u64 *spte)
2320 {
2321 u64 pte;
2322 struct kvm_mmu_page *child;
2323
2324 pte = *spte;
2325 if (is_shadow_present_pte(pte)) {
2326 if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
2327 is_large_pte(pte))
2328 rmap_remove(vcpu->kvm, spte);
2329 else {
2330 child = page_header(pte & PT64_BASE_ADDR_MASK);
2331 mmu_page_remove_parent_pte(child, spte);
2332 }
2333 }
2334 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
2335 if (is_large_pte(pte))
2336 --vcpu->kvm->stat.lpages;
2337 }
2338
2339 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2340 struct kvm_mmu_page *sp,
2341 u64 *spte,
2342 const void *new)
2343 {
2344 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2345 if (!vcpu->arch.update_pte.largepage ||
2346 sp->role.glevels == PT32_ROOT_LEVEL) {
2347 ++vcpu->kvm->stat.mmu_pde_zapped;
2348 return;
2349 }
2350 }
2351
2352 ++vcpu->kvm->stat.mmu_pte_updated;
2353 if (sp->role.glevels == PT32_ROOT_LEVEL)
2354 paging32_update_pte(vcpu, sp, spte, new);
2355 else
2356 paging64_update_pte(vcpu, sp, spte, new);
2357 }
2358
2359 static bool need_remote_flush(u64 old, u64 new)
2360 {
2361 if (!is_shadow_present_pte(old))
2362 return false;
2363 if (!is_shadow_present_pte(new))
2364 return true;
2365 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2366 return true;
2367 old ^= PT64_NX_MASK;
2368 new ^= PT64_NX_MASK;
2369 return (old & ~new & PT64_PERM_MASK) != 0;
2370 }
2371
2372 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2373 {
2374 if (need_remote_flush(old, new))
2375 kvm_flush_remote_tlbs(vcpu->kvm);
2376 else
2377 kvm_mmu_flush_tlb(vcpu);
2378 }
2379
2380 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2381 {
2382 u64 *spte = vcpu->arch.last_pte_updated;
2383
2384 return !!(spte && (*spte & shadow_accessed_mask));
2385 }
2386
2387 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2388 const u8 *new, int bytes)
2389 {
2390 gfn_t gfn;
2391 int r;
2392 u64 gpte = 0;
2393 pfn_t pfn;
2394
2395 vcpu->arch.update_pte.largepage = 0;
2396
2397 if (bytes != 4 && bytes != 8)
2398 return;
2399
2400 /*
2401 * Assume that the pte write on a page table of the same type
2402 * as the current vcpu paging mode. This is nearly always true
2403 * (might be false while changing modes). Note it is verified later
2404 * by update_pte().
2405 */
2406 if (is_pae(vcpu)) {
2407 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2408 if ((bytes == 4) && (gpa % 4 == 0)) {
2409 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2410 if (r)
2411 return;
2412 memcpy((void *)&gpte + (gpa % 8), new, 4);
2413 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2414 memcpy((void *)&gpte, new, 8);
2415 }
2416 } else {
2417 if ((bytes == 4) && (gpa % 4 == 0))
2418 memcpy((void *)&gpte, new, 4);
2419 }
2420 if (!is_present_pte(gpte))
2421 return;
2422 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2423
2424 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
2425 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2426 vcpu->arch.update_pte.largepage = 1;
2427 }
2428 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2429 smp_rmb();
2430 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2431
2432 if (is_error_pfn(pfn)) {
2433 kvm_release_pfn_clean(pfn);
2434 return;
2435 }
2436 vcpu->arch.update_pte.gfn = gfn;
2437 vcpu->arch.update_pte.pfn = pfn;
2438 }
2439
2440 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2441 {
2442 u64 *spte = vcpu->arch.last_pte_updated;
2443
2444 if (spte
2445 && vcpu->arch.last_pte_gfn == gfn
2446 && shadow_accessed_mask
2447 && !(*spte & shadow_accessed_mask)
2448 && is_shadow_present_pte(*spte))
2449 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2450 }
2451
2452 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2453 const u8 *new, int bytes,
2454 bool guest_initiated)
2455 {
2456 gfn_t gfn = gpa >> PAGE_SHIFT;
2457 struct kvm_mmu_page *sp;
2458 struct hlist_node *node, *n;
2459 struct hlist_head *bucket;
2460 unsigned index;
2461 u64 entry, gentry;
2462 u64 *spte;
2463 unsigned offset = offset_in_page(gpa);
2464 unsigned pte_size;
2465 unsigned page_offset;
2466 unsigned misaligned;
2467 unsigned quadrant;
2468 int level;
2469 int flooded = 0;
2470 int npte;
2471 int r;
2472
2473 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2474 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
2475 spin_lock(&vcpu->kvm->mmu_lock);
2476 kvm_mmu_access_page(vcpu, gfn);
2477 kvm_mmu_free_some_pages(vcpu);
2478 ++vcpu->kvm->stat.mmu_pte_write;
2479 kvm_mmu_audit(vcpu, "pre pte write");
2480 if (guest_initiated) {
2481 if (gfn == vcpu->arch.last_pt_write_gfn
2482 && !last_updated_pte_accessed(vcpu)) {
2483 ++vcpu->arch.last_pt_write_count;
2484 if (vcpu->arch.last_pt_write_count >= 3)
2485 flooded = 1;
2486 } else {
2487 vcpu->arch.last_pt_write_gfn = gfn;
2488 vcpu->arch.last_pt_write_count = 1;
2489 vcpu->arch.last_pte_updated = NULL;
2490 }
2491 }
2492 index = kvm_page_table_hashfn(gfn);
2493 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2494 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2495 if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid)
2496 continue;
2497 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
2498 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2499 misaligned |= bytes < 4;
2500 if (misaligned || flooded) {
2501 /*
2502 * Misaligned accesses are too much trouble to fix
2503 * up; also, they usually indicate a page is not used
2504 * as a page table.
2505 *
2506 * If we're seeing too many writes to a page,
2507 * it may no longer be a page table, or we may be
2508 * forking, in which case it is better to unmap the
2509 * page.
2510 */
2511 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2512 gpa, bytes, sp->role.word);
2513 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2514 n = bucket->first;
2515 ++vcpu->kvm->stat.mmu_flooded;
2516 continue;
2517 }
2518 page_offset = offset;
2519 level = sp->role.level;
2520 npte = 1;
2521 if (sp->role.glevels == PT32_ROOT_LEVEL) {
2522 page_offset <<= 1; /* 32->64 */
2523 /*
2524 * A 32-bit pde maps 4MB while the shadow pdes map
2525 * only 2MB. So we need to double the offset again
2526 * and zap two pdes instead of one.
2527 */
2528 if (level == PT32_ROOT_LEVEL) {
2529 page_offset &= ~7; /* kill rounding error */
2530 page_offset <<= 1;
2531 npte = 2;
2532 }
2533 quadrant = page_offset >> PAGE_SHIFT;
2534 page_offset &= ~PAGE_MASK;
2535 if (quadrant != sp->role.quadrant)
2536 continue;
2537 }
2538 spte = &sp->spt[page_offset / sizeof(*spte)];
2539 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2540 gentry = 0;
2541 r = kvm_read_guest_atomic(vcpu->kvm,
2542 gpa & ~(u64)(pte_size - 1),
2543 &gentry, pte_size);
2544 new = (const void *)&gentry;
2545 if (r < 0)
2546 new = NULL;
2547 }
2548 while (npte--) {
2549 entry = *spte;
2550 mmu_pte_write_zap_pte(vcpu, sp, spte);
2551 if (new)
2552 mmu_pte_write_new_pte(vcpu, sp, spte, new);
2553 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2554 ++spte;
2555 }
2556 }
2557 kvm_mmu_audit(vcpu, "post pte write");
2558 spin_unlock(&vcpu->kvm->mmu_lock);
2559 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2560 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2561 vcpu->arch.update_pte.pfn = bad_pfn;
2562 }
2563 }
2564
2565 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2566 {
2567 gpa_t gpa;
2568 int r;
2569
2570 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
2571
2572 spin_lock(&vcpu->kvm->mmu_lock);
2573 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2574 spin_unlock(&vcpu->kvm->mmu_lock);
2575 return r;
2576 }
2577 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2578
2579 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2580 {
2581 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
2582 struct kvm_mmu_page *sp;
2583
2584 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2585 struct kvm_mmu_page, link);
2586 kvm_mmu_zap_page(vcpu->kvm, sp);
2587 ++vcpu->kvm->stat.mmu_recycled;
2588 }
2589 }
2590
2591 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2592 {
2593 int r;
2594 enum emulation_result er;
2595
2596 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2597 if (r < 0)
2598 goto out;
2599
2600 if (!r) {
2601 r = 1;
2602 goto out;
2603 }
2604
2605 r = mmu_topup_memory_caches(vcpu);
2606 if (r)
2607 goto out;
2608
2609 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
2610
2611 switch (er) {
2612 case EMULATE_DONE:
2613 return 1;
2614 case EMULATE_DO_MMIO:
2615 ++vcpu->stat.mmio_exits;
2616 return 0;
2617 case EMULATE_FAIL:
2618 kvm_report_emulation_failure(vcpu, "pagetable");
2619 return 1;
2620 default:
2621 BUG();
2622 }
2623 out:
2624 return r;
2625 }
2626 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2627
2628 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2629 {
2630 vcpu->arch.mmu.invlpg(vcpu, gva);
2631 kvm_mmu_flush_tlb(vcpu);
2632 ++vcpu->stat.invlpg;
2633 }
2634 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2635
2636 void kvm_enable_tdp(void)
2637 {
2638 tdp_enabled = true;
2639 }
2640 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2641
2642 void kvm_disable_tdp(void)
2643 {
2644 tdp_enabled = false;
2645 }
2646 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2647
2648 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2649 {
2650 struct kvm_mmu_page *sp;
2651
2652 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2653 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
2654 struct kvm_mmu_page, link);
2655 kvm_mmu_zap_page(vcpu->kvm, sp);
2656 cond_resched();
2657 }
2658 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2659 }
2660
2661 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2662 {
2663 struct page *page;
2664 int i;
2665
2666 ASSERT(vcpu);
2667
2668 if (vcpu->kvm->arch.n_requested_mmu_pages)
2669 vcpu->kvm->arch.n_free_mmu_pages =
2670 vcpu->kvm->arch.n_requested_mmu_pages;
2671 else
2672 vcpu->kvm->arch.n_free_mmu_pages =
2673 vcpu->kvm->arch.n_alloc_mmu_pages;
2674 /*
2675 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2676 * Therefore we need to allocate shadow page tables in the first
2677 * 4GB of memory, which happens to fit the DMA32 zone.
2678 */
2679 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2680 if (!page)
2681 goto error_1;
2682 vcpu->arch.mmu.pae_root = page_address(page);
2683 for (i = 0; i < 4; ++i)
2684 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2685
2686 return 0;
2687
2688 error_1:
2689 free_mmu_pages(vcpu);
2690 return -ENOMEM;
2691 }
2692
2693 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2694 {
2695 ASSERT(vcpu);
2696 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2697
2698 return alloc_mmu_pages(vcpu);
2699 }
2700
2701 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2702 {
2703 ASSERT(vcpu);
2704 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2705
2706 return init_kvm_mmu(vcpu);
2707 }
2708
2709 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2710 {
2711 ASSERT(vcpu);
2712
2713 destroy_kvm_mmu(vcpu);
2714 free_mmu_pages(vcpu);
2715 mmu_free_memory_caches(vcpu);
2716 }
2717
2718 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2719 {
2720 struct kvm_mmu_page *sp;
2721
2722 spin_lock(&kvm->mmu_lock);
2723 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2724 int i;
2725 u64 *pt;
2726
2727 if (!test_bit(slot, sp->slot_bitmap))
2728 continue;
2729
2730 pt = sp->spt;
2731 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2732 /* avoid RMW */
2733 if (pt[i] & PT_WRITABLE_MASK)
2734 pt[i] &= ~PT_WRITABLE_MASK;
2735 }
2736 kvm_flush_remote_tlbs(kvm);
2737 spin_unlock(&kvm->mmu_lock);
2738 }
2739
2740 void kvm_mmu_zap_all(struct kvm *kvm)
2741 {
2742 struct kvm_mmu_page *sp, *node;
2743
2744 spin_lock(&kvm->mmu_lock);
2745 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2746 if (kvm_mmu_zap_page(kvm, sp))
2747 node = container_of(kvm->arch.active_mmu_pages.next,
2748 struct kvm_mmu_page, link);
2749 spin_unlock(&kvm->mmu_lock);
2750
2751 kvm_flush_remote_tlbs(kvm);
2752 }
2753
2754 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2755 {
2756 struct kvm_mmu_page *page;
2757
2758 page = container_of(kvm->arch.active_mmu_pages.prev,
2759 struct kvm_mmu_page, link);
2760 kvm_mmu_zap_page(kvm, page);
2761 }
2762
2763 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2764 {
2765 struct kvm *kvm;
2766 struct kvm *kvm_freed = NULL;
2767 int cache_count = 0;
2768
2769 spin_lock(&kvm_lock);
2770
2771 list_for_each_entry(kvm, &vm_list, vm_list) {
2772 int npages;
2773
2774 if (!down_read_trylock(&kvm->slots_lock))
2775 continue;
2776 spin_lock(&kvm->mmu_lock);
2777 npages = kvm->arch.n_alloc_mmu_pages -
2778 kvm->arch.n_free_mmu_pages;
2779 cache_count += npages;
2780 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2781 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2782 cache_count--;
2783 kvm_freed = kvm;
2784 }
2785 nr_to_scan--;
2786
2787 spin_unlock(&kvm->mmu_lock);
2788 up_read(&kvm->slots_lock);
2789 }
2790 if (kvm_freed)
2791 list_move_tail(&kvm_freed->vm_list, &vm_list);
2792
2793 spin_unlock(&kvm_lock);
2794
2795 return cache_count;
2796 }
2797
2798 static struct shrinker mmu_shrinker = {
2799 .shrink = mmu_shrink,
2800 .seeks = DEFAULT_SEEKS * 10,
2801 };
2802
2803 static void mmu_destroy_caches(void)
2804 {
2805 if (pte_chain_cache)
2806 kmem_cache_destroy(pte_chain_cache);
2807 if (rmap_desc_cache)
2808 kmem_cache_destroy(rmap_desc_cache);
2809 if (mmu_page_header_cache)
2810 kmem_cache_destroy(mmu_page_header_cache);
2811 }
2812
2813 void kvm_mmu_module_exit(void)
2814 {
2815 mmu_destroy_caches();
2816 unregister_shrinker(&mmu_shrinker);
2817 }
2818
2819 int kvm_mmu_module_init(void)
2820 {
2821 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2822 sizeof(struct kvm_pte_chain),
2823 0, 0, NULL);
2824 if (!pte_chain_cache)
2825 goto nomem;
2826 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2827 sizeof(struct kvm_rmap_desc),
2828 0, 0, NULL);
2829 if (!rmap_desc_cache)
2830 goto nomem;
2831
2832 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2833 sizeof(struct kvm_mmu_page),
2834 0, 0, NULL);
2835 if (!mmu_page_header_cache)
2836 goto nomem;
2837
2838 register_shrinker(&mmu_shrinker);
2839
2840 return 0;
2841
2842 nomem:
2843 mmu_destroy_caches();
2844 return -ENOMEM;
2845 }
2846
2847 /*
2848 * Caculate mmu pages needed for kvm.
2849 */
2850 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2851 {
2852 int i;
2853 unsigned int nr_mmu_pages;
2854 unsigned int nr_pages = 0;
2855
2856 for (i = 0; i < kvm->nmemslots; i++)
2857 nr_pages += kvm->memslots[i].npages;
2858
2859 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2860 nr_mmu_pages = max(nr_mmu_pages,
2861 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2862
2863 return nr_mmu_pages;
2864 }
2865
2866 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2867 unsigned len)
2868 {
2869 if (len > buffer->len)
2870 return NULL;
2871 return buffer->ptr;
2872 }
2873
2874 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2875 unsigned len)
2876 {
2877 void *ret;
2878
2879 ret = pv_mmu_peek_buffer(buffer, len);
2880 if (!ret)
2881 return ret;
2882 buffer->ptr += len;
2883 buffer->len -= len;
2884 buffer->processed += len;
2885 return ret;
2886 }
2887
2888 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2889 gpa_t addr, gpa_t value)
2890 {
2891 int bytes = 8;
2892 int r;
2893
2894 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2895 bytes = 4;
2896
2897 r = mmu_topup_memory_caches(vcpu);
2898 if (r)
2899 return r;
2900
2901 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2902 return -EFAULT;
2903
2904 return 1;
2905 }
2906
2907 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2908 {
2909 kvm_x86_ops->tlb_flush(vcpu);
2910 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
2911 return 1;
2912 }
2913
2914 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2915 {
2916 spin_lock(&vcpu->kvm->mmu_lock);
2917 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2918 spin_unlock(&vcpu->kvm->mmu_lock);
2919 return 1;
2920 }
2921
2922 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2923 struct kvm_pv_mmu_op_buffer *buffer)
2924 {
2925 struct kvm_mmu_op_header *header;
2926
2927 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2928 if (!header)
2929 return 0;
2930 switch (header->op) {
2931 case KVM_MMU_OP_WRITE_PTE: {
2932 struct kvm_mmu_op_write_pte *wpte;
2933
2934 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2935 if (!wpte)
2936 return 0;
2937 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2938 wpte->pte_val);
2939 }
2940 case KVM_MMU_OP_FLUSH_TLB: {
2941 struct kvm_mmu_op_flush_tlb *ftlb;
2942
2943 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
2944 if (!ftlb)
2945 return 0;
2946 return kvm_pv_mmu_flush_tlb(vcpu);
2947 }
2948 case KVM_MMU_OP_RELEASE_PT: {
2949 struct kvm_mmu_op_release_pt *rpt;
2950
2951 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
2952 if (!rpt)
2953 return 0;
2954 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
2955 }
2956 default: return 0;
2957 }
2958 }
2959
2960 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2961 gpa_t addr, unsigned long *ret)
2962 {
2963 int r;
2964 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2965
2966 buffer->ptr = buffer->buf;
2967 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
2968 buffer->processed = 0;
2969
2970 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2971 if (r)
2972 goto out;
2973
2974 while (buffer->len) {
2975 r = kvm_pv_mmu_op_one(vcpu, buffer);
2976 if (r < 0)
2977 goto out;
2978 if (r == 0)
2979 break;
2980 }
2981
2982 r = 1;
2983 out:
2984 *ret = buffer->processed;
2985 return r;
2986 }
2987
2988 #ifdef AUDIT
2989
2990 static const char *audit_msg;
2991
2992 static gva_t canonicalize(gva_t gva)
2993 {
2994 #ifdef CONFIG_X86_64
2995 gva = (long long)(gva << 16) >> 16;
2996 #endif
2997 return gva;
2998 }
2999
3000 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3001 gva_t va, int level)
3002 {
3003 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3004 int i;
3005 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3006
3007 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3008 u64 ent = pt[i];
3009
3010 if (ent == shadow_trap_nonpresent_pte)
3011 continue;
3012
3013 va = canonicalize(va);
3014 if (level > 1) {
3015 if (ent == shadow_notrap_nonpresent_pte)
3016 printk(KERN_ERR "audit: (%s) nontrapping pte"
3017 " in nonleaf level: levels %d gva %lx"
3018 " level %d pte %llx\n", audit_msg,
3019 vcpu->arch.mmu.root_level, va, level, ent);
3020
3021 audit_mappings_page(vcpu, ent, va, level - 1);
3022 } else {
3023 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
3024 hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
3025
3026 if (is_shadow_present_pte(ent)
3027 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3028 printk(KERN_ERR "xx audit error: (%s) levels %d"
3029 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3030 audit_msg, vcpu->arch.mmu.root_level,
3031 va, gpa, hpa, ent,
3032 is_shadow_present_pte(ent));
3033 else if (ent == shadow_notrap_nonpresent_pte
3034 && !is_error_hpa(hpa))
3035 printk(KERN_ERR "audit: (%s) notrap shadow,"
3036 " valid guest gva %lx\n", audit_msg, va);
3037 kvm_release_pfn_clean(pfn);
3038
3039 }
3040 }
3041 }
3042
3043 static void audit_mappings(struct kvm_vcpu *vcpu)
3044 {
3045 unsigned i;
3046
3047 if (vcpu->arch.mmu.root_level == 4)
3048 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3049 else
3050 for (i = 0; i < 4; ++i)
3051 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3052 audit_mappings_page(vcpu,
3053 vcpu->arch.mmu.pae_root[i],
3054 i << 30,
3055 2);
3056 }
3057
3058 static int count_rmaps(struct kvm_vcpu *vcpu)
3059 {
3060 int nmaps = 0;
3061 int i, j, k;
3062
3063 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3064 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
3065 struct kvm_rmap_desc *d;
3066
3067 for (j = 0; j < m->npages; ++j) {
3068 unsigned long *rmapp = &m->rmap[j];
3069
3070 if (!*rmapp)
3071 continue;
3072 if (!(*rmapp & 1)) {
3073 ++nmaps;
3074 continue;
3075 }
3076 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3077 while (d) {
3078 for (k = 0; k < RMAP_EXT; ++k)
3079 if (d->shadow_ptes[k])
3080 ++nmaps;
3081 else
3082 break;
3083 d = d->more;
3084 }
3085 }
3086 }
3087 return nmaps;
3088 }
3089
3090 static int count_writable_mappings(struct kvm_vcpu *vcpu)
3091 {
3092 int nmaps = 0;
3093 struct kvm_mmu_page *sp;
3094 int i;
3095
3096 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3097 u64 *pt = sp->spt;
3098
3099 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3100 continue;
3101
3102 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3103 u64 ent = pt[i];
3104
3105 if (!(ent & PT_PRESENT_MASK))
3106 continue;
3107 if (!(ent & PT_WRITABLE_MASK))
3108 continue;
3109 ++nmaps;
3110 }
3111 }
3112 return nmaps;
3113 }
3114
3115 static void audit_rmap(struct kvm_vcpu *vcpu)
3116 {
3117 int n_rmap = count_rmaps(vcpu);
3118 int n_actual = count_writable_mappings(vcpu);
3119
3120 if (n_rmap != n_actual)
3121 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
3122 __func__, audit_msg, n_rmap, n_actual);
3123 }
3124
3125 static void audit_write_protection(struct kvm_vcpu *vcpu)
3126 {
3127 struct kvm_mmu_page *sp;
3128 struct kvm_memory_slot *slot;
3129 unsigned long *rmapp;
3130 gfn_t gfn;
3131
3132 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3133 if (sp->role.metaphysical)
3134 continue;
3135
3136 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3137 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3138 rmapp = &slot->rmap[gfn - slot->base_gfn];
3139 if (*rmapp)
3140 printk(KERN_ERR "%s: (%s) shadow page has writable"
3141 " mappings: gfn %lx role %x\n",
3142 __func__, audit_msg, sp->gfn,
3143 sp->role.word);
3144 }
3145 }
3146
3147 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3148 {
3149 int olddbg = dbg;
3150
3151 dbg = 0;
3152 audit_msg = msg;
3153 audit_rmap(vcpu);
3154 audit_write_protection(vcpu);
3155 audit_mappings(vcpu);
3156 dbg = olddbg;
3157 }
3158
3159 #endif
Support for the Chinese Samsung S3C2440 based development boards