drivers/ide/ide-dma.c

   1 /*
   2  *  IDE DMA support (including IDE PCI BM-DMA).
   3  *
   4  *  Copyright (C) 1995-1998   Mark Lord
   5  *  Copyright (C) 1999-2000   Andre Hedrick <andre@linux-ide.org>
   6  *  Copyright (C) 2004, 2007  Bartlomiej Zolnierkiewicz
   7  *
   8  *  May be copied or modified under the terms of the GNU General Public License
   9  *
  10  *  DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
  11  */
  12
  13 /*
  14  *  Special Thanks to Mark for his Six years of work.
  15  */
  16
  17 /*
  18  * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
  19  * fixing the problem with the BIOS on some Acer motherboards.
  20  *
  21  * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
  22  * "TX" chipset compatibility and for providing patches for the "TX" chipset.
  23  *
  24  * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
  25  * at generic DMA -- his patches were referred to when preparing this code.
  26  *
  27  * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
  28  * for supplying a Promise UDMA board & WD UDMA drive for this work!
  29  */
  30
  31 #include <linux/types.h>
  32 #include <linux/kernel.h>
  33 #include <linux/ide.h>
  34 #include <linux/scatterlist.h>
  35 #include <linux/dma-mapping.h>
  36
  37 static const struct drive_list_entry drive_whitelist[] = {
  38         { "Micropolis 2112A"    ,       NULL            },
  39         { "CONNER CTMA 4000"    ,       NULL            },
  40         { "CONNER CTT8000-A"    ,       NULL            },
  41         { "ST34342A"            ,       NULL            },
  42         { NULL                  ,       NULL            }
  43 };
  44
  45 static const struct drive_list_entry drive_blacklist[] = {
  46         { "WDC AC11000H"        ,       NULL            },
  47         { "WDC AC22100H"        ,       NULL            },
  48         { "WDC AC32500H"        ,       NULL            },
  49         { "WDC AC33100H"        ,       NULL            },
  50         { "WDC AC31600H"        ,       NULL            },
  51         { "WDC AC32100H"        ,       "24.09P07"      },
  52         { "WDC AC23200L"        ,       "21.10N21"      },
  53         { "Compaq CRD-8241B"    ,       NULL            },
  54         { "CRD-8400B"           ,       NULL            },
  55         { "CRD-8480B",                  NULL            },
  56         { "CRD-8482B",                  NULL            },
  57         { "CRD-84"              ,       NULL            },
  58         { "SanDisk SDP3B"       ,       NULL            },
  59         { "SanDisk SDP3B-64"    ,       NULL            },
  60         { "SANYO CD-ROM CRD"    ,       NULL            },
  61         { "HITACHI CDR-8"       ,       NULL            },
  62         { "HITACHI CDR-8335"    ,       NULL            },
  63         { "HITACHI CDR-8435"    ,       NULL            },
  64         { "Toshiba CD-ROM XM-6202B"     ,       NULL            },
  65         { "TOSHIBA CD-ROM XM-1702BC",   NULL            },
  66         { "CD-532E-A"           ,       NULL            },
  67         { "E-IDE CD-ROM CR-840",        NULL            },
  68         { "CD-ROM Drive/F5A",   NULL            },
  69         { "WPI CDD-820",                NULL            },
  70         { "SAMSUNG CD-ROM SC-148C",     NULL            },
  71         { "SAMSUNG CD-ROM SC",  NULL            },
  72         { "ATAPI CD-ROM DRIVE 40X MAXIMUM",     NULL            },
  73         { "_NEC DV5800A",               NULL            },
  74         { "SAMSUNG CD-ROM SN-124",      "N001" },
  75         { "Seagate STT20000A",          NULL  },
  76         { "CD-ROM CDR_U200",            "1.09" },
  77         { NULL                  ,       NULL            }
  78
  79 };
  80
  81 /**
  82  *      ide_dma_intr    -       IDE DMA interrupt handler
  83  *      @drive: the drive the interrupt is for
  84  *
  85  *      Handle an interrupt completing a read/write DMA transfer on an
  86  *      IDE device
  87  */
  88
  89 ide_startstop_t ide_dma_intr(ide_drive_t *drive)
  90 {
  91         ide_hwif_t *hwif = drive->hwif;
  92         u8 stat = 0, dma_stat = 0;
  93
  94         dma_stat = hwif->dma_ops->dma_end(drive);
  95         stat = hwif->tp_ops->read_status(hwif);
  96
  97         if (OK_STAT(stat, DRIVE_READY, drive->bad_wstat | ATA_DRQ)) {
  98                 if (!dma_stat) {
  99                         struct request *rq = hwif->hwgroup->rq;
 100
 101                         task_end_request(drive, rq, stat);
 102                         return ide_stopped;
 103                 }
 104                 printk(KERN_ERR "%s: %s: bad DMA status (0x%02x)\n",
 105                         drive->name, __func__, dma_stat);
 106         }
 107         return ide_error(drive, "dma_intr", stat);
 108 }
 109 EXPORT_SYMBOL_GPL(ide_dma_intr);
 110
 111 int ide_dma_good_drive(ide_drive_t *drive)
 112 {
 113         return ide_in_drive_list(drive->id, drive_whitelist);
 114 }
 115
 116 /**
 117  *      ide_build_sglist        -       map IDE scatter gather for DMA I/O
 118  *      @drive: the drive to build the DMA table for
 119  *      @rq: the request holding the sg list
 120  *
 121  *      Perform the DMA mapping magic necessary to access the source or
 122  *      target buffers of a request via DMA.  The lower layers of the
 123  *      kernel provide the necessary cache management so that we can
 124  *      operate in a portable fashion.
 125  */
 126
 127 int ide_build_sglist(ide_drive_t *drive, struct request *rq)
 128 {
 129         ide_hwif_t *hwif = drive->hwif;
 130         struct scatterlist *sg = hwif->sg_table;
 131
 132         ide_map_sg(drive, rq);
 133
 134         if (rq_data_dir(rq) == READ)
 135                 hwif->sg_dma_direction = DMA_FROM_DEVICE;
 136         else
 137                 hwif->sg_dma_direction = DMA_TO_DEVICE;
 138
 139         return dma_map_sg(hwif->dev, sg, hwif->sg_nents,
 140                           hwif->sg_dma_direction);
 141 }
 142 EXPORT_SYMBOL_GPL(ide_build_sglist);
 143
 144 /**
 145  *      ide_destroy_dmatable    -       clean up DMA mapping
 146  *      @drive: The drive to unmap
 147  *
 148  *      Teardown mappings after DMA has completed. This must be called
 149  *      after the completion of each use of ide_build_dmatable and before
 150  *      the next use of ide_build_dmatable. Failure to do so will cause
 151  *      an oops as only one mapping can be live for each target at a given
 152  *      time.
 153  */
 154
 155 void ide_destroy_dmatable(ide_drive_t *drive)
 156 {
 157         ide_hwif_t *hwif = drive->hwif;
 158
 159         dma_unmap_sg(hwif->dev, hwif->sg_table, hwif->sg_nents,
 160                      hwif->sg_dma_direction);
 161 }
 162 EXPORT_SYMBOL_GPL(ide_destroy_dmatable);
 163
 164 /**
 165  *      ide_dma_off_quietly     -       Generic DMA kill
 166  *      @drive: drive to control
 167  *
 168  *      Turn off the current DMA on this IDE controller.
 169  */
 170
 171 void ide_dma_off_quietly(ide_drive_t *drive)
 172 {
 173         drive->dev_flags &= ~IDE_DFLAG_USING_DMA;
 174         ide_toggle_bounce(drive, 0);
 175
 176         drive->hwif->dma_ops->dma_host_set(drive, 0);
 177 }
 178 EXPORT_SYMBOL(ide_dma_off_quietly);
 179
 180 /**
 181  *      ide_dma_off     -       disable DMA on a device
 182  *      @drive: drive to disable DMA on
 183  *
 184  *      Disable IDE DMA for a device on this IDE controller.
 185  *      Inform the user that DMA has been disabled.
 186  */
 187
 188 void ide_dma_off(ide_drive_t *drive)
 189 {
 190         printk(KERN_INFO "%s: DMA disabled\n", drive->name);
 191         ide_dma_off_quietly(drive);
 192 }
 193 EXPORT_SYMBOL(ide_dma_off);
 194
 195 /**
 196  *      ide_dma_on              -       Enable DMA on a device
 197  *      @drive: drive to enable DMA on
 198  *
 199  *      Enable IDE DMA for a device on this IDE controller.
 200  */
 201
 202 void ide_dma_on(ide_drive_t *drive)
 203 {
 204         drive->dev_flags |= IDE_DFLAG_USING_DMA;
 205         ide_toggle_bounce(drive, 1);
 206
 207         drive->hwif->dma_ops->dma_host_set(drive, 1);
 208 }
 209
 210 int __ide_dma_bad_drive(ide_drive_t *drive)
 211 {
 212         u16 *id = drive->id;
 213
 214         int blacklist = ide_in_drive_list(id, drive_blacklist);
 215         if (blacklist) {
 216                 printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n",
 217                                     drive->name, (char *)&id[ATA_ID_PROD]);
 218                 return blacklist;
 219         }
 220         return 0;
 221 }
 222 EXPORT_SYMBOL(__ide_dma_bad_drive);
 223
 224 static const u8 xfer_mode_bases[] = {
 225         XFER_UDMA_0,
 226         XFER_MW_DMA_0,
 227         XFER_SW_DMA_0,
 228 };
 229
 230 static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base, u8 req_mode)
 231 {
 232         u16 *id = drive->id;
 233         ide_hwif_t *hwif = drive->hwif;
 234         const struct ide_port_ops *port_ops = hwif->port_ops;
 235         unsigned int mask = 0;
 236
 237         switch (base) {
 238         case XFER_UDMA_0:
 239                 if ((id[ATA_ID_FIELD_VALID] & 4) == 0)
 240                         break;
 241
 242                 if (port_ops && port_ops->udma_filter)
 243                         mask = port_ops->udma_filter(drive);
 244                 else
 245                         mask = hwif->ultra_mask;
 246                 mask &= id[ATA_ID_UDMA_MODES];
 247
 248                 /*
 249                  * avoid false cable warning from eighty_ninty_three()
 250                  */
 251                 if (req_mode > XFER_UDMA_2) {
 252                         if ((mask & 0x78) && (eighty_ninty_three(drive) == 0))
 253                                 mask &= 0x07;
 254                 }
 255                 break;
 256         case XFER_MW_DMA_0:
 257                 if ((id[ATA_ID_FIELD_VALID] & 2) == 0)
 258                         break;
 259                 if (port_ops && port_ops->mdma_filter)
 260                         mask = port_ops->mdma_filter(drive);
 261                 else
 262                         mask = hwif->mwdma_mask;
 263                 mask &= id[ATA_ID_MWDMA_MODES];
 264                 break;
 265         case XFER_SW_DMA_0:
 266                 if (id[ATA_ID_FIELD_VALID] & 2) {
 267                         mask = id[ATA_ID_SWDMA_MODES] & hwif->swdma_mask;
 268                 } else if (id[ATA_ID_OLD_DMA_MODES] >> 8) {
 269                         u8 mode = id[ATA_ID_OLD_DMA_MODES] >> 8;
 270
 271                         /*
 272                          * if the mode is valid convert it to the mask
 273                          * (the maximum allowed mode is XFER_SW_DMA_2)
 274                          */
 275                         if (mode <= 2)
 276                                 mask = ((2 << mode) - 1) & hwif->swdma_mask;
 277                 }
 278                 break;
 279         default:
 280                 BUG();
 281                 break;
 282         }
 283
 284         return mask;
 285 }
 286
 287 /**
 288  *      ide_find_dma_mode       -       compute DMA speed
 289  *      @drive: IDE device
 290  *      @req_mode: requested mode
 291  *
 292  *      Checks the drive/host capabilities and finds the speed to use for
 293  *      the DMA transfer.  The speed is then limited by the requested mode.
 294  *
 295  *      Returns 0 if the drive/host combination is incapable of DMA transfers
 296  *      or if the requested mode is not a DMA mode.
 297  */
 298
 299 u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode)
 300 {
 301         ide_hwif_t *hwif = drive->hwif;
 302         unsigned int mask;
 303         int x, i;
 304         u8 mode = 0;
 305
 306         if (drive->media != ide_disk) {
 307                 if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
 308                         return 0;
 309         }
 310
 311         for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) {
 312                 if (req_mode < xfer_mode_bases[i])
 313                         continue;
 314                 mask = ide_get_mode_mask(drive, xfer_mode_bases[i], req_mode);
 315                 x = fls(mask) - 1;
 316                 if (x >= 0) {
 317                         mode = xfer_mode_bases[i] + x;
 318                         break;
 319                 }
 320         }
 321
 322         if (hwif->chipset == ide_acorn && mode == 0) {
 323                 /*
 324                  * is this correct?
 325                  */
 326                 if (ide_dma_good_drive(drive) &&
 327                     drive->id[ATA_ID_EIDE_DMA_TIME] < 150)
 328                         mode = XFER_MW_DMA_1;
 329         }
 330
 331         mode = min(mode, req_mode);
 332
 333         printk(KERN_INFO "%s: %s mode selected\n", drive->name,
 334                           mode ? ide_xfer_verbose(mode) : "no DMA");
 335
 336         return mode;
 337 }
 338 EXPORT_SYMBOL_GPL(ide_find_dma_mode);
 339
 340 static int ide_tune_dma(ide_drive_t *drive)
 341 {
 342         ide_hwif_t *hwif = drive->hwif;
 343         u8 speed;
 344
 345         if (ata_id_has_dma(drive->id) == 0 ||
 346             (drive->dev_flags & IDE_DFLAG_NODMA))
 347                 return 0;
 348
 349         /* consult the list of known "bad" drives */
 350         if (__ide_dma_bad_drive(drive))
 351                 return 0;
 352
 353         if (ide_id_dma_bug(drive))
 354                 return 0;
 355
 356         if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
 357                 return config_drive_for_dma(drive);
 358
 359         speed = ide_max_dma_mode(drive);
 360
 361         if (!speed)
 362                 return 0;
 363
 364         if (ide_set_dma_mode(drive, speed))
 365                 return 0;
 366
 367         return 1;
 368 }
 369
 370 static int ide_dma_check(ide_drive_t *drive)
 371 {
 372         ide_hwif_t *hwif = drive->hwif;
 373
 374         if (ide_tune_dma(drive))
 375                 return 0;
 376
 377         /* TODO: always do PIO fallback */
 378         if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
 379                 return -1;
 380
 381         ide_set_max_pio(drive);
 382
 383         return -1;
 384 }
 385
 386 int ide_id_dma_bug(ide_drive_t *drive)
 387 {
 388         u16 *id = drive->id;
 389
 390         if (id[ATA_ID_FIELD_VALID] & 4) {
 391                 if ((id[ATA_ID_UDMA_MODES] >> 8) &&
 392                     (id[ATA_ID_MWDMA_MODES] >> 8))
 393                         goto err_out;
 394         } else if (id[ATA_ID_FIELD_VALID] & 2) {
 395                 if ((id[ATA_ID_MWDMA_MODES] >> 8) &&
 396                     (id[ATA_ID_SWDMA_MODES] >> 8))
 397                         goto err_out;
 398         }
 399         return 0;
 400 err_out:
 401         printk(KERN_ERR "%s: bad DMA info in identify block\n", drive->name);
 402         return 1;
 403 }
 404
 405 int ide_set_dma(ide_drive_t *drive)
 406 {
 407         int rc;
 408
 409         /*
 410          * Force DMAing for the beginning of the check.
 411          * Some chipsets appear to do interesting
 412          * things, if not checked and cleared.
 413          *   PARANOIA!!!
 414          */
 415         ide_dma_off_quietly(drive);
 416
 417         rc = ide_dma_check(drive);
 418         if (rc)
 419                 return rc;
 420
 421         ide_dma_on(drive);
 422
 423         return 0;
 424 }
 425
 426 void ide_check_dma_crc(ide_drive_t *drive)
 427 {
 428         u8 mode;
 429
 430         ide_dma_off_quietly(drive);
 431         drive->crc_count = 0;
 432         mode = drive->current_speed;
 433         /*
 434          * Don't try non Ultra-DMA modes without iCRC's.  Force the
 435          * device to PIO and make the user enable SWDMA/MWDMA modes.
 436          */
 437         if (mode > XFER_UDMA_0 && mode <= XFER_UDMA_7)
 438                 mode--;
 439         else
 440                 mode = XFER_PIO_4;
 441         ide_set_xfer_rate(drive, mode);
 442         if (drive->current_speed >= XFER_SW_DMA_0)
 443                 ide_dma_on(drive);
 444 }
 445
 446 void ide_dma_lost_irq(ide_drive_t *drive)
 447 {
 448         printk(KERN_ERR "%s: DMA interrupt recovery\n", drive->name);
 449 }
 450 EXPORT_SYMBOL_GPL(ide_dma_lost_irq);
 451
 452 void ide_dma_timeout(ide_drive_t *drive)
 453 {
 454         ide_hwif_t *hwif = drive->hwif;
 455
 456         printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
 457
 458         if (hwif->dma_ops->dma_test_irq(drive))
 459                 return;
 460
 461         ide_dump_status(drive, "DMA timeout", hwif->tp_ops->read_status(hwif));
 462
 463         hwif->dma_ops->dma_end(drive);
 464 }
 465 EXPORT_SYMBOL_GPL(ide_dma_timeout);
 466
 467 void ide_release_dma_engine(ide_hwif_t *hwif)
 468 {
 469         if (hwif->dmatable_cpu) {
 470                 int prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
 471
 472                 dma_free_coherent(hwif->dev, prd_size,
 473                                   hwif->dmatable_cpu, hwif->dmatable_dma);
 474                 hwif->dmatable_cpu = NULL;
 475         }
 476 }
 477 EXPORT_SYMBOL_GPL(ide_release_dma_engine);
 478
 479 int ide_allocate_dma_engine(ide_hwif_t *hwif)
 480 {
 481         int prd_size;
 482
 483         if (hwif->prd_max_nents == 0)
 484                 hwif->prd_max_nents = PRD_ENTRIES;
 485         if (hwif->prd_ent_size == 0)
 486                 hwif->prd_ent_size = PRD_BYTES;
 487
 488         prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
 489
 490         hwif->dmatable_cpu = dma_alloc_coherent(hwif->dev, prd_size,
 491                                                 &hwif->dmatable_dma,
 492                                                 GFP_ATOMIC);
 493         if (hwif->dmatable_cpu == NULL) {
 494                 printk(KERN_ERR "%s: unable to allocate PRD table\n",
 495                         hwif->name);
 496                 return -ENOMEM;
 497         }
 498
 499         return 0;
 500 }
 501 EXPORT_SYMBOL_GPL(ide_allocate_dma_engine);