arch/blackfin/kernel/bfin_gpio.c

   1 /*
   2  * File:         arch/blackfin/kernel/bfin_gpio.c
   3  * Based on:
   4  * Author:       Michael Hennerich (hennerich@blackfin.uclinux.org)
   5  *
   6  * Created:
   7  * Description:  GPIO Abstraction Layer
   8  *
   9  * Modified:
  10  *               Copyright 2008 Analog Devices Inc.
  11  *
  12  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  13  *
  14  * This program is free software; you can redistribute it and/or modify
  15  * it under the terms of the GNU General Public License as published by
  16  * the Free Software Foundation; either version 2 of the License, or
  17  * (at your option) any later version.
  18  *
  19  * This program is distributed in the hope that it will be useful,
  20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  * GNU General Public License for more details.
  23  *
  24  * You should have received a copy of the GNU General Public License
  25  * along with this program; if not, see the file COPYING, or write
  26  * to the Free Software Foundation, Inc.,
  27  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  28  */
  29
  30 #include <linux/delay.h>
  31 #include <linux/module.h>
  32 #include <linux/err.h>
  33 #include <linux/proc_fs.h>
  34 #include <asm/blackfin.h>
  35 #include <asm/gpio.h>
  36 #include <asm/portmux.h>
  37 #include <linux/irq.h>
  38
  39 #if ANOMALY_05000311 || ANOMALY_05000323
  40 enum {
  41         AWA_data = SYSCR,
  42         AWA_data_clear = SYSCR,
  43         AWA_data_set = SYSCR,
  44         AWA_toggle = SYSCR,
  45         AWA_maska = BFIN_UART_SCR,
  46         AWA_maska_clear = BFIN_UART_SCR,
  47         AWA_maska_set = BFIN_UART_SCR,
  48         AWA_maska_toggle = BFIN_UART_SCR,
  49         AWA_maskb = BFIN_UART_GCTL,
  50         AWA_maskb_clear = BFIN_UART_GCTL,
  51         AWA_maskb_set = BFIN_UART_GCTL,
  52         AWA_maskb_toggle = BFIN_UART_GCTL,
  53         AWA_dir = SPORT1_STAT,
  54         AWA_polar = SPORT1_STAT,
  55         AWA_edge = SPORT1_STAT,
  56         AWA_both = SPORT1_STAT,
  57 #if ANOMALY_05000311
  58         AWA_inen = TIMER_ENABLE,
  59 #elif ANOMALY_05000323
  60         AWA_inen = DMA1_1_CONFIG,
  61 #endif
  62 };
  63         /* Anomaly Workaround */
  64 #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
  65 #else
  66 #define AWA_DUMMY_READ(...)  do { } while (0)
  67 #endif
  68
  69 static struct gpio_port_t * const gpio_array[] = {
  70 #if defined(BF533_FAMILY) || defined(BF538_FAMILY)
  71         (struct gpio_port_t *) FIO_FLAG_D,
  72 #elif defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  73         (struct gpio_port_t *) PORTFIO,
  74         (struct gpio_port_t *) PORTGIO,
  75         (struct gpio_port_t *) PORTHIO,
  76 #elif defined(BF561_FAMILY)
  77         (struct gpio_port_t *) FIO0_FLAG_D,
  78         (struct gpio_port_t *) FIO1_FLAG_D,
  79         (struct gpio_port_t *) FIO2_FLAG_D,
  80 #elif defined(CONFIG_BF54x)
  81         (struct gpio_port_t *)PORTA_FER,
  82         (struct gpio_port_t *)PORTB_FER,
  83         (struct gpio_port_t *)PORTC_FER,
  84         (struct gpio_port_t *)PORTD_FER,
  85         (struct gpio_port_t *)PORTE_FER,
  86         (struct gpio_port_t *)PORTF_FER,
  87         (struct gpio_port_t *)PORTG_FER,
  88         (struct gpio_port_t *)PORTH_FER,
  89         (struct gpio_port_t *)PORTI_FER,
  90         (struct gpio_port_t *)PORTJ_FER,
  91 #else
  92 # error no gpio arrays defined
  93 #endif
  94 };
  95
  96 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  97 static unsigned short * const port_fer[] = {
  98         (unsigned short *) PORTF_FER,
  99         (unsigned short *) PORTG_FER,
 100         (unsigned short *) PORTH_FER,
 101 };
 102
 103 # if !defined(BF537_FAMILY)
 104 static unsigned short * const port_mux[] = {
 105         (unsigned short *) PORTF_MUX,
 106         (unsigned short *) PORTG_MUX,
 107         (unsigned short *) PORTH_MUX,
 108 };
 109
 110 static const
 111 u8 pmux_offset[][16] = {
 112 #  if defined(CONFIG_BF52x)
 113         { 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
 114         { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
 115         { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
 116 #  elif defined(CONFIG_BF51x)
 117         { 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */
 118         { 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */
 119         { 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */
 120 #  endif
 121 };
 122 # endif
 123
 124 #endif
 125
 126 static unsigned short reserved_gpio_map[GPIO_BANK_NUM];
 127 static unsigned short reserved_peri_map[gpio_bank(MAX_RESOURCES)];
 128 static unsigned short reserved_gpio_irq_map[GPIO_BANK_NUM];
 129
 130 #define RESOURCE_LABEL_SIZE     16
 131
 132 static struct str_ident {
 133         char name[RESOURCE_LABEL_SIZE];
 134 } str_ident[MAX_RESOURCES];
 135
 136 #if defined(CONFIG_PM)
 137 static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
 138 #endif
 139
 140 inline int check_gpio(unsigned gpio)
 141 {
 142 #if defined(CONFIG_BF54x)
 143         if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
 144             || gpio == GPIO_PH14 || gpio == GPIO_PH15
 145             || gpio == GPIO_PJ14 || gpio == GPIO_PJ15)
 146                 return -EINVAL;
 147 #endif
 148         if (gpio >= MAX_BLACKFIN_GPIOS)
 149                 return -EINVAL;
 150         return 0;
 151 }
 152
 153 static void gpio_error(unsigned gpio)
 154 {
 155         printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio);
 156 }
 157
 158 static void set_label(unsigned short ident, const char *label)
 159 {
 160         if (label) {
 161                 strncpy(str_ident[ident].name, label,
 162                          RESOURCE_LABEL_SIZE);
 163                 str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
 164         }
 165 }
 166
 167 static char *get_label(unsigned short ident)
 168 {
 169         return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
 170 }
 171
 172 static int cmp_label(unsigned short ident, const char *label)
 173 {
 174         if (label == NULL) {
 175                 dump_stack();
 176                 printk(KERN_ERR "Please provide none-null label\n");
 177         }
 178
 179         if (label)
 180                 return strcmp(str_ident[ident].name, label);
 181         else
 182                 return -EINVAL;
 183 }
 184
 185 static void port_setup(unsigned gpio, unsigned short usage)
 186 {
 187         if (check_gpio(gpio))
 188                 return;
 189
 190 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
 191         if (usage == GPIO_USAGE)
 192                 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
 193         else
 194                 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
 195         SSYNC();
 196 #elif defined(CONFIG_BF54x)
 197         if (usage == GPIO_USAGE)
 198                 gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
 199         else
 200                 gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
 201         SSYNC();
 202 #endif
 203 }
 204
 205 #ifdef BF537_FAMILY
 206 static struct {
 207         unsigned short res;
 208         unsigned short offset;
 209 } port_mux_lut[] = {
 210         {.res = P_PPI0_D13, .offset = 11},
 211         {.res = P_PPI0_D14, .offset = 11},
 212         {.res = P_PPI0_D15, .offset = 11},
 213         {.res = P_SPORT1_TFS, .offset = 11},
 214         {.res = P_SPORT1_TSCLK, .offset = 11},
 215         {.res = P_SPORT1_DTPRI, .offset = 11},
 216         {.res = P_PPI0_D10, .offset = 10},
 217         {.res = P_PPI0_D11, .offset = 10},
 218         {.res = P_PPI0_D12, .offset = 10},
 219         {.res = P_SPORT1_RSCLK, .offset = 10},
 220         {.res = P_SPORT1_RFS, .offset = 10},
 221         {.res = P_SPORT1_DRPRI, .offset = 10},
 222         {.res = P_PPI0_D8, .offset = 9},
 223         {.res = P_PPI0_D9, .offset = 9},
 224         {.res = P_SPORT1_DRSEC, .offset = 9},
 225         {.res = P_SPORT1_DTSEC, .offset = 9},
 226         {.res = P_TMR2, .offset = 8},
 227         {.res = P_PPI0_FS3, .offset = 8},
 228         {.res = P_TMR3, .offset = 7},
 229         {.res = P_SPI0_SSEL4, .offset = 7},
 230         {.res = P_TMR4, .offset = 6},
 231         {.res = P_SPI0_SSEL5, .offset = 6},
 232         {.res = P_TMR5, .offset = 5},
 233         {.res = P_SPI0_SSEL6, .offset = 5},
 234         {.res = P_UART1_RX, .offset = 4},
 235         {.res = P_UART1_TX, .offset = 4},
 236         {.res = P_TMR6, .offset = 4},
 237         {.res = P_TMR7, .offset = 4},
 238         {.res = P_UART0_RX, .offset = 3},
 239         {.res = P_UART0_TX, .offset = 3},
 240         {.res = P_DMAR0, .offset = 3},
 241         {.res = P_DMAR1, .offset = 3},
 242         {.res = P_SPORT0_DTSEC, .offset = 1},
 243         {.res = P_SPORT0_DRSEC, .offset = 1},
 244         {.res = P_CAN0_RX, .offset = 1},
 245         {.res = P_CAN0_TX, .offset = 1},
 246         {.res = P_SPI0_SSEL7, .offset = 1},
 247         {.res = P_SPORT0_TFS, .offset = 0},
 248         {.res = P_SPORT0_DTPRI, .offset = 0},
 249         {.res = P_SPI0_SSEL2, .offset = 0},
 250         {.res = P_SPI0_SSEL3, .offset = 0},
 251 };
 252
 253 static void portmux_setup(unsigned short per)
 254 {
 255         u16 y, offset, muxreg;
 256         u16 function = P_FUNCT2MUX(per);
 257
 258         for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
 259                 if (port_mux_lut[y].res == per) {
 260
 261                         /* SET PORTMUX REG */
 262
 263                         offset = port_mux_lut[y].offset;
 264                         muxreg = bfin_read_PORT_MUX();
 265
 266                         if (offset != 1)
 267                                 muxreg &= ~(1 << offset);
 268                         else
 269                                 muxreg &= ~(3 << 1);
 270
 271                         muxreg |= (function << offset);
 272                         bfin_write_PORT_MUX(muxreg);
 273                 }
 274         }
 275 }
 276 #elif defined(CONFIG_BF54x)
 277 inline void portmux_setup(unsigned short per)
 278 {
 279         u32 pmux;
 280         u16 ident = P_IDENT(per);
 281         u16 function = P_FUNCT2MUX(per);
 282
 283         pmux = gpio_array[gpio_bank(ident)]->port_mux;
 284
 285         pmux &= ~(0x3 << (2 * gpio_sub_n(ident)));
 286         pmux |= (function & 0x3) << (2 * gpio_sub_n(ident));
 287
 288         gpio_array[gpio_bank(ident)]->port_mux = pmux;
 289 }
 290
 291 inline u16 get_portmux(unsigned short per)
 292 {
 293         u32 pmux;
 294         u16 ident = P_IDENT(per);
 295
 296         pmux = gpio_array[gpio_bank(ident)]->port_mux;
 297
 298         return (pmux >> (2 * gpio_sub_n(ident)) & 0x3);
 299 }
 300 #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
 301 inline void portmux_setup(unsigned short per)
 302 {
 303         u16 pmux, ident = P_IDENT(per), function = P_FUNCT2MUX(per);
 304         u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
 305
 306         pmux = *port_mux[gpio_bank(ident)];
 307         pmux &= ~(3 << offset);
 308         pmux |= (function & 3) << offset;
 309         *port_mux[gpio_bank(ident)] = pmux;
 310         SSYNC();
 311 }
 312 #else
 313 # define portmux_setup(...)  do { } while (0)
 314 #endif
 315
 316 static int __init bfin_gpio_init(void)
 317 {
 318         printk(KERN_INFO "Blackfin GPIO Controller\n");
 319
 320         return 0;
 321 }
 322 arch_initcall(bfin_gpio_init);
 323
 324
 325 #ifndef CONFIG_BF54x
 326 /***********************************************************
 327 *
 328 * FUNCTIONS: Blackfin General Purpose Ports Access Functions
 329 *
 330 * INPUTS/OUTPUTS:
 331 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
 332 *
 333 *
 334 * DESCRIPTION: These functions abstract direct register access
 335 *              to Blackfin processor General Purpose
 336 *              Ports Regsiters
 337 *
 338 * CAUTION: These functions do not belong to the GPIO Driver API
 339 *************************************************************
 340 * MODIFICATION HISTORY :
 341 **************************************************************/
 342
 343 /* Set a specific bit */
 344
 345 #define SET_GPIO(name) \
 346 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
 347 { \
 348         unsigned long flags; \
 349         local_irq_save_hw(flags); \
 350         if (arg) \
 351                 gpio_array[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
 352         else \
 353                 gpio_array[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
 354         AWA_DUMMY_READ(name); \
 355         local_irq_restore_hw(flags); \
 356 } \
 357 EXPORT_SYMBOL(set_gpio_ ## name);
 358
 359 SET_GPIO(dir)   /* set_gpio_dir() */
 360 SET_GPIO(inen)  /* set_gpio_inen() */
 361 SET_GPIO(polar) /* set_gpio_polar() */
 362 SET_GPIO(edge)  /* set_gpio_edge() */
 363 SET_GPIO(both)  /* set_gpio_both() */
 364
 365
 366 #define SET_GPIO_SC(name) \
 367 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
 368 { \
 369         unsigned long flags; \
 370         if (ANOMALY_05000311 || ANOMALY_05000323) \
 371                 local_irq_save_hw(flags); \
 372         if (arg) \
 373                 gpio_array[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
 374         else \
 375                 gpio_array[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
 376         if (ANOMALY_05000311 || ANOMALY_05000323) { \
 377                 AWA_DUMMY_READ(name); \
 378                 local_irq_restore_hw(flags); \
 379         } \
 380 } \
 381 EXPORT_SYMBOL(set_gpio_ ## name);
 382
 383 SET_GPIO_SC(maska)
 384 SET_GPIO_SC(maskb)
 385 SET_GPIO_SC(data)
 386
 387 void set_gpio_toggle(unsigned gpio)
 388 {
 389         unsigned long flags;
 390         if (ANOMALY_05000311 || ANOMALY_05000323)
 391                 local_irq_save_hw(flags);
 392         gpio_array[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
 393         if (ANOMALY_05000311 || ANOMALY_05000323) {
 394                 AWA_DUMMY_READ(toggle);
 395                 local_irq_restore_hw(flags);
 396         }
 397 }
 398 EXPORT_SYMBOL(set_gpio_toggle);
 399
 400
 401 /*Set current PORT date (16-bit word)*/
 402
 403 #define SET_GPIO_P(name) \
 404 void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
 405 { \
 406         unsigned long flags; \
 407         if (ANOMALY_05000311 || ANOMALY_05000323) \
 408                 local_irq_save_hw(flags); \
 409         gpio_array[gpio_bank(gpio)]->name = arg; \
 410         if (ANOMALY_05000311 || ANOMALY_05000323) { \
 411                 AWA_DUMMY_READ(name); \
 412                 local_irq_restore_hw(flags); \
 413         } \
 414 } \
 415 EXPORT_SYMBOL(set_gpiop_ ## name);
 416
 417 SET_GPIO_P(data)
 418 SET_GPIO_P(dir)
 419 SET_GPIO_P(inen)
 420 SET_GPIO_P(polar)
 421 SET_GPIO_P(edge)
 422 SET_GPIO_P(both)
 423 SET_GPIO_P(maska)
 424 SET_GPIO_P(maskb)
 425
 426 /* Get a specific bit */
 427 #define GET_GPIO(name) \
 428 unsigned short get_gpio_ ## name(unsigned gpio) \
 429 { \
 430         unsigned long flags; \
 431         unsigned short ret; \
 432         if (ANOMALY_05000311 || ANOMALY_05000323) \
 433                 local_irq_save_hw(flags); \
 434         ret = 0x01 & (gpio_array[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
 435         if (ANOMALY_05000311 || ANOMALY_05000323) { \
 436                 AWA_DUMMY_READ(name); \
 437                 local_irq_restore_hw(flags); \
 438         } \
 439         return ret; \
 440 } \
 441 EXPORT_SYMBOL(get_gpio_ ## name);
 442
 443 GET_GPIO(data)
 444 GET_GPIO(dir)
 445 GET_GPIO(inen)
 446 GET_GPIO(polar)
 447 GET_GPIO(edge)
 448 GET_GPIO(both)
 449 GET_GPIO(maska)
 450 GET_GPIO(maskb)
 451
 452 /*Get current PORT date (16-bit word)*/
 453
 454 #define GET_GPIO_P(name) \
 455 unsigned short get_gpiop_ ## name(unsigned gpio) \
 456 { \
 457         unsigned long flags; \
 458         unsigned short ret; \
 459         if (ANOMALY_05000311 || ANOMALY_05000323) \
 460                 local_irq_save_hw(flags); \
 461         ret = (gpio_array[gpio_bank(gpio)]->name); \
 462         if (ANOMALY_05000311 || ANOMALY_05000323) { \
 463                 AWA_DUMMY_READ(name); \
 464                 local_irq_restore_hw(flags); \
 465         } \
 466         return ret; \
 467 } \
 468 EXPORT_SYMBOL(get_gpiop_ ## name);
 469
 470 GET_GPIO_P(data)
 471 GET_GPIO_P(dir)
 472 GET_GPIO_P(inen)
 473 GET_GPIO_P(polar)
 474 GET_GPIO_P(edge)
 475 GET_GPIO_P(both)
 476 GET_GPIO_P(maska)
 477 GET_GPIO_P(maskb)
 478
 479
 480 #ifdef CONFIG_PM
 481
 482 static unsigned short wakeup_map[GPIO_BANK_NUM];
 483 static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
 484
 485 static const unsigned int sic_iwr_irqs[] = {
 486 #if defined(BF533_FAMILY)
 487         IRQ_PROG_INTB
 488 #elif defined(BF537_FAMILY)
 489         IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX
 490 #elif defined(BF538_FAMILY)
 491         IRQ_PORTF_INTB
 492 #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
 493         IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB
 494 #elif defined(BF561_FAMILY)
 495         IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB
 496 #else
 497 # error no SIC_IWR defined
 498 #endif
 499 };
 500
 501 /***********************************************************
 502 *
 503 * FUNCTIONS: Blackfin PM Setup API
 504 *
 505 * INPUTS/OUTPUTS:
 506 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
 507 * type -
 508 *       PM_WAKE_RISING
 509 *       PM_WAKE_FALLING
 510 *       PM_WAKE_HIGH
 511 *       PM_WAKE_LOW
 512 *       PM_WAKE_BOTH_EDGES
 513 *
 514 * DESCRIPTION: Blackfin PM Driver API
 515 *
 516 * CAUTION:
 517 *************************************************************
 518 * MODIFICATION HISTORY :
 519 **************************************************************/
 520 int gpio_pm_wakeup_request(unsigned gpio, unsigned char type)
 521 {
 522         unsigned long flags;
 523
 524         if ((check_gpio(gpio) < 0) || !type)
 525                 return -EINVAL;
 526
 527         local_irq_save_hw(flags);
 528         wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
 529         wakeup_flags_map[gpio] = type;
 530         local_irq_restore_hw(flags);
 531
 532         return 0;
 533 }
 534 EXPORT_SYMBOL(gpio_pm_wakeup_request);
 535
 536 void gpio_pm_wakeup_free(unsigned gpio)
 537 {
 538         unsigned long flags;
 539
 540         if (check_gpio(gpio) < 0)
 541                 return;
 542
 543         local_irq_save_hw(flags);
 544
 545         wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
 546
 547         local_irq_restore_hw(flags);
 548 }
 549 EXPORT_SYMBOL(gpio_pm_wakeup_free);
 550
 551 static int bfin_gpio_wakeup_type(unsigned gpio, unsigned char type)
 552 {
 553         port_setup(gpio, GPIO_USAGE);
 554         set_gpio_dir(gpio, 0);
 555         set_gpio_inen(gpio, 1);
 556
 557         if (type & (PM_WAKE_RISING | PM_WAKE_FALLING))
 558                 set_gpio_edge(gpio, 1);
 559          else
 560                 set_gpio_edge(gpio, 0);
 561
 562         if ((type & (PM_WAKE_BOTH_EDGES)) == (PM_WAKE_BOTH_EDGES))
 563                 set_gpio_both(gpio, 1);
 564         else
 565                 set_gpio_both(gpio, 0);
 566
 567         if ((type & (PM_WAKE_FALLING | PM_WAKE_LOW)))
 568                 set_gpio_polar(gpio, 1);
 569         else
 570                 set_gpio_polar(gpio, 0);
 571
 572         SSYNC();
 573
 574         return 0;
 575 }
 576
 577 u32 bfin_pm_standby_setup(void)
 578 {
 579         u16 bank, mask, i, gpio;
 580
 581         for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
 582                 mask = wakeup_map[gpio_bank(i)];
 583                 bank = gpio_bank(i);
 584
 585                 gpio_bank_saved[bank].maskb = gpio_array[bank]->maskb;
 586                 gpio_array[bank]->maskb = 0;
 587
 588                 if (mask) {
 589 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
 590                         gpio_bank_saved[bank].fer   = *port_fer[bank];
 591 #endif
 592                         gpio_bank_saved[bank].inen  = gpio_array[bank]->inen;
 593                         gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
 594                         gpio_bank_saved[bank].dir   = gpio_array[bank]->dir;
 595                         gpio_bank_saved[bank].edge  = gpio_array[bank]->edge;
 596                         gpio_bank_saved[bank].both  = gpio_array[bank]->both;
 597                         gpio_bank_saved[bank].reserved =
 598                                                 reserved_gpio_map[bank];
 599
 600                         gpio = i;
 601
 602                         while (mask) {
 603                                 if ((mask & 1) && (wakeup_flags_map[gpio] !=
 604                                         PM_WAKE_IGNORE)) {
 605                                         reserved_gpio_map[gpio_bank(gpio)] |=
 606                                                         gpio_bit(gpio);
 607                                         bfin_gpio_wakeup_type(gpio,
 608                                                 wakeup_flags_map[gpio]);
 609                                         set_gpio_data(gpio, 0); /*Clear*/
 610                                 }
 611                                 gpio++;
 612                                 mask >>= 1;
 613                         }
 614
 615                         bfin_internal_set_wake(sic_iwr_irqs[bank], 1);
 616                         gpio_array[bank]->maskb_set = wakeup_map[gpio_bank(i)];
 617                 }
 618         }
 619
 620         AWA_DUMMY_READ(maskb_set);
 621
 622         return 0;
 623 }
 624
 625 void bfin_pm_standby_restore(void)
 626 {
 627         u16 bank, mask, i;
 628
 629         for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
 630                 mask = wakeup_map[gpio_bank(i)];
 631                 bank = gpio_bank(i);
 632
 633                 if (mask) {
 634 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
 635                         *port_fer[bank]         = gpio_bank_saved[bank].fer;
 636 #endif
 637                         gpio_array[bank]->inen  = gpio_bank_saved[bank].inen;
 638                         gpio_array[bank]->dir   = gpio_bank_saved[bank].dir;
 639                         gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
 640                         gpio_array[bank]->edge  = gpio_bank_saved[bank].edge;
 641                         gpio_array[bank]->both  = gpio_bank_saved[bank].both;
 642
 643                         reserved_gpio_map[bank] =
 644                                         gpio_bank_saved[bank].reserved;
 645                         bfin_internal_set_wake(sic_iwr_irqs[bank], 0);
 646                 }
 647
 648                 gpio_array[bank]->maskb = gpio_bank_saved[bank].maskb;
 649         }
 650         AWA_DUMMY_READ(maskb);
 651 }
 652
 653 void bfin_gpio_pm_hibernate_suspend(void)
 654 {
 655         int i, bank;
 656
 657         for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
 658                 bank = gpio_bank(i);
 659
 660 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
 661                 gpio_bank_saved[bank].fer = *port_fer[bank];
 662 #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
 663                 gpio_bank_saved[bank].mux = *port_mux[bank];
 664 #else
 665                 if (bank == 0)
 666                         gpio_bank_saved[bank].mux = bfin_read_PORT_MUX();
 667 #endif
 668 #endif
 669                 gpio_bank_saved[bank].data  = gpio_array[bank]->data;
 670                 gpio_bank_saved[bank].inen  = gpio_array[bank]->inen;
 671                 gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
 672                 gpio_bank_saved[bank].dir   = gpio_array[bank]->dir;
 673                 gpio_bank_saved[bank].edge  = gpio_array[bank]->edge;
 674                 gpio_bank_saved[bank].both  = gpio_array[bank]->both;
 675                 gpio_bank_saved[bank].maska = gpio_array[bank]->maska;
 676         }
 677
 678         AWA_DUMMY_READ(maska);
 679 }
 680
 681 void bfin_gpio_pm_hibernate_restore(void)
 682 {
 683         int i, bank;
 684
 685         for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
 686                 bank = gpio_bank(i);
 687
 688 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
 689 #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
 690                 *port_mux[bank] = gpio_bank_saved[bank].mux;
 691 #else
 692                 if (bank == 0)
 693                         bfin_write_PORT_MUX(gpio_bank_saved[bank].mux);
 694 #endif
 695                 *port_fer[bank] = gpio_bank_saved[bank].fer;
 696 #endif
 697                 gpio_array[bank]->inen  = gpio_bank_saved[bank].inen;
 698                 gpio_array[bank]->dir   = gpio_bank_saved[bank].dir;
 699                 gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
 700                 gpio_array[bank]->edge  = gpio_bank_saved[bank].edge;
 701                 gpio_array[bank]->both  = gpio_bank_saved[bank].both;
 702
 703                 gpio_array[bank]->data_set = gpio_bank_saved[bank].data
 704                                                 | gpio_bank_saved[bank].dir;
 705
 706                 gpio_array[bank]->maska = gpio_bank_saved[bank].maska;
 707         }
 708         AWA_DUMMY_READ(maska);
 709 }
 710
 711
 712 #endif
 713 #else /* CONFIG_BF54x */
 714 #ifdef CONFIG_PM
 715
 716 u32 bfin_pm_standby_setup(void)
 717 {
 718         return 0;
 719 }
 720
 721 void bfin_pm_standby_restore(void)
 722 {
 723
 724 }
 725
 726 void bfin_gpio_pm_hibernate_suspend(void)
 727 {
 728         int i, bank;
 729
 730         for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
 731                 bank = gpio_bank(i);
 732
 733                 gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer;
 734                 gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux;
 735                 gpio_bank_saved[bank].data = gpio_array[bank]->data;
 736                 gpio_bank_saved[bank].data = gpio_array[bank]->data;
 737                 gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
 738                 gpio_bank_saved[bank].dir = gpio_array[bank]->dir_set;
 739         }
 740 }
 741
 742 void bfin_gpio_pm_hibernate_restore(void)
 743 {
 744         int i, bank;
 745
 746         for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
 747                 bank = gpio_bank(i);
 748
 749                 gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux;
 750                 gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer;
 751                 gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
 752                 gpio_array[bank]->dir_set = gpio_bank_saved[bank].dir;
 753                 gpio_array[bank]->data_set = gpio_bank_saved[bank].data
 754                                                 | gpio_bank_saved[bank].dir;
 755         }
 756 }
 757 #endif
 758
 759 unsigned short get_gpio_dir(unsigned gpio)
 760 {
 761         return (0x01 & (gpio_array[gpio_bank(gpio)]->dir_clear >> gpio_sub_n(gpio)));
 762 }
 763 EXPORT_SYMBOL(get_gpio_dir);
 764
 765 #endif /* CONFIG_BF54x */
 766
 767 /***********************************************************
 768 *
 769 * FUNCTIONS:    Blackfin Peripheral Resource Allocation
 770 *               and PortMux Setup
 771 *
 772 * INPUTS/OUTPUTS:
 773 * per   Peripheral Identifier
 774 * label String
 775 *
 776 * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
 777 *
 778 * CAUTION:
 779 *************************************************************
 780 * MODIFICATION HISTORY :
 781 **************************************************************/
 782
 783 int peripheral_request(unsigned short per, const char *label)
 784 {
 785         unsigned long flags;
 786         unsigned short ident = P_IDENT(per);
 787
 788         /*
 789          * Don't cares are pins with only one dedicated function
 790          */
 791
 792         if (per & P_DONTCARE)
 793                 return 0;
 794
 795         if (!(per & P_DEFINED))
 796                 return -ENODEV;
 797
 798         local_irq_save_hw(flags);
 799
 800         /* If a pin can be muxed as either GPIO or peripheral, make
 801          * sure it is not already a GPIO pin when we request it.
 802          */
 803         if (unlikely(!check_gpio(ident) &&
 804             reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
 805                 if (system_state == SYSTEM_BOOTING)
 806                         dump_stack();
 807                 printk(KERN_ERR
 808                        "%s: Peripheral %d is already reserved as GPIO by %s !\n",
 809                        __func__, ident, get_label(ident));
 810                 local_irq_restore_hw(flags);
 811                 return -EBUSY;
 812         }
 813
 814         if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
 815
 816                 /*
 817                  * Pin functions like AMC address strobes my
 818                  * be requested and used by several drivers
 819                  */
 820
 821 #ifdef CONFIG_BF54x
 822                 if (!((per & P_MAYSHARE) && get_portmux(per) == P_FUNCT2MUX(per))) {
 823 #else
 824                 if (!(per & P_MAYSHARE)) {
 825 #endif
 826                         /*
 827                          * Allow that the identical pin function can
 828                          * be requested from the same driver twice
 829                          */
 830
 831                         if (cmp_label(ident, label) == 0)
 832                                 goto anyway;
 833
 834                         if (system_state == SYSTEM_BOOTING)
 835                                 dump_stack();
 836                         printk(KERN_ERR
 837                                "%s: Peripheral %d function %d is already reserved by %s !\n",
 838                                __func__, ident, P_FUNCT2MUX(per), get_label(ident));
 839                         local_irq_restore_hw(flags);
 840                         return -EBUSY;
 841                 }
 842         }
 843
 844  anyway:
 845         reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
 846
 847         portmux_setup(per);
 848         port_setup(ident, PERIPHERAL_USAGE);
 849
 850         local_irq_restore_hw(flags);
 851         set_label(ident, label);
 852
 853         return 0;
 854 }
 855 EXPORT_SYMBOL(peripheral_request);
 856
 857 int peripheral_request_list(const unsigned short per[], const char *label)
 858 {
 859         u16 cnt;
 860         int ret;
 861
 862         for (cnt = 0; per[cnt] != 0; cnt++) {
 863
 864                 ret = peripheral_request(per[cnt], label);
 865
 866                 if (ret < 0) {
 867                         for ( ; cnt > 0; cnt--)
 868                                 peripheral_free(per[cnt - 1]);
 869
 870                         return ret;
 871                 }
 872         }
 873
 874         return 0;
 875 }
 876 EXPORT_SYMBOL(peripheral_request_list);
 877
 878 void peripheral_free(unsigned short per)
 879 {
 880         unsigned long flags;
 881         unsigned short ident = P_IDENT(per);
 882
 883         if (per & P_DONTCARE)
 884                 return;
 885
 886         if (!(per & P_DEFINED))
 887                 return;
 888
 889         local_irq_save_hw(flags);
 890
 891         if (unlikely(!(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident)))) {
 892                 local_irq_restore_hw(flags);
 893                 return;
 894         }
 895
 896         if (!(per & P_MAYSHARE))
 897                 port_setup(ident, GPIO_USAGE);
 898
 899         reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
 900
 901         set_label(ident, "free");
 902
 903         local_irq_restore_hw(flags);
 904 }
 905 EXPORT_SYMBOL(peripheral_free);
 906
 907 void peripheral_free_list(const unsigned short per[])
 908 {
 909         u16 cnt;
 910         for (cnt = 0; per[cnt] != 0; cnt++)
 911                 peripheral_free(per[cnt]);
 912 }
 913 EXPORT_SYMBOL(peripheral_free_list);
 914
 915 /***********************************************************
 916 *
 917 * FUNCTIONS: Blackfin GPIO Driver
 918 *
 919 * INPUTS/OUTPUTS:
 920 * gpio  PIO Number between 0 and MAX_BLACKFIN_GPIOS
 921 * label String
 922 *
 923 * DESCRIPTION: Blackfin GPIO Driver API
 924 *
 925 * CAUTION:
 926 *************************************************************
 927 * MODIFICATION HISTORY :
 928 **************************************************************/
 929
 930 int bfin_gpio_request(unsigned gpio, const char *label)
 931 {
 932         unsigned long flags;
 933
 934         if (check_gpio(gpio) < 0)
 935                 return -EINVAL;
 936
 937         local_irq_save_hw(flags);
 938
 939         /*
 940          * Allow that the identical GPIO can
 941          * be requested from the same driver twice
 942          * Do nothing and return -
 943          */
 944
 945         if (cmp_label(gpio, label) == 0) {
 946                 local_irq_restore_hw(flags);
 947                 return 0;
 948         }
 949
 950         if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
 951                 if (system_state == SYSTEM_BOOTING)
 952                         dump_stack();
 953                 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
 954                        gpio, get_label(gpio));
 955                 local_irq_restore_hw(flags);
 956                 return -EBUSY;
 957         }
 958         if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
 959                 if (system_state == SYSTEM_BOOTING)
 960                         dump_stack();
 961                 printk(KERN_ERR
 962                        "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
 963                        gpio, get_label(gpio));
 964                 local_irq_restore_hw(flags);
 965                 return -EBUSY;
 966         }
 967         if (unlikely(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
 968                 printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!"
 969                        " (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio);
 970         }
 971 #ifndef CONFIG_BF54x
 972         else {  /* Reset POLAR setting when acquiring a gpio for the first time */
 973                 set_gpio_polar(gpio, 0);
 974         }
 975 #endif
 976
 977         reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
 978         set_label(gpio, label);
 979
 980         local_irq_restore_hw(flags);
 981
 982         port_setup(gpio, GPIO_USAGE);
 983
 984         return 0;
 985 }
 986 EXPORT_SYMBOL(bfin_gpio_request);
 987
 988 void bfin_gpio_free(unsigned gpio)
 989 {
 990         unsigned long flags;
 991
 992         if (check_gpio(gpio) < 0)
 993                 return;
 994
 995         might_sleep();
 996
 997         local_irq_save_hw(flags);
 998
 999         if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
1000                 if (system_state == SYSTEM_BOOTING)
1001                         dump_stack();
1002                 gpio_error(gpio);
1003                 local_irq_restore_hw(flags);
1004                 return;
1005         }
1006
1007         reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
1008
1009         set_label(gpio, "free");
1010
1011         local_irq_restore_hw(flags);
1012 }
1013 EXPORT_SYMBOL(bfin_gpio_free);
1014
1015 int bfin_gpio_irq_request(unsigned gpio, const char *label)
1016 {
1017         unsigned long flags;
1018
1019         if (check_gpio(gpio) < 0)
1020                 return -EINVAL;
1021
1022         local_irq_save_hw(flags);
1023
1024         if (unlikely(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1025                 if (system_state == SYSTEM_BOOTING)
1026                         dump_stack();
1027                 printk(KERN_ERR
1028                        "bfin-gpio: GPIO %d is already reserved as gpio-irq !\n",
1029                        gpio);
1030                 local_irq_restore_hw(flags);
1031                 return -EBUSY;
1032         }
1033         if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1034                 if (system_state == SYSTEM_BOOTING)
1035                         dump_stack();
1036                 printk(KERN_ERR
1037                        "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
1038                        gpio, get_label(gpio));
1039                 local_irq_restore_hw(flags);
1040                 return -EBUSY;
1041         }
1042         if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))
1043                 printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved by %s! "
1044                        "(Documentation/blackfin/bfin-gpio-notes.txt)\n",
1045                        gpio, get_label(gpio));
1046
1047         reserved_gpio_irq_map[gpio_bank(gpio)] |= gpio_bit(gpio);
1048         set_label(gpio, label);
1049
1050         local_irq_restore_hw(flags);
1051
1052         port_setup(gpio, GPIO_USAGE);
1053
1054         return 0;
1055 }
1056
1057 void bfin_gpio_irq_free(unsigned gpio)
1058 {
1059         unsigned long flags;
1060
1061         if (check_gpio(gpio) < 0)
1062                 return;
1063
1064         local_irq_save_hw(flags);
1065
1066         if (unlikely(!(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
1067                 if (system_state == SYSTEM_BOOTING)
1068                         dump_stack();
1069                 gpio_error(gpio);
1070                 local_irq_restore_hw(flags);
1071                 return;
1072         }
1073
1074         reserved_gpio_irq_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
1075
1076         set_label(gpio, "free");
1077
1078         local_irq_restore_hw(flags);
1079 }
1080
1081 static inline void __bfin_gpio_direction_input(unsigned gpio)
1082 {
1083 #ifdef CONFIG_BF54x
1084         gpio_array[gpio_bank(gpio)]->dir_clear = gpio_bit(gpio);
1085 #else
1086         gpio_array[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
1087 #endif
1088         gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
1089 }
1090
1091 int bfin_gpio_direction_input(unsigned gpio)
1092 {
1093         unsigned long flags;
1094
1095         if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1096                 gpio_error(gpio);
1097                 return -EINVAL;
1098         }
1099
1100         local_irq_save_hw(flags);
1101         __bfin_gpio_direction_input(gpio);
1102         AWA_DUMMY_READ(inen);
1103         local_irq_restore_hw(flags);
1104
1105         return 0;
1106 }
1107 EXPORT_SYMBOL(bfin_gpio_direction_input);
1108
1109 void bfin_gpio_irq_prepare(unsigned gpio)
1110 {
1111 #ifdef CONFIG_BF54x
1112         unsigned long flags;
1113 #endif
1114
1115         port_setup(gpio, GPIO_USAGE);
1116
1117 #ifdef CONFIG_BF54x
1118         local_irq_save_hw(flags);
1119         __bfin_gpio_direction_input(gpio);
1120         local_irq_restore_hw(flags);
1121 #endif
1122 }
1123
1124 void bfin_gpio_set_value(unsigned gpio, int arg)
1125 {
1126         if (arg)
1127                 gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1128         else
1129                 gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
1130 }
1131 EXPORT_SYMBOL(bfin_gpio_set_value);
1132
1133 int bfin_gpio_direction_output(unsigned gpio, int value)
1134 {
1135         unsigned long flags;
1136
1137         if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1138                 gpio_error(gpio);
1139                 return -EINVAL;
1140         }
1141
1142         local_irq_save_hw(flags);
1143
1144         gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
1145         gpio_set_value(gpio, value);
1146 #ifdef CONFIG_BF54x
1147         gpio_array[gpio_bank(gpio)]->dir_set = gpio_bit(gpio);
1148 #else
1149         gpio_array[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
1150 #endif
1151
1152         AWA_DUMMY_READ(dir);
1153         local_irq_restore_hw(flags);
1154
1155         return 0;
1156 }
1157 EXPORT_SYMBOL(bfin_gpio_direction_output);
1158
1159 int bfin_gpio_get_value(unsigned gpio)
1160 {
1161 #ifdef CONFIG_BF54x
1162         return (1 & (gpio_array[gpio_bank(gpio)]->data >> gpio_sub_n(gpio)));
1163 #else
1164         unsigned long flags;
1165
1166         if (unlikely(get_gpio_edge(gpio))) {
1167                 int ret;
1168                 local_irq_save_hw(flags);
1169                 set_gpio_edge(gpio, 0);
1170                 ret = get_gpio_data(gpio);
1171                 set_gpio_edge(gpio, 1);
1172                 local_irq_restore_hw(flags);
1173                 return ret;
1174         } else
1175                 return get_gpio_data(gpio);
1176 #endif
1177 }
1178 EXPORT_SYMBOL(bfin_gpio_get_value);
1179
1180 /* If we are booting from SPI and our board lacks a strong enough pull up,
1181  * the core can reset and execute the bootrom faster than the resistor can
1182  * pull the signal logically high.  To work around this (common) error in
1183  * board design, we explicitly set the pin back to GPIO mode, force /CS
1184  * high, and wait for the electrons to do their thing.
1185  *
1186  * This function only makes sense to be called from reset code, but it
1187  * lives here as we need to force all the GPIO states w/out going through
1188  * BUG() checks and such.
1189  */
1190 void bfin_reset_boot_spi_cs(unsigned short pin)
1191 {
1192         unsigned short gpio = P_IDENT(pin);
1193         port_setup(gpio, GPIO_USAGE);
1194         gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1195         AWA_DUMMY_READ(data_set);
1196         udelay(1);
1197 }
1198
1199 #if defined(CONFIG_PROC_FS)
1200 static int gpio_proc_read(char *buf, char **start, off_t offset,
1201                           int len, int *unused_i, void *unused_v)
1202 {
1203         int c, irq, gpio, outlen = 0;
1204
1205         for (c = 0; c < MAX_RESOURCES; c++) {
1206                 irq = reserved_gpio_irq_map[gpio_bank(c)] & gpio_bit(c);
1207                 gpio = reserved_gpio_map[gpio_bank(c)] & gpio_bit(c);
1208                 if (!check_gpio(c) && (gpio || irq))
1209                         len = sprintf(buf, "GPIO_%d: \t%s%s \t\tGPIO %s\n", c,
1210                                  get_label(c), (gpio && irq) ? " *" : "",
1211                                  get_gpio_dir(c) ? "OUTPUT" : "INPUT");
1212                 else if (reserved_peri_map[gpio_bank(c)] & gpio_bit(c))
1213                         len = sprintf(buf, "GPIO_%d: \t%s \t\tPeripheral\n", c, get_label(c));
1214                 else
1215                         continue;
1216                 buf += len;
1217                 outlen += len;
1218         }
1219         return outlen;
1220 }
1221
1222 static __init int gpio_register_proc(void)
1223 {
1224         struct proc_dir_entry *proc_gpio;
1225
1226         proc_gpio = create_proc_entry("gpio", S_IRUGO, NULL);
1227         if (proc_gpio)
1228                 proc_gpio->read_proc = gpio_proc_read;
1229         return proc_gpio != NULL;
1230 }
1231 __initcall(gpio_register_proc);
1232 #endif
1233
1234 #ifdef CONFIG_GPIOLIB
1235 int bfin_gpiolib_direction_input(struct gpio_chip *chip, unsigned gpio)
1236 {
1237         return bfin_gpio_direction_input(gpio);
1238 }
1239
1240 int bfin_gpiolib_direction_output(struct gpio_chip *chip, unsigned gpio, int level)
1241 {
1242         return bfin_gpio_direction_output(gpio, level);
1243 }
1244
1245 int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio)
1246 {
1247         return bfin_gpio_get_value(gpio);
1248 }
1249
1250 void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value)
1251 {
1252         return bfin_gpio_set_value(gpio, value);
1253 }
1254
1255 int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio)
1256 {
1257         return bfin_gpio_request(gpio, chip->label);
1258 }
1259
1260 void bfin_gpiolib_gpio_free(struct gpio_chip *chip, unsigned gpio)
1261 {
1262         return bfin_gpio_free(gpio);
1263 }
1264
1265 static struct gpio_chip bfin_chip = {
1266         .label                  = "Blackfin-GPIOlib",
1267         .direction_input        = bfin_gpiolib_direction_input,
1268         .get                    = bfin_gpiolib_get_value,
1269         .direction_output       = bfin_gpiolib_direction_output,
1270         .set                    = bfin_gpiolib_set_value,
1271         .request                = bfin_gpiolib_gpio_request,
1272         .free                   = bfin_gpiolib_gpio_free,
1273         .base                   = 0,
1274         .ngpio                  = MAX_BLACKFIN_GPIOS,
1275 };
1276
1277 static int __init bfin_gpiolib_setup(void)
1278 {
1279         return gpiochip_add(&bfin_chip);
1280 }
1281 arch_initcall(bfin_gpiolib_setup);
1282 #endif