1 /* linux/arch/arm/plat-s3c24xx/s3c244x-irq.c
3 * Copyright (c) 2003,2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/interrupt.h>
25 #include <linux/ioport.h>
26 #include <linux/sysdev.h>
29 #include <mach/hardware.h>
32 #include <asm/mach/irq.h>
34 #include <mach/regs-irq.h>
35 #include <mach/regs-gpio.h>
43 static void s3c_irq_demux_cam(unsigned int irq
,
44 struct irq_desc
*desc
)
46 unsigned int subsrc
, submsk
;
48 /* read the current pending interrupts, and the mask
49 * for what it is available */
51 subsrc
= __raw_readl(S3C2410_SUBSRCPND
);
52 submsk
= __raw_readl(S3C2410_INTSUBMSK
);
60 generic_handle_irq(IRQ_S3C2440_CAM_C
);
63 generic_handle_irq(IRQ_S3C2440_CAM_P
);
68 #define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
71 s3c_irq_cam_mask(unsigned int irqno
)
73 s3c_irqsub_mask(irqno
, INTMSK_CAM
, 3<<11);
77 s3c_irq_cam_unmask(unsigned int irqno
)
79 s3c_irqsub_unmask(irqno
, INTMSK_CAM
);
83 s3c_irq_cam_ack(unsigned int irqno
)
85 s3c_irqsub_maskack(irqno
, INTMSK_CAM
, 3<<11);
88 static struct irq_chip s3c_irq_cam
= {
89 .mask
= s3c_irq_cam_mask
,
90 .unmask
= s3c_irq_cam_unmask
,
91 .ack
= s3c_irq_cam_ack
,
94 static int s3c244x_irq_add(struct sys_device
*sysdev
)
98 set_irq_chip(IRQ_NFCON
, &s3c_irq_level_chip
);
99 set_irq_handler(IRQ_NFCON
, handle_level_irq
);
100 set_irq_flags(IRQ_NFCON
, IRQF_VALID
);
102 /* add chained handler for camera */
104 set_irq_chip(IRQ_CAM
, &s3c_irq_level_chip
);
105 set_irq_handler(IRQ_CAM
, handle_level_irq
);
106 set_irq_chained_handler(IRQ_CAM
, s3c_irq_demux_cam
);
108 for (irqno
= IRQ_S3C2440_CAM_C
; irqno
<= IRQ_S3C2440_CAM_P
; irqno
++) {
109 set_irq_chip(irqno
, &s3c_irq_cam
);
110 set_irq_handler(irqno
, handle_level_irq
);
111 set_irq_flags(irqno
, IRQF_VALID
);
117 static struct sysdev_driver s3c2440_irq_driver
= {
118 .add
= s3c244x_irq_add
,
119 .suspend
= s3c24xx_irq_suspend
,
120 .resume
= s3c24xx_irq_resume
,
123 static int s3c2440_irq_init(void)
125 return sysdev_driver_register(&s3c2440_sysclass
, &s3c2440_irq_driver
);
128 arch_initcall(s3c2440_irq_init
);
130 static struct sysdev_driver s3c2442_irq_driver
= {
131 .add
= s3c244x_irq_add
,
132 .suspend
= s3c24xx_irq_suspend
,
133 .resume
= s3c24xx_irq_resume
,
137 static int s3c2442_irq_init(void)
139 return sysdev_driver_register(&s3c2442_sysclass
, &s3c2442_irq_driver
);
142 arch_initcall(s3c2442_irq_init
);