1 #ifndef _ASM_X86_APIC_H
2 #define _ASM_X86_APIC_H
5 #include <linux/delay.h>
7 #include <asm/alternative.h>
8 #include <asm/fixmap.h>
9 #include <asm/apicdef.h>
10 #include <asm/processor.h>
11 #include <asm/system.h>
12 #include <asm/cpufeature.h>
15 #define ARCH_APICTIMER_STOPS_ON_C3 1
21 #define APIC_VERBOSE 1
25 * Define the default level of output to be very little
26 * This can be turned up by using apic=verbose for more
27 * information and apic=debug for _lots_ of information.
28 * apic_verbosity is defined in apic.c
30 #define apic_printk(v, s, a...) do { \
31 if ((v) <= apic_verbosity) \
36 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
37 extern void generic_apic_probe(void);
39 static inline void generic_apic_probe(void)
44 #ifdef CONFIG_X86_LOCAL_APIC
46 extern unsigned int apic_verbosity
;
47 extern int local_apic_timer_c2_ok
;
49 extern int disable_apic
;
52 extern void __inquire_remote_apic(int apicid
);
53 #else /* CONFIG_SMP */
54 static inline void __inquire_remote_apic(int apicid
)
57 #endif /* CONFIG_SMP */
59 static inline void default_inquire_remote_apic(int apicid
)
61 if (apic_verbosity
>= APIC_DEBUG
)
62 __inquire_remote_apic(apicid
);
66 * Basic functions accessing APICs.
68 #ifdef CONFIG_PARAVIRT
69 #include <asm/paravirt.h>
71 #define setup_boot_clock setup_boot_APIC_clock
72 #define setup_secondary_clock setup_secondary_APIC_clock
75 extern int is_vsmp_box(void);
76 extern void xapic_wait_icr_idle(void);
77 extern u32
safe_xapic_wait_icr_idle(void);
78 extern void xapic_icr_write(u32
, u32
);
79 extern int setup_profiling_timer(unsigned int);
81 static inline void native_apic_mem_write(u32 reg
, u32 v
)
83 volatile u32
*addr
= (volatile u32
*)(APIC_BASE
+ reg
);
85 alternative_io("movl %0, %1", "xchgl %0, %1", X86_FEATURE_11AP
,
86 ASM_OUTPUT2("=r" (v
), "=m" (*addr
)),
87 ASM_OUTPUT2("0" (v
), "m" (*addr
)));
90 static inline u32
native_apic_mem_read(u32 reg
)
92 return *((volatile u32
*)(APIC_BASE
+ reg
));
95 extern void native_apic_wait_icr_idle(void);
96 extern u32
native_safe_apic_wait_icr_idle(void);
97 extern void native_apic_icr_write(u32 low
, u32 id
);
98 extern u64
native_apic_icr_read(void);
100 #ifdef CONFIG_X86_X2APIC
101 static inline void native_apic_msr_write(u32 reg
, u32 v
)
103 if (reg
== APIC_DFR
|| reg
== APIC_ID
|| reg
== APIC_LDR
||
107 wrmsr(APIC_BASE_MSR
+ (reg
>> 4), v
, 0);
110 static inline u32
native_apic_msr_read(u32 reg
)
117 rdmsr(APIC_BASE_MSR
+ (reg
>> 4), low
, high
);
121 static inline void native_x2apic_wait_icr_idle(void)
123 /* no need to wait for icr idle in x2apic */
127 static inline u32
native_safe_x2apic_wait_icr_idle(void)
129 /* no need to wait for icr idle in x2apic */
133 static inline void native_x2apic_icr_write(u32 low
, u32 id
)
135 wrmsrl(APIC_BASE_MSR
+ (APIC_ICR
>> 4), ((__u64
) id
) << 32 | low
);
138 static inline u64
native_x2apic_icr_read(void)
142 rdmsrl(APIC_BASE_MSR
+ (APIC_ICR
>> 4), val
);
147 extern void check_x2apic(void);
148 extern void enable_x2apic(void);
149 extern void enable_IR_x2apic(void);
150 extern void x2apic_icr_write(u32 low
, u32 id
);
151 static inline int x2apic_enabled(void)
158 rdmsr(MSR_IA32_APICBASE
, msr
, msr2
);
159 if (msr
& X2APIC_ENABLE
)
164 static inline void check_x2apic(void)
167 static inline void enable_x2apic(void)
170 static inline void enable_IR_x2apic(void)
173 static inline int x2apic_enabled(void)
179 extern int get_physical_broadcast(void);
181 #ifdef CONFIG_X86_X2APIC
182 static inline void ack_x2APIC_irq(void)
184 /* Docs say use 0 for future compatibility */
185 native_apic_msr_write(APIC_EOI
, 0);
189 extern int lapic_get_maxlvt(void);
190 extern void clear_local_APIC(void);
191 extern void connect_bsp_APIC(void);
192 extern void disconnect_bsp_APIC(int virt_wire_setup
);
193 extern void disable_local_APIC(void);
194 extern void lapic_shutdown(void);
195 extern int verify_local_APIC(void);
196 extern void cache_APIC_registers(void);
197 extern void sync_Arb_IDs(void);
198 extern void init_bsp_APIC(void);
199 extern void setup_local_APIC(void);
200 extern void end_local_APIC_setup(void);
201 extern void init_apic_mappings(void);
202 extern void setup_boot_APIC_clock(void);
203 extern void setup_secondary_APIC_clock(void);
204 extern int APIC_init_uniprocessor(void);
205 extern void enable_NMI_through_LVT0(void);
208 * On 32bit this is mach-xxx local
211 extern void early_init_lapic_mapping(void);
212 extern int apic_is_clustered_box(void);
214 static inline int apic_is_clustered_box(void)
220 extern u8
setup_APIC_eilvt_mce(u8 vector
, u8 msg_type
, u8 mask
);
221 extern u8
setup_APIC_eilvt_ibs(u8 vector
, u8 msg_type
, u8 mask
);
224 #else /* !CONFIG_X86_LOCAL_APIC */
225 static inline void lapic_shutdown(void) { }
226 #define local_apic_timer_c2_ok 1
227 static inline void init_apic_mappings(void) { }
228 static inline void disable_local_APIC(void) { }
230 #endif /* !CONFIG_X86_LOCAL_APIC */
233 #define SET_APIC_ID(x) (apic->set_apic_id(x))
238 #endif /* _ASM_X86_APIC_H */