1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2007 Solarflare Communications Inc.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
10 /*****************************************************************************
11 * Support for the SFE4001 NIC: driver code for the PCA9539 I/O expander that
12 * controls the PHY power rails, and for the MAX6647 temp. sensor used to check
15 #include <linux/delay.h>
16 #include "net_driver.h"
21 #include "falcon_hwdefs.h"
22 #include "falcon_io.h"
25 /**************************************************************************
27 * I2C IO Expander device
29 **************************************************************************/
34 #define P0_INVERT 0x04
35 #define P0_CONFIG 0x06
37 #define P0_EN_1V0X_LBN 0
38 #define P0_EN_1V0X_WIDTH 1
39 #define P0_EN_1V2_LBN 1
40 #define P0_EN_1V2_WIDTH 1
41 #define P0_EN_2V5_LBN 2
42 #define P0_EN_2V5_WIDTH 1
43 #define P0_EN_3V3X_LBN 3
44 #define P0_EN_3V3X_WIDTH 1
45 #define P0_EN_5V_LBN 4
46 #define P0_EN_5V_WIDTH 1
47 #define P0_SHORTEN_JTAG_LBN 5
48 #define P0_SHORTEN_JTAG_WIDTH 1
49 #define P0_X_TRST_LBN 6
50 #define P0_X_TRST_WIDTH 1
51 #define P0_DSP_RESET_LBN 7
52 #define P0_DSP_RESET_WIDTH 1
56 #define P1_INVERT 0x05
57 #define P1_CONFIG 0x07
59 #define P1_AFE_PWD_LBN 0
60 #define P1_AFE_PWD_WIDTH 1
61 #define P1_DSP_PWD25_LBN 1
62 #define P1_DSP_PWD25_WIDTH 1
63 #define P1_RESERVED_LBN 2
64 #define P1_RESERVED_WIDTH 2
65 #define P1_SPARE_LBN 4
66 #define P1_SPARE_WIDTH 4
69 /**************************************************************************
73 **************************************************************************/
100 #define MAX6647_BUSY (1 << 7) /* ADC is converting */
101 #define MAX6647_LHIGH (1 << 6) /* Local high temp. alarm */
102 #define MAX6647_LLOW (1 << 5) /* Local low temp. alarm */
103 #define MAX6647_RHIGH (1 << 4) /* Remote high temp. alarm */
104 #define MAX6647_RLOW (1 << 3) /* Remote low temp. alarm */
105 #define MAX6647_FAULT (1 << 2) /* DXN/DXP short/open circuit */
106 #define MAX6647_EOT (1 << 1) /* Remote junction overtemp. */
107 #define MAX6647_IOT (1 << 0) /* Local junction overtemp. */
109 static const u8 xgphy_max_temperature
= 90;
111 static void sfe4001_poweroff(struct efx_nic
*efx
)
113 struct i2c_client
*ioexp_client
= efx
->board_info
.ioexp_client
;
114 struct i2c_client
*hwmon_client
= efx
->board_info
.hwmon_client
;
116 /* Turn off all power rails and disable outputs */
117 i2c_smbus_write_byte_data(ioexp_client
, P0_OUT
, 0xff);
118 i2c_smbus_write_byte_data(ioexp_client
, P1_CONFIG
, 0xff);
119 i2c_smbus_write_byte_data(ioexp_client
, P0_CONFIG
, 0xff);
121 /* Clear any over-temperature alert */
122 i2c_smbus_read_byte_data(hwmon_client
, RSL
);
125 static int sfe4001_poweron(struct efx_nic
*efx
)
127 struct i2c_client
*hwmon_client
= efx
->board_info
.hwmon_client
;
128 struct i2c_client
*ioexp_client
= efx
->board_info
.ioexp_client
;
133 /* Clear any previous over-temperature alert */
134 rc
= i2c_smbus_read_byte_data(hwmon_client
, RSL
);
138 /* Enable port 0 and port 1 outputs on IO expander */
139 rc
= i2c_smbus_write_byte_data(ioexp_client
, P0_CONFIG
, 0x00);
142 rc
= i2c_smbus_write_byte_data(ioexp_client
, P1_CONFIG
,
143 0xff & ~(1 << P1_SPARE_LBN
));
147 /* If PHY power is on, turn it all off and wait 1 second to
148 * ensure a full reset.
150 rc
= i2c_smbus_read_byte_data(ioexp_client
, P0_OUT
);
153 out
= 0xff & ~((0 << P0_EN_1V2_LBN
) | (0 << P0_EN_2V5_LBN
) |
154 (0 << P0_EN_3V3X_LBN
) | (0 << P0_EN_5V_LBN
) |
155 (0 << P0_EN_1V0X_LBN
));
157 EFX_INFO(efx
, "power-cycling PHY\n");
158 rc
= i2c_smbus_write_byte_data(ioexp_client
, P0_OUT
, out
);
161 schedule_timeout_uninterruptible(HZ
);
164 for (i
= 0; i
< 20; ++i
) {
165 /* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */
166 out
= 0xff & ~((1 << P0_EN_1V2_LBN
) | (1 << P0_EN_2V5_LBN
) |
167 (1 << P0_EN_3V3X_LBN
) | (1 << P0_EN_5V_LBN
) |
168 (1 << P0_X_TRST_LBN
));
169 if (efx
->phy_mode
& PHY_MODE_SPECIAL
)
170 out
|= 1 << P0_EN_3V3X_LBN
;
172 rc
= i2c_smbus_write_byte_data(ioexp_client
, P0_OUT
, out
);
177 /* Turn on 1V power rail */
178 out
&= ~(1 << P0_EN_1V0X_LBN
);
179 rc
= i2c_smbus_write_byte_data(ioexp_client
, P0_OUT
, out
);
183 EFX_INFO(efx
, "waiting for DSP boot (attempt %d)...\n", i
);
185 /* In flash config mode, DSP does not turn on AFE, so
186 * just wait 1 second.
188 if (efx
->phy_mode
& PHY_MODE_SPECIAL
) {
189 schedule_timeout_uninterruptible(HZ
);
193 for (j
= 0; j
< 10; ++j
) {
196 /* Check DSP has asserted AFE power line */
197 rc
= i2c_smbus_read_byte_data(ioexp_client
, P1_IN
);
200 if (rc
& (1 << P1_AFE_PWD_LBN
))
205 EFX_INFO(efx
, "timed out waiting for DSP boot\n");
208 sfe4001_poweroff(efx
);
212 /* On SFE4001 rev A2 and later, we can control the FLASH_CFG_1 pin
213 * using the 3V3X output of the IO-expander. Allow the user to set
214 * this when the device is stopped, and keep it stopped then.
217 static ssize_t
show_phy_flash_cfg(struct device
*dev
,
218 struct device_attribute
*attr
, char *buf
)
220 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
221 return sprintf(buf
, "%d\n", !!(efx
->phy_mode
& PHY_MODE_SPECIAL
));
224 static ssize_t
set_phy_flash_cfg(struct device
*dev
,
225 struct device_attribute
*attr
,
226 const char *buf
, size_t count
)
228 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
229 enum efx_phy_mode old_mode
, new_mode
;
233 old_mode
= efx
->phy_mode
;
234 if (count
== 0 || *buf
== '0')
235 new_mode
= old_mode
& ~PHY_MODE_SPECIAL
;
237 new_mode
= PHY_MODE_SPECIAL
;
238 if (old_mode
== new_mode
) {
240 } else if (efx
->state
!= STATE_RUNNING
|| netif_running(efx
->net_dev
)) {
243 efx
->phy_mode
= new_mode
;
244 err
= sfe4001_poweron(efx
);
245 efx_reconfigure_port(efx
);
249 return err
? err
: count
;
252 static DEVICE_ATTR(phy_flash_cfg
, 0644, show_phy_flash_cfg
, set_phy_flash_cfg
);
254 static void sfe4001_fini(struct efx_nic
*efx
)
256 EFX_INFO(efx
, "%s\n", __func__
);
258 device_remove_file(&efx
->pci_dev
->dev
, &dev_attr_phy_flash_cfg
);
259 sfe4001_poweroff(efx
);
260 i2c_unregister_device(efx
->board_info
.ioexp_client
);
261 i2c_unregister_device(efx
->board_info
.hwmon_client
);
264 /* This board uses an I2C expander to provider power to the PHY, which needs to
265 * be turned on before the PHY can be used.
266 * Context: Process context, rtnl lock held
268 int sfe4001_init(struct efx_nic
*efx
)
270 struct i2c_client
*hwmon_client
;
273 hwmon_client
= i2c_new_dummy(&efx
->i2c_adap
, MAX6647
);
276 efx
->board_info
.hwmon_client
= hwmon_client
;
278 /* Set DSP over-temperature alert threshold */
279 EFX_INFO(efx
, "DSP cut-out at %dC\n", xgphy_max_temperature
);
280 rc
= i2c_smbus_write_byte_data(hwmon_client
, WLHO
,
281 xgphy_max_temperature
);
285 /* Read it back and verify */
286 rc
= i2c_smbus_read_byte_data(hwmon_client
, RLHN
);
289 if (rc
!= xgphy_max_temperature
) {
294 efx
->board_info
.ioexp_client
= i2c_new_dummy(&efx
->i2c_adap
, PCA9539
);
295 if (!efx
->board_info
.ioexp_client
) {
300 /* 10Xpress has fixed-function LED pins, so there is no board-specific
302 efx
->board_info
.blink
= tenxpress_phy_blink
;
304 efx
->board_info
.fini
= sfe4001_fini
;
306 rc
= sfe4001_poweron(efx
);
310 rc
= device_create_file(&efx
->pci_dev
->dev
, &dev_attr_phy_flash_cfg
);
314 EFX_INFO(efx
, "PHY is powered on\n");
318 sfe4001_poweroff(efx
);
320 i2c_unregister_device(efx
->board_info
.ioexp_client
);
322 i2c_unregister_device(hwmon_client
);