2 * (C) Copyright 2008 Intel Corporation
4 * Andy Henroid <andrew.d.henroid@intel.com>
5 * Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
9 * Save DIMM power on Intel 7300-based platforms when all CPUs/cores
10 * are idle, using the DIMM thermal throttling capability.
12 * This driver depends on the Intel integrated DMA controller (I/O AT).
13 * If the driver for I/O AT (drivers/dma/ioatdma*) is also enabled,
14 * this driver should work cooperatively.
19 #include <linux/module.h>
20 #include <linux/pci.h>
21 #include <linux/sched.h>
22 #include <linux/notifier.h>
23 #include <linux/cpumask.h>
24 #include <linux/ktime.h>
25 #include <linux/delay.h>
26 #include <linux/debugfs.h>
27 #include <linux/stop_machine.h>
31 #include "../dma/ioatdma_hw.h"
32 #include "../dma/ioatdma_registers.h"
34 #define I7300_IDLE_DRIVER_VERSION "1.55"
35 #define I7300_PRINT "i7300_idle:"
38 module_param_named(debug
, debug
, uint
, 0644);
39 MODULE_PARM_DESC(debug
, "Enable debug printks in this driver");
41 #define dprintk(fmt, arg...) \
42 do { if (debug) printk(KERN_INFO I7300_PRINT fmt, ##arg); } while (0)
45 * Value to set THRTLOW to when initiating throttling
47 * 1 = Throttle when > 4 activations per eval window (Maximum throttling)
48 * 2 = Throttle when > 8 activations
49 * 168 = Throttle when > 168 activations (Minimum throttling)
51 #define MAX_THRTLWLIMIT 168
52 static uint i7300_idle_thrtlowlm
= 1;
53 module_param_named(thrtlwlimit
, i7300_idle_thrtlowlm
, uint
, 0644);
54 MODULE_PARM_DESC(thrtlwlimit
,
55 "Value for THRTLOWLM activation field "
56 "(0 = disable throttle, 1 = Max throttle, 168 = Min throttle)");
59 * simple invocation and duration statistics
61 static unsigned long total_starts
;
62 static unsigned long total_us
;
65 static unsigned long past_skip
;
68 static struct pci_dev
*fbd_dev
;
70 static spinlock_t i7300_idle_lock
;
71 static int i7300_idle_active
;
73 static u8 i7300_idle_thrtctl_saved
;
74 static u8 i7300_idle_thrtlow_saved
;
75 static u32 i7300_idle_mc_saved
;
77 static cpumask_t idle_cpumask
;
78 static ktime_t start_ktime
;
79 static unsigned long avg_idle_us
;
81 static struct dentry
*debugfs_dir
;
83 /* Begin: I/O AT Helper routines */
85 #define IOAT_CHANBASE(ioat_ctl, chan) (ioat_ctl + 0x80 + 0x80 * chan)
86 /* Snoop control (disable snoops when coherency is not important) */
87 #define IOAT_DESC_SADDR_SNP_CTL (1UL << 1)
88 #define IOAT_DESC_DADDR_SNP_CTL (1UL << 2)
90 static struct pci_dev
*ioat_dev
;
91 static struct ioat_dma_descriptor
*ioat_desc
; /* I/O AT desc & data (1 page) */
92 static unsigned long ioat_desc_phys
;
93 static u8
*ioat_iomap
; /* I/O AT memory-mapped control regs (aka CB_BAR) */
94 static u8
*ioat_chanbase
;
96 /* Start I/O AT memory copy */
97 static int i7300_idle_ioat_start(void)
100 /* Clear error (due to circular descriptor pointer) */
101 err
= readl(ioat_chanbase
+ IOAT_CHANERR_OFFSET
);
103 writel(err
, ioat_chanbase
+ IOAT_CHANERR_OFFSET
);
105 writeb(IOAT_CHANCMD_START
, ioat_chanbase
+ IOAT1_CHANCMD_OFFSET
);
109 /* Stop I/O AT memory copy */
110 static void i7300_idle_ioat_stop(void)
115 for (i
= 0; i
< 5; i
++) {
116 writeb(IOAT_CHANCMD_RESET
,
117 ioat_chanbase
+ IOAT1_CHANCMD_OFFSET
);
121 sts
= readq(ioat_chanbase
+ IOAT1_CHANSTS_OFFSET
) &
122 IOAT_CHANSTS_DMA_TRANSFER_STATUS
;
124 if (sts
!= IOAT_CHANSTS_DMA_TRANSFER_STATUS_ACTIVE
)
130 dprintk("failed to suspend+reset I/O AT after 5 retries\n");
134 /* Test I/O AT by copying 1024 byte from 2k to 1k */
135 static int __init
i7300_idle_ioat_selftest(u8
*ctl
,
136 struct ioat_dma_descriptor
*desc
, unsigned long desc_phys
)
140 memset(desc
, 0, 2048);
141 memset((u8
*) desc
+ 2048, 0xab, 1024);
145 desc
[0].src_addr
= desc_phys
+ 2048;
146 desc
[0].dst_addr
= desc_phys
+ 1024;
149 writeb(IOAT_CHANCMD_RESET
, ioat_chanbase
+ IOAT1_CHANCMD_OFFSET
);
150 writeb(IOAT_CHANCMD_START
, ioat_chanbase
+ IOAT1_CHANCMD_OFFSET
);
154 chan_sts
= readq(ioat_chanbase
+ IOAT1_CHANSTS_OFFSET
) &
155 IOAT_CHANSTS_DMA_TRANSFER_STATUS
;
157 if (chan_sts
!= IOAT_CHANSTS_DMA_TRANSFER_STATUS_DONE
) {
158 /* Not complete, reset the channel */
159 writeb(IOAT_CHANCMD_RESET
,
160 ioat_chanbase
+ IOAT1_CHANCMD_OFFSET
);
164 if (*(u32
*) ((u8
*) desc
+ 3068) != 0xabababab ||
165 *(u32
*) ((u8
*) desc
+ 2044) != 0xabababab) {
166 dprintk("Data values src 0x%x, dest 0x%x, memset 0x%x\n",
167 *(u32
*) ((u8
*) desc
+ 2048),
168 *(u32
*) ((u8
*) desc
+ 1024),
169 *(u32
*) ((u8
*) desc
+ 3072));
175 static struct device dummy_dma_dev
= {
176 .bus_id
= "fallback device",
177 .coherent_dma_mask
= DMA_64BIT_MASK
,
178 .dma_mask
= &dummy_dma_dev
.coherent_dma_mask
,
181 /* Setup and initialize I/O AT */
182 /* This driver needs I/O AT as the throttling takes effect only when there is
183 * some memory activity. We use I/O AT to set up a dummy copy, while all CPUs
184 * go idle and memory is throttled.
186 static int __init
i7300_idle_ioat_init(void)
188 u8 ver
, chan_count
, ioat_chan
;
191 ioat_iomap
= (u8
*) ioremap_nocache(pci_resource_start(ioat_dev
, 0),
192 pci_resource_len(ioat_dev
, 0));
195 printk(KERN_ERR I7300_PRINT
"failed to map I/O AT registers\n");
199 ver
= readb(ioat_iomap
+ IOAT_VER_OFFSET
);
200 if (ver
!= IOAT_VER_1_2
) {
201 printk(KERN_ERR I7300_PRINT
"unknown I/O AT version (%u.%u)\n",
202 ver
>> 4, ver
& 0xf);
206 chan_count
= readb(ioat_iomap
+ IOAT_CHANCNT_OFFSET
);
208 printk(KERN_ERR I7300_PRINT
"unexpected # of I/O AT channels "
214 ioat_chan
= chan_count
- 1;
215 ioat_chanbase
= IOAT_CHANBASE(ioat_iomap
, ioat_chan
);
217 chan_ctl
= readw(ioat_chanbase
+ IOAT_CHANCTRL_OFFSET
);
218 if (chan_ctl
& IOAT_CHANCTRL_CHANNEL_IN_USE
) {
219 printk(KERN_ERR I7300_PRINT
"channel %d in use\n", ioat_chan
);
223 writew(IOAT_CHANCTRL_CHANNEL_IN_USE
,
224 ioat_chanbase
+ IOAT_CHANCTRL_OFFSET
);
226 ioat_desc
= (struct ioat_dma_descriptor
*)dma_alloc_coherent(
227 &dummy_dma_dev
, 4096,
228 (dma_addr_t
*)&ioat_desc_phys
, GFP_KERNEL
);
230 printk(KERN_ERR I7300_PRINT
"failed to allocate I/O AT desc\n");
231 goto err_mark_unused
;
234 writel(ioat_desc_phys
& 0xffffffffUL
,
235 ioat_chanbase
+ IOAT1_CHAINADDR_OFFSET_LOW
);
236 writel(ioat_desc_phys
>> 32,
237 ioat_chanbase
+ IOAT1_CHAINADDR_OFFSET_HIGH
);
239 if (i7300_idle_ioat_selftest(ioat_iomap
, ioat_desc
, ioat_desc_phys
)) {
240 printk(KERN_ERR I7300_PRINT
"I/O AT self-test failed\n");
244 /* Setup circular I/O AT descriptor chain */
245 ioat_desc
[0].ctl
= IOAT_DESC_SADDR_SNP_CTL
| IOAT_DESC_DADDR_SNP_CTL
;
246 ioat_desc
[0].src_addr
= ioat_desc_phys
+ 2048;
247 ioat_desc
[0].dst_addr
= ioat_desc_phys
+ 3072;
248 ioat_desc
[0].size
= 128;
249 ioat_desc
[0].next
= ioat_desc_phys
+ sizeof(struct ioat_dma_descriptor
);
251 ioat_desc
[1].ctl
= ioat_desc
[0].ctl
;
252 ioat_desc
[1].src_addr
= ioat_desc
[0].src_addr
;
253 ioat_desc
[1].dst_addr
= ioat_desc
[0].dst_addr
;
254 ioat_desc
[1].size
= ioat_desc
[0].size
;
255 ioat_desc
[1].next
= ioat_desc_phys
;
260 dma_free_coherent(&dummy_dma_dev
, 4096, (void *)ioat_desc
, 0);
262 writew(0, ioat_chanbase
+ IOAT_CHANCTRL_OFFSET
);
270 static void __exit
i7300_idle_ioat_exit(void)
275 i7300_idle_ioat_stop();
277 /* Wait for a while for the channel to halt before releasing */
278 for (i
= 0; i
< 10; i
++) {
279 writeb(IOAT_CHANCMD_RESET
,
280 ioat_chanbase
+ IOAT1_CHANCMD_OFFSET
);
282 chan_sts
= readq(ioat_chanbase
+ IOAT1_CHANSTS_OFFSET
) &
283 IOAT_CHANSTS_DMA_TRANSFER_STATUS
;
285 if (chan_sts
!= IOAT_CHANSTS_DMA_TRANSFER_STATUS_ACTIVE
) {
286 writew(0, ioat_chanbase
+ IOAT_CHANCTRL_OFFSET
);
292 chan_sts
= readq(ioat_chanbase
+ IOAT1_CHANSTS_OFFSET
) &
293 IOAT_CHANSTS_DMA_TRANSFER_STATUS
;
296 * We tried to reset multiple times. If IO A/T channel is still active
297 * flag an error and return without cleanup. Memory leak is better
298 * than random corruption in that extreme error situation.
300 if (chan_sts
== IOAT_CHANSTS_DMA_TRANSFER_STATUS_ACTIVE
) {
301 printk(KERN_ERR I7300_PRINT
"Unable to stop IO A/T channels."
302 " Not freeing resources\n");
306 dma_free_coherent(&dummy_dma_dev
, 4096, (void *)ioat_desc
, 0);
310 /* End: I/O AT Helper routines */
312 #define DIMM_THRTLOW 0x64
313 #define DIMM_THRTCTL 0x67
314 #define DIMM_THRTCTL_THRMHUNT (1UL << 0)
316 #define DIMM_GTW_MODE (1UL << 17)
317 #define DIMM_GBLACT 0x60
320 * Keep track of an exponential-decaying average of recent idle durations.
321 * The latest duration gets DURATION_WEIGHT_PCT percentage weight
322 * in this average, with the old average getting the remaining weight.
324 * High weights emphasize recent history, low weights include long history.
326 #define DURATION_WEIGHT_PCT 55
329 * When the decaying average of recent durations or the predicted duration
330 * of the next timer interrupt is shorter than duration_threshold, the
331 * driver will decline to throttle.
333 #define DURATION_THRESHOLD_US 100
336 /* Store DIMM thermal throttle configuration */
337 static int i7300_idle_thrt_save(void)
342 pci_read_config_byte(fbd_dev
, DIMM_THRTCTL
, &i7300_idle_thrtctl_saved
);
343 pci_read_config_byte(fbd_dev
, DIMM_THRTLOW
, &i7300_idle_thrtlow_saved
);
344 pci_read_config_dword(fbd_dev
, DIMM_MC
, &i7300_idle_mc_saved
);
346 * Make sure we have Global Throttling Window Mode set to have a
347 * "short" window. This (mostly) works around an issue where
348 * throttling persists until the end of the global throttling window
349 * size. On the tested system, this was resulting in a maximum of
350 * 64 ms to exit throttling (average 32 ms). The actual numbers
351 * depends on system frequencies. Setting the short window reduces
352 * this by a factor of 4096.
354 * We will only do this only if the system is set for
355 * unlimited-activations while in open-loop throttling (i.e., when
356 * Global Activation Throttle Limit is zero).
358 pci_read_config_byte(fbd_dev
, DIMM_GBLACT
, &gblactlm
);
359 dprintk("thrtctl_saved = 0x%02x, thrtlow_saved = 0x%02x\n",
360 i7300_idle_thrtctl_saved
,
361 i7300_idle_thrtlow_saved
);
362 dprintk("mc_saved = 0x%08x, gblactlm = 0x%02x\n",
366 new_mc_val
= i7300_idle_mc_saved
| DIMM_GTW_MODE
;
367 pci_write_config_dword(fbd_dev
, DIMM_MC
, new_mc_val
);
370 dprintk("could not set GTW_MODE = 1 (OLTT enabled)\n");
375 /* Restore DIMM thermal throttle configuration */
376 static void i7300_idle_thrt_restore(void)
378 pci_write_config_dword(fbd_dev
, DIMM_MC
, i7300_idle_mc_saved
);
379 pci_write_config_byte(fbd_dev
, DIMM_THRTLOW
, i7300_idle_thrtlow_saved
);
380 pci_write_config_byte(fbd_dev
, DIMM_THRTCTL
, i7300_idle_thrtctl_saved
);
383 /* Enable DIMM thermal throttling */
384 static void i7300_idle_start(void)
389 new_ctl
= i7300_idle_thrtctl_saved
& ~DIMM_THRTCTL_THRMHUNT
;
390 pci_write_config_byte(fbd_dev
, DIMM_THRTCTL
, new_ctl
);
392 limit
= i7300_idle_thrtlowlm
;
393 if (unlikely(limit
> MAX_THRTLWLIMIT
))
394 limit
= MAX_THRTLWLIMIT
;
396 pci_write_config_byte(fbd_dev
, DIMM_THRTLOW
, limit
);
398 new_ctl
= i7300_idle_thrtctl_saved
| DIMM_THRTCTL_THRMHUNT
;
399 pci_write_config_byte(fbd_dev
, DIMM_THRTCTL
, new_ctl
);
402 /* Disable DIMM thermal throttling */
403 static void i7300_idle_stop(void)
408 new_ctl
= i7300_idle_thrtctl_saved
& ~DIMM_THRTCTL_THRMHUNT
;
409 pci_write_config_byte(fbd_dev
, DIMM_THRTCTL
, new_ctl
);
411 pci_write_config_byte(fbd_dev
, DIMM_THRTLOW
, i7300_idle_thrtlow_saved
);
412 pci_write_config_byte(fbd_dev
, DIMM_THRTCTL
, i7300_idle_thrtctl_saved
);
413 pci_read_config_byte(fbd_dev
, DIMM_THRTCTL
, &got_ctl
);
414 WARN_ON_ONCE(got_ctl
!= i7300_idle_thrtctl_saved
);
419 * i7300_avg_duration_check()
420 * return 0 if the decaying average of recent idle durations is
421 * more than DURATION_THRESHOLD_US
423 static int i7300_avg_duration_check(void)
425 if (avg_idle_us
>= DURATION_THRESHOLD_US
)
434 /* Idle notifier to look at idle CPUs */
435 static int i7300_idle_notifier(struct notifier_block
*nb
, unsigned long val
,
440 static ktime_t idle_begin_time
;
441 static int time_init
= 1;
443 if (!i7300_idle_thrtlowlm
)
446 if (unlikely(time_init
)) {
448 idle_begin_time
= ktime_get();
451 spin_lock_irqsave(&i7300_idle_lock
, flags
);
452 if (val
== IDLE_START
) {
454 cpu_set(smp_processor_id(), idle_cpumask
);
456 if (cpus_weight(idle_cpumask
) != num_online_cpus())
459 now_ktime
= ktime_get();
460 idle_begin_time
= now_ktime
;
462 if (i7300_avg_duration_check())
465 i7300_idle_active
= 1;
467 start_ktime
= now_ktime
;
470 i7300_idle_ioat_start();
472 } else if (val
== IDLE_END
) {
473 cpu_clear(smp_processor_id(), idle_cpumask
);
474 if (cpus_weight(idle_cpumask
) == (num_online_cpus() - 1)) {
475 /* First CPU coming out of idle */
476 u64 idle_duration_us
;
478 now_ktime
= ktime_get();
480 idle_duration_us
= ktime_to_us(ktime_sub
481 (now_ktime
, idle_begin_time
));
484 ((100 - DURATION_WEIGHT_PCT
) * avg_idle_us
+
485 DURATION_WEIGHT_PCT
* idle_duration_us
) / 100;
487 if (i7300_idle_active
) {
490 idle_ktime
= ktime_sub(now_ktime
, start_ktime
);
491 total_us
+= ktime_to_us(idle_ktime
);
493 i7300_idle_ioat_stop();
495 i7300_idle_active
= 0;
500 spin_unlock_irqrestore(&i7300_idle_lock
, flags
);
504 static struct notifier_block i7300_idle_nb
= {
505 .notifier_call
= i7300_idle_notifier
,
509 * I/O AT controls (PCI bus 0 device 8 function 0)
510 * DIMM controls (PCI bus 0 device 16 function 1)
513 #define IOAT_DEVFN PCI_DEVFN(8, 0)
515 #define MEMCTL_DEVFN PCI_DEVFN(16, 1)
519 unsigned int ioat_dev
;
523 * The i5000 chip-set has the same hooks as the i7300
524 * but support is disabled by default because this driver
525 * has not been validated on that platform.
527 #define SUPPORT_I5000 0
529 static const struct fbd_ioat fbd_ioat_list
[] = {
530 {PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_IOAT_CNB
},
532 {PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_IOAT
},
537 /* table of devices that work with this driver */
538 static const struct pci_device_id pci_tbl
[] = {
539 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_FBD_CNB
) },
541 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_5000_ERR
) },
543 { } /* Terminating entry */
546 MODULE_DEVICE_TABLE(pci
, pci_tbl
);
548 /* Check for known platforms with I/O-AT */
549 static int __init
i7300_idle_platform_probe(void)
553 fbd_dev
= pci_get_bus_and_slot(MEMCTL_BUS
, MEMCTL_DEVFN
);
557 for (i
= 0; pci_tbl
[i
].vendor
!= 0; i
++) {
558 if (fbd_dev
->vendor
== pci_tbl
[i
].vendor
&&
559 fbd_dev
->device
== pci_tbl
[i
].device
) {
563 if (pci_tbl
[i
].vendor
== 0)
566 ioat_dev
= pci_get_bus_and_slot(IOAT_BUS
, IOAT_DEVFN
);
570 for (i
= 0; fbd_ioat_list
[i
].vendor
!= 0; i
++) {
571 if (ioat_dev
->vendor
== fbd_ioat_list
[i
].vendor
&&
572 ioat_dev
->device
== fbd_ioat_list
[i
].ioat_dev
) {
579 int stats_open_generic(struct inode
*inode
, struct file
*fp
)
581 fp
->private_data
= inode
->i_private
;
585 static ssize_t
stats_read_ul(struct file
*fp
, char __user
*ubuf
, size_t count
,
588 unsigned long *p
= fp
->private_data
;
592 len
= snprintf(buf
, 32, "%lu\n", *p
);
593 return simple_read_from_buffer(ubuf
, count
, off
, buf
, len
);
596 static const struct file_operations idle_fops
= {
597 .open
= stats_open_generic
,
598 .read
= stats_read_ul
,
601 struct debugfs_file_info
{
605 } debugfs_file_list
[] = {
606 {&total_starts
, "total_starts", NULL
},
607 {&total_us
, "total_us", NULL
},
609 {&past_skip
, "past_skip", NULL
},
614 static int __init
i7300_idle_init(void)
616 spin_lock_init(&i7300_idle_lock
);
617 cpus_clear(idle_cpumask
);
620 if (i7300_idle_platform_probe())
623 if (i7300_idle_thrt_save())
626 if (i7300_idle_ioat_init())
629 debugfs_dir
= debugfs_create_dir("i7300_idle", NULL
);
633 while (debugfs_file_list
[i
].ptr
!= NULL
) {
634 debugfs_file_list
[i
].file
= debugfs_create_file(
635 debugfs_file_list
[i
].name
,
638 debugfs_file_list
[i
].ptr
,
644 idle_notifier_register(&i7300_idle_nb
);
646 printk(KERN_INFO
"i7300_idle: loaded v%s\n", I7300_IDLE_DRIVER_VERSION
);
650 static void __exit
i7300_idle_exit(void)
652 idle_notifier_unregister(&i7300_idle_nb
);
657 while (debugfs_file_list
[i
].file
!= NULL
) {
658 debugfs_remove(debugfs_file_list
[i
].file
);
662 debugfs_remove(debugfs_dir
);
664 i7300_idle_thrt_restore();
665 i7300_idle_ioat_exit();
668 module_init(i7300_idle_init
);
669 module_exit(i7300_idle_exit
);
671 MODULE_AUTHOR("Andy Henroid <andrew.d.henroid@intel.com>");
672 MODULE_DESCRIPTION("Intel Chipset DIMM Idle Power Saving Driver v"
673 I7300_IDLE_DRIVER_VERSION
);
674 MODULE_LICENSE("GPL");